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Vivien Didelot18abed22016-11-04 03:23:26 +01001/*
2 * Marvell 88E6xxx Switch Port Registers support
3 *
4 * Copyright (c) 2008 Marvell Semiconductor
5 *
Vivien Didelot4333d612017-03-28 15:10:36 -04006 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
7 * Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Vivien Didelot18abed22016-11-04 03:23:26 +01008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#ifndef _MV88E6XXX_PORT_H
16#define _MV88E6XXX_PORT_H
17
18#include "mv88e6xxx.h"
19
20int mv88e6xxx_port_read(struct mv88e6xxx_chip *chip, int port, int reg,
21 u16 *val);
22int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg,
23 u16 val);
24
Vivien Didelota0a0f622016-11-04 03:23:34 +010025int mv88e6352_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,
26 phy_interface_t mode);
27int mv88e6390_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,
28 phy_interface_t mode);
29
Vivien Didelot08ef7f12016-11-04 03:23:32 +010030int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link);
31
Vivien Didelot7f1ae072016-11-04 03:23:33 +010032int mv88e6xxx_port_set_duplex(struct mv88e6xxx_chip *chip, int port, int dup);
33
Vivien Didelot96a2b402016-11-04 03:23:35 +010034int mv88e6065_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
35int mv88e6185_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
36int mv88e6352_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
37int mv88e6390_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
38int mv88e6390x_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
39
Vivien Didelote28def332016-11-04 03:23:27 +010040int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);
41
Vivien Didelot5a7921f2016-11-04 03:23:28 +010042int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map);
43
Vivien Didelotb4e48c52016-11-04 03:23:29 +010044int mv88e6xxx_port_get_fid(struct mv88e6xxx_chip *chip, int port, u16 *fid);
45int mv88e6xxx_port_set_fid(struct mv88e6xxx_chip *chip, int port, u16 fid);
46
Vivien Didelot77064f32016-11-04 03:23:30 +010047int mv88e6xxx_port_get_pvid(struct mv88e6xxx_chip *chip, int port, u16 *pvid);
48int mv88e6xxx_port_set_pvid(struct mv88e6xxx_chip *chip, int port, u16 pvid);
49
Vivien Didelot385a0992016-11-04 03:23:31 +010050int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port,
51 u16 mode);
Andrew Lunnef0a7312016-12-03 04:35:16 +010052int mv88e6095_port_tag_remap(struct mv88e6xxx_chip *chip, int port);
53int mv88e6390_port_tag_remap(struct mv88e6xxx_chip *chip, int port);
Andrew Lunn56995cb2016-12-03 04:35:19 +010054int mv88e6xxx_port_set_egress_mode(struct mv88e6xxx_chip *chip, int port,
55 u16 mode);
56int mv88e6085_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,
57 enum mv88e6xxx_frame_mode mode);
58int mv88e6351_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,
59 enum mv88e6xxx_frame_mode mode);
Vivien Didelot601aeed2017-03-11 16:13:00 -050060int mv88e6185_port_set_egress_floods(struct mv88e6xxx_chip *chip, int port,
61 bool unicast, bool multicast);
62int mv88e6352_port_set_egress_floods(struct mv88e6xxx_chip *chip, int port,
63 bool unicast, bool multicast);
Andrew Lunn56995cb2016-12-03 04:35:19 +010064int mv88e6351_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,
65 u16 etype);
Vivien Didelotea698f42017-03-11 16:12:50 -050066int mv88e6xxx_port_set_message_port(struct mv88e6xxx_chip *chip, int port,
67 bool message_port);
Andrew Lunn5f436662016-12-03 04:45:17 +010068int mv88e6165_port_jumbo_config(struct mv88e6xxx_chip *chip, int port);
Andrew Lunnef70b112016-12-03 04:45:18 +010069int mv88e6095_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
70int mv88e6097_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
Andrew Lunnb35d322a2016-12-03 04:45:19 +010071int mv88e6097_port_pause_config(struct mv88e6xxx_chip *chip, int port);
Andrew Lunn3ce0e652016-12-03 04:45:20 +010072int mv88e6390_port_pause_config(struct mv88e6xxx_chip *chip, int port);
Andrew Lunnf39908d2017-02-04 20:02:50 +010073int mv88e6390x_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
74 phy_interface_t mode);
75int mv88e6xxx_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode);
Andrew Lunna23b2962017-02-04 20:15:28 +010076int mv88e6xxx_port_set_map_da(struct mv88e6xxx_chip *chip, int port);
77int mv88e6095_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,
78 int upstream_port);
Vivien Didelotc8c94892017-03-11 16:13:01 -050079
80int mv88e6xxx_port_disable_learn_limit(struct mv88e6xxx_chip *chip, int port);
Vivien Didelot9dbfb4e2017-03-11 16:13:02 -050081int mv88e6xxx_port_disable_pri_override(struct mv88e6xxx_chip *chip, int port);
Vivien Didelotc8c94892017-03-11 16:13:01 -050082
Vivien Didelot18abed22016-11-04 03:23:26 +010083#endif /* _MV88E6XXX_PORT_H */