Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2016, Integrated Device Technology Inc. |
| 3 | * Copyright (c) 2015, Prodrive Technologies |
| 4 | * Copyright (c) 2015, Texas Instruments Incorporated |
| 5 | * Copyright (c) 2015, RapidIO Trade Association |
| 6 | * All rights reserved. |
| 7 | * |
| 8 | * This software is available to you under a choice of one of two licenses. |
| 9 | * You may choose to be licensed under the terms of the GNU General Public |
| 10 | * License(GPL) Version 2, or the BSD-3 Clause license below: |
| 11 | * |
| 12 | * Redistribution and use in source and binary forms, with or without |
| 13 | * modification, are permitted provided that the following conditions are met: |
| 14 | * |
| 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| 16 | * this list of conditions and the following disclaimer. |
| 17 | * |
| 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| 19 | * this list of conditions and the following disclaimer in the documentation |
| 20 | * and/or other materials provided with the distribution. |
| 21 | * |
| 22 | * 3. Neither the name of the copyright holder nor the names of its contributors |
| 23 | * may be used to endorse or promote products derived from this software without |
| 24 | * specific prior written permission. |
| 25 | * |
| 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
| 28 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 29 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR |
| 30 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 31 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 32 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| 33 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 34 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| 35 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 36 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 37 | */ |
| 38 | |
| 39 | #ifndef _RIO_MPORT_CDEV_H_ |
| 40 | #define _RIO_MPORT_CDEV_H_ |
| 41 | |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 42 | #include <linux/ioctl.h> |
| 43 | #include <linux/types.h> |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 44 | |
| 45 | struct rio_mport_maint_io { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 46 | __u16 rioid; /* destID of remote device */ |
| 47 | __u8 hopcount; /* hopcount to remote device */ |
| 48 | __u8 pad0[5]; |
| 49 | __u32 offset; /* offset in register space */ |
| 50 | __u32 length; /* length in bytes */ |
| 51 | __u64 buffer; /* pointer to data buffer */ |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 52 | }; |
| 53 | |
| 54 | /* |
| 55 | * Definitions for RapidIO data transfers: |
| 56 | * - memory mapped (MAPPED) |
| 57 | * - packet generation from memory (TRANSFER) |
| 58 | */ |
| 59 | #define RIO_TRANSFER_MODE_MAPPED (1 << 0) |
| 60 | #define RIO_TRANSFER_MODE_TRANSFER (1 << 1) |
| 61 | #define RIO_CAP_DBL_SEND (1 << 2) |
| 62 | #define RIO_CAP_DBL_RECV (1 << 3) |
| 63 | #define RIO_CAP_PW_SEND (1 << 4) |
| 64 | #define RIO_CAP_PW_RECV (1 << 5) |
| 65 | #define RIO_CAP_MAP_OUTB (1 << 6) |
| 66 | #define RIO_CAP_MAP_INB (1 << 7) |
| 67 | |
| 68 | struct rio_mport_properties { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 69 | __u16 hdid; |
| 70 | __u8 id; /* Physical port ID */ |
| 71 | __u8 index; |
| 72 | __u32 flags; |
| 73 | __u32 sys_size; /* Default addressing size */ |
| 74 | __u8 port_ok; |
| 75 | __u8 link_speed; |
| 76 | __u8 link_width; |
| 77 | __u8 pad0; |
| 78 | __u32 dma_max_sge; |
| 79 | __u32 dma_max_size; |
| 80 | __u32 dma_align; |
| 81 | __u32 transfer_mode; /* Default transfer mode */ |
| 82 | __u32 cap_sys_size; /* Capable system sizes */ |
| 83 | __u32 cap_addr_size; /* Capable addressing sizes */ |
| 84 | __u32 cap_transfer_mode; /* Capable transfer modes */ |
| 85 | __u32 cap_mport; /* Mport capabilities */ |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 86 | }; |
| 87 | |
| 88 | /* |
| 89 | * Definitions for RapidIO events; |
| 90 | * - incoming port-writes |
| 91 | * - incoming doorbells |
| 92 | */ |
| 93 | #define RIO_DOORBELL (1 << 0) |
| 94 | #define RIO_PORTWRITE (1 << 1) |
| 95 | |
| 96 | struct rio_doorbell { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 97 | __u16 rioid; |
| 98 | __u16 payload; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 99 | }; |
| 100 | |
| 101 | struct rio_doorbell_filter { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 102 | __u16 rioid; /* Use RIO_INVALID_DESTID to match all ids */ |
| 103 | __u16 low; |
| 104 | __u16 high; |
| 105 | __u16 pad0; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 106 | }; |
| 107 | |
| 108 | |
| 109 | struct rio_portwrite { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 110 | __u32 payload[16]; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 111 | }; |
| 112 | |
| 113 | struct rio_pw_filter { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 114 | __u32 mask; |
| 115 | __u32 low; |
| 116 | __u32 high; |
| 117 | __u32 pad0; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 118 | }; |
| 119 | |
| 120 | /* RapidIO base address for inbound requests set to value defined below |
| 121 | * indicates that no specific RIO-to-local address translation is requested |
| 122 | * and driver should use direct (one-to-one) address mapping. |
| 123 | */ |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 124 | #define RIO_MAP_ANY_ADDR (__u64)(~((__u64) 0)) |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 125 | |
| 126 | struct rio_mmap { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 127 | __u16 rioid; |
| 128 | __u16 pad0[3]; |
| 129 | __u64 rio_addr; |
| 130 | __u64 length; |
| 131 | __u64 handle; |
| 132 | __u64 address; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 133 | }; |
| 134 | |
| 135 | struct rio_dma_mem { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 136 | __u64 length; /* length of DMA memory */ |
| 137 | __u64 dma_handle; /* handle associated with this memory */ |
| 138 | __u64 address; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 139 | }; |
| 140 | |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 141 | struct rio_event { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 142 | __u32 header; /* event type RIO_DOORBELL or RIO_PORTWRITE */ |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 143 | union { |
| 144 | struct rio_doorbell doorbell; /* header for RIO_DOORBELL */ |
| 145 | struct rio_portwrite portwrite; /* header for RIO_PORTWRITE */ |
| 146 | } u; |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 147 | __u32 pad0; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 148 | }; |
| 149 | |
| 150 | enum rio_transfer_sync { |
| 151 | RIO_TRANSFER_SYNC, /* synchronous transfer */ |
| 152 | RIO_TRANSFER_ASYNC, /* asynchronous transfer */ |
| 153 | RIO_TRANSFER_FAF, /* fire-and-forget transfer */ |
| 154 | }; |
| 155 | |
| 156 | enum rio_transfer_dir { |
| 157 | RIO_TRANSFER_DIR_READ, /* Read operation */ |
| 158 | RIO_TRANSFER_DIR_WRITE, /* Write operation */ |
| 159 | }; |
| 160 | |
| 161 | /* |
| 162 | * RapidIO data exchange transactions are lists of individual transfers. Each |
| 163 | * transfer exchanges data between two RapidIO devices by remote direct memory |
| 164 | * access and has its own completion code. |
| 165 | * |
| 166 | * The RapidIO specification defines four types of data exchange requests: |
| 167 | * NREAD, NWRITE, SWRITE and NWRITE_R. The RapidIO DMA channel interface allows |
| 168 | * to specify the required type of write operation or combination of them when |
| 169 | * only the last data packet requires response. |
| 170 | * |
| 171 | * NREAD: read up to 256 bytes from remote device memory into local memory |
| 172 | * NWRITE: write up to 256 bytes from local memory to remote device memory |
| 173 | * without confirmation |
| 174 | * SWRITE: as NWRITE, but all addresses and payloads must be 64-bit aligned |
| 175 | * NWRITE_R: as NWRITE, but expect acknowledgment from remote device. |
| 176 | * |
| 177 | * The default exchange is chosen from NREAD and any of the WRITE modes as the |
| 178 | * driver sees fit. For write requests the user can explicitly choose between |
| 179 | * any of the write modes for each transaction. |
| 180 | */ |
| 181 | enum rio_exchange { |
| 182 | RIO_EXCHANGE_DEFAULT, /* Default method */ |
| 183 | RIO_EXCHANGE_NWRITE, /* All packets using NWRITE */ |
| 184 | RIO_EXCHANGE_SWRITE, /* All packets using SWRITE */ |
| 185 | RIO_EXCHANGE_NWRITE_R, /* Last packet NWRITE_R, others NWRITE */ |
| 186 | RIO_EXCHANGE_SWRITE_R, /* Last packet NWRITE_R, others SWRITE */ |
| 187 | RIO_EXCHANGE_NWRITE_R_ALL, /* All packets using NWRITE_R */ |
| 188 | }; |
| 189 | |
| 190 | struct rio_transfer_io { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 191 | __u64 rio_addr; /* Address in target's RIO mem space */ |
| 192 | __u64 loc_addr; |
| 193 | __u64 handle; |
| 194 | __u64 offset; /* Offset in buffer */ |
| 195 | __u64 length; /* Length in bytes */ |
| 196 | __u16 rioid; /* Target destID */ |
| 197 | __u16 method; /* Data exchange method, one of rio_exchange enum */ |
| 198 | __u32 completion_code; /* Completion code for this transfer */ |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 199 | }; |
| 200 | |
| 201 | struct rio_transaction { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 202 | __u64 block; /* Pointer to array of <count> transfers */ |
| 203 | __u32 count; /* Number of transfers */ |
| 204 | __u32 transfer_mode; /* Data transfer mode */ |
| 205 | __u16 sync; /* Synch method, one of rio_transfer_sync enum */ |
| 206 | __u16 dir; /* Transfer direction, one of rio_transfer_dir enum */ |
| 207 | __u32 pad0; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 208 | }; |
| 209 | |
| 210 | struct rio_async_tx_wait { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 211 | __u32 token; /* DMA transaction ID token */ |
| 212 | __u32 timeout; /* Wait timeout in msec, if 0 use default TO */ |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 213 | }; |
| 214 | |
| 215 | #define RIO_MAX_DEVNAME_SZ 20 |
| 216 | |
| 217 | struct rio_rdev_info { |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 218 | __u16 destid; |
| 219 | __u8 hopcount; |
| 220 | __u8 pad0; |
| 221 | __u32 comptag; |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 222 | char name[RIO_MAX_DEVNAME_SZ + 1]; |
| 223 | }; |
| 224 | |
| 225 | /* Driver IOCTL codes */ |
| 226 | #define RIO_MPORT_DRV_MAGIC 'm' |
| 227 | |
| 228 | #define RIO_MPORT_MAINT_HDID_SET \ |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 229 | _IOW(RIO_MPORT_DRV_MAGIC, 1, __u16) |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 230 | #define RIO_MPORT_MAINT_COMPTAG_SET \ |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 231 | _IOW(RIO_MPORT_DRV_MAGIC, 2, __u32) |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 232 | #define RIO_MPORT_MAINT_PORT_IDX_GET \ |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 233 | _IOR(RIO_MPORT_DRV_MAGIC, 3, __u32) |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 234 | #define RIO_MPORT_GET_PROPERTIES \ |
| 235 | _IOR(RIO_MPORT_DRV_MAGIC, 4, struct rio_mport_properties) |
| 236 | #define RIO_MPORT_MAINT_READ_LOCAL \ |
| 237 | _IOR(RIO_MPORT_DRV_MAGIC, 5, struct rio_mport_maint_io) |
| 238 | #define RIO_MPORT_MAINT_WRITE_LOCAL \ |
| 239 | _IOW(RIO_MPORT_DRV_MAGIC, 6, struct rio_mport_maint_io) |
| 240 | #define RIO_MPORT_MAINT_READ_REMOTE \ |
| 241 | _IOR(RIO_MPORT_DRV_MAGIC, 7, struct rio_mport_maint_io) |
| 242 | #define RIO_MPORT_MAINT_WRITE_REMOTE \ |
| 243 | _IOW(RIO_MPORT_DRV_MAGIC, 8, struct rio_mport_maint_io) |
| 244 | #define RIO_ENABLE_DOORBELL_RANGE \ |
| 245 | _IOW(RIO_MPORT_DRV_MAGIC, 9, struct rio_doorbell_filter) |
| 246 | #define RIO_DISABLE_DOORBELL_RANGE \ |
| 247 | _IOW(RIO_MPORT_DRV_MAGIC, 10, struct rio_doorbell_filter) |
| 248 | #define RIO_ENABLE_PORTWRITE_RANGE \ |
| 249 | _IOW(RIO_MPORT_DRV_MAGIC, 11, struct rio_pw_filter) |
| 250 | #define RIO_DISABLE_PORTWRITE_RANGE \ |
| 251 | _IOW(RIO_MPORT_DRV_MAGIC, 12, struct rio_pw_filter) |
| 252 | #define RIO_SET_EVENT_MASK \ |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 253 | _IOW(RIO_MPORT_DRV_MAGIC, 13, __u32) |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 254 | #define RIO_GET_EVENT_MASK \ |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 255 | _IOR(RIO_MPORT_DRV_MAGIC, 14, __u32) |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 256 | #define RIO_MAP_OUTBOUND \ |
| 257 | _IOWR(RIO_MPORT_DRV_MAGIC, 15, struct rio_mmap) |
| 258 | #define RIO_UNMAP_OUTBOUND \ |
| 259 | _IOW(RIO_MPORT_DRV_MAGIC, 16, struct rio_mmap) |
| 260 | #define RIO_MAP_INBOUND \ |
| 261 | _IOWR(RIO_MPORT_DRV_MAGIC, 17, struct rio_mmap) |
| 262 | #define RIO_UNMAP_INBOUND \ |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 263 | _IOW(RIO_MPORT_DRV_MAGIC, 18, __u64) |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 264 | #define RIO_ALLOC_DMA \ |
| 265 | _IOWR(RIO_MPORT_DRV_MAGIC, 19, struct rio_dma_mem) |
| 266 | #define RIO_FREE_DMA \ |
Alexandre Bounine | 4e1016d | 2016-05-05 16:22:06 -0700 | [diff] [blame^] | 267 | _IOW(RIO_MPORT_DRV_MAGIC, 20, __u64) |
Alexandre Bounine | e8de370 | 2016-03-22 14:27:08 -0700 | [diff] [blame] | 268 | #define RIO_TRANSFER \ |
| 269 | _IOWR(RIO_MPORT_DRV_MAGIC, 21, struct rio_transaction) |
| 270 | #define RIO_WAIT_FOR_ASYNC \ |
| 271 | _IOW(RIO_MPORT_DRV_MAGIC, 22, struct rio_async_tx_wait) |
| 272 | #define RIO_DEV_ADD \ |
| 273 | _IOW(RIO_MPORT_DRV_MAGIC, 23, struct rio_rdev_info) |
| 274 | #define RIO_DEV_DEL \ |
| 275 | _IOW(RIO_MPORT_DRV_MAGIC, 24, struct rio_rdev_info) |
| 276 | |
| 277 | #endif /* _RIO_MPORT_CDEV_H_ */ |