Guenter Roeck | f0690a2 | 2017-04-27 14:09:56 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2015-2017 Google, Inc |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #ifndef __LINUX_USB_PD_H |
| 16 | #define __LINUX_USB_PD_H |
| 17 | |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/usb/typec.h> |
| 20 | |
| 21 | /* USB PD Messages */ |
| 22 | enum pd_ctrl_msg_type { |
| 23 | /* 0 Reserved */ |
| 24 | PD_CTRL_GOOD_CRC = 1, |
| 25 | PD_CTRL_GOTO_MIN = 2, |
| 26 | PD_CTRL_ACCEPT = 3, |
| 27 | PD_CTRL_REJECT = 4, |
| 28 | PD_CTRL_PING = 5, |
| 29 | PD_CTRL_PS_RDY = 6, |
| 30 | PD_CTRL_GET_SOURCE_CAP = 7, |
| 31 | PD_CTRL_GET_SINK_CAP = 8, |
| 32 | PD_CTRL_DR_SWAP = 9, |
| 33 | PD_CTRL_PR_SWAP = 10, |
| 34 | PD_CTRL_VCONN_SWAP = 11, |
| 35 | PD_CTRL_WAIT = 12, |
| 36 | PD_CTRL_SOFT_RESET = 13, |
| 37 | /* 14-15 Reserved */ |
| 38 | }; |
| 39 | |
| 40 | enum pd_data_msg_type { |
| 41 | /* 0 Reserved */ |
| 42 | PD_DATA_SOURCE_CAP = 1, |
| 43 | PD_DATA_REQUEST = 2, |
| 44 | PD_DATA_BIST = 3, |
| 45 | PD_DATA_SINK_CAP = 4, |
| 46 | /* 5-14 Reserved */ |
| 47 | PD_DATA_VENDOR_DEF = 15, |
| 48 | }; |
| 49 | |
| 50 | #define PD_REV10 0x0 |
| 51 | #define PD_REV20 0x1 |
| 52 | |
| 53 | #define PD_HEADER_CNT_SHIFT 12 |
| 54 | #define PD_HEADER_CNT_MASK 0x7 |
| 55 | #define PD_HEADER_ID_SHIFT 9 |
| 56 | #define PD_HEADER_ID_MASK 0x7 |
| 57 | #define PD_HEADER_PWR_ROLE BIT(8) |
| 58 | #define PD_HEADER_REV_SHIFT 6 |
| 59 | #define PD_HEADER_REV_MASK 0x3 |
| 60 | #define PD_HEADER_DATA_ROLE BIT(5) |
| 61 | #define PD_HEADER_TYPE_SHIFT 0 |
| 62 | #define PD_HEADER_TYPE_MASK 0xf |
| 63 | |
| 64 | #define PD_HEADER(type, pwr, data, id, cnt) \ |
| 65 | ((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \ |
| 66 | ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \ |
| 67 | ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \ |
| 68 | (PD_REV20 << PD_HEADER_REV_SHIFT) | \ |
| 69 | (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \ |
| 70 | (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT)) |
| 71 | |
| 72 | #define PD_HEADER_LE(type, pwr, data, id, cnt) \ |
| 73 | cpu_to_le16(PD_HEADER((type), (pwr), (data), (id), (cnt))) |
| 74 | |
| 75 | static inline unsigned int pd_header_cnt(u16 header) |
| 76 | { |
| 77 | return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK; |
| 78 | } |
| 79 | |
| 80 | static inline unsigned int pd_header_cnt_le(__le16 header) |
| 81 | { |
| 82 | return pd_header_cnt(le16_to_cpu(header)); |
| 83 | } |
| 84 | |
| 85 | static inline unsigned int pd_header_type(u16 header) |
| 86 | { |
| 87 | return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK; |
| 88 | } |
| 89 | |
| 90 | static inline unsigned int pd_header_type_le(__le16 header) |
| 91 | { |
| 92 | return pd_header_type(le16_to_cpu(header)); |
| 93 | } |
| 94 | |
Guenter Roeck | 5fec4b5 | 2017-05-09 09:04:56 -0700 | [diff] [blame] | 95 | static inline unsigned int pd_header_msgid(u16 header) |
| 96 | { |
| 97 | return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK; |
| 98 | } |
| 99 | |
| 100 | static inline unsigned int pd_header_msgid_le(__le16 header) |
| 101 | { |
| 102 | return pd_header_msgid(le16_to_cpu(header)); |
| 103 | } |
| 104 | |
Guenter Roeck | f0690a2 | 2017-04-27 14:09:56 -0700 | [diff] [blame] | 105 | #define PD_MAX_PAYLOAD 7 |
| 106 | |
Guenter Roeck | 70cd90b | 2017-09-11 20:32:06 -0700 | [diff] [blame] | 107 | /** |
| 108 | * struct pd_message - PD message as seen on wire |
| 109 | * @header: PD message header |
| 110 | * @payload: PD message payload |
| 111 | */ |
Guenter Roeck | f0690a2 | 2017-04-27 14:09:56 -0700 | [diff] [blame] | 112 | struct pd_message { |
| 113 | __le16 header; |
| 114 | __le32 payload[PD_MAX_PAYLOAD]; |
| 115 | } __packed; |
| 116 | |
| 117 | /* PDO: Power Data Object */ |
| 118 | #define PDO_MAX_OBJECTS 7 |
| 119 | |
| 120 | enum pd_pdo_type { |
| 121 | PDO_TYPE_FIXED = 0, |
| 122 | PDO_TYPE_BATT = 1, |
| 123 | PDO_TYPE_VAR = 2, |
| 124 | }; |
| 125 | |
| 126 | #define PDO_TYPE_SHIFT 30 |
| 127 | #define PDO_TYPE_MASK 0x3 |
| 128 | |
| 129 | #define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT) |
| 130 | |
| 131 | #define PDO_VOLT_MASK 0x3ff |
| 132 | #define PDO_CURR_MASK 0x3ff |
| 133 | #define PDO_PWR_MASK 0x3ff |
| 134 | |
| 135 | #define PDO_FIXED_DUAL_ROLE BIT(29) /* Power role swap supported */ |
| 136 | #define PDO_FIXED_SUSPEND BIT(28) /* USB Suspend supported (Source) */ |
| 137 | #define PDO_FIXED_HIGHER_CAP BIT(28) /* Requires more than vSafe5V (Sink) */ |
| 138 | #define PDO_FIXED_EXTPOWER BIT(27) /* Externally powered */ |
| 139 | #define PDO_FIXED_USB_COMM BIT(26) /* USB communications capable */ |
| 140 | #define PDO_FIXED_DATA_SWAP BIT(25) /* Data role swap supported */ |
| 141 | #define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */ |
| 142 | #define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */ |
| 143 | |
| 144 | #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT) |
| 145 | #define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT) |
| 146 | |
| 147 | #define PDO_FIXED(mv, ma, flags) \ |
| 148 | (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \ |
| 149 | PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma)) |
| 150 | |
Badhri Jagan Sridharan | 5007e1b5d | 2017-11-15 17:01:55 -0800 | [diff] [blame^] | 151 | #define VSAFE5V 5000 /* mv units */ |
| 152 | |
Guenter Roeck | f0690a2 | 2017-04-27 14:09:56 -0700 | [diff] [blame] | 153 | #define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */ |
| 154 | #define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */ |
| 155 | #define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ |
| 156 | |
| 157 | #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT) |
| 158 | #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT) |
| 159 | #define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT) |
| 160 | |
| 161 | #define PDO_BATT(min_mv, max_mv, max_mw) \ |
| 162 | (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \ |
| 163 | PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw)) |
| 164 | |
| 165 | #define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */ |
| 166 | #define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */ |
| 167 | #define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */ |
| 168 | |
| 169 | #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT) |
| 170 | #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT) |
| 171 | #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT) |
| 172 | |
| 173 | #define PDO_VAR(min_mv, max_mv, max_ma) \ |
| 174 | (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \ |
| 175 | PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma)) |
| 176 | |
| 177 | static inline enum pd_pdo_type pdo_type(u32 pdo) |
| 178 | { |
| 179 | return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK; |
| 180 | } |
| 181 | |
| 182 | static inline unsigned int pdo_fixed_voltage(u32 pdo) |
| 183 | { |
| 184 | return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; |
| 185 | } |
| 186 | |
| 187 | static inline unsigned int pdo_min_voltage(u32 pdo) |
| 188 | { |
| 189 | return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; |
| 190 | } |
| 191 | |
| 192 | static inline unsigned int pdo_max_voltage(u32 pdo) |
| 193 | { |
| 194 | return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50; |
| 195 | } |
| 196 | |
| 197 | static inline unsigned int pdo_max_current(u32 pdo) |
| 198 | { |
| 199 | return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10; |
| 200 | } |
| 201 | |
| 202 | static inline unsigned int pdo_max_power(u32 pdo) |
| 203 | { |
| 204 | return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250; |
| 205 | } |
| 206 | |
| 207 | /* RDO: Request Data Object */ |
| 208 | #define RDO_OBJ_POS_SHIFT 28 |
| 209 | #define RDO_OBJ_POS_MASK 0x7 |
| 210 | #define RDO_GIVE_BACK BIT(27) /* Supports reduced operating current */ |
| 211 | #define RDO_CAP_MISMATCH BIT(26) /* Not satisfied by source caps */ |
| 212 | #define RDO_USB_COMM BIT(25) /* USB communications capable */ |
| 213 | #define RDO_NO_SUSPEND BIT(24) /* USB Suspend not supported */ |
| 214 | |
| 215 | #define RDO_PWR_MASK 0x3ff |
| 216 | #define RDO_CURR_MASK 0x3ff |
| 217 | |
| 218 | #define RDO_FIXED_OP_CURR_SHIFT 10 |
| 219 | #define RDO_FIXED_MAX_CURR_SHIFT 0 |
| 220 | |
| 221 | #define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT) |
| 222 | |
| 223 | #define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT) |
| 224 | #define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT) |
| 225 | |
| 226 | #define RDO_FIXED(idx, op_ma, max_ma, flags) \ |
| 227 | (RDO_OBJ(idx) | (flags) | \ |
| 228 | PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma)) |
| 229 | |
| 230 | #define RDO_BATT_OP_PWR_SHIFT 10 /* 250mW units */ |
| 231 | #define RDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */ |
| 232 | |
| 233 | #define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT) |
| 234 | #define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT) |
| 235 | |
| 236 | #define RDO_BATT(idx, op_mw, max_mw, flags) \ |
| 237 | (RDO_OBJ(idx) | (flags) | \ |
| 238 | RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw)) |
| 239 | |
| 240 | static inline unsigned int rdo_index(u32 rdo) |
| 241 | { |
| 242 | return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK; |
| 243 | } |
| 244 | |
| 245 | static inline unsigned int rdo_op_current(u32 rdo) |
| 246 | { |
| 247 | return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10; |
| 248 | } |
| 249 | |
| 250 | static inline unsigned int rdo_max_current(u32 rdo) |
| 251 | { |
| 252 | return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) & |
| 253 | RDO_CURR_MASK) * 10; |
| 254 | } |
| 255 | |
| 256 | static inline unsigned int rdo_op_power(u32 rdo) |
| 257 | { |
| 258 | return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250; |
| 259 | } |
| 260 | |
| 261 | static inline unsigned int rdo_max_power(u32 rdo) |
| 262 | { |
| 263 | return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250; |
| 264 | } |
| 265 | |
| 266 | /* USB PD timers and counters */ |
| 267 | #define PD_T_NO_RESPONSE 5000 /* 4.5 - 5.5 seconds */ |
| 268 | #define PD_T_DB_DETECT 10000 /* 10 - 15 seconds */ |
| 269 | #define PD_T_SEND_SOURCE_CAP 150 /* 100 - 200 ms */ |
| 270 | #define PD_T_SENDER_RESPONSE 60 /* 24 - 30 ms, relaxed */ |
| 271 | #define PD_T_SOURCE_ACTIVITY 45 |
| 272 | #define PD_T_SINK_ACTIVITY 135 |
| 273 | #define PD_T_SINK_WAIT_CAP 240 |
| 274 | #define PD_T_PS_TRANSITION 500 |
| 275 | #define PD_T_SRC_TRANSITION 35 |
| 276 | #define PD_T_DRP_SNK 40 |
| 277 | #define PD_T_DRP_SRC 30 |
| 278 | #define PD_T_PS_SOURCE_OFF 920 |
| 279 | #define PD_T_PS_SOURCE_ON 480 |
| 280 | #define PD_T_PS_HARD_RESET 30 |
| 281 | #define PD_T_SRC_RECOVER 760 |
| 282 | #define PD_T_SRC_RECOVER_MAX 1000 |
| 283 | #define PD_T_SRC_TURN_ON 275 |
| 284 | #define PD_T_SAFE_0V 650 |
| 285 | #define PD_T_VCONN_SOURCE_ON 100 |
| 286 | #define PD_T_SINK_REQUEST 100 /* 100 ms minimum */ |
| 287 | #define PD_T_ERROR_RECOVERY 100 /* minimum 25 is insufficient */ |
Badhri Jagan Sridharan | b965b63 | 2017-08-28 10:23:20 -0700 | [diff] [blame] | 288 | #define PD_T_SRCSWAPSTDBY 625 /* Maximum of 650ms */ |
| 289 | #define PD_T_NEWSRC 250 /* Maximum of 275ms */ |
Guenter Roeck | f0690a2 | 2017-04-27 14:09:56 -0700 | [diff] [blame] | 290 | |
| 291 | #define PD_T_DRP_TRY 100 /* 75 - 150 ms */ |
| 292 | #define PD_T_DRP_TRYWAIT 600 /* 400 - 800 ms */ |
| 293 | |
| 294 | #define PD_T_CC_DEBOUNCE 200 /* 100 - 200 ms */ |
| 295 | #define PD_T_PD_DEBOUNCE 20 /* 10 - 20 ms */ |
| 296 | |
| 297 | #define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP) |
| 298 | #define PD_N_HARD_RESET_COUNT 2 |
| 299 | |
| 300 | #endif /* __LINUX_USB_PD_H */ |