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gerrit-public.fairphone.software / kernel / msm-5.4 / 520f7bd73354f003a9a59937b28e4903d985c420 / . / include / linux / irqchip / arm-gic.h
blob: a67ca55e6f4e5a9f3f797d66e5bed196f95345a6 [file] [log] [blame]
Russell Kingf27ecac2005-08-18 21:31:00 +0100[diff] [blame]1/*
Rob Herring520f7bd2012-12-27 13:10:24 -0600[diff] [blame^]2 * include/linux/irqchip/arm-gic.h
Russell Kingf27ecac2005-08-18 21:31:00 +0100[diff] [blame]3 *
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
Rob Herring520f7bd2012-12-27 13:10:24 -0600[diff] [blame^]10#ifndef __LINUX_IRQCHIP_ARM_GIC_H
11#define __LINUX_IRQCHIP_ARM_GIC_H
Russell Kingf27ecac2005-08-18 21:31:00 +0100[diff] [blame]12
Russell Kingf27ecac2005-08-18 21:31:00 +0100[diff] [blame]13#define GIC_CPU_CTRL 0x00
14#define GIC_CPU_PRIMASK 0x04
15#define GIC_CPU_BINPOINT 0x08
16#define GIC_CPU_INTACK 0x0c
17#define GIC_CPU_EOI 0x10
18#define GIC_CPU_RUNNINGPRI 0x14
19#define GIC_CPU_HIGHPRI 0x18
20
21#define GIC_DIST_CTRL 0x000
22#define GIC_DIST_CTR 0x004
23#define GIC_DIST_ENABLE_SET 0x100
24#define GIC_DIST_ENABLE_CLEAR 0x180
25#define GIC_DIST_PENDING_SET 0x200
26#define GIC_DIST_PENDING_CLEAR 0x280
27#define GIC_DIST_ACTIVE_BIT 0x300
28#define GIC_DIST_PRI 0x400
29#define GIC_DIST_TARGET 0x800
30#define GIC_DIST_CONFIG 0xc00
31#define GIC_DIST_SOFTINT 0xf00
32
Rob Herring4294f8b2011-09-28 21:25:31 -0500[diff] [blame]33struct device_node;
34
Santosh Shilimkard7ed36a2011-03-02 08:03:22 +0100[diff] [blame]35extern struct irq_chip gic_arch_extn;
Russell Kingff2e27a2010-12-04 16:13:29 +0000[diff] [blame]36
Marc Zyngierdb0d4db2011-11-12 16:09:49 +0000[diff] [blame]37void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
Grant Likely75294952012-02-14 14:06:57 -0700[diff] [blame]38 u32 offset, struct device_node *);
Russell King38489532010-12-04 16:01:03 +0000[diff] [blame]39void gic_secondary_init(unsigned int);
Catalin Marinasb3a1bde2007-02-14 19:14:56 +0100[diff] [blame]40void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
Changhwan Youne807acb2011-07-16 10:49:47 +0900[diff] [blame]41
Marc Zyngierdb0d4db2011-11-12 16:09:49 +0000[diff] [blame]42static inline void gic_init(unsigned int nr, int start,
43 void __iomem *dist , void __iomem *cpu)
44{
Grant Likely75294952012-02-14 14:06:57 -0700[diff] [blame]45 gic_init_bases(nr, start, dist, cpu, 0, NULL);
Marc Zyngierdb0d4db2011-11-12 16:09:49 +0000[diff] [blame]46}
47
Russell Kingf27ecac2005-08-18 21:31:00 +0100[diff] [blame]48#endif