Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * General-Purpose Memory Controller for OMAP2 |
| 3 | * |
| 4 | * Copyright (C) 2005-2006 Nokia Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #ifndef __OMAP2_GPMC_H |
| 12 | #define __OMAP2_GPMC_H |
| 13 | |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 14 | #include <linux/platform_data/mtd-nand-omap2.h> |
| 15 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 16 | /* Maximum Number of Chip Selects */ |
| 17 | #define GPMC_CS_NUM 8 |
| 18 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 19 | #define GPMC_CS_CONFIG1 0x00 |
| 20 | #define GPMC_CS_CONFIG2 0x04 |
| 21 | #define GPMC_CS_CONFIG3 0x08 |
| 22 | #define GPMC_CS_CONFIG4 0x0c |
| 23 | #define GPMC_CS_CONFIG5 0x10 |
| 24 | #define GPMC_CS_CONFIG6 0x14 |
| 25 | #define GPMC_CS_CONFIG7 0x18 |
| 26 | #define GPMC_CS_NAND_COMMAND 0x1c |
| 27 | #define GPMC_CS_NAND_ADDRESS 0x20 |
| 28 | #define GPMC_CS_NAND_DATA 0x24 |
| 29 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 30 | /* Control Commands */ |
| 31 | #define GPMC_CONFIG_RDY_BSY 0x00000001 |
| 32 | #define GPMC_CONFIG_DEV_SIZE 0x00000002 |
| 33 | #define GPMC_CONFIG_DEV_TYPE 0x00000003 |
| 34 | #define GPMC_SET_IRQ_STATUS 0x00000004 |
| 35 | #define GPMC_CONFIG_WP 0x00000005 |
| 36 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 37 | #define GPMC_ENABLE_IRQ 0x0000000d |
| 38 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 39 | /* ECC commands */ |
| 40 | #define GPMC_ECC_READ 0 /* Reset Hardware ECC for read */ |
| 41 | #define GPMC_ECC_WRITE 1 /* Reset Hardware ECC for write */ |
| 42 | #define GPMC_ECC_READSYN 2 /* Reset before syndrom is read back */ |
Tony Lindgren | 646e3ed | 2008-10-06 15:49:36 +0300 | [diff] [blame] | 43 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 44 | #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 45 | #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 46 | #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) |
| 47 | #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 48 | #define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 49 | #define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) |
| 50 | #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) |
| 51 | #define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) |
| 52 | #define GPMC_CONFIG1_PAGE_LEN(val) ((val & 3) << 23) |
| 53 | #define GPMC_CONFIG1_WAIT_READ_MON (1 << 22) |
| 54 | #define GPMC_CONFIG1_WAIT_WRITE_MON (1 << 21) |
| 55 | #define GPMC_CONFIG1_WAIT_MON_IIME(val) ((val & 3) << 18) |
| 56 | #define GPMC_CONFIG1_WAIT_PIN_SEL(val) ((val & 3) << 16) |
| 57 | #define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12) |
| 58 | #define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1) |
| 59 | #define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10) |
| 60 | #define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 61 | #define GPMC_CONFIG1_MUXADDDATA (1 << 9) |
| 62 | #define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4) |
| 63 | #define GPMC_CONFIG1_FCLK_DIV(val) (val & 3) |
| 64 | #define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) |
| 65 | #define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2)) |
| 66 | #define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3)) |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 67 | #define GPMC_CONFIG7_CSVALID (1 << 6) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 68 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 69 | #define GPMC_DEVICETYPE_NOR 0 |
| 70 | #define GPMC_DEVICETYPE_NAND 2 |
| 71 | #define GPMC_CONFIG_WRITEPROTECT 0x00000010 |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 72 | #define WR_RD_PIN_MONITORING 0x00600000 |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 73 | #define GPMC_IRQ_FIFOEVENTENABLE 0x01 |
| 74 | #define GPMC_IRQ_COUNT_EVENT 0x02 |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 75 | |
Sukumar Ghorai | 317379a | 2011-01-28 15:42:07 +0530 | [diff] [blame] | 76 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 77 | /* |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 78 | * Note that all values in this struct are in nanoseconds except sync_clk |
| 79 | * (which is in picoseconds), while the register values are in gpmc_fck cycles. |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 80 | */ |
| 81 | struct gpmc_timings { |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 82 | /* Minimum clock period for synchronous mode (in picoseconds) */ |
| 83 | u32 sync_clk; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 84 | |
| 85 | /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */ |
| 86 | u16 cs_on; /* Assertion time */ |
| 87 | u16 cs_rd_off; /* Read deassertion time */ |
| 88 | u16 cs_wr_off; /* Write deassertion time */ |
| 89 | |
| 90 | /* ADV signal timings corresponding to GPMC_CONFIG3 */ |
| 91 | u16 adv_on; /* Assertion time */ |
| 92 | u16 adv_rd_off; /* Read deassertion time */ |
| 93 | u16 adv_wr_off; /* Write deassertion time */ |
| 94 | |
| 95 | /* WE signals timings corresponding to GPMC_CONFIG4 */ |
| 96 | u16 we_on; /* WE assertion time */ |
| 97 | u16 we_off; /* WE deassertion time */ |
| 98 | |
| 99 | /* OE signals timings corresponding to GPMC_CONFIG4 */ |
| 100 | u16 oe_on; /* OE assertion time */ |
| 101 | u16 oe_off; /* OE deassertion time */ |
| 102 | |
| 103 | /* Access time and cycle time timings corresponding to GPMC_CONFIG5 */ |
| 104 | u16 page_burst_access; /* Multiple access word delay */ |
| 105 | u16 access; /* Start-cycle to first data valid delay */ |
| 106 | u16 rd_cycle; /* Total read cycle time */ |
| 107 | u16 wr_cycle; /* Total write cycle time */ |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 108 | |
| 109 | /* The following are only on OMAP3430 */ |
| 110 | u16 wr_access; /* WRACCESSTIME */ |
| 111 | u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 112 | }; |
| 113 | |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 114 | extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs); |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 115 | extern int gpmc_get_client_irq(unsigned irq_config); |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 116 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 117 | extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 118 | extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps); |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 119 | extern unsigned int gpmc_ticks_to_ns(unsigned int ticks); |
Kai Svahn | 2330059 | 2007-01-26 12:29:40 -0800 | [diff] [blame] | 120 | extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns); |
| 121 | extern unsigned long gpmc_get_fclk_period(void); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 122 | |
| 123 | extern void gpmc_cs_write_reg(int cs, int idx, u32 val); |
| 124 | extern u32 gpmc_cs_read_reg(int cs, int idx); |
Afzal Mohammed | 1b47ca1 | 2012-08-19 18:29:45 +0530 | [diff] [blame] | 125 | extern int gpmc_calc_divider(unsigned int sync_clk); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 126 | extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 127 | extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); |
| 128 | extern void gpmc_cs_free(int cs); |
Tony Lindgren | 39b8e69 | 2006-12-12 23:02:43 -0800 | [diff] [blame] | 129 | extern int gpmc_cs_set_reserved(int cs, int reserved); |
Tony Lindgren | f4e4c32 | 2006-12-07 13:57:38 -0800 | [diff] [blame] | 130 | extern int gpmc_cs_reserved(int cs); |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 131 | extern void omap3_gpmc_save_context(void); |
| 132 | extern void omap3_gpmc_restore_context(void); |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 133 | extern int gpmc_cs_configure(int cs, int cmd, int wval); |
Ivan Djelic | 8d602cf | 2012-04-26 14:17:49 +0200 | [diff] [blame] | 134 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 135 | #endif |