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gerrit-public.fairphone.software / kernel / msm-5.4 / 36229897ba966bb0dc9e060222ff17b198252367 / . / tools / power / x86 / turbostat / turbostat.c
blob: 2e47c2bc3e271e86fac661cf916307ee980d79ac [file] [log] [blame]
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]5 * Copyright (c) 2013 Intel Corporation.
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]22#define _GNU_SOURCE
Josh Triplettb731f312013-08-20 17:20:12 -0700[diff] [blame]23#include MSRHEADER
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]24#include <stdarg.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]25#include <stdio.h>
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]26#include <err.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]36#include <getopt.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]40#include <sched.h>
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]41#include <time.h>
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]42#include <cpuid.h>
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]43#include <linux/capability.h>
44#include <errno.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]45
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]46char *proc_stat = "/proc/stat";
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]47FILE *outf;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]48int *fd_percpu;
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]49struct timespec interval_ts = {5, 0};
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]50unsigned int debug;
51unsigned int rapl_joules;
52unsigned int summary_only;
53unsigned int dump_only;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]54unsigned int skip_c0;
55unsigned int skip_c1;
56unsigned int do_nhm_cstates;
57unsigned int do_snb_cstates;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]58unsigned int do_knl_cstates;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]59unsigned int do_pc2;
60unsigned int do_pc3;
61unsigned int do_pc6;
62unsigned int do_pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]63unsigned int do_c8_c9_c10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]64unsigned int do_skl_residency;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]65unsigned int do_slm_cstates;
66unsigned int use_c1_residency_msr;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]67unsigned int has_aperf;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]68unsigned int has_epb;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]69unsigned int units = 1000000; /* MHz etc */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]70unsigned int genuine_intel;
71unsigned int has_invariant_tsc;
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]72unsigned int do_nhm_platform_info;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]73unsigned int extra_msr_offset32;
74unsigned int extra_msr_offset64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]75unsigned int extra_delta_offset32;
76unsigned int extra_delta_offset64;
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]77unsigned int aperf_mperf_multiplier = 1;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]78int do_smi;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]79double bclk;
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]80double base_hz;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]81unsigned int has_base_hz;
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]82double tsc_tweak = 1.0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]83unsigned int show_pkg;
84unsigned int show_core;
85unsigned int show_cpu;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]86unsigned int show_pkg_only;
87unsigned int show_core_only;
88char *output_buffer, *outp;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]89unsigned int do_rapl;
90unsigned int do_dts;
91unsigned int do_ptm;
92unsigned int tcc_activation_temp;
93unsigned int tcc_activation_temp_override;
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]94double rapl_power_units, rapl_time_units;
95double rapl_dram_energy_units, rapl_energy_units;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]96double rapl_joule_counter_range;
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]97unsigned int do_core_perf_limit_reasons;
98unsigned int do_gfx_perf_limit_reasons;
99unsigned int do_ring_perf_limit_reasons;
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]100unsigned int crystal_hz;
101unsigned long long tsc_hz;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]102int base_cpu;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]103double discover_bclk(unsigned int family, unsigned int model);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]104unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
105 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
106unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
107unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
108unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
109unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]110
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]111#define RAPL_PKG (1 << 0)
112 /* 0x610 MSR_PKG_POWER_LIMIT */
113 /* 0x611 MSR_PKG_ENERGY_STATUS */
114#define RAPL_PKG_PERF_STATUS (1 << 1)
115 /* 0x613 MSR_PKG_PERF_STATUS */
116#define RAPL_PKG_POWER_INFO (1 << 2)
117 /* 0x614 MSR_PKG_POWER_INFO */
118
119#define RAPL_DRAM (1 << 3)
120 /* 0x618 MSR_DRAM_POWER_LIMIT */
121 /* 0x619 MSR_DRAM_ENERGY_STATUS */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]122#define RAPL_DRAM_PERF_STATUS (1 << 4)
123 /* 0x61b MSR_DRAM_PERF_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]124#define RAPL_DRAM_POWER_INFO (1 << 5)
125 /* 0x61c MSR_DRAM_POWER_INFO */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]126
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]127#define RAPL_CORES (1 << 6)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]128 /* 0x638 MSR_PP0_POWER_LIMIT */
129 /* 0x639 MSR_PP0_ENERGY_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]130#define RAPL_CORE_POLICY (1 << 7)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]131 /* 0x63a MSR_PP0_POLICY */
132
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]133#define RAPL_GFX (1 << 8)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]134 /* 0x640 MSR_PP1_POWER_LIMIT */
135 /* 0x641 MSR_PP1_ENERGY_STATUS */
136 /* 0x642 MSR_PP1_POLICY */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]137#define TJMAX_DEFAULT 100
138
139#define MAX(a, b) ((a) > (b) ? (a) : (b))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]140
141int aperf_mperf_unstable;
142int backwards_count;
143char *progname;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]144
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]145cpu_set_t *cpu_present_set, *cpu_affinity_set;
146size_t cpu_present_setsize, cpu_affinity_setsize;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]147
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]148struct thread_data {
149 unsigned long long tsc;
150 unsigned long long aperf;
151 unsigned long long mperf;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]152 unsigned long long c1;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]153 unsigned long long extra_msr64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]154 unsigned long long extra_delta64;
155 unsigned long long extra_msr32;
156 unsigned long long extra_delta32;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]157 unsigned int smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]158 unsigned int cpu_id;
159 unsigned int flags;
160#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
161#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
162} *thread_even, *thread_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]163
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]164struct core_data {
165 unsigned long long c3;
166 unsigned long long c6;
167 unsigned long long c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]168 unsigned int core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]169 unsigned int core_id;
170} *core_even, *core_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]171
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]172struct pkg_data {
173 unsigned long long pc2;
174 unsigned long long pc3;
175 unsigned long long pc6;
176 unsigned long long pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]177 unsigned long long pc8;
178 unsigned long long pc9;
179 unsigned long long pc10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]180 unsigned long long pkg_wtd_core_c0;
181 unsigned long long pkg_any_core_c0;
182 unsigned long long pkg_any_gfxe_c0;
183 unsigned long long pkg_both_core_gfxe_c0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]184 unsigned int package_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]185 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
186 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
187 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
188 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
189 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
190 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
191 unsigned int pkg_temp_c;
192
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]193} *package_even, *package_odd;
194
195#define ODD_COUNTERS thread_odd, core_odd, package_odd
196#define EVEN_COUNTERS thread_even, core_even, package_even
197
198#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
199 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
200 topo.num_threads_per_core + \
201 (core_no) * topo.num_threads_per_core + (thread_no))
202#define GET_CORE(core_base, core_no, pkg_no) \
203 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
204#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
205
206struct system_summary {
207 struct thread_data threads;
208 struct core_data cores;
209 struct pkg_data packages;
210} sum, average;
211
212
213struct topo_params {
214 int num_packages;
215 int num_cpus;
216 int num_cores;
217 int max_cpu_num;
218 int num_cores_per_pkg;
219 int num_threads_per_core;
220} topo;
221
222struct timeval tv_even, tv_odd, tv_delta;
223
224void setup_all_buffers(void);
225
226int cpu_is_not_present(int cpu)
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]227{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]228 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]229}
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]230/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]231 * run func(thread, core, package) in topology order
232 * skip non-present cpus
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]233 */
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]234
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]235int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
236 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]237{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]238 int retval, pkg_no, core_no, thread_no;
239
240 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
241 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
242 for (thread_no = 0; thread_no <
243 topo.num_threads_per_core; ++thread_no) {
244 struct thread_data *t;
245 struct core_data *c;
246 struct pkg_data *p;
247
248 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
249
250 if (cpu_is_not_present(t->cpu_id))
251 continue;
252
253 c = GET_CORE(core_base, core_no, pkg_no);
254 p = GET_PKG(pkg_base, pkg_no);
255
256 retval = func(t, c, p);
257 if (retval)
258 return retval;
259 }
260 }
261 }
262 return 0;
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]263}
264
265int cpu_migrate(int cpu)
266{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]267 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
268 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
269 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]270 return -1;
271 else
272 return 0;
273}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]274int get_msr_fd(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]275{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]276 char pathname[32];
277 int fd;
278
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]279 fd = fd_percpu[cpu];
280
281 if (fd)
282 return fd;
283
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]284 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
285 fd = open(pathname, O_RDONLY);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]286 if (fd < 0)
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]287 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]288
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]289 fd_percpu[cpu] = fd;
290
291 return fd;
292}
293
294int get_msr(int cpu, off_t offset, unsigned long long *msr)
295{
296 ssize_t retval;
297
298 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]299
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]300 if (retval != sizeof *msr)
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]301 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]302
303 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]304}
305
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]306/*
307 * Example Format w/ field column widths:
308 *
Len Brown75d2e442016-02-13 23:41:53 -0500[diff] [blame]309 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]310 * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]311 */
312
Len Browna829eb42011-02-10 23:36:34 -0500[diff] [blame]313void print_header(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]314{
315 if (show_pkg)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]316 outp += sprintf(outp, " Package");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]317 if (show_core)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]318 outp += sprintf(outp, " Core");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]319 if (show_cpu)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]320 outp += sprintf(outp, " CPU");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]321 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]322 outp += sprintf(outp, " Avg_MHz");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]323 if (has_aperf)
Len Brown75d2e442016-02-13 23:41:53 -0500[diff] [blame]324 outp += sprintf(outp, " Busy%%");
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]325 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]326 outp += sprintf(outp, " Bzy_MHz");
327 outp += sprintf(outp, " TSC_MHz");
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]328
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]329 if (extra_delta_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]330 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]331 if (extra_delta_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]332 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]333 if (extra_msr_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]334 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]335 if (extra_msr_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]336 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]337
338 if (!debug)
339 goto done;
340
341 if (do_smi)
342 outp += sprintf(outp, " SMI");
343
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]344 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]345 outp += sprintf(outp, " CPU%%c1");
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]346 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]347 outp += sprintf(outp, " CPU%%c3");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]348 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]349 outp += sprintf(outp, " CPU%%c6");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]350 if (do_snb_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]351 outp += sprintf(outp, " CPU%%c7");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]352
353 if (do_dts)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]354 outp += sprintf(outp, " CoreTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]355 if (do_ptm)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]356 outp += sprintf(outp, " PkgTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]357
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]358 if (do_skl_residency) {
359 outp += sprintf(outp, " Totl%%C0");
360 outp += sprintf(outp, " Any%%C0");
361 outp += sprintf(outp, " GFX%%C0");
362 outp += sprintf(outp, " CPUGFX%%");
363 }
364
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]365 if (do_pc2)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]366 outp += sprintf(outp, " Pkg%%pc2");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]367 if (do_pc3)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]368 outp += sprintf(outp, " Pkg%%pc3");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]369 if (do_pc6)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]370 outp += sprintf(outp, " Pkg%%pc6");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]371 if (do_pc7)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]372 outp += sprintf(outp, " Pkg%%pc7");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]373 if (do_c8_c9_c10) {
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]374 outp += sprintf(outp, " Pkg%%pc8");
375 outp += sprintf(outp, " Pkg%%pc9");
376 outp += sprintf(outp, " Pk%%pc10");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]377 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]378
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]379 if (do_rapl && !rapl_joules) {
380 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]381 outp += sprintf(outp, " PkgWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]382 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]383 outp += sprintf(outp, " CorWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]384 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]385 outp += sprintf(outp, " GFXWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]386 if (do_rapl & RAPL_DRAM)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]387 outp += sprintf(outp, " RAMWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]388 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]389 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]390 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]391 outp += sprintf(outp, " RAM_%%");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]392 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]393 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]394 outp += sprintf(outp, " Pkg_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]395 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]396 outp += sprintf(outp, " Cor_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]397 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]398 outp += sprintf(outp, " GFX_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]399 if (do_rapl & RAPL_DRAM)
Len Brownbd6906e2015-07-24 10:35:23 -0400[diff] [blame]400 outp += sprintf(outp, " RAM_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]401 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]402 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]403 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]404 outp += sprintf(outp, " RAM_%%");
405 outp += sprintf(outp, " time");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]406
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]407 }
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]408 done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]409 outp += sprintf(outp, "\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]410}
411
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]412int dump_counters(struct thread_data *t, struct core_data *c,
413 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]414{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]415 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]416
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]417 if (t) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]418 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
419 t->cpu_id, t->flags);
420 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
421 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
422 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
423 outp += sprintf(outp, "c1: %016llX\n", t->c1);
424 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]425 extra_delta_offset32, t->extra_delta32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]426 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]427 extra_delta_offset64, t->extra_delta64);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]428 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]429 extra_msr_offset32, t->extra_msr32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]430 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]431 extra_msr_offset64, t->extra_msr64);
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]432 if (do_smi)
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]433 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]434 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]435
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]436 if (c) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]437 outp += sprintf(outp, "core: %d\n", c->core_id);
438 outp += sprintf(outp, "c3: %016llX\n", c->c3);
439 outp += sprintf(outp, "c6: %016llX\n", c->c6);
440 outp += sprintf(outp, "c7: %016llX\n", c->c7);
441 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]442 }
443
444 if (p) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]445 outp += sprintf(outp, "package: %d\n", p->package_id);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]446
447 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
448 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
449 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
450 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
451
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]452 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]453 if (do_pc3)
454 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
455 if (do_pc6)
456 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
457 if (do_pc7)
458 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]459 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
460 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
461 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
462 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
463 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
464 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
465 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
466 outp += sprintf(outp, "Throttle PKG: %0X\n",
467 p->rapl_pkg_perf_status);
468 outp += sprintf(outp, "Throttle RAM: %0X\n",
469 p->rapl_dram_perf_status);
470 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]471 }
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]472
473 outp += sprintf(outp, "\n");
474
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]475 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]476}
477
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]478/*
479 * column formatting convention & formats
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]480 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]481int format_counters(struct thread_data *t, struct core_data *c,
482 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]483{
484 double interval_float;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]485 char *fmt8;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]486
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]487 /* if showing only 1st thread in core and this isn't one, bail out */
488 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
489 return 0;
490
491 /* if showing only 1st thread in pkg and this isn't one, bail out */
492 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
493 return 0;
494
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]495 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
496
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]497 /* topo columns, print blanks on 1st (average) line */
498 if (t == &average.threads) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]499 if (show_pkg)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]500 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]501 if (show_core)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]502 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]503 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]504 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]505 } else {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]506 if (show_pkg) {
507 if (p)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]508 outp += sprintf(outp, "%8d", p->package_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]509 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]510 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]511 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]512 if (show_core) {
513 if (c)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]514 outp += sprintf(outp, "%8d", c->core_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]515 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]516 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]517 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]518 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]519 outp += sprintf(outp, "%8d", t->cpu_id);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]520 }
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]521
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]522 /* Avg_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]523 if (has_aperf)
524 outp += sprintf(outp, "%8.0f",
525 1.0 / units * t->aperf / interval_float);
526
Len Brown75d2e442016-02-13 23:41:53 -0500[diff] [blame]527 /* Busy% */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]528 if (has_aperf) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]529 if (!skip_c0)
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]530 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]531 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]532 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]533 }
534
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]535 /* Bzy_MHz */
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]536 if (has_aperf) {
537 if (has_base_hz)
538 outp += sprintf(outp, "%8.0f", base_hz / units * t->aperf / t->mperf);
539 else
540 outp += sprintf(outp, "%8.0f",
541 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
542 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]543
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]544 /* TSC_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]545 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]546
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]547 /* delta */
548 if (extra_delta_offset32)
549 outp += sprintf(outp, " %11llu", t->extra_delta32);
550
551 /* DELTA */
552 if (extra_delta_offset64)
553 outp += sprintf(outp, " %11llu", t->extra_delta64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]554 /* msr */
555 if (extra_msr_offset32)
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]556 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]557
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]558 /* MSR */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]559 if (extra_msr_offset64)
560 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]561
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]562 if (!debug)
563 goto done;
564
565 /* SMI */
566 if (do_smi)
567 outp += sprintf(outp, "%8d", t->smi_count);
568
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]569 if (do_nhm_cstates) {
570 if (!skip_c1)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]571 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]572 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]573 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]574 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]575
576 /* print per-core data only for 1st thread in core */
577 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
578 goto done;
579
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]580 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]581 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]582 if (do_nhm_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]583 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]584 if (do_snb_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]585 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]586
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]587 if (do_dts)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]588 outp += sprintf(outp, "%8d", c->core_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]589
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]590 /* print per-package data only for 1st core in package */
591 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
592 goto done;
593
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]594 /* PkgTmp */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]595 if (do_ptm)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]596 outp += sprintf(outp, "%8d", p->pkg_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]597
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]598 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
599 if (do_skl_residency) {
600 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
601 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
602 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
603 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
604 }
605
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]606 if (do_pc2)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]607 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]608 if (do_pc3)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]609 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]610 if (do_pc6)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]611 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]612 if (do_pc7)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]613 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]614 if (do_c8_c9_c10) {
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]615 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
616 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
617 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]618 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]619
620 /*
621 * If measurement interval exceeds minimum RAPL Joule Counter range,
622 * indicate that results are suspect by printing "**" in fraction place.
623 */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]624 if (interval_float < rapl_joule_counter_range)
625 fmt8 = "%8.2f";
626 else
627 fmt8 = " %6.0f**";
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]628
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]629 if (do_rapl && !rapl_joules) {
630 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]631 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]632 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]633 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]634 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]635 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]636 if (do_rapl & RAPL_DRAM)
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]637 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]638 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]639 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]640 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]641 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]642 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]643 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]644 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]645 p->energy_pkg * rapl_energy_units);
646 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]647 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]648 p->energy_cores * rapl_energy_units);
649 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]650 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]651 p->energy_gfx * rapl_energy_units);
652 if (do_rapl & RAPL_DRAM)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]653 outp += sprintf(outp, fmt8,
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]654 p->energy_dram * rapl_dram_energy_units);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]655 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]656 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]657 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]658 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]659
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]660 outp += sprintf(outp, fmt8, interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]661 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]662done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]663 outp += sprintf(outp, "\n");
664
665 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]666}
667
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]668void flush_output_stdout(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]669{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]670 FILE *filep;
671
672 if (outf == stderr)
673 filep = stdout;
674 else
675 filep = outf;
676
677 fputs(output_buffer, filep);
678 fflush(filep);
679
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]680 outp = output_buffer;
681}
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]682void flush_output_stderr(void)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]683{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]684 fputs(output_buffer, outf);
685 fflush(outf);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]686 outp = output_buffer;
687}
688void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
689{
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]690 static int printed;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]691
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]692 if (!printed || !summary_only)
693 print_header();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]694
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]695 if (topo.num_cpus > 1)
696 format_counters(&average.threads, &average.cores,
697 &average.packages);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]698
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]699 printed = 1;
700
701 if (summary_only)
702 return;
703
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]704 for_all_cpus(format_counters, t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]705}
706
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]707#define DELTA_WRAP32(new, old) \
708 if (new > old) { \
709 old = new - old; \
710 } else { \
711 old = 0x100000000 + new - old; \
712 }
713
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]714void
715delta_package(struct pkg_data *new, struct pkg_data *old)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]716{
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]717
718 if (do_skl_residency) {
719 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
720 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
721 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
722 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
723 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]724 old->pc2 = new->pc2 - old->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]725 if (do_pc3)
726 old->pc3 = new->pc3 - old->pc3;
727 if (do_pc6)
728 old->pc6 = new->pc6 - old->pc6;
729 if (do_pc7)
730 old->pc7 = new->pc7 - old->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]731 old->pc8 = new->pc8 - old->pc8;
732 old->pc9 = new->pc9 - old->pc9;
733 old->pc10 = new->pc10 - old->pc10;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]734 old->pkg_temp_c = new->pkg_temp_c;
735
736 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
737 DELTA_WRAP32(new->energy_cores, old->energy_cores);
738 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
739 DELTA_WRAP32(new->energy_dram, old->energy_dram);
740 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
741 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]742}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]743
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]744void
745delta_core(struct core_data *new, struct core_data *old)
746{
747 old->c3 = new->c3 - old->c3;
748 old->c6 = new->c6 - old->c6;
749 old->c7 = new->c7 - old->c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]750 old->core_temp_c = new->core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]751}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]752
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]753/*
754 * old = new - old
755 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]756void
757delta_thread(struct thread_data *new, struct thread_data *old,
758 struct core_data *core_delta)
759{
760 old->tsc = new->tsc - old->tsc;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]761
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]762 /* check for TSC < 1 Mcycles over interval */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]763 if (old->tsc < (1000 * 1000))
764 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
765 "You can disable all c-states by booting with \"idle=poll\"\n"
766 "or just the deep ones with \"processor.max_cstate=1\"");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]767
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]768 old->c1 = new->c1 - old->c1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]769
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]770 if (has_aperf) {
771 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
772 old->aperf = new->aperf - old->aperf;
773 old->mperf = new->mperf - old->mperf;
774 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]775
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]776 if (!aperf_mperf_unstable) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]777 fprintf(outf, "%s: APERF or MPERF went backwards *\n", progname);
778 fprintf(outf, "* Frequency results do not cover entire interval *\n");
779 fprintf(outf, "* fix this by running Linux-2.6.30 or later *\n");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]780
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]781 aperf_mperf_unstable = 1;
782 }
783 /*
784 * mperf delta is likely a huge "positive" number
785 * can not use it for calculating c0 time
786 */
787 skip_c0 = 1;
788 skip_c1 = 1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]789 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]790 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]791
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]792
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]793 if (use_c1_residency_msr) {
794 /*
795 * Some models have a dedicated C1 residency MSR,
796 * which should be more accurate than the derivation below.
797 */
798 } else {
799 /*
800 * As counter collection is not atomic,
801 * it is possible for mperf's non-halted cycles + idle states
802 * to exceed TSC's all cycles: show c1 = 0% in that case.
803 */
804 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
805 old->c1 = 0;
806 else {
807 /* normal case, derive c1 */
808 old->c1 = old->tsc - old->mperf - core_delta->c3
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]809 - core_delta->c6 - core_delta->c7;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]810 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]811 }
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]812
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]813 if (old->mperf == 0) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]814 if (debug > 1)
815 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]816 old->mperf = 1; /* divide by 0 protection */
817 }
818
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]819 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
820 old->extra_delta32 &= 0xFFFFFFFF;
821
822 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
823
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]824 /*
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]825 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]826 */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]827 old->extra_msr32 = new->extra_msr32;
828 old->extra_msr64 = new->extra_msr64;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]829
830 if (do_smi)
831 old->smi_count = new->smi_count - old->smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]832}
833
834int delta_cpu(struct thread_data *t, struct core_data *c,
835 struct pkg_data *p, struct thread_data *t2,
836 struct core_data *c2, struct pkg_data *p2)
837{
838 /* calculate core delta only for 1st thread in core */
839 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
840 delta_core(c, c2);
841
842 /* always calculate thread delta */
843 delta_thread(t, t2, c2); /* c2 is core delta */
844
845 /* calculate package delta only for 1st core in package */
846 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
847 delta_package(p, p2);
848
849 return 0;
850}
851
852void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
853{
854 t->tsc = 0;
855 t->aperf = 0;
856 t->mperf = 0;
857 t->c1 = 0;
858
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]859 t->smi_count = 0;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]860 t->extra_delta32 = 0;
861 t->extra_delta64 = 0;
862
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]863 /* tells format_counters to dump all fields from this set */
864 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
865
866 c->c3 = 0;
867 c->c6 = 0;
868 c->c7 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]869 c->core_temp_c = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]870
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]871 p->pkg_wtd_core_c0 = 0;
872 p->pkg_any_core_c0 = 0;
873 p->pkg_any_gfxe_c0 = 0;
874 p->pkg_both_core_gfxe_c0 = 0;
875
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]876 p->pc2 = 0;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]877 if (do_pc3)
878 p->pc3 = 0;
879 if (do_pc6)
880 p->pc6 = 0;
881 if (do_pc7)
882 p->pc7 = 0;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]883 p->pc8 = 0;
884 p->pc9 = 0;
885 p->pc10 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]886
887 p->energy_pkg = 0;
888 p->energy_dram = 0;
889 p->energy_cores = 0;
890 p->energy_gfx = 0;
891 p->rapl_pkg_perf_status = 0;
892 p->rapl_dram_perf_status = 0;
893 p->pkg_temp_c = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]894}
895int sum_counters(struct thread_data *t, struct core_data *c,
896 struct pkg_data *p)
897{
898 average.threads.tsc += t->tsc;
899 average.threads.aperf += t->aperf;
900 average.threads.mperf += t->mperf;
901 average.threads.c1 += t->c1;
902
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]903 average.threads.extra_delta32 += t->extra_delta32;
904 average.threads.extra_delta64 += t->extra_delta64;
905
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]906 /* sum per-core values only for 1st thread in core */
907 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
908 return 0;
909
910 average.cores.c3 += c->c3;
911 average.cores.c6 += c->c6;
912 average.cores.c7 += c->c7;
913
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]914 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
915
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]916 /* sum per-pkg values only for 1st core in pkg */
917 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
918 return 0;
919
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]920 if (do_skl_residency) {
921 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
922 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
923 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
924 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
925 }
926
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]927 average.packages.pc2 += p->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]928 if (do_pc3)
929 average.packages.pc3 += p->pc3;
930 if (do_pc6)
931 average.packages.pc6 += p->pc6;
932 if (do_pc7)
933 average.packages.pc7 += p->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]934 average.packages.pc8 += p->pc8;
935 average.packages.pc9 += p->pc9;
936 average.packages.pc10 += p->pc10;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]937
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]938 average.packages.energy_pkg += p->energy_pkg;
939 average.packages.energy_dram += p->energy_dram;
940 average.packages.energy_cores += p->energy_cores;
941 average.packages.energy_gfx += p->energy_gfx;
942
943 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
944
945 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
946 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]947 return 0;
948}
949/*
950 * sum the counters for all cpus in the system
951 * compute the weighted average
952 */
953void compute_average(struct thread_data *t, struct core_data *c,
954 struct pkg_data *p)
955{
956 clear_counters(&average.threads, &average.cores, &average.packages);
957
958 for_all_cpus(sum_counters, t, c, p);
959
960 average.threads.tsc /= topo.num_cpus;
961 average.threads.aperf /= topo.num_cpus;
962 average.threads.mperf /= topo.num_cpus;
963 average.threads.c1 /= topo.num_cpus;
964
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]965 average.threads.extra_delta32 /= topo.num_cpus;
966 average.threads.extra_delta32 &= 0xFFFFFFFF;
967
968 average.threads.extra_delta64 /= topo.num_cpus;
969
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]970 average.cores.c3 /= topo.num_cores;
971 average.cores.c6 /= topo.num_cores;
972 average.cores.c7 /= topo.num_cores;
973
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]974 if (do_skl_residency) {
975 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
976 average.packages.pkg_any_core_c0 /= topo.num_packages;
977 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
978 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
979 }
980
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]981 average.packages.pc2 /= topo.num_packages;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]982 if (do_pc3)
983 average.packages.pc3 /= topo.num_packages;
984 if (do_pc6)
985 average.packages.pc6 /= topo.num_packages;
986 if (do_pc7)
987 average.packages.pc7 /= topo.num_packages;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]988
989 average.packages.pc8 /= topo.num_packages;
990 average.packages.pc9 /= topo.num_packages;
991 average.packages.pc10 /= topo.num_packages;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]992}
993
994static unsigned long long rdtsc(void)
995{
996 unsigned int low, high;
997
998 asm volatile("rdtsc" : "=a" (low), "=d" (high));
999
1000 return low | ((unsigned long long)high) << 32;
1001}
1002
1003
1004/*
1005 * get_counters(...)
1006 * migrate to cpu
1007 * acquire and record local counters for that cpu
1008 */
1009int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1010{
1011 int cpu = t->cpu_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1012 unsigned long long msr;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1013
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1014 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1015 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1016 return -1;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1017 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1018
1019 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1020
1021 if (has_aperf) {
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1022 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1023 return -3;
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1024 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1025 return -4;
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]1026 t->aperf = t->aperf * aperf_mperf_multiplier;
1027 t->mperf = t->mperf * aperf_mperf_multiplier;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1028 }
1029
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]1030 if (do_smi) {
1031 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1032 return -5;
1033 t->smi_count = msr & 0xFFFFFFFF;
1034 }
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1035 if (extra_delta_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1036 if (get_msr(cpu, extra_delta_offset32, &msr))
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]1037 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1038 t->extra_delta32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1039 }
1040
1041 if (extra_delta_offset64)
1042 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
1043 return -5;
1044
1045 if (extra_msr_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1046 if (get_msr(cpu, extra_msr_offset32, &msr))
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1047 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1048 t->extra_msr32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1049 }
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]1050
1051 if (extra_msr_offset64)
1052 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1053 return -5;
1054
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1055 if (use_c1_residency_msr) {
1056 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1057 return -6;
1058 }
1059
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1060 /* collect core counters only for 1st thread in core */
1061 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1062 return 0;
1063
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1064 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1065 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1066 return -6;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1067 }
1068
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1069 if (do_nhm_cstates && !do_knl_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1070 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1071 return -7;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1072 } else if (do_knl_cstates) {
1073 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1074 return -7;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1075 }
1076
1077 if (do_snb_cstates)
1078 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1079 return -8;
1080
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1081 if (do_dts) {
1082 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1083 return -9;
1084 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1085 }
1086
1087
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1088 /* collect package counters only for 1st core in package */
1089 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1090 return 0;
1091
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1092 if (do_skl_residency) {
1093 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1094 return -10;
1095 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1096 return -11;
1097 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1098 return -12;
1099 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1100 return -13;
1101 }
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1102 if (do_pc3)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1103 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1104 return -9;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1105 if (do_pc6)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1106 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1107 return -10;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1108 if (do_pc2)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1109 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1110 return -11;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1111 if (do_pc7)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1112 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1113 return -12;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1114 if (do_c8_c9_c10) {
1115 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1116 return -13;
1117 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1118 return -13;
1119 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1120 return -13;
1121 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1122 if (do_rapl & RAPL_PKG) {
1123 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1124 return -13;
1125 p->energy_pkg = msr & 0xFFFFFFFF;
1126 }
1127 if (do_rapl & RAPL_CORES) {
1128 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1129 return -14;
1130 p->energy_cores = msr & 0xFFFFFFFF;
1131 }
1132 if (do_rapl & RAPL_DRAM) {
1133 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1134 return -15;
1135 p->energy_dram = msr & 0xFFFFFFFF;
1136 }
1137 if (do_rapl & RAPL_GFX) {
1138 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1139 return -16;
1140 p->energy_gfx = msr & 0xFFFFFFFF;
1141 }
1142 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1143 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1144 return -16;
1145 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1146 }
1147 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1148 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1149 return -16;
1150 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1151 }
1152 if (do_ptm) {
1153 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1154 return -17;
1155 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1156 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1157 return 0;
1158}
1159
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1160/*
1161 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1162 * If you change the values, note they are used both in comparisons
1163 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1164 */
1165
1166#define PCLUKN 0 /* Unknown */
1167#define PCLRSV 1 /* Reserved */
1168#define PCL__0 2 /* PC0 */
1169#define PCL__1 3 /* PC1 */
1170#define PCL__2 4 /* PC2 */
1171#define PCL__3 5 /* PC3 */
1172#define PCL__4 6 /* PC4 */
1173#define PCL__6 7 /* PC6 */
1174#define PCL_6N 8 /* PC6 No Retention */
1175#define PCL_6R 9 /* PC6 Retention */
1176#define PCL__7 10 /* PC7 */
1177#define PCL_7S 11 /* PC7 Shrink */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1178#define PCL__8 12 /* PC8 */
1179#define PCL__9 13 /* PC9 */
1180#define PCLUNL 14 /* Unlimited */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1181
1182int pkg_cstate_limit = PCLUKN;
1183char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1184 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1185
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]1186int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1187int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1188int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1189int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1190int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1191int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1192
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]1193
1194static void
1195calculate_tsc_tweak()
1196{
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]1197 tsc_tweak = base_hz / tsc_hz;
1198}
1199
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1200static void
1201dump_nhm_platform_info(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1202{
1203 unsigned long long msr;
1204 unsigned int ratio;
1205
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]1206 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1207
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1208 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1209
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1210 ratio = (msr >> 40) & 0xFF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1211 fprintf(outf, "%d * %.0f = %.0f MHz max efficiency frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1212 ratio, bclk, ratio * bclk);
1213
1214 ratio = (msr >> 8) & 0xFF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1215 fprintf(outf, "%d * %.0f = %.0f MHz base frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1216 ratio, bclk, ratio * bclk);
1217
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1218 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1219 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
Len Brownbfae2052015-06-17 12:27:21 -0400[diff] [blame]1220 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1221
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1222 return;
1223}
1224
1225static void
1226dump_hsw_turbo_ratio_limits(void)
1227{
1228 unsigned long long msr;
1229 unsigned int ratio;
1230
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1231 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1232
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1233 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1234
1235 ratio = (msr >> 8) & 0xFF;
1236 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1237 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1238 ratio, bclk, ratio * bclk);
1239
1240 ratio = (msr >> 0) & 0xFF;
1241 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1242 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1243 ratio, bclk, ratio * bclk);
1244 return;
1245}
1246
1247static void
1248dump_ivt_turbo_ratio_limits(void)
1249{
1250 unsigned long long msr;
1251 unsigned int ratio;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1252
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1253 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1254
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1255 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1256
1257 ratio = (msr >> 56) & 0xFF;
1258 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1259 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1260 ratio, bclk, ratio * bclk);
1261
1262 ratio = (msr >> 48) & 0xFF;
1263 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1264 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1265 ratio, bclk, ratio * bclk);
1266
1267 ratio = (msr >> 40) & 0xFF;
1268 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1269 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1270 ratio, bclk, ratio * bclk);
1271
1272 ratio = (msr >> 32) & 0xFF;
1273 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1274 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1275 ratio, bclk, ratio * bclk);
1276
1277 ratio = (msr >> 24) & 0xFF;
1278 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1279 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1280 ratio, bclk, ratio * bclk);
1281
1282 ratio = (msr >> 16) & 0xFF;
1283 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1284 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1285 ratio, bclk, ratio * bclk);
1286
1287 ratio = (msr >> 8) & 0xFF;
1288 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1289 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1290 ratio, bclk, ratio * bclk);
1291
1292 ratio = (msr >> 0) & 0xFF;
1293 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1294 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1295 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1296 return;
1297}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1298
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1299static void
1300dump_nhm_turbo_ratio_limits(void)
1301{
1302 unsigned long long msr;
1303 unsigned int ratio;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1304
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1305 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1306
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1307 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1308
1309 ratio = (msr >> 56) & 0xFF;
1310 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1311 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1312 ratio, bclk, ratio * bclk);
1313
1314 ratio = (msr >> 48) & 0xFF;
1315 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1316 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1317 ratio, bclk, ratio * bclk);
1318
1319 ratio = (msr >> 40) & 0xFF;
1320 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1321 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1322 ratio, bclk, ratio * bclk);
1323
1324 ratio = (msr >> 32) & 0xFF;
1325 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1326 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1327 ratio, bclk, ratio * bclk);
1328
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1329 ratio = (msr >> 24) & 0xFF;
1330 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1331 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1332 ratio, bclk, ratio * bclk);
1333
1334 ratio = (msr >> 16) & 0xFF;
1335 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1336 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1337 ratio, bclk, ratio * bclk);
1338
1339 ratio = (msr >> 8) & 0xFF;
1340 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1341 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1342 ratio, bclk, ratio * bclk);
1343
1344 ratio = (msr >> 0) & 0xFF;
1345 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1346 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1347 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1348 return;
1349}
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1350
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1351static void
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1352dump_knl_turbo_ratio_limits(void)
1353{
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1354 const unsigned int buckets_no = 7;
1355
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1356 unsigned long long msr;
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1357 int delta_cores, delta_ratio;
1358 int i, b_nr;
1359 unsigned int cores[buckets_no];
1360 unsigned int ratio[buckets_no];
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1361
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1362 get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1363
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1364 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
Len Brownbfae2052015-06-17 12:27:21 -0400[diff] [blame]1365 base_cpu, msr);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1366
1367 /**
1368 * Turbo encoding in KNL is as follows:
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1369 * [0] -- Reserved
1370 * [7:1] -- Base value of number of active cores of bucket 1.
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1371 * [15:8] -- Base value of freq ratio of bucket 1.
1372 * [20:16] -- +ve delta of number of active cores of bucket 2.
1373 * i.e. active cores of bucket 2 =
1374 * active cores of bucket 1 + delta
1375 * [23:21] -- Negative delta of freq ratio of bucket 2.
1376 * i.e. freq ratio of bucket 2 =
1377 * freq ratio of bucket 1 - delta
1378 * [28:24]-- +ve delta of number of active cores of bucket 3.
1379 * [31:29]-- -ve delta of freq ratio of bucket 3.
1380 * [36:32]-- +ve delta of number of active cores of bucket 4.
1381 * [39:37]-- -ve delta of freq ratio of bucket 4.
1382 * [44:40]-- +ve delta of number of active cores of bucket 5.
1383 * [47:45]-- -ve delta of freq ratio of bucket 5.
1384 * [52:48]-- +ve delta of number of active cores of bucket 6.
1385 * [55:53]-- -ve delta of freq ratio of bucket 6.
1386 * [60:56]-- +ve delta of number of active cores of bucket 7.
1387 * [63:61]-- -ve delta of freq ratio of bucket 7.
1388 */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1389
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1390 b_nr = 0;
1391 cores[b_nr] = (msr & 0xFF) >> 1;
1392 ratio[b_nr] = (msr >> 8) & 0xFF;
1393
1394 for (i = 16; i < 64; i += 8) {
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1395 delta_cores = (msr >> i) & 0x1F;
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1396 delta_ratio = (msr >> (i + 5)) & 0x7;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1397
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1398 cores[b_nr + 1] = cores[b_nr] + delta_cores;
1399 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
1400 b_nr++;
1401 }
1402
1403 for (i = buckets_no - 1; i >= 0; i--)
1404 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1405 fprintf(outf,
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1406 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1407 ratio[i], bclk, ratio[i] * bclk, cores[i]);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1408}
1409
1410static void
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1411dump_nhm_cst_cfg(void)
1412{
1413 unsigned long long msr;
1414
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1415 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1416
1417#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1418#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1419
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1420 fprintf(outf, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1421
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1422 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1423 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1424 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1425 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1426 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1427 (msr & (1 << 15)) ? "" : "UN",
1428 (unsigned int)msr & 7,
1429 pkg_cstate_limit_strings[pkg_cstate_limit]);
1430 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1431}
1432
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1433static void
1434dump_config_tdp(void)
1435{
1436 unsigned long long msr;
1437
1438 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1439 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
1440 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xEF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1441
1442 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1443 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1444 if (msr) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1445 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1446 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1447 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1448 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0xEFFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1449 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1450 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1451
1452 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1453 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1454 if (msr) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1455 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1456 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1457 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1458 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0xEFFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1459 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1460 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1461
1462 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1463 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1464 if ((msr) & 0x3)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1465 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
1466 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1467 fprintf(outf, ")\n");
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]1468
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1469 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1470 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
1471 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0x7F);
1472 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1473 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1474}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]1475void free_fd_percpu(void)
1476{
1477 int i;
1478
1479 for (i = 0; i < topo.max_cpu_num; ++i) {
1480 if (fd_percpu[i] != 0)
1481 close(fd_percpu[i]);
1482 }
1483
1484 free(fd_percpu);
1485}
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1486
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1487void free_all_buffers(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1488{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1489 CPU_FREE(cpu_present_set);
1490 cpu_present_set = NULL;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]1491 cpu_present_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1492
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1493 CPU_FREE(cpu_affinity_set);
1494 cpu_affinity_set = NULL;
1495 cpu_affinity_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1496
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1497 free(thread_even);
1498 free(core_even);
1499 free(package_even);
1500
1501 thread_even = NULL;
1502 core_even = NULL;
1503 package_even = NULL;
1504
1505 free(thread_odd);
1506 free(core_odd);
1507 free(package_odd);
1508
1509 thread_odd = NULL;
1510 core_odd = NULL;
1511 package_odd = NULL;
1512
1513 free(output_buffer);
1514 output_buffer = NULL;
1515 outp = NULL;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]1516
1517 free_fd_percpu();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1518}
1519
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1520/*
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1521 * Open a file, and exit on failure
1522 */
1523FILE *fopen_or_die(const char *path, const char *mode)
1524{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1525 FILE *filep = fopen(path, mode);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1526 if (!filep)
1527 err(1, "%s: open failed", path);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1528 return filep;
1529}
1530
1531/*
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1532 * Parse a file containing a single int.
1533 */
1534int parse_int_file(const char *fmt, ...)
1535{
1536 va_list args;
1537 char path[PATH_MAX];
1538 FILE *filep;
1539 int value;
1540
1541 va_start(args, fmt);
1542 vsnprintf(path, sizeof(path), fmt, args);
1543 va_end(args);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1544 filep = fopen_or_die(path, "r");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1545 if (fscanf(filep, "%d", &value) != 1)
1546 err(1, "%s: failed to parse number from file", path);
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1547 fclose(filep);
1548 return value;
1549}
1550
1551/*
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1552 * get_cpu_position_in_core(cpu)
1553 * return the position of the CPU among its HT siblings in the core
1554 * return -1 if the sibling is not in list
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1555 */
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1556int get_cpu_position_in_core(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1557{
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1558 char path[64];
1559 FILE *filep;
1560 int this_cpu;
1561 char character;
1562 int i;
1563
1564 sprintf(path,
1565 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1566 cpu);
1567 filep = fopen(path, "r");
1568 if (filep == NULL) {
1569 perror(path);
1570 exit(1);
1571 }
1572
1573 for (i = 0; i < topo.num_threads_per_core; i++) {
1574 fscanf(filep, "%d", &this_cpu);
1575 if (this_cpu == cpu) {
1576 fclose(filep);
1577 return i;
1578 }
1579
1580 /* Account for no separator after last thread*/
1581 if (i != (topo.num_threads_per_core - 1))
1582 fscanf(filep, "%c", &character);
1583 }
1584
1585 fclose(filep);
1586 return -1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1587}
1588
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1589/*
1590 * cpu_is_first_core_in_package(cpu)
1591 * return 1 if given CPU is 1st core in package
1592 */
1593int cpu_is_first_core_in_package(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1594{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1595 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1596}
1597
1598int get_physical_package_id(int cpu)
1599{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1600 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1601}
1602
1603int get_core_id(int cpu)
1604{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1605 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1606}
1607
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1608int get_num_ht_siblings(int cpu)
1609{
1610 char path[80];
1611 FILE *filep;
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1612 int sib1;
1613 int matches = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1614 char character;
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1615 char str[100];
1616 char *ch;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1617
1618 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1619 filep = fopen_or_die(path, "r");
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1620
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1621 /*
1622 * file format:
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1623 * A ',' separated or '-' separated set of numbers
1624 * (eg 1-2 or 1,3,4,5)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1625 */
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1626 fscanf(filep, "%d%c\n", &sib1, &character);
1627 fseek(filep, 0, SEEK_SET);
1628 fgets(str, 100, filep);
1629 ch = strchr(str, character);
1630 while (ch != NULL) {
1631 matches++;
1632 ch = strchr(ch+1, character);
1633 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1634
1635 fclose(filep);
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1636 return matches+1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1637}
1638
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1639/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1640 * run func(thread, core, package) in topology order
1641 * skip non-present cpus
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1642 */
1643
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1644int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1645 struct pkg_data *, struct thread_data *, struct core_data *,
1646 struct pkg_data *), struct thread_data *thread_base,
1647 struct core_data *core_base, struct pkg_data *pkg_base,
1648 struct thread_data *thread_base2, struct core_data *core_base2,
1649 struct pkg_data *pkg_base2)
1650{
1651 int retval, pkg_no, core_no, thread_no;
1652
1653 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1654 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1655 for (thread_no = 0; thread_no <
1656 topo.num_threads_per_core; ++thread_no) {
1657 struct thread_data *t, *t2;
1658 struct core_data *c, *c2;
1659 struct pkg_data *p, *p2;
1660
1661 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1662
1663 if (cpu_is_not_present(t->cpu_id))
1664 continue;
1665
1666 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1667
1668 c = GET_CORE(core_base, core_no, pkg_no);
1669 c2 = GET_CORE(core_base2, core_no, pkg_no);
1670
1671 p = GET_PKG(pkg_base, pkg_no);
1672 p2 = GET_PKG(pkg_base2, pkg_no);
1673
1674 retval = func(t, c, p, t2, c2, p2);
1675 if (retval)
1676 return retval;
1677 }
1678 }
1679 }
1680 return 0;
1681}
1682
1683/*
1684 * run func(cpu) on every cpu in /proc/stat
1685 * return max_cpu number
1686 */
1687int for_all_proc_cpus(int (func)(int))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1688{
1689 FILE *fp;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1690 int cpu_num;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1691 int retval;
1692
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1693 fp = fopen_or_die(proc_stat, "r");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1694
1695 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1696 if (retval != 0)
1697 err(1, "%s: failed to parse format", proc_stat);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1698
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1699 while (1) {
1700 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1701 if (retval != 1)
1702 break;
1703
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1704 retval = func(cpu_num);
1705 if (retval) {
1706 fclose(fp);
1707 return(retval);
1708 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1709 }
1710 fclose(fp);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1711 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1712}
1713
1714void re_initialize(void)
1715{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1716 free_all_buffers();
1717 setup_all_buffers();
1718 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1719}
1720
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1721
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1722/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1723 * count_cpus()
1724 * remember the last one seen, it will be the max
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1725 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1726int count_cpus(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1727{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1728 if (topo.max_cpu_num < cpu)
1729 topo.max_cpu_num = cpu;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1730
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1731 topo.num_cpus += 1;
1732 return 0;
1733}
1734int mark_cpu_present(int cpu)
1735{
1736 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1737 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1738}
1739
1740void turbostat_loop()
1741{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1742 int retval;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1743 int restarted = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1744
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1745restart:
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1746 restarted++;
1747
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1748 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1749 if (retval < -1) {
1750 exit(retval);
1751 } else if (retval == -1) {
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1752 if (restarted > 1) {
1753 exit(retval);
1754 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1755 re_initialize();
1756 goto restart;
1757 }
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1758 restarted = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1759 gettimeofday(&tv_even, (struct timezone *)NULL);
1760
1761 while (1) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1762 if (for_all_proc_cpus(cpu_is_not_present)) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1763 re_initialize();
1764 goto restart;
1765 }
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]1766 nanosleep(&interval_ts, NULL);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1767 retval = for_all_cpus(get_counters, ODD_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1768 if (retval < -1) {
1769 exit(retval);
1770 } else if (retval == -1) {
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1771 re_initialize();
1772 goto restart;
1773 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1774 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1775 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1776 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1777 compute_average(EVEN_COUNTERS);
1778 format_all_counters(EVEN_COUNTERS);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1779 flush_output_stdout();
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]1780 nanosleep(&interval_ts, NULL);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1781 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]1782 if (retval < -1) {
1783 exit(retval);
1784 } else if (retval == -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1785 re_initialize();
1786 goto restart;
1787 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1788 gettimeofday(&tv_even, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1789 timersub(&tv_even, &tv_odd, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1790 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1791 compute_average(ODD_COUNTERS);
1792 format_all_counters(ODD_COUNTERS);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1793 flush_output_stdout();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1794 }
1795}
1796
1797void check_dev_msr()
1798{
1799 struct stat sb;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1800 char pathname[32];
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1801
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1802 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1803 if (stat(pathname, &sb))
Len Browna21d38c2015-03-24 16:37:35 -0400[diff] [blame]1804 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
1805 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1806}
1807
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1808void check_permissions()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1809{
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1810 struct __user_cap_header_struct cap_header_data;
1811 cap_user_header_t cap_header = &cap_header_data;
1812 struct __user_cap_data_struct cap_data_data;
1813 cap_user_data_t cap_data = &cap_data_data;
1814 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1815 int do_exit = 0;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1816 char pathname[32];
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1817
1818 /* check for CAP_SYS_RAWIO */
1819 cap_header->pid = getpid();
1820 cap_header->version = _LINUX_CAPABILITY_VERSION;
1821 if (capget(cap_header, cap_data) < 0)
1822 err(-6, "capget(2) failed");
1823
1824 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1825 do_exit++;
1826 warnx("capget(CAP_SYS_RAWIO) failed,"
1827 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1828 }
1829
1830 /* test file permissions */
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1831 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1832 if (euidaccess(pathname, R_OK)) {
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1833 do_exit++;
1834 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1835 }
1836
1837 /* if all else fails, thell them to be root */
1838 if (do_exit)
1839 if (getuid() != 0)
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1840 warnx("... or simply run as root");
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]1841
1842 if (do_exit)
1843 exit(-6);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1844}
1845
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1846/*
1847 * NHM adds support for additional MSRs:
1848 *
1849 * MSR_SMI_COUNT 0x00000034
1850 *
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]1851 * MSR_PLATFORM_INFO 0x000000ce
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1852 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
1853 *
1854 * MSR_PKG_C3_RESIDENCY 0x000003f8
1855 * MSR_PKG_C6_RESIDENCY 0x000003f9
1856 * MSR_CORE_C3_RESIDENCY 0x000003fc
1857 * MSR_CORE_C6_RESIDENCY 0x000003fd
1858 *
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1859 * Side effect:
1860 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1861 */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1862int probe_nhm_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1863{
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1864 unsigned long long msr;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]1865 unsigned int base_ratio;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1866 int *pkg_cstate_limits;
1867
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1868 if (!genuine_intel)
1869 return 0;
1870
1871 if (family != 6)
1872 return 0;
1873
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]1874 bclk = discover_bclk(family, model);
1875
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1876 switch (model) {
1877 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1878 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1879 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1880 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1881 case 0x2C: /* Westmere EP - Gulftown */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1882 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1883 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1884 pkg_cstate_limits = nhm_pkg_cstate_limits;
1885 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1886 case 0x2A: /* SNB */
1887 case 0x2D: /* SNB Xeon */
Len Brown553575f2011-11-18 03:32:01 -0500[diff] [blame]1888 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]1889 case 0x3E: /* IVB Xeon */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1890 pkg_cstate_limits = snb_pkg_cstate_limits;
1891 break;
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1892 case 0x3C: /* HSW */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]1893 case 0x3F: /* HSX */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]1894 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]1895 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1896 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]1897 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]1898 case 0x4F: /* BDX */
1899 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1900 case 0x4E: /* SKL */
1901 case 0x5E: /* SKL */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1902 pkg_cstate_limits = hsw_pkg_cstate_limits;
1903 break;
1904 case 0x37: /* BYT */
1905 case 0x4D: /* AVN */
1906 pkg_cstate_limits = slv_pkg_cstate_limits;
1907 break;
1908 case 0x4C: /* AMT */
1909 pkg_cstate_limits = amt_pkg_cstate_limits;
1910 break;
1911 case 0x57: /* PHI */
1912 pkg_cstate_limits = phi_pkg_cstate_limits;
1913 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1914 default:
1915 return 0;
1916 }
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1917 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]1918 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1919
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]1920 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]1921 base_ratio = (msr >> 8) & 0xFF;
1922
1923 base_hz = base_ratio * bclk * 1000000;
1924 has_base_hz = 1;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1925 return 1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1926}
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1927int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
1928{
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1929 switch (model) {
1930 /* Nehalem compatible, but do not include turbo-ratio limit support */
1931 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1932 case 0x2F: /* Westmere-EX Xeon - Eagleton */
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1933 case 0x57: /* PHI - Knights Landing (different MSR definition) */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]1934 return 0;
1935 default:
1936 return 1;
1937 }
1938}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1939int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1940{
1941 if (!genuine_intel)
1942 return 0;
1943
1944 if (family != 6)
1945 return 0;
1946
1947 switch (model) {
1948 case 0x3E: /* IVB Xeon */
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1949 case 0x3F: /* HSW Xeon */
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1950 return 1;
1951 default:
1952 return 0;
1953 }
1954}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1955int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
1956{
1957 if (!genuine_intel)
1958 return 0;
1959
1960 if (family != 6)
1961 return 0;
1962
1963 switch (model) {
1964 case 0x3F: /* HSW Xeon */
1965 return 1;
1966 default:
1967 return 0;
1968 }
1969}
1970
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1971int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
1972{
1973 if (!genuine_intel)
1974 return 0;
1975
1976 if (family != 6)
1977 return 0;
1978
1979 switch (model) {
1980 case 0x57: /* Knights Landing */
1981 return 1;
1982 default:
1983 return 0;
1984 }
1985}
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1986int has_config_tdp(unsigned int family, unsigned int model)
1987{
1988 if (!genuine_intel)
1989 return 0;
1990
1991 if (family != 6)
1992 return 0;
1993
1994 switch (model) {
1995 case 0x3A: /* IVB */
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1996 case 0x3C: /* HSW */
1997 case 0x3F: /* HSX */
1998 case 0x45: /* HSW */
1999 case 0x46: /* HSW */
2000 case 0x3D: /* BDW */
2001 case 0x47: /* BDW */
2002 case 0x4F: /* BDX */
2003 case 0x56: /* BDX-DE */
2004 case 0x4E: /* SKL */
2005 case 0x5E: /* SKL */
2006
2007 case 0x57: /* Knights Landing */
2008 return 1;
2009 default:
2010 return 0;
2011 }
2012}
2013
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2014static void
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2015dump_cstate_pstate_config_info(int family, int model)
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2016{
2017 if (!do_nhm_platform_info)
2018 return;
2019
2020 dump_nhm_platform_info();
2021
2022 if (has_hsw_turbo_ratio_limit(family, model))
2023 dump_hsw_turbo_ratio_limits();
2024
2025 if (has_ivt_turbo_ratio_limit(family, model))
2026 dump_ivt_turbo_ratio_limits();
2027
2028 if (has_nhm_turbo_ratio_limit(family, model))
2029 dump_nhm_turbo_ratio_limits();
2030
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2031 if (has_knl_turbo_ratio_limit(family, model))
2032 dump_knl_turbo_ratio_limits();
2033
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2034 if (has_config_tdp(family, model))
2035 dump_config_tdp();
2036
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2037 dump_nhm_cst_cfg();
2038}
2039
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2040
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2041/*
2042 * print_epb()
2043 * Decode the ENERGY_PERF_BIAS MSR
2044 */
2045int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2046{
2047 unsigned long long msr;
2048 char *epb_string;
2049 int cpu;
2050
2051 if (!has_epb)
2052 return 0;
2053
2054 cpu = t->cpu_id;
2055
2056 /* EPB is per-package */
2057 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2058 return 0;
2059
2060 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2061 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2062 return -1;
2063 }
2064
2065 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
2066 return 0;
2067
Len Browne9be7dd2015-05-26 12:19:37 -0400[diff] [blame]2068 switch (msr & 0xF) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2069 case ENERGY_PERF_BIAS_PERFORMANCE:
2070 epb_string = "performance";
2071 break;
2072 case ENERGY_PERF_BIAS_NORMAL:
2073 epb_string = "balanced";
2074 break;
2075 case ENERGY_PERF_BIAS_POWERSAVE:
2076 epb_string = "powersave";
2077 break;
2078 default:
2079 epb_string = "custom";
2080 break;
2081 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2082 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2083
2084 return 0;
2085}
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2086/*
2087 * print_hwp()
2088 * Decode the MSR_HWP_CAPABILITIES
2089 */
2090int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2091{
2092 unsigned long long msr;
2093 int cpu;
2094
2095 if (!has_hwp)
2096 return 0;
2097
2098 cpu = t->cpu_id;
2099
2100 /* MSR_HWP_CAPABILITIES is per-package */
2101 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2102 return 0;
2103
2104 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2105 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2106 return -1;
2107 }
2108
2109 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
2110 return 0;
2111
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2112 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2113 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
2114
2115 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
2116 if ((msr & (1 << 0)) == 0)
2117 return 0;
2118
2119 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
2120 return 0;
2121
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2122 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2123 "(high 0x%x guar 0x%x eff 0x%x low 0x%x)\n",
2124 cpu, msr,
2125 (unsigned int)HWP_HIGHEST_PERF(msr),
2126 (unsigned int)HWP_GUARANTEED_PERF(msr),
2127 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
2128 (unsigned int)HWP_LOWEST_PERF(msr));
2129
2130 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
2131 return 0;
2132
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2133 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2134 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x pkg 0x%x)\n",
2135 cpu, msr,
2136 (unsigned int)(((msr) >> 0) & 0xff),
2137 (unsigned int)(((msr) >> 8) & 0xff),
2138 (unsigned int)(((msr) >> 16) & 0xff),
2139 (unsigned int)(((msr) >> 24) & 0xff),
2140 (unsigned int)(((msr) >> 32) & 0xff3),
2141 (unsigned int)(((msr) >> 42) & 0x1));
2142
2143 if (has_hwp_pkg) {
2144 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
2145 return 0;
2146
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2147 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2148 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x)\n",
2149 cpu, msr,
2150 (unsigned int)(((msr) >> 0) & 0xff),
2151 (unsigned int)(((msr) >> 8) & 0xff),
2152 (unsigned int)(((msr) >> 16) & 0xff),
2153 (unsigned int)(((msr) >> 24) & 0xff),
2154 (unsigned int)(((msr) >> 32) & 0xff3));
2155 }
2156 if (has_hwp_notify) {
2157 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
2158 return 0;
2159
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2160 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2161 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
2162 cpu, msr,
2163 ((msr) & 0x1) ? "EN" : "Dis",
2164 ((msr) & 0x2) ? "EN" : "Dis");
2165 }
2166 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
2167 return 0;
2168
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2169 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2170 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
2171 cpu, msr,
2172 ((msr) & 0x1) ? "" : "No-",
2173 ((msr) & 0x2) ? "" : "No-");
2174
2175 return 0;
2176}
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2177
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2178/*
2179 * print_perf_limit()
2180 */
2181int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2182{
2183 unsigned long long msr;
2184 int cpu;
2185
2186 cpu = t->cpu_id;
2187
2188 /* per-package */
2189 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2190 return 0;
2191
2192 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2193 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2194 return -1;
2195 }
2196
2197 if (do_core_perf_limit_reasons) {
2198 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2199 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2200 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2201 (msr & 1 << 15) ? "bit15, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2202 (msr & 1 << 14) ? "bit14, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2203 (msr & 1 << 13) ? "Transitions, " : "",
2204 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
2205 (msr & 1 << 11) ? "PkgPwrL2, " : "",
2206 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2207 (msr & 1 << 9) ? "CorePwr, " : "",
2208 (msr & 1 << 8) ? "Amps, " : "",
2209 (msr & 1 << 6) ? "VR-Therm, " : "",
2210 (msr & 1 << 5) ? "Auto-HWP, " : "",
2211 (msr & 1 << 4) ? "Graphics, " : "",
2212 (msr & 1 << 2) ? "bit2, " : "",
2213 (msr & 1 << 1) ? "ThermStatus, " : "",
2214 (msr & 1 << 0) ? "PROCHOT, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2215 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2216 (msr & 1 << 31) ? "bit31, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2217 (msr & 1 << 30) ? "bit30, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2218 (msr & 1 << 29) ? "Transitions, " : "",
2219 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
2220 (msr & 1 << 27) ? "PkgPwrL2, " : "",
2221 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2222 (msr & 1 << 25) ? "CorePwr, " : "",
2223 (msr & 1 << 24) ? "Amps, " : "",
2224 (msr & 1 << 22) ? "VR-Therm, " : "",
2225 (msr & 1 << 21) ? "Auto-HWP, " : "",
2226 (msr & 1 << 20) ? "Graphics, " : "",
2227 (msr & 1 << 18) ? "bit18, " : "",
2228 (msr & 1 << 17) ? "ThermStatus, " : "",
2229 (msr & 1 << 16) ? "PROCHOT, " : "");
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2230
2231 }
2232 if (do_gfx_perf_limit_reasons) {
2233 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2234 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2235 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2236 (msr & 1 << 0) ? "PROCHOT, " : "",
2237 (msr & 1 << 1) ? "ThermStatus, " : "",
2238 (msr & 1 << 4) ? "Graphics, " : "",
2239 (msr & 1 << 6) ? "VR-Therm, " : "",
2240 (msr & 1 << 8) ? "Amps, " : "",
2241 (msr & 1 << 9) ? "GFXPwr, " : "",
2242 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2243 (msr & 1 << 11) ? "PkgPwrL2, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2244 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2245 (msr & 1 << 16) ? "PROCHOT, " : "",
2246 (msr & 1 << 17) ? "ThermStatus, " : "",
2247 (msr & 1 << 20) ? "Graphics, " : "",
2248 (msr & 1 << 22) ? "VR-Therm, " : "",
2249 (msr & 1 << 24) ? "Amps, " : "",
2250 (msr & 1 << 25) ? "GFXPwr, " : "",
2251 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2252 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2253 }
2254 if (do_ring_perf_limit_reasons) {
2255 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2256 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2257 fprintf(outf, " (Active: %s%s%s%s%s%s)",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2258 (msr & 1 << 0) ? "PROCHOT, " : "",
2259 (msr & 1 << 1) ? "ThermStatus, " : "",
2260 (msr & 1 << 6) ? "VR-Therm, " : "",
2261 (msr & 1 << 8) ? "Amps, " : "",
2262 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2263 (msr & 1 << 11) ? "PkgPwrL2, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2264 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2265 (msr & 1 << 16) ? "PROCHOT, " : "",
2266 (msr & 1 << 17) ? "ThermStatus, " : "",
2267 (msr & 1 << 22) ? "VR-Therm, " : "",
2268 (msr & 1 << 24) ? "Amps, " : "",
2269 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2270 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2271 }
2272 return 0;
2273}
2274
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2275#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2276#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2277
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2278double get_tdp(int model)
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2279{
2280 unsigned long long msr;
2281
2282 if (do_rapl & RAPL_PKG_POWER_INFO)
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2283 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2284 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2285
2286 switch (model) {
2287 case 0x37:
2288 case 0x4D:
2289 return 30.0;
2290 default:
2291 return 135.0;
2292 }
2293}
2294
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2295/*
2296 * rapl_dram_energy_units_probe()
2297 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2298 */
2299static double
2300rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2301{
2302 /* only called for genuine_intel, family 6 */
2303
2304 switch (model) {
2305 case 0x3F: /* HSX */
2306 case 0x4F: /* BDX */
2307 case 0x56: /* BDX-DE */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2308 case 0x57: /* KNL */
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2309 return (rapl_dram_energy_units = 15.3 / 1000000);
2310 default:
2311 return (rapl_energy_units);
2312 }
2313}
2314
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2315
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2316/*
2317 * rapl_probe()
2318 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2319 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2320 */
2321void rapl_probe(unsigned int family, unsigned int model)
2322{
2323 unsigned long long msr;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2324 unsigned int time_unit;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2325 double tdp;
2326
2327 if (!genuine_intel)
2328 return;
2329
2330 if (family != 6)
2331 return;
2332
2333 switch (model) {
2334 case 0x2A:
2335 case 0x3A:
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2336 case 0x3C: /* HSW */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2337 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2338 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2339 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2340 case 0x47: /* BDW */
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2341 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2342 break;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2343 case 0x4E: /* SKL */
2344 case 0x5E: /* SKL */
2345 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2346 break;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]2347 case 0x3F: /* HSX */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2348 case 0x4F: /* BDX */
2349 case 0x56: /* BDX-DE */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2350 case 0x57: /* KNL */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2351 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]2352 break;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2353 case 0x2D:
2354 case 0x3E:
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2355 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2356 break;
2357 case 0x37: /* BYT */
2358 case 0x4D: /* AVN */
2359 do_rapl = RAPL_PKG | RAPL_CORES ;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2360 break;
2361 default:
2362 return;
2363 }
2364
2365 /* units on package 0, verify later other packages match */
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2366 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2367 return;
2368
2369 rapl_power_units = 1.0 / (1 << (msr & 0xF));
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2370 if (model == 0x37)
2371 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2372 else
2373 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2374
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2375 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2376
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2377 time_unit = msr >> 16 & 0xF;
2378 if (time_unit == 0)
2379 time_unit = 0xA;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2380
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2381 rapl_time_units = 1.0 / (1 << (time_unit));
2382
2383 tdp = get_tdp(model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2384
2385 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2386 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2387 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2388
2389 return;
2390}
2391
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2392void perf_limit_reasons_probe(int family, int model)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2393{
2394 if (!genuine_intel)
2395 return;
2396
2397 if (family != 6)
2398 return;
2399
2400 switch (model) {
2401 case 0x3C: /* HSW */
2402 case 0x45: /* HSW */
2403 case 0x46: /* HSW */
2404 do_gfx_perf_limit_reasons = 1;
2405 case 0x3F: /* HSX */
2406 do_core_perf_limit_reasons = 1;
2407 do_ring_perf_limit_reasons = 1;
2408 default:
2409 return;
2410 }
2411}
2412
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2413int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2414{
2415 unsigned long long msr;
2416 unsigned int dts;
2417 int cpu;
2418
2419 if (!(do_dts || do_ptm))
2420 return 0;
2421
2422 cpu = t->cpu_id;
2423
2424 /* DTS is per-core, no need to print for each thread */
2425 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2426 return 0;
2427
2428 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2429 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2430 return -1;
2431 }
2432
2433 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2434 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2435 return 0;
2436
2437 dts = (msr >> 16) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2438 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2439 cpu, msr, tcc_activation_temp - dts);
2440
2441#ifdef THERM_DEBUG
2442 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2443 return 0;
2444
2445 dts = (msr >> 16) & 0x7F;
2446 dts2 = (msr >> 8) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2447 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2448 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2449#endif
2450 }
2451
2452
2453 if (do_dts) {
2454 unsigned int resolution;
2455
2456 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2457 return 0;
2458
2459 dts = (msr >> 16) & 0x7F;
2460 resolution = (msr >> 27) & 0xF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2461 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2462 cpu, msr, tcc_activation_temp - dts, resolution);
2463
2464#ifdef THERM_DEBUG
2465 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2466 return 0;
2467
2468 dts = (msr >> 16) & 0x7F;
2469 dts2 = (msr >> 8) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2470 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2471 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2472#endif
2473 }
2474
2475 return 0;
2476}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]2477
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2478void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2479{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2480 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2481 cpu, label,
2482 ((msr >> 15) & 1) ? "EN" : "DIS",
2483 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2484 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2485 (((msr >> 16) & 1) ? "EN" : "DIS"));
2486
2487 return;
2488}
2489
2490int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2491{
2492 unsigned long long msr;
2493 int cpu;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2494
2495 if (!do_rapl)
2496 return 0;
2497
2498 /* RAPL counters are per package, so print only for 1st thread/package */
2499 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2500 return 0;
2501
2502 cpu = t->cpu_id;
2503 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2504 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2505 return -1;
2506 }
2507
2508 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2509 return -1;
2510
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2511 if (debug) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2512 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2513 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2514 rapl_power_units, rapl_energy_units, rapl_time_units);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2515 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2516 if (do_rapl & RAPL_PKG_POWER_INFO) {
2517
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2518 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2519 return -5;
2520
2521
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2522 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2523 cpu, msr,
2524 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2525 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2526 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2527 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2528
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2529 }
2530 if (do_rapl & RAPL_PKG) {
2531
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2532 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2533 return -9;
2534
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2535 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2536 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2537
2538 print_power_limit_msr(cpu, msr, "PKG Limit #1");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2539 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2540 cpu,
2541 ((msr >> 47) & 1) ? "EN" : "DIS",
2542 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2543 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2544 ((msr >> 48) & 1) ? "EN" : "DIS");
2545 }
2546
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2547 if (do_rapl & RAPL_DRAM_POWER_INFO) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2548 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2549 return -6;
2550
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2551 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2552 cpu, msr,
2553 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2554 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2555 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2556 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2557 }
2558 if (do_rapl & RAPL_DRAM) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2559 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2560 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2561 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2562 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2563
2564 print_power_limit_msr(cpu, msr, "DRAM Limit");
2565 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2566 if (do_rapl & RAPL_CORE_POLICY) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2567 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2568 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2569 return -7;
2570
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2571 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2572 }
2573 }
2574 if (do_rapl & RAPL_CORES) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2575 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2576
2577 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2578 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2579 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2580 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2581 print_power_limit_msr(cpu, msr, "Cores Limit");
2582 }
2583 }
2584 if (do_rapl & RAPL_GFX) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2585 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2586 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2587 return -8;
2588
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2589 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2590
2591 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2592 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2593 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2594 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2595 print_power_limit_msr(cpu, msr, "GFX Limit");
2596 }
2597 }
2598 return 0;
2599}
2600
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2601/*
2602 * SNB adds support for additional MSRs:
2603 *
2604 * MSR_PKG_C7_RESIDENCY 0x000003fa
2605 * MSR_CORE_C7_RESIDENCY 0x000003fe
2606 * MSR_PKG_C2_RESIDENCY 0x0000060d
2607 */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2608
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2609int has_snb_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2610{
2611 if (!genuine_intel)
2612 return 0;
2613
2614 switch (model) {
2615 case 0x2A:
2616 case 0x2D:
Len Brown650a37f2012-06-03 23:34:44 -0400[diff] [blame]2617 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]2618 case 0x3E: /* IVB Xeon */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2619 case 0x3C: /* HSW */
2620 case 0x3F: /* HSW */
2621 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2622 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2623 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2624 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2625 case 0x4F: /* BDX */
2626 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2627 case 0x4E: /* SKL */
2628 case 0x5E: /* SKL */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2629 return 1;
2630 }
2631 return 0;
2632}
2633
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2634/*
2635 * HSW adds support for additional MSRs:
2636 *
2637 * MSR_PKG_C8_RESIDENCY 0x00000630
2638 * MSR_PKG_C9_RESIDENCY 0x00000631
2639 * MSR_PKG_C10_RESIDENCY 0x00000632
2640 */
2641int has_hsw_msrs(unsigned int family, unsigned int model)
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2642{
2643 if (!genuine_intel)
2644 return 0;
2645
2646 switch (model) {
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2647 case 0x45: /* HSW */
2648 case 0x3D: /* BDW */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2649 case 0x4E: /* SKL */
2650 case 0x5E: /* SKL */
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2651 return 1;
2652 }
2653 return 0;
2654}
2655
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2656/*
2657 * SKL adds support for additional MSRS:
2658 *
2659 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2660 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2661 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2662 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2663 */
2664int has_skl_msrs(unsigned int family, unsigned int model)
2665{
2666 if (!genuine_intel)
2667 return 0;
2668
2669 switch (model) {
2670 case 0x4E: /* SKL */
2671 case 0x5E: /* SKL */
2672 return 1;
2673 }
2674 return 0;
2675}
2676
2677
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2678
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2679int is_slm(unsigned int family, unsigned int model)
2680{
2681 if (!genuine_intel)
2682 return 0;
2683 switch (model) {
2684 case 0x37: /* BYT */
2685 case 0x4D: /* AVN */
2686 return 1;
2687 }
2688 return 0;
2689}
2690
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2691int is_knl(unsigned int family, unsigned int model)
2692{
2693 if (!genuine_intel)
2694 return 0;
2695 switch (model) {
2696 case 0x57: /* KNL */
2697 return 1;
2698 }
2699 return 0;
2700}
2701
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]2702unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
2703{
2704 if (is_knl(family, model))
2705 return 1024;
2706 return 1;
2707}
2708
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2709#define SLM_BCLK_FREQS 5
2710double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2711
2712double slm_bclk(void)
2713{
2714 unsigned long long msr = 3;
2715 unsigned int i;
2716 double freq;
2717
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2718 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2719 fprintf(outf, "SLM BCLK: unknown\n");
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2720
2721 i = msr & 0xf;
2722 if (i >= SLM_BCLK_FREQS) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2723 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2724 msr = 3;
2725 }
2726 freq = slm_freq_table[i];
2727
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2728 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2729
2730 return freq;
2731}
2732
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2733double discover_bclk(unsigned int family, unsigned int model)
2734{
Chrzaniuk, Hubert121b48b2016-02-10 16:35:17 +0100[diff] [blame]2735 if (has_snb_msrs(family, model) || is_knl(family, model))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2736 return 100.00;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2737 else if (is_slm(family, model))
2738 return slm_bclk();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2739 else
2740 return 133.33;
2741}
2742
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2743/*
2744 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2745 * the Thermal Control Circuit (TCC) activates.
2746 * This is usually equal to tjMax.
2747 *
2748 * Older processors do not have this MSR, so there we guess,
2749 * but also allow cmdline over-ride with -T.
2750 *
2751 * Several MSR temperature values are in units of degrees-C
2752 * below this value, including the Digital Thermal Sensor (DTS),
2753 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2754 */
2755int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2756{
2757 unsigned long long msr;
2758 unsigned int target_c_local;
2759 int cpu;
2760
2761 /* tcc_activation_temp is used only for dts or ptm */
2762 if (!(do_dts || do_ptm))
2763 return 0;
2764
2765 /* this is a per-package concept */
2766 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2767 return 0;
2768
2769 cpu = t->cpu_id;
2770 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2771 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2772 return -1;
2773 }
2774
2775 if (tcc_activation_temp_override != 0) {
2776 tcc_activation_temp = tcc_activation_temp_override;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2777 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2778 cpu, tcc_activation_temp);
2779 return 0;
2780 }
2781
2782 /* Temperature Target MSR is Nehalem and newer only */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2783 if (!do_nhm_platform_info)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2784 goto guess;
2785
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2786 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2787 goto guess;
2788
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]2789 target_c_local = (msr >> 16) & 0xFF;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2790
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2791 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2792 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2793 cpu, msr, target_c_local);
2794
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]2795 if (!target_c_local)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2796 goto guess;
2797
2798 tcc_activation_temp = target_c_local;
2799
2800 return 0;
2801
2802guess:
2803 tcc_activation_temp = TJMAX_DEFAULT;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2804 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2805 cpu, tcc_activation_temp);
2806
2807 return 0;
2808}
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]2809
2810void decode_misc_enable_msr(void)
2811{
2812 unsigned long long msr;
2813
2814 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2815 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n",
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]2816 base_cpu, msr,
2817 msr & (1 << 3) ? "TCC" : "",
2818 msr & (1 << 16) ? "EIST" : "",
2819 msr & (1 << 18) ? "MONITOR" : "");
2820}
2821
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]2822/*
2823 * Decode MSR_MISC_PWR_MGMT
2824 *
2825 * Decode the bits according to the Nehalem documentation
2826 * bit[0] seems to continue to have same meaning going forward
2827 * bit[1] less so...
2828 */
2829void decode_misc_pwr_mgmt_msr(void)
2830{
2831 unsigned long long msr;
2832
2833 if (!do_nhm_platform_info)
2834 return;
2835
2836 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2837 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]2838 base_cpu, msr,
2839 msr & (1 << 0) ? "DIS" : "EN",
2840 msr & (1 << 1) ? "EN" : "DIS");
2841}
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2842
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2843void process_cpuid()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2844{
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]2845 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2846 unsigned int fms, family, model, stepping;
2847
2848 eax = ebx = ecx = edx = 0;
2849
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2850 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2851
2852 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
2853 genuine_intel = 1;
2854
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2855 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2856 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2857 (char *)&ebx, (char *)&edx, (char *)&ecx);
2858
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2859 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2860 family = (fms >> 8) & 0xf;
2861 model = (fms >> 4) & 0xf;
2862 stepping = fms & 0xf;
2863 if (family == 6 || family == 0xf)
2864 model += ((fms >> 16) & 0xf) << 4;
2865
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]2866 if (debug) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2867 fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2868 max_level, family, model, stepping, family, model, stepping);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2869 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s\n",
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]2870 ecx & (1 << 0) ? "SSE3" : "-",
2871 ecx & (1 << 3) ? "MONITOR" : "-",
2872 ecx & (1 << 7) ? "EIST" : "-",
2873 ecx & (1 << 8) ? "TM2" : "-",
2874 edx & (1 << 4) ? "TSC" : "-",
2875 edx & (1 << 5) ? "MSR" : "-",
2876 edx & (1 << 22) ? "ACPI-TM" : "-",
2877 edx & (1 << 29) ? "TM" : "-");
2878 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2879
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]2880 if (!(edx & (1 << 5)))
2881 errx(1, "CPUID: no MSR");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2882
2883 /*
2884 * check max extended function levels of CPUID.
2885 * This is needed to check for invariant TSC.
2886 * This check is valid for both Intel and AMD.
2887 */
2888 ebx = ecx = edx = 0;
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]2889 __get_cpuid(0x80000000, &max_extended_level, &ebx, &ecx, &edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2890
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]2891 if (max_extended_level >= 0x80000007) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2892
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2893 /*
2894 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
2895 * this check is valid for both Intel and AMD
2896 */
2897 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
2898 has_invariant_tsc = edx & (1 << 8);
2899 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2900
2901 /*
2902 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
2903 * this check is valid for both Intel and AMD
2904 */
2905
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]2906 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
Thomas Renninger8209e052011-01-21 15:11:19 +0100[diff] [blame]2907 has_aperf = ecx & (1 << 0);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2908 do_dts = eax & (1 << 0);
2909 do_ptm = eax & (1 << 6);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2910 has_hwp = eax & (1 << 7);
2911 has_hwp_notify = eax & (1 << 8);
2912 has_hwp_activity_window = eax & (1 << 9);
2913 has_hwp_epp = eax & (1 << 10);
2914 has_hwp_pkg = eax & (1 << 11);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2915 has_epb = ecx & (1 << 3);
2916
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2917 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2918 fprintf(outf, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sHWP, "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2919 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
2920 has_aperf ? "" : "No-",
2921 do_dts ? "" : "No-",
2922 do_ptm ? "" : "No-",
2923 has_hwp ? "" : "No-",
2924 has_hwp_notify ? "" : "No-",
2925 has_hwp_activity_window ? "" : "No-",
2926 has_hwp_epp ? "" : "No-",
2927 has_hwp_pkg ? "" : "No-",
2928 has_epb ? "" : "No-");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2929
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]2930 if (debug)
2931 decode_misc_enable_msr();
2932
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]2933 if (max_level >= 0x15) {
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]2934 unsigned int eax_crystal;
2935 unsigned int ebx_tsc;
2936
2937 /*
2938 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
2939 */
2940 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
2941 __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
2942
2943 if (ebx_tsc != 0) {
2944
2945 if (debug && (ebx != 0))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2946 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]2947 eax_crystal, ebx_tsc, crystal_hz);
2948
2949 if (crystal_hz == 0)
2950 switch(model) {
2951 case 0x4E: /* SKL */
2952 case 0x5E: /* SKL */
2953 crystal_hz = 24000000; /* 24 MHz */
2954 break;
2955 default:
2956 crystal_hz = 0;
2957 }
2958
2959 if (crystal_hz) {
2960 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
2961 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2962 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]2963 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
2964 }
2965 }
2966 }
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]2967 if (max_level >= 0x16) {
2968 unsigned int base_mhz, max_mhz, bus_mhz, edx;
2969
2970 /*
2971 * CPUID 16H Base MHz, Max MHz, Bus MHz
2972 */
2973 base_mhz = max_mhz = bus_mhz = edx = 0;
2974
2975 __get_cpuid(0x16, &base_mhz, &max_mhz, &bus_mhz, &edx);
2976 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2977 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]2978 base_mhz, max_mhz, bus_mhz);
2979 }
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]2980
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]2981 if (has_aperf)
2982 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
2983
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2984 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2985 do_snb_cstates = has_snb_msrs(family, model);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2986 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
2987 do_pc3 = (pkg_cstate_limit >= PCL__3);
2988 do_pc6 = (pkg_cstate_limit >= PCL__6);
2989 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2990 do_c8_c9_c10 = has_hsw_msrs(family, model);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2991 do_skl_residency = has_skl_msrs(family, model);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2992 do_slm_cstates = is_slm(family, model);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2993 do_knl_cstates = is_knl(family, model);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2994
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]2995 if (debug)
2996 decode_misc_pwr_mgmt_msr();
2997
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2998 rapl_probe(family, model);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2999 perf_limit_reasons_probe(family, model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3000
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3001 if (debug)
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]3002 dump_cstate_pstate_config_info(family, model);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3003
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]3004 if (has_skl_msrs(family, model))
3005 calculate_tsc_tweak();
3006
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3007 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3008}
3009
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3010void help()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3011{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3012 fprintf(outf,
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3013 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3014 "\n"
3015 "Turbostat forks the specified COMMAND and prints statistics\n"
3016 "when COMMAND completes.\n"
3017 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3018 "to print statistics, until interrupted.\n"
3019 "--debug run in \"debug\" mode\n"
3020 "--interval sec Override default 5-second measurement interval\n"
3021 "--help print this help message\n"
3022 "--counter msr print 32-bit counter at address \"msr\"\n"
3023 "--Counter msr print 64-bit Counter at address \"msr\"\n"
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3024 "--out file create or truncate \"file\" for all output\n"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3025 "--msr msr print 32-bit value at address \"msr\"\n"
3026 "--MSR msr print 64-bit Value at address \"msr\"\n"
3027 "--version print version information\n"
3028 "\n"
3029 "For more help, run \"man turbostat\"\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3030}
3031
3032
3033/*
3034 * in /dev/cpu/ return success for names that are numbers
3035 * ie. filter out ".", "..", "microcode".
3036 */
3037int dir_filter(const struct dirent *dirp)
3038{
3039 if (isdigit(dirp->d_name[0]))
3040 return 1;
3041 else
3042 return 0;
3043}
3044
3045int open_dev_cpu_msr(int dummy1)
3046{
3047 return 0;
3048}
3049
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3050void topology_probe()
3051{
3052 int i;
3053 int max_core_id = 0;
3054 int max_package_id = 0;
3055 int max_siblings = 0;
3056 struct cpu_topology {
3057 int core_id;
3058 int physical_package_id;
3059 } *cpus;
3060
3061 /* Initialize num_cpus, max_cpu_num */
3062 topo.num_cpus = 0;
3063 topo.max_cpu_num = 0;
3064 for_all_proc_cpus(count_cpus);
3065 if (!summary_only && topo.num_cpus > 1)
3066 show_cpu = 1;
3067
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3068 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3069 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3070
3071 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3072 if (cpus == NULL)
3073 err(1, "calloc cpus");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3074
3075 /*
3076 * Allocate and initialize cpu_present_set
3077 */
3078 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3079 if (cpu_present_set == NULL)
3080 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3081 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3082 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
3083 for_all_proc_cpus(mark_cpu_present);
3084
3085 /*
3086 * Allocate and initialize cpu_affinity_set
3087 */
3088 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3089 if (cpu_affinity_set == NULL)
3090 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3091 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3092 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
3093
3094
3095 /*
3096 * For online cpus
3097 * find max_core_id, max_package_id
3098 */
3099 for (i = 0; i <= topo.max_cpu_num; ++i) {
3100 int siblings;
3101
3102 if (cpu_is_not_present(i)) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3103 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3104 fprintf(outf, "cpu%d NOT PRESENT\n", i);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3105 continue;
3106 }
3107 cpus[i].core_id = get_core_id(i);
3108 if (cpus[i].core_id > max_core_id)
3109 max_core_id = cpus[i].core_id;
3110
3111 cpus[i].physical_package_id = get_physical_package_id(i);
3112 if (cpus[i].physical_package_id > max_package_id)
3113 max_package_id = cpus[i].physical_package_id;
3114
3115 siblings = get_num_ht_siblings(i);
3116 if (siblings > max_siblings)
3117 max_siblings = siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3118 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3119 fprintf(outf, "cpu %d pkg %d core %d\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3120 i, cpus[i].physical_package_id, cpus[i].core_id);
3121 }
3122 topo.num_cores_per_pkg = max_core_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3123 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3124 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3125 max_core_id, topo.num_cores_per_pkg);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]3126 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3127 show_core = 1;
3128
3129 topo.num_packages = max_package_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3130 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3131 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3132 max_package_id, topo.num_packages);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]3133 if (debug && !summary_only && topo.num_packages > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3134 show_pkg = 1;
3135
3136 topo.num_threads_per_core = max_siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3137 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3138 fprintf(outf, "max_siblings %d\n", max_siblings);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3139
3140 free(cpus);
3141}
3142
3143void
3144allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
3145{
3146 int i;
3147
3148 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3149 topo.num_packages, sizeof(struct thread_data));
3150 if (*t == NULL)
3151 goto error;
3152
3153 for (i = 0; i < topo.num_threads_per_core *
3154 topo.num_cores_per_pkg * topo.num_packages; i++)
3155 (*t)[i].cpu_id = -1;
3156
3157 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3158 sizeof(struct core_data));
3159 if (*c == NULL)
3160 goto error;
3161
3162 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3163 (*c)[i].core_id = -1;
3164
3165 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
3166 if (*p == NULL)
3167 goto error;
3168
3169 for (i = 0; i < topo.num_packages; i++)
3170 (*p)[i].package_id = i;
3171
3172 return;
3173error:
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3174 err(1, "calloc counters");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3175}
3176/*
3177 * init_counter()
3178 *
3179 * set cpu_id, core_num, pkg_num
3180 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
3181 *
3182 * increment topo.num_cores when 1st core in pkg seen
3183 */
3184void init_counter(struct thread_data *thread_base, struct core_data *core_base,
3185 struct pkg_data *pkg_base, int thread_num, int core_num,
3186 int pkg_num, int cpu_id)
3187{
3188 struct thread_data *t;
3189 struct core_data *c;
3190 struct pkg_data *p;
3191
3192 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
3193 c = GET_CORE(core_base, core_num, pkg_num);
3194 p = GET_PKG(pkg_base, pkg_num);
3195
3196 t->cpu_id = cpu_id;
3197 if (thread_num == 0) {
3198 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
3199 if (cpu_is_first_core_in_package(cpu_id))
3200 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
3201 }
3202
3203 c->core_id = core_num;
3204 p->package_id = pkg_num;
3205}
3206
3207
3208int initialize_counters(int cpu_id)
3209{
3210 int my_thread_id, my_core_id, my_package_id;
3211
3212 my_package_id = get_physical_package_id(cpu_id);
3213 my_core_id = get_core_id(cpu_id);
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]3214 my_thread_id = get_cpu_position_in_core(cpu_id);
3215 if (!my_thread_id)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3216 topo.num_cores++;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3217
3218 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3219 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3220 return 0;
3221}
3222
3223void allocate_output_buffer()
3224{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3225 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3226 outp = output_buffer;
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3227 if (outp == NULL)
3228 err(-1, "calloc output buffer");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3229}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]3230void allocate_fd_percpu(void)
3231{
3232 fd_percpu = calloc(topo.max_cpu_num, sizeof(int));
3233 if (fd_percpu == NULL)
3234 err(-1, "calloc fd_percpu");
3235}
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3236void setup_all_buffers(void)
3237{
3238 topology_probe();
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame^]3239 allocate_fd_percpu();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3240 allocate_counters(&thread_even, &core_even, &package_even);
3241 allocate_counters(&thread_odd, &core_odd, &package_odd);
3242 allocate_output_buffer();
3243 for_all_proc_cpus(initialize_counters);
3244}
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3245
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3246void set_base_cpu(void)
3247{
3248 base_cpu = sched_getcpu();
3249 if (base_cpu < 0)
3250 err(-ENODEV, "No valid cpus found");
3251
3252 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3253 fprintf(outf, "base_cpu = %d\n", base_cpu);
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3254}
3255
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3256void turbostat_init()
3257{
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3258 setup_all_buffers();
3259 set_base_cpu();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3260 check_dev_msr();
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]3261 check_permissions();
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3262 process_cpuid();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3263
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3264
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3265 if (debug)
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3266 for_all_cpus(print_hwp, ODD_COUNTERS);
3267
3268 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3269 for_all_cpus(print_epb, ODD_COUNTERS);
3270
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3271 if (debug)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3272 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3273
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3274 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3275 for_all_cpus(print_rapl, ODD_COUNTERS);
3276
3277 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3278
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3279 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3280 for_all_cpus(print_thermal, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3281}
3282
3283int fork_it(char **argv)
3284{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3285 pid_t child_pid;
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3286 int status;
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]3287
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3288 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3289 if (status)
3290 exit(status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3291 /* clear affinity side-effect of get_counters() */
3292 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3293 gettimeofday(&tv_even, (struct timezone *)NULL);
3294
3295 child_pid = fork();
3296 if (!child_pid) {
3297 /* child */
3298 execvp(argv[0], argv);
3299 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3300
3301 /* parent */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3302 if (child_pid == -1)
3303 err(1, "fork");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3304
3305 signal(SIGINT, SIG_IGN);
3306 signal(SIGQUIT, SIG_IGN);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3307 if (waitpid(child_pid, &status, 0) == -1)
3308 err(status, "waitpid");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3309 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3310 /*
3311 * n.b. fork_it() does not check for errors from for_all_cpus()
3312 * because re-starting is problematic when forking
3313 */
3314 for_all_cpus(get_counters, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3315 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3316 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3317 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3318 compute_average(EVEN_COUNTERS);
3319 format_all_counters(EVEN_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3320
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3321 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
3322
3323 flush_output_stderr();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3324
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3325 return status;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3326}
3327
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3328int get_and_dump_counters(void)
3329{
3330 int status;
3331
3332 status = for_all_cpus(get_counters, ODD_COUNTERS);
3333 if (status)
3334 return status;
3335
3336 status = for_all_cpus(dump_counters, ODD_COUNTERS);
3337 if (status)
3338 return status;
3339
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3340 flush_output_stdout();
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3341
3342 return status;
3343}
3344
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3345void print_version() {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3346 fprintf(outf, "turbostat version 4.10 10 Dec, 2015"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3347 " - Len Brown <lenb@kernel.org>\n");
3348}
3349
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3350void cmdline(int argc, char **argv)
3351{
3352 int opt;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3353 int option_index = 0;
3354 static struct option long_options[] = {
3355 {"Counter", required_argument, 0, 'C'},
3356 {"counter", required_argument, 0, 'c'},
3357 {"Dump", no_argument, 0, 'D'},
3358 {"debug", no_argument, 0, 'd'},
3359 {"interval", required_argument, 0, 'i'},
3360 {"help", no_argument, 0, 'h'},
3361 {"Joules", no_argument, 0, 'J'},
3362 {"MSR", required_argument, 0, 'M'},
3363 {"msr", required_argument, 0, 'm'},
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3364 {"out", required_argument, 0, 'o'},
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3365 {"Package", no_argument, 0, 'p'},
3366 {"processor", no_argument, 0, 'p'},
3367 {"Summary", no_argument, 0, 'S'},
3368 {"TCC", required_argument, 0, 'T'},
3369 {"version", no_argument, 0, 'v' },
3370 {0, 0, 0, 0 }
3371 };
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3372
3373 progname = argv[0];
3374
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3375 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:PpST:v",
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3376 long_options, &option_index)) != -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3377 switch (opt) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3378 case 'C':
3379 sscanf(optarg, "%x", &extra_delta_offset64);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3380 break;
Len Brownf9240812012-10-06 15:26:31 -0400[diff] [blame]3381 case 'c':
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]3382 sscanf(optarg, "%x", &extra_delta_offset32);
3383 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3384 case 'D':
3385 dump_only++;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]3386 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3387 case 'd':
3388 debug++;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]3389 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3390 case 'h':
3391 default:
3392 help();
3393 exit(1);
3394 case 'i':
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]3395 {
3396 double interval = strtod(optarg, NULL);
3397
3398 if (interval < 0.001) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3399 fprintf(outf, "interval %f seconds is too small\n",
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]3400 interval);
3401 exit(2);
3402 }
3403
3404 interval_ts.tv_sec = interval;
3405 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
3406 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3407 break;
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]3408 case 'J':
3409 rapl_joules++;
3410 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3411 case 'M':
3412 sscanf(optarg, "%x", &extra_msr_offset64);
3413 break;
3414 case 'm':
3415 sscanf(optarg, "%x", &extra_msr_offset32);
3416 break;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3417 case 'o':
3418 outf = fopen_or_die(optarg, "w");
3419 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3420 case 'P':
3421 show_pkg_only++;
3422 break;
3423 case 'p':
3424 show_core_only++;
3425 break;
3426 case 'S':
3427 summary_only++;
3428 break;
3429 case 'T':
3430 tcc_activation_temp_override = atoi(optarg);
3431 break;
3432 case 'v':
3433 print_version();
3434 exit(0);
3435 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3436 }
3437 }
3438}
3439
3440int main(int argc, char **argv)
3441{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3442 outf = stderr;
3443
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3444 cmdline(argc, argv);
3445
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3446 if (debug)
3447 print_version();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3448
3449 turbostat_init();
3450
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3451 /* dump counters and exit */
3452 if (dump_only)
3453 return get_and_dump_counters();
3454
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3455 /*
3456 * if any params left, it must be a command to fork
3457 */
3458 if (argc - optind)
3459 return fork_it(argv + optind);
3460 else
3461 turbostat_loop();
3462
3463 return 0;
3464}