blob: 192119761c147a39f87e482b927e1d3e5f9276e9 [file] [log] [blame]
Benjamin Gaignard54026262014-07-30 19:24:55 +02001/*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
5 */
6
7#include <linux/clk.h>
8#include <linux/component.h>
9#include <linux/hdmi.h>
10#include <linux/module.h>
11#include <linux/of_gpio.h>
12#include <linux/platform_device.h>
13#include <linux/reset.h>
14
15#include <drm/drmP.h>
16#include <drm/drm_crtc_helper.h>
17#include <drm/drm_edid.h>
18
19#include "sti_hdmi.h"
20#include "sti_hdmi_tx3g4c28phy.h"
21#include "sti_hdmi_tx3g0c55phy.h"
22#include "sti_vtg.h"
23
24#define HDMI_CFG 0x0000
25#define HDMI_INT_EN 0x0004
26#define HDMI_INT_STA 0x0008
27#define HDMI_INT_CLR 0x000C
28#define HDMI_STA 0x0010
29#define HDMI_ACTIVE_VID_XMIN 0x0100
30#define HDMI_ACTIVE_VID_XMAX 0x0104
31#define HDMI_ACTIVE_VID_YMIN 0x0108
32#define HDMI_ACTIVE_VID_YMAX 0x010C
33#define HDMI_DFLT_CHL0_DAT 0x0110
34#define HDMI_DFLT_CHL1_DAT 0x0114
35#define HDMI_DFLT_CHL2_DAT 0x0118
36#define HDMI_SW_DI_1_HEAD_WORD 0x0210
37#define HDMI_SW_DI_1_PKT_WORD0 0x0214
38#define HDMI_SW_DI_1_PKT_WORD1 0x0218
39#define HDMI_SW_DI_1_PKT_WORD2 0x021C
40#define HDMI_SW_DI_1_PKT_WORD3 0x0220
41#define HDMI_SW_DI_1_PKT_WORD4 0x0224
42#define HDMI_SW_DI_1_PKT_WORD5 0x0228
43#define HDMI_SW_DI_1_PKT_WORD6 0x022C
44#define HDMI_SW_DI_CFG 0x0230
45
46#define HDMI_IFRAME_SLOT_AVI 1
47
48#define XCAT(prefix, x, suffix) prefix ## x ## suffix
49#define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
50#define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
51#define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
52#define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
53#define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
54#define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
55#define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
56#define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
57
58#define HDMI_IFRAME_DISABLED 0x0
59#define HDMI_IFRAME_SINGLE_SHOT 0x1
60#define HDMI_IFRAME_FIELD 0x2
61#define HDMI_IFRAME_FRAME 0x3
62#define HDMI_IFRAME_MASK 0x3
63#define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */
64
65#define HDMI_CFG_DEVICE_EN BIT(0)
66#define HDMI_CFG_HDMI_NOT_DVI BIT(1)
67#define HDMI_CFG_HDCP_EN BIT(2)
68#define HDMI_CFG_ESS_NOT_OESS BIT(3)
69#define HDMI_CFG_H_SYNC_POL_NEG BIT(4)
70#define HDMI_CFG_SINK_TERM_DET_EN BIT(5)
71#define HDMI_CFG_V_SYNC_POL_NEG BIT(6)
72#define HDMI_CFG_422_EN BIT(8)
73#define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12)
74#define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13)
75#define HDMI_CFG_SW_RST_EN BIT(31)
76
77#define HDMI_INT_GLOBAL BIT(0)
78#define HDMI_INT_SW_RST BIT(1)
79#define HDMI_INT_PIX_CAP BIT(3)
80#define HDMI_INT_HOT_PLUG BIT(4)
81#define HDMI_INT_DLL_LCK BIT(5)
82#define HDMI_INT_NEW_FRAME BIT(6)
83#define HDMI_INT_GENCTRL_PKT BIT(7)
84#define HDMI_INT_SINK_TERM_PRESENT BIT(11)
85
86#define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
87 | HDMI_INT_DLL_LCK \
88 | HDMI_INT_HOT_PLUG \
89 | HDMI_INT_GLOBAL)
90
91#define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
92 | HDMI_INT_GENCTRL_PKT \
93 | HDMI_INT_NEW_FRAME \
94 | HDMI_INT_DLL_LCK \
95 | HDMI_INT_HOT_PLUG \
96 | HDMI_INT_PIX_CAP \
97 | HDMI_INT_SW_RST \
98 | HDMI_INT_GLOBAL)
99
100#define HDMI_STA_SW_RST BIT(1)
101
102struct sti_hdmi_connector {
103 struct drm_connector drm_connector;
104 struct drm_encoder *encoder;
105 struct sti_hdmi *hdmi;
106};
107
108#define to_sti_hdmi_connector(x) \
109 container_of(x, struct sti_hdmi_connector, drm_connector)
110
111u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
112{
113 return readl(hdmi->regs + offset);
114}
115
116void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
117{
118 writel(val, hdmi->regs + offset);
119}
120
121/**
122 * HDMI interrupt handler threaded
123 *
124 * @irq: irq number
125 * @arg: connector structure
126 */
127static irqreturn_t hdmi_irq_thread(int irq, void *arg)
128{
129 struct sti_hdmi *hdmi = arg;
130
131 /* Hot plug/unplug IRQ */
132 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
Benjamin Gaignard76569202014-10-09 08:53:35 +0200133 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200134 if (hdmi->drm_dev)
135 drm_helper_hpd_irq_event(hdmi->drm_dev);
136 }
137
138 /* Sw reset and PLL lock are exclusive so we can use the same
139 * event to signal them
140 */
141 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
142 hdmi->event_received = true;
143 wake_up_interruptible(&hdmi->wait_event);
144 }
145
146 return IRQ_HANDLED;
147}
148
149/**
150 * HDMI interrupt handler
151 *
152 * @irq: irq number
153 * @arg: connector structure
154 */
155static irqreturn_t hdmi_irq(int irq, void *arg)
156{
157 struct sti_hdmi *hdmi = arg;
158
159 /* read interrupt status */
160 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
161
162 /* clear interrupt status */
163 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
164
165 /* force sync bus write */
166 hdmi_read(hdmi, HDMI_INT_STA);
167
168 return IRQ_WAKE_THREAD;
169}
170
171/**
172 * Set hdmi active area depending on the drm display mode selected
173 *
174 * @hdmi: pointer on the hdmi internal structure
175 */
176static void hdmi_active_area(struct sti_hdmi *hdmi)
177{
178 u32 xmin, xmax;
179 u32 ymin, ymax;
180
181 xmin = sti_vtg_get_pixel_number(hdmi->mode, 0);
182 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay - 1);
183 ymin = sti_vtg_get_line_number(hdmi->mode, 0);
184 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
185
186 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
187 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
188 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
189 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
190}
191
192/**
193 * Overall hdmi configuration
194 *
195 * @hdmi: pointer on the hdmi internal structure
196 */
197static void hdmi_config(struct sti_hdmi *hdmi)
198{
199 u32 conf;
200
201 DRM_DEBUG_DRIVER("\n");
202
203 /* Clear overrun and underrun fifo */
204 conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR;
205
206 /* Enable HDMI mode not DVI */
207 conf |= HDMI_CFG_HDMI_NOT_DVI | HDMI_CFG_ESS_NOT_OESS;
208
209 /* Enable sink term detection */
210 conf |= HDMI_CFG_SINK_TERM_DET_EN;
211
212 /* Set Hsync polarity */
213 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
214 DRM_DEBUG_DRIVER("H Sync Negative\n");
215 conf |= HDMI_CFG_H_SYNC_POL_NEG;
216 }
217
218 /* Set Vsync polarity */
219 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
220 DRM_DEBUG_DRIVER("V Sync Negative\n");
221 conf |= HDMI_CFG_V_SYNC_POL_NEG;
222 }
223
224 /* Enable HDMI */
225 conf |= HDMI_CFG_DEVICE_EN;
226
227 hdmi_write(hdmi, conf, HDMI_CFG);
228}
229
230/**
231 * Prepare and configure the AVI infoframe
232 *
233 * AVI infoframe are transmitted at least once per two video field and
234 * contains information about HDMI transmission mode such as color space,
235 * colorimetry, ...
236 *
237 * @hdmi: pointer on the hdmi internal structure
238 *
239 * Return negative value if error occurs
240 */
241static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
242{
243 struct drm_display_mode *mode = &hdmi->mode;
244 struct hdmi_avi_infoframe infoframe;
245 u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
246 u8 *frame = buffer + HDMI_INFOFRAME_HEADER_SIZE;
247 u32 val;
248 int ret;
249
250 DRM_DEBUG_DRIVER("\n");
251
252 ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode);
253 if (ret < 0) {
254 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret);
255 return ret;
256 }
257
258 /* fixed infoframe configuration not linked to the mode */
259 infoframe.colorspace = HDMI_COLORSPACE_RGB;
260 infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
261 infoframe.colorimetry = HDMI_COLORIMETRY_NONE;
262
263 ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer));
264 if (ret < 0) {
265 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
266 return ret;
267 }
268
269 /* Disable transmission slot for AVI infoframe */
270 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
271 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, HDMI_IFRAME_SLOT_AVI);
272 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
273
274 /* Infoframe header */
275 val = buffer[0x0];
276 val |= buffer[0x1] << 8;
277 val |= buffer[0x2] << 16;
278 hdmi_write(hdmi, val, HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI));
279
280 /* Infoframe packet bytes */
281 val = frame[0x0];
282 val |= frame[0x1] << 8;
283 val |= frame[0x2] << 16;
284 val |= frame[0x3] << 24;
285 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI));
286
287 val = frame[0x4];
288 val |= frame[0x5] << 8;
289 val |= frame[0x6] << 16;
290 val |= frame[0x7] << 24;
291 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD1(HDMI_IFRAME_SLOT_AVI));
292
293 val = frame[0x8];
294 val |= frame[0x9] << 8;
295 val |= frame[0xA] << 16;
296 val |= frame[0xB] << 24;
297 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD2(HDMI_IFRAME_SLOT_AVI));
298
299 val = frame[0xC];
Benjamin Gaignard54026262014-07-30 19:24:55 +0200300 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD3(HDMI_IFRAME_SLOT_AVI));
301
302 /* Enable transmission slot for AVI infoframe
303 * According to the hdmi specification, AVI infoframe should be
304 * transmitted at least once per two video fields
305 */
306 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
307 val |= HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_FIELD, HDMI_IFRAME_SLOT_AVI);
308 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
309
310 return 0;
311}
312
313/**
314 * Software reset of the hdmi subsystem
315 *
316 * @hdmi: pointer on the hdmi internal structure
317 *
318 */
319#define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */
320static void hdmi_swreset(struct sti_hdmi *hdmi)
321{
322 u32 val;
323
324 DRM_DEBUG_DRIVER("\n");
325
326 /* Enable hdmi_audio clock only during hdmi reset */
327 if (clk_prepare_enable(hdmi->clk_audio))
328 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
329
330 /* Sw reset */
331 hdmi->event_received = false;
332
333 val = hdmi_read(hdmi, HDMI_CFG);
334 val |= HDMI_CFG_SW_RST_EN;
335 hdmi_write(hdmi, val, HDMI_CFG);
336
337 /* Wait reset completed */
338 wait_event_interruptible_timeout(hdmi->wait_event,
339 hdmi->event_received == true,
340 msecs_to_jiffies
341 (HDMI_TIMEOUT_SWRESET));
342
343 /*
344 * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is
345 * set to '1' and clk_audio is running.
346 */
347 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
348 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
349
350 val = hdmi_read(hdmi, HDMI_CFG);
351 val &= ~HDMI_CFG_SW_RST_EN;
352 hdmi_write(hdmi, val, HDMI_CFG);
353
354 /* Disable hdmi_audio clock. Not used anymore for drm purpose */
355 clk_disable_unprepare(hdmi->clk_audio);
356}
357
358static void sti_hdmi_disable(struct drm_bridge *bridge)
359{
360 struct sti_hdmi *hdmi = bridge->driver_private;
361
362 u32 val = hdmi_read(hdmi, HDMI_CFG);
363
364 if (!hdmi->enabled)
365 return;
366
367 DRM_DEBUG_DRIVER("\n");
368
369 /* Disable HDMI */
370 val &= ~HDMI_CFG_DEVICE_EN;
371 hdmi_write(hdmi, val, HDMI_CFG);
372
373 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
374
375 /* Stop the phy */
376 hdmi->phy_ops->stop(hdmi);
377
378 /* Set the default channel data to be a dark red */
379 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
380 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
381 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
382
383 /* Disable/unprepare hdmi clock */
384 clk_disable_unprepare(hdmi->clk_phy);
385 clk_disable_unprepare(hdmi->clk_tmds);
386 clk_disable_unprepare(hdmi->clk_pix);
387
388 hdmi->enabled = false;
389}
390
391static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
392{
393 struct sti_hdmi *hdmi = bridge->driver_private;
394
395 DRM_DEBUG_DRIVER("\n");
396
397 if (hdmi->enabled)
398 return;
399
400 /* Prepare/enable clocks */
401 if (clk_prepare_enable(hdmi->clk_pix))
402 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
403 if (clk_prepare_enable(hdmi->clk_tmds))
404 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
405 if (clk_prepare_enable(hdmi->clk_phy))
406 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n");
407
408 hdmi->enabled = true;
409
410 /* Program hdmi serializer and start phy */
411 if (!hdmi->phy_ops->start(hdmi)) {
412 DRM_ERROR("Unable to start hdmi phy\n");
413 return;
414 }
415
416 /* Program hdmi active area */
417 hdmi_active_area(hdmi);
418
419 /* Enable working interrupts */
420 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
421
422 /* Program hdmi config */
423 hdmi_config(hdmi);
424
425 /* Program AVI infoframe */
426 if (hdmi_avi_infoframe_config(hdmi))
427 DRM_ERROR("Unable to configure AVI infoframe\n");
428
429 /* Sw reset */
430 hdmi_swreset(hdmi);
431}
432
433static void sti_hdmi_set_mode(struct drm_bridge *bridge,
434 struct drm_display_mode *mode,
435 struct drm_display_mode *adjusted_mode)
436{
437 struct sti_hdmi *hdmi = bridge->driver_private;
438 int ret;
439
440 DRM_DEBUG_DRIVER("\n");
441
442 /* Copy the drm display mode in the connector local structure */
443 memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode));
444
445 /* Update clock framerate according to the selected mode */
446 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
447 if (ret < 0) {
448 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
449 mode->clock * 1000);
450 return;
451 }
452 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
453 if (ret < 0) {
454 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
455 mode->clock * 1000);
456 return;
457 }
458}
459
460static void sti_hdmi_bridge_nope(struct drm_bridge *bridge)
461{
462 /* do nothing */
463}
464
465static void sti_hdmi_brigde_destroy(struct drm_bridge *bridge)
466{
467 drm_bridge_cleanup(bridge);
468 kfree(bridge);
469}
470
471static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = {
472 .pre_enable = sti_hdmi_pre_enable,
473 .enable = sti_hdmi_bridge_nope,
474 .disable = sti_hdmi_disable,
475 .post_disable = sti_hdmi_bridge_nope,
476 .mode_set = sti_hdmi_set_mode,
477 .destroy = sti_hdmi_brigde_destroy,
478};
479
480static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
481{
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200482 struct sti_hdmi_connector *hdmi_connector
483 = to_sti_hdmi_connector(connector);
484 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200485 struct edid *edid;
486 int count;
487
488 DRM_DEBUG_DRIVER("\n");
489
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200490 edid = drm_get_edid(connector, hdmi->ddc_adapt);
Benjamin Gaignard54026262014-07-30 19:24:55 +0200491 if (!edid)
492 goto fail;
493
494 count = drm_add_edid_modes(connector, edid);
495 drm_mode_connector_update_edid_property(connector, edid);
496
497 kfree(edid);
498 return count;
499
500fail:
501 DRM_ERROR("Can not read HDMI EDID\n");
502 return 0;
503}
504
505#define CLK_TOLERANCE_HZ 50
506
507static int sti_hdmi_connector_mode_valid(struct drm_connector *connector,
508 struct drm_display_mode *mode)
509{
510 int target = mode->clock * 1000;
511 int target_min = target - CLK_TOLERANCE_HZ;
512 int target_max = target + CLK_TOLERANCE_HZ;
513 int result;
514 struct sti_hdmi_connector *hdmi_connector
515 = to_sti_hdmi_connector(connector);
516 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
517
518
519 result = clk_round_rate(hdmi->clk_pix, target);
520
521 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
522 target, result);
523
524 if ((result < target_min) || (result > target_max)) {
525 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target);
526 return MODE_BAD;
527 }
528
529 return MODE_OK;
530}
531
532struct drm_encoder *sti_hdmi_best_encoder(struct drm_connector *connector)
533{
534 struct sti_hdmi_connector *hdmi_connector
535 = to_sti_hdmi_connector(connector);
536
537 /* Best encoder is the one associated during connector creation */
538 return hdmi_connector->encoder;
539}
540
541static struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
542 .get_modes = sti_hdmi_connector_get_modes,
543 .mode_valid = sti_hdmi_connector_mode_valid,
544 .best_encoder = sti_hdmi_best_encoder,
545};
546
547/* get detection status of display device */
548static enum drm_connector_status
549sti_hdmi_connector_detect(struct drm_connector *connector, bool force)
550{
551 struct sti_hdmi_connector *hdmi_connector
552 = to_sti_hdmi_connector(connector);
553 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
554
555 DRM_DEBUG_DRIVER("\n");
556
557 if (hdmi->hpd) {
558 DRM_DEBUG_DRIVER("hdmi cable connected\n");
559 return connector_status_connected;
560 }
561
562 DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
563 return connector_status_disconnected;
564}
565
566static void sti_hdmi_connector_destroy(struct drm_connector *connector)
567{
568 struct sti_hdmi_connector *hdmi_connector
569 = to_sti_hdmi_connector(connector);
570
571 drm_connector_unregister(connector);
572 drm_connector_cleanup(connector);
573 kfree(hdmi_connector);
574}
575
576static struct drm_connector_funcs sti_hdmi_connector_funcs = {
577 .dpms = drm_helper_connector_dpms,
578 .fill_modes = drm_helper_probe_single_connector_modes,
579 .detect = sti_hdmi_connector_detect,
580 .destroy = sti_hdmi_connector_destroy,
581};
582
583static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev)
584{
585 struct drm_encoder *encoder;
586
587 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
588 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
589 return encoder;
590 }
591
592 return NULL;
593}
594
595static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
596{
597 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
598 struct drm_device *drm_dev = data;
599 struct drm_encoder *encoder;
600 struct sti_hdmi_connector *connector;
601 struct drm_connector *drm_connector;
602 struct drm_bridge *bridge;
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200603 struct device_node *ddc;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200604 int err;
605
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200606 ddc = of_parse_phandle(dev->of_node, "ddc", 0);
607 if (ddc) {
608 hdmi->ddc_adapt = of_find_i2c_adapter_by_node(ddc);
609 if (!hdmi->ddc_adapt) {
610 err = -EPROBE_DEFER;
611 of_node_put(ddc);
612 return err;
613 }
614
615 of_node_put(ddc);
616 }
Benjamin Gaignard54026262014-07-30 19:24:55 +0200617
618 /* Set the drm device handle */
619 hdmi->drm_dev = drm_dev;
620
621 encoder = sti_hdmi_find_encoder(drm_dev);
622 if (!encoder)
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200623 goto err_adapt;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200624
625 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
626 if (!connector)
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200627 goto err_adapt;
628
Benjamin Gaignard54026262014-07-30 19:24:55 +0200629
630 connector->hdmi = hdmi;
631
632 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
633 if (!bridge)
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200634 goto err_adapt;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200635
636 bridge->driver_private = hdmi;
637 drm_bridge_init(drm_dev, bridge, &sti_hdmi_bridge_funcs);
638
639 encoder->bridge = bridge;
640 connector->encoder = encoder;
641
642 drm_connector = (struct drm_connector *)connector;
643
644 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
645
646 drm_connector_init(drm_dev, drm_connector,
647 &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA);
648 drm_connector_helper_add(drm_connector,
649 &sti_hdmi_connector_helper_funcs);
650
651 err = drm_connector_register(drm_connector);
652 if (err)
653 goto err_connector;
654
655 err = drm_mode_connector_attach_encoder(drm_connector, encoder);
656 if (err) {
657 DRM_ERROR("Failed to attach a connector to a encoder\n");
658 goto err_sysfs;
659 }
660
661 /* Enable default interrupts */
662 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
663
664 return 0;
665
666err_sysfs:
667 drm_connector_unregister(drm_connector);
668err_connector:
669 drm_bridge_cleanup(bridge);
670 drm_connector_cleanup(drm_connector);
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200671err_adapt:
672 put_device(&hdmi->ddc_adapt->dev);
Benjamin Gaignard54026262014-07-30 19:24:55 +0200673 return -EINVAL;
674}
675
676static void sti_hdmi_unbind(struct device *dev,
677 struct device *master, void *data)
678{
679 /* do nothing */
680}
681
682static const struct component_ops sti_hdmi_ops = {
683 .bind = sti_hdmi_bind,
684 .unbind = sti_hdmi_unbind,
685};
686
Kiran Padwal8e932cf2014-08-26 12:25:24 +0200687static const struct of_device_id hdmi_of_match[] = {
Benjamin Gaignard54026262014-07-30 19:24:55 +0200688 {
689 .compatible = "st,stih416-hdmi",
690 .data = &tx3g0c55phy_ops,
691 }, {
692 .compatible = "st,stih407-hdmi",
693 .data = &tx3g4c28phy_ops,
694 }, {
695 /* end node */
696 }
697};
698MODULE_DEVICE_TABLE(of, hdmi_of_match);
699
700static int sti_hdmi_probe(struct platform_device *pdev)
701{
702 struct device *dev = &pdev->dev;
703 struct sti_hdmi *hdmi;
704 struct device_node *np = dev->of_node;
705 struct resource *res;
706 int ret;
707
708 DRM_INFO("%s\n", __func__);
709
710 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
711 if (!hdmi)
712 return -ENOMEM;
713
714 hdmi->dev = pdev->dev;
715
716 /* Get resources */
717 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg");
718 if (!res) {
719 DRM_ERROR("Invalid hdmi resource\n");
720 return -ENOMEM;
721 }
722 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
Wei Yongjun88cfc3f2014-08-26 12:23:07 +0200723 if (!hdmi->regs)
724 return -ENOMEM;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200725
726 if (of_device_is_compatible(np, "st,stih416-hdmi")) {
727 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
728 "syscfg");
729 if (!res) {
730 DRM_ERROR("Invalid syscfg resource\n");
731 return -ENOMEM;
732 }
733 hdmi->syscfg = devm_ioremap_nocache(dev, res->start,
734 resource_size(res));
Wei Yongjun88cfc3f2014-08-26 12:23:07 +0200735 if (!hdmi->syscfg)
736 return -ENOMEM;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200737
738 }
739
740 hdmi->phy_ops = (struct hdmi_phy_ops *)
741 of_match_node(hdmi_of_match, np)->data;
742
743 /* Get clock resources */
744 hdmi->clk_pix = devm_clk_get(dev, "pix");
745 if (IS_ERR(hdmi->clk_pix)) {
746 DRM_ERROR("Cannot get hdmi_pix clock\n");
747 return PTR_ERR(hdmi->clk_pix);
748 }
749
750 hdmi->clk_tmds = devm_clk_get(dev, "tmds");
751 if (IS_ERR(hdmi->clk_tmds)) {
752 DRM_ERROR("Cannot get hdmi_tmds clock\n");
753 return PTR_ERR(hdmi->clk_tmds);
754 }
755
756 hdmi->clk_phy = devm_clk_get(dev, "phy");
757 if (IS_ERR(hdmi->clk_phy)) {
758 DRM_ERROR("Cannot get hdmi_phy clock\n");
759 return PTR_ERR(hdmi->clk_phy);
760 }
761
762 hdmi->clk_audio = devm_clk_get(dev, "audio");
763 if (IS_ERR(hdmi->clk_audio)) {
764 DRM_ERROR("Cannot get hdmi_audio clock\n");
765 return PTR_ERR(hdmi->clk_audio);
766 }
767
Benjamin Gaignard76569202014-10-09 08:53:35 +0200768 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
Benjamin Gaignard54026262014-07-30 19:24:55 +0200769
770 init_waitqueue_head(&hdmi->wait_event);
771
772 hdmi->irq = platform_get_irq_byname(pdev, "irq");
773
774 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
775 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
776 if (ret) {
777 DRM_ERROR("Failed to register HDMI interrupt\n");
778 return ret;
779 }
780
781 hdmi->reset = devm_reset_control_get(dev, "hdmi");
782 /* Take hdmi out of reset */
783 if (!IS_ERR(hdmi->reset))
784 reset_control_deassert(hdmi->reset);
785
786 platform_set_drvdata(pdev, hdmi);
787
788 return component_add(&pdev->dev, &sti_hdmi_ops);
789}
790
791static int sti_hdmi_remove(struct platform_device *pdev)
792{
Benjamin Gaignard41a14622014-09-08 15:52:08 +0200793 struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
794
795 if (hdmi->ddc_adapt)
796 put_device(&hdmi->ddc_adapt->dev);
797
Benjamin Gaignard54026262014-07-30 19:24:55 +0200798 component_del(&pdev->dev, &sti_hdmi_ops);
799 return 0;
800}
801
802struct platform_driver sti_hdmi_driver = {
803 .driver = {
804 .name = "sti-hdmi",
805 .owner = THIS_MODULE,
806 .of_match_table = hdmi_of_match,
807 },
808 .probe = sti_hdmi_probe,
809 .remove = sti_hdmi_remove,
810};
811
812module_platform_driver(sti_hdmi_driver);
813
814MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
815MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
816MODULE_LICENSE("GPL");