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gerrit-public.fairphone.software / kernel / msm-5.4 / 5b7de4547b388d3949620e21d072e35b6f2638fa / . / arch / arm / mach-omap2 / include / mach / debug-macro.S
blob: 6049f465ec8447599aafba46124059aef64b8a9d [file] [log] [blame]
Tony Lindgrenaca59b82009-10-19 17:26:17 -0700[diff] [blame]1/* arch/arm/mach-omap2/include/mach/debug-macro.S
Russell Kinga09e64f2008-08-05 16:14:15 +0100[diff] [blame]2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
Tony Lindgren4f2c49f2010-02-15 08:48:53 -0800[diff] [blame]14#include <linux/serial_reg.h>
15
Tony Lindgren96554d72010-04-30 17:39:19 -0700[diff] [blame]16#include <asm/memory.h>
17
Tony Lindgren4f2c49f2010-02-15 08:48:53 -0800[diff] [blame]18#include <plat/serial.h>
19
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]20#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
21
Tony Lindgren5b7de452011-02-04 21:03:24 +0100[diff] [blame^]22#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
23#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
24
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]25 .pushsection .data
26omap_uart_phys: .word 0
27omap_uart_virt: .word 0
28omap_uart_lsr: .word 0
29 .popsection
30
31 /*
32 * Note that this code won't work if the bootloader passes
33 * a wrong machine ID number in r1. To debug, just hardcode
34 * the desired UART phys and virt addresses temporarily into
35 * the omap_uart_phys and omap_uart_virt above.
36 */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]37 .macro addruart, rp, rv
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]38
39 /* Use omap_uart_phys/virt if already configured */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]4010: mrc p15, 0, \rp, c1, c0
41 tst \rp, #1 @ MMU enabled?
Tony Lindgren5b7de452011-02-04 21:03:24 +0100[diff] [blame^]42 ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]43 ldrne \rp, =omap_uart_phys @ MMU enabled
44 add \rv, \rp, #4 @ omap_uart_virt
45 ldr \rp, [\rp, #0]
46 ldr \rv, [\rv, #0]
47 cmp \rp, #0 @ is port configured?
48 cmpne \rv, #0
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]49 bne 99f @ already configured
50
Tony Lindgren96554d72010-04-30 17:39:19 -0700[diff] [blame]51 /* Check the debug UART configuration set in uncompress.h */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]52 mrc p15, 0, \rp, c1, c0
53 tst \rp, #1 @ MMU enabled?
54 ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
Tony Lindgren5b7de452011-02-04 21:03:24 +0100[diff] [blame^]55 ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]56 ldr \rp, [\rp, #0]
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300[diff] [blame]57
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]58 /* Select the UART to use based on the UART1 scratchpad value */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]59 cmp \rp, #0 @ no port configured?
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]60 beq 21f @ if none, try to use UART1
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]61 cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]62 beq 21f @ configure OMAP2/3/4UART1
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]63 cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]64 beq 22f @ configure OMAP2/3/4UART2
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]65 cmp \rp, #OMAP2UART3 @ only on 24xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]66 beq 23f @ configure OMAP2UART3
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]67 cmp \rp, #OMAP3UART3 @ only on 34xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]68 beq 33f @ configure OMAP3UART3
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]69 cmp \rp, #OMAP4UART3 @ only on 44xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]70 beq 43f @ configure OMAP4UART3
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]71 cmp \rp, #OMAP3UART4 @ only on 36xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]72 beq 34f @ configure OMAP3UART4
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]73 cmp \rp, #OMAP4UART4 @ only on 44xx
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]74 beq 44f @ configure OMAP4UART4
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]75 cmp \rp, #ZOOM_UART @ only on zoom2/3
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]76 beq 95f @ configure ZOOM_UART
77
78 /* Configure the UART offset from the phys/virt base */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]7921: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]80 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]8122: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]82 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]8323: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]84 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]8533: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
86 add \rp, \rp, #0x00fb0000
87 add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]88 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]8934: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
90 add \rp, \rp, #0x00fb0000
91 add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]92 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]9343: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]94 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]9544: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]96 b 98f
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]9795: ldr \rp, =ZOOM_UART_BASE
98 mrc p15, 0, \rv, c1, c0
99 tst \rv, #1 @ MMU enabled?
Tony Lindgren5b7de452011-02-04 21:03:24 +0100[diff] [blame^]100 ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]101 ldrne \rv, =omap_uart_phys @ MMU enabled
102 str \rp, [\rv, #0]
103 ldr \rp, =ZOOM_UART_VIRT
104 add \rv, \rv, #4 @ omap_uart_virt
105 str \rp, [\rv, #0]
106 mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
107 add \rv, \rv, #4 @ omap_uart_lsr
108 str \rp, [\rv, #0]
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]109 b 10b
110
111 /* Store both phys and virt address for the uart */
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]11298: add \rp, \rp, #0x48000000 @ phys base
113 mrc p15, 0, \rv, c1, c0
114 tst \rv, #1 @ MMU enabled?
Tony Lindgren5b7de452011-02-04 21:03:24 +0100[diff] [blame^]115 ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]116 ldrne \rv, =omap_uart_phys @ MMU enabled
117 str \rp, [\rv, #0]
118 sub \rp, \rp, #0x48000000 @ phys base
119 add \rp, \rp, #0xfa000000 @ virt base
120 add \rv, \rv, #4 @ omap_uart_virt
121 str \rp, [\rv, #0]
122 mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
123 add \rv, \rv, #4 @ omap_uart_lsr
124 str \rp, [\rv, #0]
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]125
126 b 10b
12799:
Russell Kinga09e64f2008-08-05 16:14:15 +0100[diff] [blame]128 .endm
129
130 .macro senduart,rd,rx
131 strb \rd, [\rx]
132 .endm
133
134 .macro busyuart,rd,rx
Jason Wang7e788b42010-08-03 11:44:18 +0800[diff] [blame]1351001: mrc p15, 0, \rd, c1, c0
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]136 tst \rd, #1 @ MMU enabled?
Tony Lindgren5b7de452011-02-04 21:03:24 +0100[diff] [blame^]137 ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled
Jeremy Kerr0ea12932010-07-06 18:30:06 +0800[diff] [blame]138 ldrne \rd, =omap_uart_lsr @ MMU enabled
Tony Lindgren0c8219f2010-02-15 08:49:01 -0800[diff] [blame]139 ldr \rd, [\rd, #0]
140 ldrb \rd, [\rx, \rd]
Tony Lindgren4f2c49f2010-02-15 08:48:53 -0800[diff] [blame]141 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
142 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
Russell Kinga09e64f2008-08-05 16:14:15 +0100[diff] [blame]143 bne 1001b
Russell Kinga09e64f2008-08-05 16:14:15 +0100[diff] [blame]144 .endm
145
146 .macro waituart,rd,rx
147 .endm