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gerrit-public.fairphone.software / kernel / msm-5.4 / 60f481b9703867330dc6010868054f68f6d52f7a / . / drivers / net / ethernet / intel / i40e / i40e_ethtool.c
blob: 8b0062ec8edbd7a3efd792b19825ac09799ce052 [file] [log] [blame]
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
Shannon Nelson66fc3602016-01-13 16:51:42 -0800[diff] [blame]4 * Copyright(c) 2013 - 2016 Intel Corporation.
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
Greg Rosedc641b72013-12-18 13:45:51 +0000[diff] [blame]15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27/* ethtool support for i40e */
28
29#include "i40e.h"
30#include "i40e_diag.h"
31
32struct i40e_stats {
33 char stat_string[ETH_GSTRING_LEN];
34 int sizeof_stat;
35 int stat_offset;
36};
37
38#define I40E_STAT(_type, _name, _stat) { \
39 .stat_string = _name, \
40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \
41 .stat_offset = offsetof(_type, _stat) \
42}
Shannon Nelsonfad177d2014-11-11 20:07:27 +0000[diff] [blame]43
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]44#define I40E_NETDEV_STAT(_net_stat) \
Shannon Nelsonfad177d2014-11-11 20:07:27 +0000[diff] [blame]45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]46#define I40E_PF_STAT(_name, _stat) \
47 I40E_STAT(struct i40e_pf, _name, _stat)
48#define I40E_VSI_STAT(_name, _stat) \
49 I40E_STAT(struct i40e_vsi, _name, _stat)
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]50#define I40E_VEB_STAT(_name, _stat) \
51 I40E_STAT(struct i40e_veb, _name, _stat)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]52
53static const struct i40e_stats i40e_gstrings_net_stats[] = {
54 I40E_NETDEV_STAT(rx_packets),
55 I40E_NETDEV_STAT(tx_packets),
56 I40E_NETDEV_STAT(rx_bytes),
57 I40E_NETDEV_STAT(tx_bytes),
58 I40E_NETDEV_STAT(rx_errors),
59 I40E_NETDEV_STAT(tx_errors),
60 I40E_NETDEV_STAT(rx_dropped),
61 I40E_NETDEV_STAT(tx_dropped),
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]62 I40E_NETDEV_STAT(collisions),
63 I40E_NETDEV_STAT(rx_length_errors),
64 I40E_NETDEV_STAT(rx_crc_errors),
65};
66
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]67static const struct i40e_stats i40e_gstrings_veb_stats[] = {
68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes),
69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes),
70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast),
71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast),
72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast),
73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast),
74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast),
75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast),
76 I40E_VEB_STAT("rx_discards", stats.rx_discards),
77 I40E_VEB_STAT("tx_discards", stats.tx_discards),
78 I40E_VEB_STAT("tx_errors", stats.tx_errors),
79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol),
80};
81
Shannon Nelson41a9e552014-04-23 04:50:20 +0000[diff] [blame]82static const struct i40e_stats i40e_gstrings_misc_stats[] = {
Shannon Nelson418631d2014-04-23 04:50:07 +0000[diff] [blame]83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
Shannon Nelson41a9e552014-04-23 04:50:20 +0000[diff] [blame]87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
Shannon Nelson418631d2014-04-23 04:50:07 +0000[diff] [blame]89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
Anjali Singhai Jain2fc3d712015-08-27 11:42:29 -0400[diff] [blame]90 I40E_VSI_STAT("tx_linearize", tx_linearize),
Anjali Singhai Jain164c9f52015-10-21 19:47:08 -0400[diff] [blame]91 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
Jesse Brandeburgc40918c2016-01-04 10:33:10 -0800[diff] [blame]92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
Shannon Nelson41a9e552014-04-23 04:50:20 +0000[diff] [blame]94};
95
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]96/* These PF_STATs might look like duplicates of some NETDEV_STATs,
97 * but they are separate. This device supports Virtualization, and
98 * as such might have several netdevs supporting VMDq and FCoE going
99 * through a single port. The NETDEV_STATs are for individual netdevs
100 * seen at the top of the stack, and the PF_STATs are for the physical
101 * function at the bottom of the stack hosting those netdevs.
102 *
103 * The PF_STATs are appended to the netdev stats only when ethtool -S
104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
105 */
Joe Perchesfe180a52016-09-26 20:17:01 -0700[diff] [blame]106static const struct i40e_stats i40e_gstrings_stats[] = {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
Shannon Nelson532d2832014-04-23 04:50:09 +0000[diff] [blame]109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast),
110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast),
111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast),
112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast),
113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast),
114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast),
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down),
Shannon Nelson9f7c9442015-07-10 19:35:57 -0400[diff] [blame]118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors),
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes),
120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults),
121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults),
Jesse Brandeburga47a15f2014-02-06 05:51:09 +0000[diff] [blame]122 I40E_PF_STAT("tx_timeout", tx_timeout_count),
Jesse Brandeburg8a3c91c2014-05-20 08:01:43 +0000[diff] [blame]123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error),
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors),
125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx),
126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx),
127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx),
128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx),
Alice Michaeldbd668e2017-10-27 11:06:48 -0400[diff] [blame]129 I40E_PF_STAT("priority_xon_rx", stats.priority_xon_rx),
130 I40E_PF_STAT("priority_xoff_rx", stats.priority_xoff_rx),
131 I40E_PF_STAT("priority_xon_tx", stats.priority_xon_tx),
132 I40E_PF_STAT("priority_xoff_tx", stats.priority_xoff_tx),
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]133 I40E_PF_STAT("rx_size_64", stats.rx_size_64),
134 I40E_PF_STAT("rx_size_127", stats.rx_size_127),
135 I40E_PF_STAT("rx_size_255", stats.rx_size_255),
136 I40E_PF_STAT("rx_size_511", stats.rx_size_511),
137 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023),
138 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522),
139 I40E_PF_STAT("rx_size_big", stats.rx_size_big),
140 I40E_PF_STAT("tx_size_64", stats.tx_size_64),
141 I40E_PF_STAT("tx_size_127", stats.tx_size_127),
142 I40E_PF_STAT("tx_size_255", stats.tx_size_255),
143 I40E_PF_STAT("tx_size_511", stats.tx_size_511),
144 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023),
145 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522),
146 I40E_PF_STAT("tx_size_big", stats.tx_size_big),
147 I40E_PF_STAT("rx_undersize", stats.rx_undersize),
148 I40E_PF_STAT("rx_fragments", stats.rx_fragments),
149 I40E_PF_STAT("rx_oversize", stats.rx_oversize),
150 I40E_PF_STAT("rx_jabber", stats.rx_jabber),
151 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests),
Mitch Williams1d0a4ad2015-12-23 12:05:48 -0800[diff] [blame]152 I40E_PF_STAT("arq_overflows", arq_overflows),
Jacob Kellerbeb0dff2014-01-11 05:43:19 +0000[diff] [blame]153 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
Jacob Keller2955fac2017-05-03 10:28:58 -0700[diff] [blame]154 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
Anjali Singhai Jain60793f4a2014-07-09 07:46:23 +0000[diff] [blame]155 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt),
Anjali Singhai Jain433c47d2014-05-22 06:32:17 +0000[diff] [blame]156 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match),
Anjali Singhai Jain60ccd452015-04-16 20:06:01 -0400[diff] [blame]157 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
Anjali Singhai Jaind0389e52015-04-22 19:34:05 -0400[diff] [blame]158 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status),
Anjali Singhai Jain433c47d2014-05-22 06:32:17 +0000[diff] [blame]159 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match),
Anjali Singhai Jaind0389e52015-04-22 19:34:05 -0400[diff] [blame]160 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status),
Anjali Singhai Jain433c47d2014-05-22 06:32:17 +0000[diff] [blame]161
Anjali Singhai Jainbee5af72014-03-06 08:59:50 +0000[diff] [blame]162 /* LPI stats */
163 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status),
164 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status),
165 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count),
166 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count),
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]167};
168
169#define I40E_QUEUE_STATS_LEN(n) \
Shannon Nelson31cd8402014-04-04 04:43:12 +0000[diff] [blame]170 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \
171 * 2 /* Tx and Rx together */ \
172 * (sizeof(struct i40e_queue_stats) / sizeof(u64)))
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]173#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
174#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
Shannon Nelson41a9e552014-04-23 04:50:20 +0000[diff] [blame]175#define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]176#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
Shannon Nelson41a9e552014-04-23 04:50:20 +0000[diff] [blame]177 I40E_MISC_STATS_LEN + \
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]178 I40E_QUEUE_STATS_LEN((n)))
179#define I40E_PFC_STATS_LEN ( \
180 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \
181 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \
182 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \
183 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \
184 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \
185 / sizeof(u64))
Neerav Parikhfe860af2015-07-10 19:36:02 -0400[diff] [blame]186#define I40E_VEB_TC_STATS_LEN ( \
187 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \
188 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \
189 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \
190 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \
191 / sizeof(u64))
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]192#define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats)
Neerav Parikhfe860af2015-07-10 19:36:02 -0400[diff] [blame]193#define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]194#define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
195 I40E_PFC_STATS_LEN + \
196 I40E_VSI_STATS_LEN((n)))
197
198enum i40e_ethtool_test_id {
199 I40E_ETH_TEST_REG = 0,
200 I40E_ETH_TEST_EEPROM,
201 I40E_ETH_TEST_INTR,
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]202 I40E_ETH_TEST_LINK,
203};
204
205static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
206 "Register test (offline)",
207 "Eeprom test (offline)",
208 "Interrupt test (offline)",
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]209 "Link test (on/offline)"
210};
211
212#define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
213
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]214struct i40e_priv_flags {
215 char flag_string[ETH_GSTRING_LEN];
216 u64 flag;
217 bool read_only;
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]218};
219
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]220#define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
221 .flag_string = _name, \
222 .flag = _flag, \
223 .read_only = _read_only, \
224}
225
226static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
227 /* NOTE: MFP setting cannot be changed */
228 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
229 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
230 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
231 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
Jacob Keller6964e532017-06-12 15:38:36 -0700[diff] [blame]232 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
Alexander Duyckc424d4a2017-03-14 10:15:26 -0700[diff] [blame]233 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
Mitch Williams64615b52017-08-29 05:32:30 -0400[diff] [blame]234 I40E_PRIV_FLAG("disable-source-pruning",
235 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]236};
237
238#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]239
Jacob Kellerd182a5c2016-10-25 16:08:50 -0700[diff] [blame]240/* Private flags with a global effect, restricted to PF 0 */
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]241static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
242 I40E_PRIV_FLAG("vf-true-promisc-support",
243 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
Jacob Kellerd182a5c2016-10-25 16:08:50 -0700[diff] [blame]244};
245
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]246#define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
Jacob Kellerd182a5c2016-10-25 16:08:50 -0700[diff] [blame]247
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]248/**
Shannon Nelsonf0d8c732014-12-11 07:06:32 +0000[diff] [blame]249 * i40e_partition_setting_complaint - generic complaint for MFP restriction
250 * @pf: the PF struct
251 **/
252static void i40e_partition_setting_complaint(struct i40e_pf *pf)
253{
254 dev_info(&pf->pdev->dev,
255 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
256}
257
258/**
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]259 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
Alan Brady52e2d022017-10-05 14:53:35 -0700[diff] [blame]260 * @pf: PF struct with phy_types
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]261 * @ks: ethtool link ksettings struct to fill out
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]262 *
263 **/
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]264static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
265 struct ethtool_link_ksettings *ks)
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]266{
Avinash Dayanand28537042016-06-20 09:10:33 -0700[diff] [blame]267 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
Carolyn Wyborny31232372016-11-21 13:03:48 -0800[diff] [blame]268 u64 phy_types = pf->hw.phy.phy_types;
269
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]270 ethtool_link_ksettings_zero_link_mode(ks, supported);
271 ethtool_link_ksettings_zero_link_mode(ks, advertising);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]272
273 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]274 ethtool_link_ksettings_add_link_mode(ks, supported,
275 1000baseT_Full);
Avinash Dayanand28537042016-06-20 09:10:33 -0700[diff] [blame]276 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]277 ethtool_link_ksettings_add_link_mode(ks, advertising,
278 1000baseT_Full);
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]279 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]280 ethtool_link_ksettings_add_link_mode(ks, supported,
281 100baseT_Full);
282 ethtool_link_ksettings_add_link_mode(ks, advertising,
283 100baseT_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]284 }
285 }
286 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
287 phy_types & I40E_CAP_PHY_TYPE_XFI ||
288 phy_types & I40E_CAP_PHY_TYPE_SFI ||
289 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]290 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
291 ethtool_link_ksettings_add_link_mode(ks, supported,
292 10000baseT_Full);
Avinash Dayanand28537042016-06-20 09:10:33 -0700[diff] [blame]293 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]294 ethtool_link_ksettings_add_link_mode(ks, advertising,
295 10000baseT_Full);
296 }
297 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
298 ethtool_link_ksettings_add_link_mode(ks, supported,
299 10000baseT_Full);
300 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
301 ethtool_link_ksettings_add_link_mode(ks, advertising,
302 10000baseT_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]303 }
304 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
305 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
306 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]307 ethtool_link_ksettings_add_link_mode(ks, supported,
308 40000baseCR4_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]309 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
310 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]311 ethtool_link_ksettings_add_link_mode(ks, supported,
312 40000baseCR4_Full);
Avinash Dayanand28537042016-06-20 09:10:33 -0700[diff] [blame]313 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]314 ethtool_link_ksettings_add_link_mode(ks, advertising,
315 40000baseCR4_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]316 }
Avinash Dayanand01a7a9f2016-05-16 10:26:40 -0700[diff] [blame]317 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]318 ethtool_link_ksettings_add_link_mode(ks, supported,
319 100baseT_Full);
Avinash Dayanand28537042016-06-20 09:10:33 -0700[diff] [blame]320 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]321 ethtool_link_ksettings_add_link_mode(ks, advertising,
322 100baseT_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]323 }
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]324 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
325 ethtool_link_ksettings_add_link_mode(ks, supported,
326 1000baseT_Full);
Avinash Dayanand28537042016-06-20 09:10:33 -0700[diff] [blame]327 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]328 ethtool_link_ksettings_add_link_mode(ks, advertising,
329 1000baseT_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]330 }
331 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]332 ethtool_link_ksettings_add_link_mode(ks, supported,
333 40000baseSR4_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]334 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]335 ethtool_link_ksettings_add_link_mode(ks, supported,
336 40000baseLR4_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]337 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]338 ethtool_link_ksettings_add_link_mode(ks, supported,
339 40000baseLR4_Full);
340 ethtool_link_ksettings_add_link_mode(ks, advertising,
341 40000baseLR4_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]342 }
343 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]344 ethtool_link_ksettings_add_link_mode(ks, supported,
345 20000baseKR2_Full);
Avinash Dayanand28537042016-06-20 09:10:33 -0700[diff] [blame]346 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]347 ethtool_link_ksettings_add_link_mode(ks, advertising,
348 20000baseKR2_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]349 }
350 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]351 ethtool_link_ksettings_add_link_mode(ks, supported,
352 10000baseKX4_Full);
Avinash Dayanand28537042016-06-20 09:10:33 -0700[diff] [blame]353 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]354 ethtool_link_ksettings_add_link_mode(ks, advertising,
355 10000baseKX4_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]356 }
Alan Brady6987bd252017-10-05 14:53:38 -0700[diff] [blame]357 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
358 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]359 ethtool_link_ksettings_add_link_mode(ks, supported,
360 10000baseKR_Full);
Alan Brady6987bd252017-10-05 14:53:38 -0700[diff] [blame]361 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]362 ethtool_link_ksettings_add_link_mode(ks, advertising,
363 10000baseKR_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]364 }
Alan Brady6987bd252017-10-05 14:53:38 -0700[diff] [blame]365 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
366 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]367 ethtool_link_ksettings_add_link_mode(ks, supported,
368 1000baseKX_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]369 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]370 ethtool_link_ksettings_add_link_mode(ks, advertising,
371 1000baseKX_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]372 }
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]373 /* need to add 25G PHY types */
374 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
375 ethtool_link_ksettings_add_link_mode(ks, supported,
376 25000baseKR_Full);
377 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
378 ethtool_link_ksettings_add_link_mode(ks, advertising,
379 25000baseKR_Full);
380 }
381 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
382 ethtool_link_ksettings_add_link_mode(ks, supported,
383 25000baseCR_Full);
384 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
385 ethtool_link_ksettings_add_link_mode(ks, advertising,
386 25000baseCR_Full);
387 }
388 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
Carolyn Wyborny31232372016-11-21 13:03:48 -0800[diff] [blame]389 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]390 ethtool_link_ksettings_add_link_mode(ks, supported,
391 25000baseSR_Full);
392 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
393 ethtool_link_ksettings_add_link_mode(ks, advertising,
394 25000baseSR_Full);
395 }
396 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
397 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
398 ethtool_link_ksettings_add_link_mode(ks, supported,
399 25000baseCR_Full);
400 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
401 ethtool_link_ksettings_add_link_mode(ks, advertising,
402 25000baseCR_Full);
403 }
404 /* need to add new 10G PHY types */
405 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
406 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
407 ethtool_link_ksettings_add_link_mode(ks, supported,
408 10000baseCR_Full);
409 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
410 ethtool_link_ksettings_add_link_mode(ks, advertising,
411 10000baseCR_Full);
412 }
413 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
414 ethtool_link_ksettings_add_link_mode(ks, supported,
415 10000baseSR_Full);
416 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
417 ethtool_link_ksettings_add_link_mode(ks, advertising,
418 10000baseSR_Full);
419 }
420 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
421 ethtool_link_ksettings_add_link_mode(ks, supported,
422 10000baseLR_Full);
423 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
424 ethtool_link_ksettings_add_link_mode(ks, advertising,
425 10000baseLR_Full);
426 }
427 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
428 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
429 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
430 ethtool_link_ksettings_add_link_mode(ks, supported,
431 1000baseX_Full);
432 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
433 ethtool_link_ksettings_add_link_mode(ks, advertising,
434 1000baseX_Full);
Alan Brady6987bd252017-10-05 14:53:38 -0700[diff] [blame]435 }
436 /* Autoneg PHY types */
437 if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
438 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
439 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
440 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
Carolyn Wyborny31232372016-11-21 13:03:48 -0800[diff] [blame]441 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
Alan Brady6987bd252017-10-05 14:53:38 -0700[diff] [blame]442 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
443 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
444 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
445 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
446 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
447 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
448 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
449 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
450 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
451 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
452 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
453 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
454 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
455 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
456 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
457 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
458 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]459 ethtool_link_ksettings_add_link_mode(ks, supported,
460 Autoneg);
461 ethtool_link_ksettings_add_link_mode(ks, advertising,
462 Autoneg);
Carolyn Wyborny31232372016-11-21 13:03:48 -0800[diff] [blame]463 }
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]464}
465
466/**
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]467 * i40e_get_settings_link_up - Get the Link settings for when link is up
468 * @hw: hw structure
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]469 * @ks: ethtool ksettings to fill in
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]470 * @netdev: network interface device structure
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]471 * @pf: pointer to physical function struct
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]472 **/
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]473static void i40e_get_settings_link_up(struct i40e_hw *hw,
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]474 struct ethtool_link_ksettings *ks,
Catherine Sullivan3b6c2172015-09-03 17:18:52 -0400[diff] [blame]475 struct net_device *netdev,
476 struct i40e_pf *pf)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]477{
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]478 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]479 struct ethtool_link_ksettings cap_ksettings;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]480 u32 link_speed = hw_link_info->link_speed;
481
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]482 /* Initialize supported and advertised settings based on phy settings */
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]483 switch (hw_link_info->phy_type) {
484 case I40E_PHY_TYPE_40GBASE_CR4:
485 case I40E_PHY_TYPE_40GBASE_CR4_CU:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]486 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
487 ethtool_link_ksettings_add_link_mode(ks, supported,
488 40000baseCR4_Full);
489 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
490 ethtool_link_ksettings_add_link_mode(ks, advertising,
491 40000baseCR4_Full);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]492 break;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]493 case I40E_PHY_TYPE_XLAUI:
494 case I40E_PHY_TYPE_XLPPI:
Catherine Sullivan180204c2015-02-26 16:14:58 +0000[diff] [blame]495 case I40E_PHY_TYPE_40GBASE_AOC:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]496 ethtool_link_ksettings_add_link_mode(ks, supported,
497 40000baseCR4_Full);
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]498 break;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]499 case I40E_PHY_TYPE_40GBASE_SR4:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]500 ethtool_link_ksettings_add_link_mode(ks, supported,
501 40000baseSR4_Full);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]502 break;
503 case I40E_PHY_TYPE_40GBASE_LR4:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]504 ethtool_link_ksettings_add_link_mode(ks, supported,
505 40000baseLR4_Full);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]506 break;
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]507 case I40E_PHY_TYPE_25GBASE_SR:
508 case I40E_PHY_TYPE_25GBASE_LR:
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]509 case I40E_PHY_TYPE_10GBASE_SR:
510 case I40E_PHY_TYPE_10GBASE_LR:
Catherine Sullivan124ed152014-07-12 07:28:12 +0000[diff] [blame]511 case I40E_PHY_TYPE_1000BASE_SX:
512 case I40E_PHY_TYPE_1000BASE_LX:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]513 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
514 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
515 ethtool_link_ksettings_add_link_mode(ks, supported,
516 25000baseSR_Full);
517 ethtool_link_ksettings_add_link_mode(ks, advertising,
518 25000baseSR_Full);
519 ethtool_link_ksettings_add_link_mode(ks, supported,
520 10000baseSR_Full);
521 ethtool_link_ksettings_add_link_mode(ks, advertising,
522 10000baseSR_Full);
523 ethtool_link_ksettings_add_link_mode(ks, supported,
524 10000baseLR_Full);
525 ethtool_link_ksettings_add_link_mode(ks, advertising,
526 10000baseLR_Full);
527 ethtool_link_ksettings_add_link_mode(ks, supported,
528 1000baseX_Full);
529 ethtool_link_ksettings_add_link_mode(ks, advertising,
530 1000baseX_Full);
531 ethtool_link_ksettings_add_link_mode(ks, supported,
532 10000baseT_Full);
Catherine Sullivan0a862b42015-08-31 19:54:53 -0400[diff] [blame]533 if (hw_link_info->module_type[2] &
534 I40E_MODULE_TYPE_1000BASE_SX ||
535 hw_link_info->module_type[2] &
536 I40E_MODULE_TYPE_1000BASE_LX) {
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]537 ethtool_link_ksettings_add_link_mode(ks, supported,
538 1000baseT_Full);
Catherine Sullivan0a862b42015-08-31 19:54:53 -0400[diff] [blame]539 if (hw_link_info->requested_speeds &
540 I40E_LINK_SPEED_1GB)
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]541 ethtool_link_ksettings_add_link_mode(
542 ks, advertising, 1000baseT_Full);
Catherine Sullivan0a862b42015-08-31 19:54:53 -0400[diff] [blame]543 }
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]544 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]545 ethtool_link_ksettings_add_link_mode(ks, advertising,
546 10000baseT_Full);
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]547 break;
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]548 case I40E_PHY_TYPE_10GBASE_T:
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]549 case I40E_PHY_TYPE_1000BASE_T:
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]550 case I40E_PHY_TYPE_100BASE_TX:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]551 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
552 ethtool_link_ksettings_add_link_mode(ks, supported,
553 10000baseT_Full);
554 ethtool_link_ksettings_add_link_mode(ks, supported,
555 1000baseT_Full);
556 ethtool_link_ksettings_add_link_mode(ks, supported,
557 100baseT_Full);
558 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]559 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]560 ethtool_link_ksettings_add_link_mode(ks, advertising,
561 10000baseT_Full);
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]562 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]563 ethtool_link_ksettings_add_link_mode(ks, advertising,
564 1000baseT_Full);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]565 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]566 ethtool_link_ksettings_add_link_mode(ks, advertising,
567 100baseT_Full);
Catherine Sullivan3b6c2172015-09-03 17:18:52 -0400[diff] [blame]568 break;
Catherine Sullivan48becae2015-09-28 14:12:41 -0400[diff] [blame]569 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]570 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
571 ethtool_link_ksettings_add_link_mode(ks, supported,
572 1000baseT_Full);
573 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
574 ethtool_link_ksettings_add_link_mode(ks, advertising,
575 1000baseT_Full);
Catherine Sullivan48becae2015-09-28 14:12:41 -0400[diff] [blame]576 break;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]577 case I40E_PHY_TYPE_10GBASE_CR1_CU:
578 case I40E_PHY_TYPE_10GBASE_CR1:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]579 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
580 ethtool_link_ksettings_add_link_mode(ks, supported,
581 10000baseT_Full);
582 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
583 ethtool_link_ksettings_add_link_mode(ks, advertising,
584 10000baseT_Full);
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]585 break;
586 case I40E_PHY_TYPE_XAUI:
587 case I40E_PHY_TYPE_XFI:
588 case I40E_PHY_TYPE_SFI:
589 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
Catherine Sullivan180204c2015-02-26 16:14:58 +0000[diff] [blame]590 case I40E_PHY_TYPE_10GBASE_AOC:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]591 ethtool_link_ksettings_add_link_mode(ks, supported,
592 10000baseT_Full);
593 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
594 ethtool_link_ksettings_add_link_mode(ks, advertising,
595 10000baseT_Full);
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]596 break;
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]597 case I40E_PHY_TYPE_SGMII:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]598 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
599 ethtool_link_ksettings_add_link_mode(ks, supported,
600 1000baseT_Full);
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]601 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]602 ethtool_link_ksettings_add_link_mode(ks, advertising,
603 1000baseT_Full);
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]604 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]605 ethtool_link_ksettings_add_link_mode(ks, supported,
606 100baseT_Full);
Catherine Sullivan3b6c2172015-09-03 17:18:52 -0400[diff] [blame]607 if (hw_link_info->requested_speeds &
608 I40E_LINK_SPEED_100MB)
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]609 ethtool_link_ksettings_add_link_mode(
610 ks, advertising, 100baseT_Full);
Catherine Sullivan3b6c2172015-09-03 17:18:52 -0400[diff] [blame]611 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]612 break;
Catherine Sullivanfc72dbc2015-09-01 11:36:30 -0400[diff] [blame]613 case I40E_PHY_TYPE_40GBASE_KR4:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]614 case I40E_PHY_TYPE_25GBASE_KR:
Catherine Sullivanfc72dbc2015-09-01 11:36:30 -0400[diff] [blame]615 case I40E_PHY_TYPE_20GBASE_KR2:
616 case I40E_PHY_TYPE_10GBASE_KR:
617 case I40E_PHY_TYPE_10GBASE_KX4:
618 case I40E_PHY_TYPE_1000BASE_KX:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]619 ethtool_link_ksettings_add_link_mode(ks, supported,
620 40000baseKR4_Full);
621 ethtool_link_ksettings_add_link_mode(ks, supported,
622 25000baseKR_Full);
623 ethtool_link_ksettings_add_link_mode(ks, supported,
624 20000baseKR2_Full);
625 ethtool_link_ksettings_add_link_mode(ks, supported,
626 10000baseKR_Full);
627 ethtool_link_ksettings_add_link_mode(ks, supported,
628 10000baseKX4_Full);
629 ethtool_link_ksettings_add_link_mode(ks, supported,
630 1000baseKX_Full);
631 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
632 ethtool_link_ksettings_add_link_mode(ks, advertising,
633 40000baseKR4_Full);
634 ethtool_link_ksettings_add_link_mode(ks, advertising,
635 25000baseKR_Full);
636 ethtool_link_ksettings_add_link_mode(ks, advertising,
637 20000baseKR2_Full);
638 ethtool_link_ksettings_add_link_mode(ks, advertising,
639 10000baseKR_Full);
640 ethtool_link_ksettings_add_link_mode(ks, advertising,
641 10000baseKX4_Full);
642 ethtool_link_ksettings_add_link_mode(ks, advertising,
643 1000baseKX_Full);
644 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
Catherine Sullivanfc72dbc2015-09-01 11:36:30 -0400[diff] [blame]645 break;
Carolyn Wyborny31232372016-11-21 13:03:48 -0800[diff] [blame]646 case I40E_PHY_TYPE_25GBASE_CR:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]647 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
648 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
649 ethtool_link_ksettings_add_link_mode(ks, supported,
650 25000baseCR_Full);
651 ethtool_link_ksettings_add_link_mode(ks, advertising,
652 25000baseCR_Full);
653 break;
Sudheer Mogilappagari211b4c12017-10-05 14:53:39 -0700[diff] [blame]654 case I40E_PHY_TYPE_25GBASE_AOC:
655 case I40E_PHY_TYPE_25GBASE_ACC:
Alan Brady79f04a32017-10-05 14:53:42 -0700[diff] [blame]656 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
657 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
658 ethtool_link_ksettings_add_link_mode(ks, supported,
659 25000baseCR_Full);
660
661 ethtool_link_ksettings_add_link_mode(ks, advertising,
662 25000baseCR_Full);
663 ethtool_link_ksettings_add_link_mode(ks, supported,
664 10000baseCR_Full);
665 ethtool_link_ksettings_add_link_mode(ks, advertising,
666 10000baseCR_Full);
Carolyn Wyborny31232372016-11-21 13:03:48 -0800[diff] [blame]667 break;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]668 default:
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]669 /* if we got here and link is up something bad is afoot */
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]670 netdev_info(netdev,
671 "WARNING: Link is up but PHY type 0x%x is not recognized.\n",
Catherine Sullivan124ed152014-07-12 07:28:12 +0000[diff] [blame]672 hw_link_info->phy_type);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]673 }
674
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]675 /* Now that we've worked out everything that could be supported by the
Alan Brady91a5c442017-10-05 14:53:36 -0700[diff] [blame]676 * current PHY type, get what is supported by the NVM and intersect
677 * them to get what is truly supported
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]678 */
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]679 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
680 i40e_phy_type_to_ethtool(pf, &cap_ksettings);
681 ethtool_intersect_link_masks(ks, &cap_ksettings);
Catherine Sullivan06566e52016-05-03 15:13:14 -0700[diff] [blame]682
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]683 /* Set speed and duplex */
684 switch (link_speed) {
685 case I40E_LINK_SPEED_40GB:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]686 ks->base.speed = SPEED_40000;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]687 break;
Carolyn Wyborny31232372016-11-21 13:03:48 -0800[diff] [blame]688 case I40E_LINK_SPEED_25GB:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]689 ks->base.speed = SPEED_25000;
Carolyn Wyborny31232372016-11-21 13:03:48 -0800[diff] [blame]690 break;
Jesse Brandeburgae24b402015-03-27 00:12:09 -0700[diff] [blame]691 case I40E_LINK_SPEED_20GB:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]692 ks->base.speed = SPEED_20000;
Jesse Brandeburgae24b402015-03-27 00:12:09 -0700[diff] [blame]693 break;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]694 case I40E_LINK_SPEED_10GB:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]695 ks->base.speed = SPEED_10000;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]696 break;
697 case I40E_LINK_SPEED_1GB:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]698 ks->base.speed = SPEED_1000;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]699 break;
700 case I40E_LINK_SPEED_100MB:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]701 ks->base.speed = SPEED_100;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]702 break;
703 default:
704 break;
705 }
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]706 ks->base.duplex = DUPLEX_FULL;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]707}
708
709/**
710 * i40e_get_settings_link_down - Get the Link settings for when link is down
711 * @hw: hw structure
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]712 * @ks: ethtool ksettings to fill in
713 * @pf: pointer to physical function struct
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]714 *
715 * Reports link settings that can be determined when link is down
716 **/
717static void i40e_get_settings_link_down(struct i40e_hw *hw,
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]718 struct ethtool_link_ksettings *ks,
Catherine Sullivan3b6c2172015-09-03 17:18:52 -0400[diff] [blame]719 struct i40e_pf *pf)
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]720{
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]721 /* link is down and the driver needs to fall back on
Catherine Sullivanfc72dbc2015-09-01 11:36:30 -0400[diff] [blame]722 * supported phy types to figure out what info to display
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]723 */
Alan Brady1eaae512017-10-05 14:53:41 -0700[diff] [blame]724 i40e_phy_type_to_ethtool(pf, ks);
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]725
726 /* With no link speed and duplex are unknown */
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]727 ks->base.speed = SPEED_UNKNOWN;
728 ks->base.duplex = DUPLEX_UNKNOWN;
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]729}
730
731/**
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]732 * i40e_get_link_ksettings - Get Link Speed and Duplex settings
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]733 * @netdev: network interface device structure
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]734 * @ks: ethtool ksettings
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]735 *
736 * Reports speed/duplex settings based on media_type
737 **/
Philippe Reynesa7f90942017-02-04 22:05:06 +0100[diff] [blame]738static int i40e_get_link_ksettings(struct net_device *netdev,
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]739 struct ethtool_link_ksettings *ks)
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]740{
741 struct i40e_netdev_priv *np = netdev_priv(netdev);
742 struct i40e_pf *pf = np->vsi->back;
743 struct i40e_hw *hw = &pf->hw;
744 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
745 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
Alan Brady5f434992017-10-05 14:53:34 -0700[diff] [blame]746
747 ethtool_link_ksettings_zero_link_mode(ks, supported);
748 ethtool_link_ksettings_zero_link_mode(ks, advertising);
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]749
750 if (link_up)
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]751 i40e_get_settings_link_up(hw, ks, netdev, pf);
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]752 else
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]753 i40e_get_settings_link_down(hw, ks, pf);
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]754
755 /* Now set the settings that don't rely on link being up/down */
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]756 /* Set autoneg settings */
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]757 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
758 AUTONEG_ENABLE : AUTONEG_DISABLE);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]759
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]760 /* Set media type settings */
Jesse Brandeburgc9a3d472013-11-26 10:49:10 +0000[diff] [blame]761 switch (hw->phy.media_type) {
762 case I40E_MEDIA_TYPE_BACKPLANE:
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]763 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
764 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
765 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]766 ethtool_link_ksettings_add_link_mode(ks, advertising,
Philippe Reynesa7f90942017-02-04 22:05:06 +0100[diff] [blame]767 Backplane);
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]768 ks->base.port = PORT_NONE;
Jesse Brandeburgc9a3d472013-11-26 10:49:10 +0000[diff] [blame]769 break;
770 case I40E_MEDIA_TYPE_BASET:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]771 ethtool_link_ksettings_add_link_mode(ks, supported, TP);
772 ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
773 ks->base.port = PORT_TP;
Jesse Brandeburgc9a3d472013-11-26 10:49:10 +0000[diff] [blame]774 break;
775 case I40E_MEDIA_TYPE_DA:
776 case I40E_MEDIA_TYPE_CX4:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]777 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
778 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
779 ks->base.port = PORT_DA;
Jesse Brandeburgc9a3d472013-11-26 10:49:10 +0000[diff] [blame]780 break;
781 case I40E_MEDIA_TYPE_FIBER:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]782 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
783 ks->base.port = PORT_FIBRE;
Jesse Brandeburgc9a3d472013-11-26 10:49:10 +0000[diff] [blame]784 break;
785 case I40E_MEDIA_TYPE_UNKNOWN:
786 default:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]787 ks->base.port = PORT_OTHER;
Jesse Brandeburgc9a3d472013-11-26 10:49:10 +0000[diff] [blame]788 break;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]789 }
790
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]791 /* Set flow control settings */
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]792 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]793
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]794 switch (hw->fc.requested_mode) {
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]795 case I40E_FC_FULL:
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]796 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]797 break;
798 case I40E_FC_TX_PAUSE:
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]799 ethtool_link_ksettings_add_link_mode(ks, advertising,
Philippe Reynesa7f90942017-02-04 22:05:06 +0100[diff] [blame]800 Asym_Pause);
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]801 break;
802 case I40E_FC_RX_PAUSE:
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]803 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]804 ethtool_link_ksettings_add_link_mode(ks, advertising,
Philippe Reynesa7f90942017-02-04 22:05:06 +0100[diff] [blame]805 Asym_Pause);
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]806 break;
807 default:
Alan Brady5f434992017-10-05 14:53:34 -0700[diff] [blame]808 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
809 ethtool_link_ksettings_del_link_mode(ks, advertising,
810 Asym_Pause);
Jesse Brandeburg4e91bcd2014-06-04 08:45:23 +0000[diff] [blame]811 break;
812 }
813
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]814 return 0;
815}
816
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]817/**
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]818 * i40e_set_link_ksettings - Set Speed and Duplex
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]819 * @netdev: network interface device structure
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]820 * @ks: ethtool ksettings
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]821 *
822 * Set speed/duplex per media_types advertised/forced
823 **/
Philippe Reynesa7f90942017-02-04 22:05:06 +0100[diff] [blame]824static int i40e_set_link_ksettings(struct net_device *netdev,
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]825 const struct ethtool_link_ksettings *ks)
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]826{
827 struct i40e_netdev_priv *np = netdev_priv(netdev);
828 struct i40e_aq_get_phy_abilities_resp abilities;
Alan Brady636b62d2017-10-05 14:53:43 -0700[diff] [blame]829 struct ethtool_link_ksettings safe_ks;
830 struct ethtool_link_ksettings copy_ks;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]831 struct i40e_aq_set_phy_config config;
832 struct i40e_pf *pf = np->vsi->back;
833 struct i40e_vsi *vsi = np->vsi;
834 struct i40e_hw *hw = &pf->hw;
Alan Brady636b62d2017-10-05 14:53:43 -0700[diff] [blame]835 bool autoneg_changed = false;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]836 i40e_status status = 0;
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]837 int timeout = 50;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]838 int err = 0;
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]839 u8 autoneg;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]840
Shannon Nelsonf0d8c732014-12-11 07:06:32 +0000[diff] [blame]841 /* Changing port settings is not supported if this isn't the
842 * port's controlling PF
843 */
844 if (hw->partition_id != 1) {
845 i40e_partition_setting_complaint(pf);
846 return -EOPNOTSUPP;
847 }
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]848 if (vsi != pf->vsi[pf->lan_vsi])
849 return -EOPNOTSUPP;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]850 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
851 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
Catherine Sullivanc57e9f12014-07-12 07:28:13 +0000[diff] [blame]852 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
Serey Kong65362272016-05-16 10:26:39 -0700[diff] [blame]853 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
Catherine Sullivanc57e9f12014-07-12 07:28:13 +0000[diff] [blame]854 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]855 return -EOPNOTSUPP;
Catherine Sullivanfc72dbc2015-09-01 11:36:30 -0400[diff] [blame]856 if (hw->device_id == I40E_DEV_ID_KX_B ||
857 hw->device_id == I40E_DEV_ID_KX_C ||
858 hw->device_id == I40E_DEV_ID_20G_KR2 ||
859 hw->device_id == I40E_DEV_ID_20G_KR2_A) {
860 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
861 return -EOPNOTSUPP;
862 }
863
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]864 /* copy the ksettings to copy_ks to avoid modifying the origin */
865 memcpy(&copy_ks, ks, sizeof(struct ethtool_link_ksettings));
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]866
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]867 /* save autoneg out of ksettings */
868 autoneg = copy_ks.base.autoneg;
869
870 memset(&safe_ks, 0, sizeof(safe_ks));
871 /* Get link modes supported by hardware and check against modes
872 * requested by the user. Return an error if unsupported mode was set.
873 */
874 i40e_phy_type_to_ethtool(pf, &safe_ks);
875 if (!bitmap_subset(copy_ks.link_modes.advertising,
876 safe_ks.link_modes.supported,
877 __ETHTOOL_LINK_MODE_MASK_NBITS))
878 return -EINVAL;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]879
Philippe Reynesa7f90942017-02-04 22:05:06 +0100[diff] [blame]880 /* get our own copy of the bits to check against */
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]881 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]882 safe_ks.base.cmd = copy_ks.base.cmd;
883 safe_ks.base.link_mode_masks_nwords =
884 copy_ks.base.link_mode_masks_nwords;
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]885 i40e_get_link_ksettings(netdev, &safe_ks);
Philippe Reynesa7f90942017-02-04 22:05:06 +0100[diff] [blame]886
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]887 /* set autoneg back to what it currently is */
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]888 copy_ks.base.autoneg = safe_ks.base.autoneg;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]889
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]890 /* If copy_ks.base and safe_ks.base are not the same now, then they are
891 * trying to set something that we do not support.
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]892 */
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]893 if (memcmp(&copy_ks.base, &safe_ks.base,
894 sizeof(struct ethtool_link_settings)))
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]895 return -EOPNOTSUPP;
896
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]897 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]898 timeout--;
899 if (!timeout)
900 return -EBUSY;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]901 usleep_range(1000, 2000);
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]902 }
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]903
904 /* Get the current phy config */
905 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
906 NULL);
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]907 if (status) {
908 err = -EAGAIN;
909 goto done;
910 }
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]911
Catherine Sullivan124ed152014-07-12 07:28:12 +0000[diff] [blame]912 /* Copy abilities to config in case autoneg is not
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]913 * set below
914 */
915 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]916 config.abilities = abilities.abilities;
917
918 /* Check autoneg */
919 if (autoneg == AUTONEG_ENABLE) {
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]920 /* If autoneg was not already enabled */
921 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
Catherine Sullivan3ce12ee2015-09-28 14:16:58 -0400[diff] [blame]922 /* If autoneg is not supported, return error */
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]923 if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
924 supported,
925 Autoneg)) {
Catherine Sullivan3ce12ee2015-09-28 14:16:58 -0400[diff] [blame]926 netdev_info(netdev, "Autoneg not supported on this phy\n");
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]927 err = -EINVAL;
928 goto done;
Catherine Sullivan3ce12ee2015-09-28 14:16:58 -0400[diff] [blame]929 }
930 /* Autoneg is allowed to change */
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]931 config.abilities = abilities.abilities |
932 I40E_AQ_PHY_ENABLE_AN;
Alan Brady636b62d2017-10-05 14:53:43 -0700[diff] [blame]933 autoneg_changed = true;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]934 }
935 } else {
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]936 /* If autoneg is currently enabled */
937 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
Catherine Sullivan3ce12ee2015-09-28 14:16:58 -0400[diff] [blame]938 /* If autoneg is supported 10GBASE_T is the only PHY
939 * that can disable it, so otherwise return error
940 */
Alan Brady1c142e12017-10-05 14:53:31 -0700[diff] [blame]941 if (ethtool_link_ksettings_test_link_mode(&safe_ks,
942 supported,
943 Autoneg) &&
Catherine Sullivan3ce12ee2015-09-28 14:16:58 -0400[diff] [blame]944 hw->phy.link_info.phy_type !=
945 I40E_PHY_TYPE_10GBASE_T) {
946 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]947 err = -EINVAL;
948 goto done;
Catherine Sullivan3ce12ee2015-09-28 14:16:58 -0400[diff] [blame]949 }
950 /* Autoneg is allowed to change */
Mitch Williams5960d332014-09-13 07:40:47 +0000[diff] [blame]951 config.abilities = abilities.abilities &
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]952 ~I40E_AQ_PHY_ENABLE_AN;
Alan Brady636b62d2017-10-05 14:53:43 -0700[diff] [blame]953 autoneg_changed = true;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]954 }
955 }
956
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]957 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
958 100baseT_Full))
Catherine Sullivan124ed152014-07-12 07:28:12 +0000[diff] [blame]959 config.link_speed |= I40E_LINK_SPEED_100MB;
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]960 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
961 1000baseT_Full) ||
962 ethtool_link_ksettings_test_link_mode(ks, advertising,
963 1000baseX_Full) ||
964 ethtool_link_ksettings_test_link_mode(ks, advertising,
965 1000baseKX_Full))
Catherine Sullivan124ed152014-07-12 07:28:12 +0000[diff] [blame]966 config.link_speed |= I40E_LINK_SPEED_1GB;
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]967 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
968 10000baseT_Full) ||
969 ethtool_link_ksettings_test_link_mode(ks, advertising,
970 10000baseKX4_Full) ||
971 ethtool_link_ksettings_test_link_mode(ks, advertising,
972 10000baseKR_Full) ||
973 ethtool_link_ksettings_test_link_mode(ks, advertising,
974 10000baseCR_Full) ||
975 ethtool_link_ksettings_test_link_mode(ks, advertising,
976 10000baseSR_Full))
Catherine Sullivan124ed152014-07-12 07:28:12 +0000[diff] [blame]977 config.link_speed |= I40E_LINK_SPEED_10GB;
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]978 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
979 20000baseKR2_Full))
Jesse Brandeburgae24b402015-03-27 00:12:09 -0700[diff] [blame]980 config.link_speed |= I40E_LINK_SPEED_20GB;
Alan Bradycee91992017-10-05 14:53:44 -0700[diff] [blame]981 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
982 25000baseCR_Full) ||
983 ethtool_link_ksettings_test_link_mode(ks, advertising,
984 25000baseKR_Full) ||
985 ethtool_link_ksettings_test_link_mode(ks, advertising,
986 25000baseSR_Full))
987 config.link_speed |= I40E_LINK_SPEED_25GB;
988 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
989 40000baseKR4_Full) ||
990 ethtool_link_ksettings_test_link_mode(ks, advertising,
991 40000baseCR4_Full) ||
992 ethtool_link_ksettings_test_link_mode(ks, advertising,
993 40000baseSR4_Full) ||
994 ethtool_link_ksettings_test_link_mode(ks, advertising,
995 40000baseLR4_Full))
Catherine Sullivan124ed152014-07-12 07:28:12 +0000[diff] [blame]996 config.link_speed |= I40E_LINK_SPEED_40GB;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]997
Catherine Sullivan0002e112015-08-26 15:14:16 -0400[diff] [blame]998 /* If speed didn't get set, set it to what it currently is.
999 * This is needed because if advertise is 0 (as it is when autoneg
1000 * is disabled) then speed won't get set.
1001 */
1002 if (!config.link_speed)
1003 config.link_speed = abilities.link_speed;
Alan Brady636b62d2017-10-05 14:53:43 -0700[diff] [blame]1004 if (autoneg_changed || abilities.link_speed != config.link_speed) {
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]1005 /* copy over the rest of the abilities */
1006 config.phy_type = abilities.phy_type;
Henry Tiemanb7eaf8f2016-12-02 12:33:01 -0800[diff] [blame]1007 config.phy_type_ext = abilities.phy_type_ext;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]1008 config.eee_capability = abilities.eee_capability;
1009 config.eeer = abilities.eeer_val;
1010 config.low_power_ctrl = abilities.d3_lpan;
Henry Tiemanb7eaf8f2016-12-02 12:33:01 -0800[diff] [blame]1011 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
1012 I40E_AQ_PHY_FEC_CONFIG_MASK;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]1013
Catherine Sullivane8278452015-02-06 08:52:08 +0000[diff] [blame]1014 /* save the requested speeds */
1015 hw->phy.link_info.requested_speeds = config.link_speed;
Catherine Sullivan94128512014-07-12 07:28:16 +0000[diff] [blame]1016 /* set link and auto negotiation so changes take effect */
1017 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1018 /* If link is up put link down */
1019 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
1020 /* Tell the OS link is going down, the link will go
1021 * back up when fw says it is ready asynchronously
1022 */
Matt Jaredc156f852015-08-27 11:42:39 -0400[diff] [blame]1023 i40e_print_link_message(vsi, false);
Catherine Sullivan94128512014-07-12 07:28:16 +0000[diff] [blame]1024 netif_carrier_off(netdev);
1025 netif_tx_stop_all_queues(netdev);
1026 }
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]1027
1028 /* make the aq call */
1029 status = i40e_aq_set_phy_config(hw, &config, NULL);
1030 if (status) {
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]1031 netdev_info(netdev,
1032 "Set phy config failed, err %s aq_err %s\n",
Shannon Nelsonf1c7e722015-06-04 16:24:01 -0400[diff] [blame]1033 i40e_stat_str(hw, status),
1034 i40e_aq_str(hw, hw->aq.asq_last_status));
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]1035 err = -EAGAIN;
1036 goto done;
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]1037 }
1038
Catherine Sullivan0a862b42015-08-31 19:54:53 -0400[diff] [blame]1039 status = i40e_update_link_info(hw);
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]1040 if (status)
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]1041 netdev_dbg(netdev,
1042 "Updating link info failed with err %s aq_err %s\n",
Catherine Sullivan52e96892015-09-28 14:16:59 -0400[diff] [blame]1043 i40e_stat_str(hw, status),
1044 i40e_aq_str(hw, hw->aq.asq_last_status));
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]1045
1046 } else {
1047 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
1048 }
1049
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]1050done:
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]1051 clear_bit(__I40E_CONFIG_BUSY, pf->state);
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]1052
Catherine Sullivanbf9c7142014-06-04 08:45:28 +0000[diff] [blame]1053 return err;
1054}
1055
Jesse Brandeburga6599722014-06-04 08:45:25 +0000[diff] [blame]1056static int i40e_nway_reset(struct net_device *netdev)
1057{
1058 /* restart autonegotiation */
1059 struct i40e_netdev_priv *np = netdev_priv(netdev);
1060 struct i40e_pf *pf = np->vsi->back;
1061 struct i40e_hw *hw = &pf->hw;
1062 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
1063 i40e_status ret = 0;
1064
1065 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
1066 if (ret) {
Shannon Nelsonf1c7e722015-06-04 16:24:01 -0400[diff] [blame]1067 netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
1068 i40e_stat_str(hw, ret),
1069 i40e_aq_str(hw, hw->aq.asq_last_status));
Jesse Brandeburga6599722014-06-04 08:45:25 +0000[diff] [blame]1070 return -EIO;
1071 }
1072
1073 return 0;
1074}
1075
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1076/**
1077 * i40e_get_pauseparam - Get Flow Control status
1078 * Return tx/rx-pause status
1079 **/
1080static void i40e_get_pauseparam(struct net_device *netdev,
1081 struct ethtool_pauseparam *pause)
1082{
1083 struct i40e_netdev_priv *np = netdev_priv(netdev);
1084 struct i40e_pf *pf = np->vsi->back;
1085 struct i40e_hw *hw = &pf->hw;
1086 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
Neerav Parikh4b7698c2014-11-12 00:18:57 +0000[diff] [blame]1087 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1088
1089 pause->autoneg =
1090 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1091 AUTONEG_ENABLE : AUTONEG_DISABLE);
1092
Neerav Parikh4b7698c2014-11-12 00:18:57 +0000[diff] [blame]1093 /* PFC enabled so report LFC as off */
1094 if (dcbx_cfg->pfc.pfcenable) {
1095 pause->rx_pause = 0;
1096 pause->tx_pause = 0;
1097 return;
1098 }
1099
Jesse Brandeburgd52c20b2013-11-26 10:49:15 +0000[diff] [blame]1100 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1101 pause->rx_pause = 1;
Jesse Brandeburgd52c20b2013-11-26 10:49:15 +0000[diff] [blame]1102 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1103 pause->tx_pause = 1;
Jesse Brandeburgd52c20b2013-11-26 10:49:15 +0000[diff] [blame]1104 } else if (hw->fc.current_mode == I40E_FC_FULL) {
1105 pause->rx_pause = 1;
1106 pause->tx_pause = 1;
1107 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1108}
1109
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1110/**
1111 * i40e_set_pauseparam - Set Flow Control parameter
1112 * @netdev: network interface device structure
1113 * @pause: return tx/rx flow control status
1114 **/
1115static int i40e_set_pauseparam(struct net_device *netdev,
1116 struct ethtool_pauseparam *pause)
1117{
1118 struct i40e_netdev_priv *np = netdev_priv(netdev);
1119 struct i40e_pf *pf = np->vsi->back;
1120 struct i40e_vsi *vsi = np->vsi;
1121 struct i40e_hw *hw = &pf->hw;
1122 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
Neerav Parikh4b7698c2014-11-12 00:18:57 +0000[diff] [blame]1123 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1124 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1125 i40e_status status;
1126 u8 aq_failures;
Catherine Sullivan7d62dac2014-07-09 07:46:18 +0000[diff] [blame]1127 int err = 0;
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1128
Shannon Nelsonf0d8c732014-12-11 07:06:32 +0000[diff] [blame]1129 /* Changing the port's flow control is not supported if this isn't the
1130 * port's controlling PF
1131 */
1132 if (hw->partition_id != 1) {
1133 i40e_partition_setting_complaint(pf);
1134 return -EOPNOTSUPP;
1135 }
1136
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1137 if (vsi != pf->vsi[pf->lan_vsi])
1138 return -EOPNOTSUPP;
1139
1140 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1141 AUTONEG_ENABLE : AUTONEG_DISABLE)) {
1142 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
1143 return -EOPNOTSUPP;
1144 }
1145
1146 /* If we have link and don't have autoneg */
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]1147 if (!test_bit(__I40E_DOWN, pf->state) &&
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1148 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) {
1149 /* Send message that it might not necessarily work*/
1150 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
1151 }
1152
Neerav Parikh4b7698c2014-11-12 00:18:57 +0000[diff] [blame]1153 if (dcbx_cfg->pfc.pfcenable) {
1154 netdev_info(netdev,
1155 "Priority flow control enabled. Cannot set link flow control.\n");
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1156 return -EOPNOTSUPP;
1157 }
1158
1159 if (pause->rx_pause && pause->tx_pause)
1160 hw->fc.requested_mode = I40E_FC_FULL;
1161 else if (pause->rx_pause && !pause->tx_pause)
1162 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1163 else if (!pause->rx_pause && pause->tx_pause)
1164 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1165 else if (!pause->rx_pause && !pause->tx_pause)
1166 hw->fc.requested_mode = I40E_FC_NONE;
1167 else
1168 return -EINVAL;
1169
Catherine Sullivan94128512014-07-12 07:28:16 +0000[diff] [blame]1170 /* Tell the OS link is going down, the link will go back up when fw
1171 * says it is ready asynchronously
1172 */
Matt Jaredc156f852015-08-27 11:42:39 -0400[diff] [blame]1173 i40e_print_link_message(vsi, false);
Catherine Sullivan94128512014-07-12 07:28:16 +0000[diff] [blame]1174 netif_carrier_off(netdev);
1175 netif_tx_stop_all_queues(netdev);
1176
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1177 /* Set the fc mode and only restart an if link is up*/
1178 status = i40e_set_fc(hw, &aq_failures, link_up);
1179
1180 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
Shannon Nelsonf1c7e722015-06-04 16:24:01 -0400[diff] [blame]1181 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
1182 i40e_stat_str(hw, status),
1183 i40e_aq_str(hw, hw->aq.asq_last_status));
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1184 err = -EAGAIN;
1185 }
1186 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
Shannon Nelsonf1c7e722015-06-04 16:24:01 -0400[diff] [blame]1187 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
1188 i40e_stat_str(hw, status),
1189 i40e_aq_str(hw, hw->aq.asq_last_status));
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1190 err = -EAGAIN;
1191 }
1192 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
Shannon Nelsonf1c7e722015-06-04 16:24:01 -0400[diff] [blame]1193 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
1194 i40e_stat_str(hw, status),
1195 i40e_aq_str(hw, hw->aq.asq_last_status));
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1196 err = -EAGAIN;
1197 }
1198
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]1199 if (!test_bit(__I40E_DOWN, pf->state)) {
Catherine Sullivan7d62dac2014-07-09 07:46:18 +0000[diff] [blame]1200 /* Give it a little more time to try to come back */
1201 msleep(75);
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]1202 if (!test_bit(__I40E_DOWN, pf->state))
Catherine Sullivan7d62dac2014-07-09 07:46:18 +0000[diff] [blame]1203 return i40e_nway_reset(netdev);
1204 }
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]1205
1206 return err;
1207}
1208
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1209static u32 i40e_get_msglevel(struct net_device *netdev)
1210{
1211 struct i40e_netdev_priv *np = netdev_priv(netdev);
1212 struct i40e_pf *pf = np->vsi->back;
Alexander Duyck5d4ca232016-09-30 08:21:46 -0400[diff] [blame]1213 u32 debug_mask = pf->hw.debug_mask;
1214
1215 if (debug_mask)
1216 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1217
1218 return pf->msg_enable;
1219}
1220
1221static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1222{
1223 struct i40e_netdev_priv *np = netdev_priv(netdev);
1224 struct i40e_pf *pf = np->vsi->back;
1225
1226 if (I40E_DEBUG_USER & data)
1227 pf->hw.debug_mask = data;
Alexander Duyck5d4ca232016-09-30 08:21:46 -0400[diff] [blame]1228 else
1229 pf->msg_enable = data;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1230}
1231
1232static int i40e_get_regs_len(struct net_device *netdev)
1233{
1234 int reg_count = 0;
1235 int i;
1236
1237 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1238 reg_count += i40e_reg_list[i].elements;
1239
1240 return reg_count * sizeof(u32);
1241}
1242
1243static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1244 void *p)
1245{
1246 struct i40e_netdev_priv *np = netdev_priv(netdev);
1247 struct i40e_pf *pf = np->vsi->back;
1248 struct i40e_hw *hw = &pf->hw;
1249 u32 *reg_buf = p;
Jesse Brandeburgb85c94b2017-06-20 15:16:59 -0700[diff] [blame]1250 unsigned int i, j, ri;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1251 u32 reg;
1252
1253 /* Tell ethtool which driver-version-specific regs output we have.
1254 *
1255 * At some point, if we have ethtool doing special formatting of
1256 * this data, it will rely on this version number to know how to
1257 * interpret things. Hence, this needs to be updated if/when the
1258 * diags register table is changed.
1259 */
1260 regs->version = 1;
1261
1262 /* loop through the diags reg table for what to print */
1263 ri = 0;
1264 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1265 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1266 reg = i40e_reg_list[i].offset
1267 + (j * i40e_reg_list[i].stride);
1268 reg_buf[ri++] = rd32(hw, reg);
1269 }
1270 }
1271
1272}
1273
1274static int i40e_get_eeprom(struct net_device *netdev,
1275 struct ethtool_eeprom *eeprom, u8 *bytes)
1276{
1277 struct i40e_netdev_priv *np = netdev_priv(netdev);
1278 struct i40e_hw *hw = &np->vsi->back->hw;
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1279 struct i40e_pf *pf = np->vsi->back;
Shannon Nelsonc150a502014-11-13 08:23:13 +0000[diff] [blame]1280 int ret_val = 0, len, offset;
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1281 u8 *eeprom_buff;
1282 u16 i, sectors;
1283 bool last;
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1284 u32 magic;
1285
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1286#define I40E_NVM_SECTOR_SIZE 4096
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1287 if (eeprom->len == 0)
1288 return -EINVAL;
1289
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1290 /* check for NVMUpdate access method */
1291 magic = hw->vendor_id | (hw->device_id << 16);
1292 if (eeprom->magic && eeprom->magic != magic) {
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1293 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1294 int errno = 0;
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1295
1296 /* make sure it is the right magic for NVMUpdate */
1297 if ((eeprom->magic >> 16) != hw->device_id)
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1298 errno = -EINVAL;
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]1299 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1300 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1301 errno = -EBUSY;
1302 else
1303 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1304
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1305 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1306 dev_info(&pf->pdev->dev,
Shannon Nelsonc150a502014-11-13 08:23:13 +0000[diff] [blame]1307 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1308 ret_val, hw->aq.asq_last_status, errno,
1309 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1310 cmd->offset, cmd->data_size);
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1311
1312 return errno;
1313 }
1314
1315 /* normal ethtool get_eeprom support */
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1316 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1317
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1318 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1319 if (!eeprom_buff)
1320 return -ENOMEM;
1321
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1322 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1323 if (ret_val) {
1324 dev_info(&pf->pdev->dev,
1325 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1326 ret_val, hw->aq.asq_last_status);
1327 goto free_buff;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1328 }
1329
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1330 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1331 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1332 len = I40E_NVM_SECTOR_SIZE;
1333 last = false;
1334 for (i = 0; i < sectors; i++) {
1335 if (i == (sectors - 1)) {
1336 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1337 last = true;
1338 }
Shannon Nelsonc150a502014-11-13 08:23:13 +0000[diff] [blame]1339 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1340 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1341 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1342 last, NULL);
Shannon Nelsonc150a502014-11-13 08:23:13 +0000[diff] [blame]1343 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1344 dev_info(&pf->pdev->dev,
Shannon Nelsonc150a502014-11-13 08:23:13 +0000[diff] [blame]1345 "read NVM failed, invalid offset 0x%x\n",
1346 offset);
1347 break;
1348 } else if (ret_val &&
1349 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1350 dev_info(&pf->pdev->dev,
1351 "read NVM failed, access, offset 0x%x\n",
1352 offset);
1353 break;
1354 } else if (ret_val) {
1355 dev_info(&pf->pdev->dev,
1356 "read NVM failed offset %d err=%d status=0x%x\n",
1357 offset, ret_val, hw->aq.asq_last_status);
1358 break;
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1359 }
1360 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1361
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1362 i40e_release_nvm(hw);
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1363 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1364free_buff:
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1365 kfree(eeprom_buff);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1366 return ret_val;
1367}
1368
1369static int i40e_get_eeprom_len(struct net_device *netdev)
1370{
1371 struct i40e_netdev_priv *np = netdev_priv(netdev);
1372 struct i40e_hw *hw = &np->vsi->back->hw;
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1373 u32 val;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1374
Lihong Yangc271dd62017-01-30 12:29:32 -0800[diff] [blame]1375#define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1376 if (hw->mac.type == I40E_MAC_X722) {
1377 val = X722_EEPROM_SCOPE_LIMIT + 1;
1378 return val;
1379 }
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1380 val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1381 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1382 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1383 /* register returns value in power of 2, 64Kbyte chunks. */
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]1384 val = (64 * 1024) * BIT(val);
Anjali Singhai Jaine5e0a5d2013-11-28 06:39:28 +0000[diff] [blame]1385 return val;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1386}
1387
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1388static int i40e_set_eeprom(struct net_device *netdev,
1389 struct ethtool_eeprom *eeprom, u8 *bytes)
1390{
1391 struct i40e_netdev_priv *np = netdev_priv(netdev);
1392 struct i40e_hw *hw = &np->vsi->back->hw;
1393 struct i40e_pf *pf = np->vsi->back;
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1394 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1395 int ret_val = 0;
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1396 int errno = 0;
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1397 u32 magic;
1398
1399 /* normal ethtool set_eeprom is not supported */
1400 magic = hw->vendor_id | (hw->device_id << 16);
1401 if (eeprom->magic == magic)
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1402 errno = -EOPNOTSUPP;
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1403 /* check for NVMUpdate access method */
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1404 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1405 errno = -EINVAL;
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]1406 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1407 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1408 errno = -EBUSY;
1409 else
1410 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1411
Shannon Nelson6e93d0c2016-01-15 14:33:18 -0800[diff] [blame]1412 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1413 dev_info(&pf->pdev->dev,
Shannon Nelsonc150a502014-11-13 08:23:13 +0000[diff] [blame]1414 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1415 ret_val, hw->aq.asq_last_status, errno,
1416 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1417 cmd->offset, cmd->data_size);
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]1418
1419 return errno;
1420}
1421
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1422static void i40e_get_drvinfo(struct net_device *netdev,
1423 struct ethtool_drvinfo *drvinfo)
1424{
1425 struct i40e_netdev_priv *np = netdev_priv(netdev);
1426 struct i40e_vsi *vsi = np->vsi;
1427 struct i40e_pf *pf = vsi->back;
1428
1429 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1430 strlcpy(drvinfo->version, i40e_driver_version_str,
1431 sizeof(drvinfo->version));
Shannon Nelson6dec1012015-09-28 14:12:30 -0400[diff] [blame]1432 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1433 sizeof(drvinfo->fw_version));
1434 strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1435 sizeof(drvinfo->bus_info));
Jacob Kellerd182a5c2016-10-25 16:08:50 -0700[diff] [blame]1436 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
Anjali Singhai Jainb5569892016-05-03 15:13:12 -0700[diff] [blame]1437 if (pf->hw.pf_id == 0)
Jacob Kellerd182a5c2016-10-25 16:08:50 -0700[diff] [blame]1438 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1439}
1440
1441static void i40e_get_ringparam(struct net_device *netdev,
1442 struct ethtool_ringparam *ring)
1443{
1444 struct i40e_netdev_priv *np = netdev_priv(netdev);
1445 struct i40e_pf *pf = np->vsi->back;
1446 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1447
1448 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1449 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1450 ring->rx_mini_max_pending = 0;
1451 ring->rx_jumbo_max_pending = 0;
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1452 ring->rx_pending = vsi->rx_rings[0]->count;
1453 ring->tx_pending = vsi->tx_rings[0]->count;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1454 ring->rx_mini_pending = 0;
1455 ring->rx_jumbo_pending = 0;
1456}
1457
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1458static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
1459{
1460 if (i40e_enabled_xdp_vsi(vsi)) {
1461 return index < vsi->num_queue_pairs ||
1462 (index >= vsi->alloc_queue_pairs &&
1463 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
1464 }
1465
1466 return index < vsi->num_queue_pairs;
1467}
1468
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1469static int i40e_set_ringparam(struct net_device *netdev,
1470 struct ethtool_ringparam *ring)
1471{
1472 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1473 struct i40e_netdev_priv *np = netdev_priv(netdev);
Tushar Dave2f7679e2016-10-26 10:49:27 -0700[diff] [blame]1474 struct i40e_hw *hw = &np->vsi->back->hw;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1475 struct i40e_vsi *vsi = np->vsi;
1476 struct i40e_pf *pf = vsi->back;
1477 u32 new_rx_count, new_tx_count;
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1478 u16 tx_alloc_queue_pairs;
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]1479 int timeout = 50;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1480 int i, err = 0;
1481
1482 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1483 return -EINVAL;
1484
Shannon Nelson1fa18372013-11-20 10:03:08 +0000[diff] [blame]1485 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1486 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1487 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1488 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1489 netdev_info(netdev,
1490 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1491 ring->tx_pending, ring->rx_pending,
1492 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1493 return -EINVAL;
1494 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1495
Shannon Nelson1fa18372013-11-20 10:03:08 +0000[diff] [blame]1496 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1497 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1498
1499 /* if nothing to do return success */
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1500 if ((new_tx_count == vsi->tx_rings[0]->count) &&
1501 (new_rx_count == vsi->rx_rings[0]->count))
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1502 return 0;
1503
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]1504 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]1505 timeout--;
1506 if (!timeout)
1507 return -EBUSY;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1508 usleep_range(1000, 2000);
Jacob Kellere8d2f4c2017-04-13 04:45:48 -0400[diff] [blame]1509 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1510
1511 if (!netif_running(vsi->netdev)) {
1512 /* simple case - set for the next time the netdev is started */
1513 for (i = 0; i < vsi->num_queue_pairs; i++) {
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1514 vsi->tx_rings[i]->count = new_tx_count;
1515 vsi->rx_rings[i]->count = new_rx_count;
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1516 if (i40e_enabled_xdp_vsi(vsi))
1517 vsi->xdp_rings[i]->count = new_tx_count;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1518 }
1519 goto done;
1520 }
1521
1522 /* We can't just free everything and then setup again,
1523 * because the ISRs in MSI-X mode get passed pointers
1524 * to the Tx and Rx ring structs.
1525 */
1526
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1527 /* alloc updated Tx and XDP Tx resources */
1528 tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
1529 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1530 if (new_tx_count != vsi->tx_rings[0]->count) {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1531 netdev_info(netdev,
1532 "Changing Tx descriptor count from %d to %d.\n",
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1533 vsi->tx_rings[0]->count, new_tx_count);
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1534 tx_rings = kcalloc(tx_alloc_queue_pairs,
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1535 sizeof(struct i40e_ring), GFP_KERNEL);
1536 if (!tx_rings) {
1537 err = -ENOMEM;
1538 goto done;
1539 }
1540
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1541 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1542 if (!i40e_active_tx_ring_index(vsi, i))
1543 continue;
1544
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1545 tx_rings[i] = *vsi->tx_rings[i];
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1546 tx_rings[i].count = new_tx_count;
Jesse Brandeburg1e8efb42015-08-27 11:42:33 -0400[diff] [blame]1547 /* the desc and bi pointers will be reallocated in the
1548 * setup call
1549 */
1550 tx_rings[i].desc = NULL;
1551 tx_rings[i].rx_bi = NULL;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1552 err = i40e_setup_tx_descriptors(&tx_rings[i]);
1553 if (err) {
1554 while (i) {
1555 i--;
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1556 if (!i40e_active_tx_ring_index(vsi, i))
1557 continue;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1558 i40e_free_tx_resources(&tx_rings[i]);
1559 }
1560 kfree(tx_rings);
1561 tx_rings = NULL;
1562
1563 goto done;
1564 }
1565 }
1566 }
1567
1568 /* alloc updated Rx resources */
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1569 if (new_rx_count != vsi->rx_rings[0]->count) {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1570 netdev_info(netdev,
1571 "Changing Rx descriptor count from %d to %d\n",
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1572 vsi->rx_rings[0]->count, new_rx_count);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1573 rx_rings = kcalloc(vsi->alloc_queue_pairs,
1574 sizeof(struct i40e_ring), GFP_KERNEL);
1575 if (!rx_rings) {
1576 err = -ENOMEM;
1577 goto free_tx;
1578 }
1579
1580 for (i = 0; i < vsi->num_queue_pairs; i++) {
Jesse Brandeburg147e81e2016-04-18 11:33:49 -0700[diff] [blame]1581 struct i40e_ring *ring;
1582 u16 unused;
1583
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1584 /* clone ring and setup updated count */
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1585 rx_rings[i] = *vsi->rx_rings[i];
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1586 rx_rings[i].count = new_rx_count;
Jesse Brandeburg1e8efb42015-08-27 11:42:33 -0400[diff] [blame]1587 /* the desc and bi pointers will be reallocated in the
1588 * setup call
1589 */
1590 rx_rings[i].desc = NULL;
1591 rx_rings[i].rx_bi = NULL;
Jesper Dangaard Brouer87128822018-01-03 11:25:23 +0100[diff] [blame]1592 /* Clear cloned XDP RX-queue info before setup call */
1593 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
Tushar Dave2f7679e2016-10-26 10:49:27 -0700[diff] [blame]1594 /* this is to allow wr32 to have something to write to
1595 * during early allocation of Rx buffers
1596 */
1597 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1598 err = i40e_setup_rx_descriptors(&rx_rings[i]);
Jesse Brandeburg147e81e2016-04-18 11:33:49 -0700[diff] [blame]1599 if (err)
1600 goto rx_unwind;
1601
1602 /* now allocate the Rx buffers to make sure the OS
1603 * has enough memory, any failure here means abort
1604 */
1605 ring = &rx_rings[i];
1606 unused = I40E_DESC_UNUSED(ring);
1607 err = i40e_alloc_rx_buffers(ring, unused);
1608rx_unwind:
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1609 if (err) {
Jesse Brandeburg147e81e2016-04-18 11:33:49 -0700[diff] [blame]1610 do {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1611 i40e_free_rx_resources(&rx_rings[i]);
Jesse Brandeburg147e81e2016-04-18 11:33:49 -0700[diff] [blame]1612 } while (i--);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1613 kfree(rx_rings);
1614 rx_rings = NULL;
1615
1616 goto free_tx;
1617 }
1618 }
1619 }
1620
1621 /* Bring interface down, copy in the new ring info,
1622 * then restore the interface
1623 */
1624 i40e_down(vsi);
1625
1626 if (tx_rings) {
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1627 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1628 if (i40e_active_tx_ring_index(vsi, i)) {
1629 i40e_free_tx_resources(vsi->tx_rings[i]);
1630 *vsi->tx_rings[i] = tx_rings[i];
1631 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1632 }
1633 kfree(tx_rings);
1634 tx_rings = NULL;
1635 }
1636
1637 if (rx_rings) {
1638 for (i = 0; i < vsi->num_queue_pairs; i++) {
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1639 i40e_free_rx_resources(vsi->rx_rings[i]);
Jesse Brandeburg147e81e2016-04-18 11:33:49 -0700[diff] [blame]1640 /* get the real tail offset */
1641 rx_rings[i].tail = vsi->rx_rings[i]->tail;
1642 /* this is to fake out the allocation routine
1643 * into thinking it has to realloc everything
1644 * but the recycling logic will let us re-use
1645 * the buffers allocated above
1646 */
1647 rx_rings[i].next_to_use = 0;
1648 rx_rings[i].next_to_clean = 0;
1649 rx_rings[i].next_to_alloc = 0;
1650 /* do a struct copy */
Alexander Duyck9f65e152013-09-28 06:00:58 +0000[diff] [blame]1651 *vsi->rx_rings[i] = rx_rings[i];
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1652 }
1653 kfree(rx_rings);
1654 rx_rings = NULL;
1655 }
1656
1657 i40e_up(vsi);
1658
1659free_tx:
1660 /* error cleanup if the Rx allocations failed after getting Tx */
1661 if (tx_rings) {
Björn Töpel74608d12017-05-24 07:55:35 +0200[diff] [blame]1662 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1663 if (i40e_active_tx_ring_index(vsi, i))
1664 i40e_free_tx_resources(vsi->tx_rings[i]);
1665 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1666 kfree(tx_rings);
1667 tx_rings = NULL;
1668 }
1669
1670done:
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]1671 clear_bit(__I40E_CONFIG_BUSY, pf->state);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1672
1673 return err;
1674}
1675
1676static int i40e_get_sset_count(struct net_device *netdev, int sset)
1677{
1678 struct i40e_netdev_priv *np = netdev_priv(netdev);
1679 struct i40e_vsi *vsi = np->vsi;
1680 struct i40e_pf *pf = vsi->back;
1681
1682 switch (sset) {
1683 case ETH_SS_TEST:
1684 return I40E_TEST_LEN;
1685 case ETH_SS_STATS:
Shannon Nelson58ce5172015-02-27 09:15:26 +0000[diff] [blame]1686 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) {
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1687 int len = I40E_PF_STATS_LEN(netdev);
1688
Anjali Singhai Jaind1a8d272015-07-23 16:54:40 -0400[diff] [blame]1689 if ((pf->lan_veb != I40E_NO_VEB) &&
1690 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED))
Neerav Parikhfe860af2015-07-10 19:36:02 -0400[diff] [blame]1691 len += I40E_VEB_STATS_TOTAL;
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1692 return len;
1693 } else {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1694 return I40E_VSI_STATS_LEN(netdev);
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1695 }
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]1696 case ETH_SS_PRIV_FLAGS:
Jacob Kellerd182a5c2016-10-25 16:08:50 -0700[diff] [blame]1697 return I40E_PRIV_FLAGS_STR_LEN +
1698 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1699 default:
1700 return -EOPNOTSUPP;
1701 }
1702}
1703
1704static void i40e_get_ethtool_stats(struct net_device *netdev,
1705 struct ethtool_stats *stats, u64 *data)
1706{
1707 struct i40e_netdev_priv *np = netdev_priv(netdev);
Akeem G Abodunrine7046ee2014-04-09 05:58:58 +0000[diff] [blame]1708 struct i40e_ring *tx_ring, *rx_ring;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1709 struct i40e_vsi *vsi = np->vsi;
1710 struct i40e_pf *pf = vsi->back;
Jesse Brandeburgb85c94b2017-06-20 15:16:59 -0700[diff] [blame]1711 unsigned int j;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1712 int i = 0;
1713 char *p;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1714 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi);
Alexander Duyck980e9b12013-09-28 06:01:03 +0000[diff] [blame]1715 unsigned int start;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1716
1717 i40e_update_stats(vsi);
1718
1719 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) {
1720 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset;
1721 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat ==
1722 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1723 }
Shannon Nelson41a9e552014-04-23 04:50:20 +0000[diff] [blame]1724 for (j = 0; j < I40E_MISC_STATS_LEN; j++) {
1725 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset;
1726 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat ==
1727 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1728 }
Alexander Duyck980e9b12013-09-28 06:01:03 +0000[diff] [blame]1729 rcu_read_lock();
Catherine Sullivan99c472a2014-03-14 07:32:30 +0000[diff] [blame]1730 for (j = 0; j < vsi->num_queue_pairs; j++) {
Mark Rutland6aa7de02017-10-23 14:07:29 -0700[diff] [blame]1731 tx_ring = READ_ONCE(vsi->tx_rings[j]);
Alexander Duyck980e9b12013-09-28 06:01:03 +0000[diff] [blame]1732
1733 if (!tx_ring)
1734 continue;
1735
1736 /* process Tx ring statistics */
1737 do {
Eric W. Biederman57a77442014-03-13 21:26:42 -0700[diff] [blame]1738 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
Alexander Duyck980e9b12013-09-28 06:01:03 +0000[diff] [blame]1739 data[i] = tx_ring->stats.packets;
1740 data[i + 1] = tx_ring->stats.bytes;
Eric W. Biederman57a77442014-03-13 21:26:42 -0700[diff] [blame]1741 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
Catherine Sullivan99c472a2014-03-14 07:32:30 +0000[diff] [blame]1742 i += 2;
Alexander Duyck980e9b12013-09-28 06:01:03 +0000[diff] [blame]1743
1744 /* Rx ring is the 2nd half of the queue pair */
1745 rx_ring = &tx_ring[1];
1746 do {
Eric W. Biederman57a77442014-03-13 21:26:42 -0700[diff] [blame]1747 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
Catherine Sullivan99c472a2014-03-14 07:32:30 +0000[diff] [blame]1748 data[i] = rx_ring->stats.packets;
1749 data[i + 1] = rx_ring->stats.bytes;
Eric W. Biederman57a77442014-03-13 21:26:42 -0700[diff] [blame]1750 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
Catherine Sullivan99c472a2014-03-14 07:32:30 +0000[diff] [blame]1751 i += 2;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1752 }
Alexander Duyck980e9b12013-09-28 06:01:03 +0000[diff] [blame]1753 rcu_read_unlock();
Shannon Nelson58ce5172015-02-27 09:15:26 +0000[diff] [blame]1754 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1755 return;
1756
Anjali Singhai Jaind1a8d272015-07-23 16:54:40 -0400[diff] [blame]1757 if ((pf->lan_veb != I40E_NO_VEB) &&
1758 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1759 struct i40e_veb *veb = pf->veb[pf->lan_veb];
Jesse Brandeburg6995b362015-08-28 17:55:54 -0400[diff] [blame]1760
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1761 for (j = 0; j < I40E_VEB_STATS_LEN; j++) {
1762 p = (char *)veb;
1763 p += i40e_gstrings_veb_stats[j].stat_offset;
1764 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat ==
1765 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1766 }
Jesse Brandeburg74a6c662015-10-02 19:09:34 -0700[diff] [blame]1767 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) {
1768 data[i++] = veb->tc_stats.tc_tx_packets[j];
1769 data[i++] = veb->tc_stats.tc_tx_bytes[j];
1770 data[i++] = veb->tc_stats.tc_rx_packets[j];
1771 data[i++] = veb->tc_stats.tc_rx_bytes[j];
1772 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1773 }
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1774 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
1775 p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
1776 data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
1777 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1778 }
1779 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1780 data[i++] = pf->stats.priority_xon_tx[j];
1781 data[i++] = pf->stats.priority_xoff_tx[j];
1782 }
1783 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1784 data[i++] = pf->stats.priority_xon_rx[j];
1785 data[i++] = pf->stats.priority_xoff_rx[j];
1786 }
1787 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
1788 data[i++] = pf->stats.priority_xon_2_xoff[j];
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1789}
1790
1791static void i40e_get_strings(struct net_device *netdev, u32 stringset,
1792 u8 *data)
1793{
1794 struct i40e_netdev_priv *np = netdev_priv(netdev);
1795 struct i40e_vsi *vsi = np->vsi;
1796 struct i40e_pf *pf = vsi->back;
1797 char *p = (char *)data;
Jesse Brandeburgb85c94b2017-06-20 15:16:59 -0700[diff] [blame]1798 unsigned int i;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1799
1800 switch (stringset) {
1801 case ETH_SS_TEST:
Jacob Kellere5d32202016-11-08 13:05:11 -0800[diff] [blame]1802 memcpy(data, i40e_gstrings_test,
1803 I40E_TEST_LEN * ETH_GSTRING_LEN);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1804 break;
1805 case ETH_SS_STATS:
1806 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) {
1807 snprintf(p, ETH_GSTRING_LEN, "%s",
1808 i40e_gstrings_net_stats[i].stat_string);
1809 p += ETH_GSTRING_LEN;
1810 }
Shannon Nelson41a9e552014-04-23 04:50:20 +0000[diff] [blame]1811 for (i = 0; i < I40E_MISC_STATS_LEN; i++) {
1812 snprintf(p, ETH_GSTRING_LEN, "%s",
1813 i40e_gstrings_misc_stats[i].stat_string);
1814 p += ETH_GSTRING_LEN;
1815 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1816 for (i = 0; i < vsi->num_queue_pairs; i++) {
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1817 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1818 p += ETH_GSTRING_LEN;
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1819 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1820 p += ETH_GSTRING_LEN;
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1821 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1822 p += ETH_GSTRING_LEN;
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1823 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1824 p += ETH_GSTRING_LEN;
1825 }
Shannon Nelson58ce5172015-02-27 09:15:26 +0000[diff] [blame]1826 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1827 return;
1828
Anjali Singhai Jaind1a8d272015-07-23 16:54:40 -0400[diff] [blame]1829 if ((pf->lan_veb != I40E_NO_VEB) &&
1830 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1831 for (i = 0; i < I40E_VEB_STATS_LEN; i++) {
1832 snprintf(p, ETH_GSTRING_LEN, "veb.%s",
1833 i40e_gstrings_veb_stats[i].stat_string);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1834 p += ETH_GSTRING_LEN;
1835 }
Neerav Parikhfe860af2015-07-10 19:36:02 -0400[diff] [blame]1836 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1837 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1838 "veb.tc_%d_tx_packets", i);
Neerav Parikhfe860af2015-07-10 19:36:02 -0400[diff] [blame]1839 p += ETH_GSTRING_LEN;
1840 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1841 "veb.tc_%d_tx_bytes", i);
Neerav Parikhfe860af2015-07-10 19:36:02 -0400[diff] [blame]1842 p += ETH_GSTRING_LEN;
1843 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1844 "veb.tc_%d_rx_packets", i);
Neerav Parikhfe860af2015-07-10 19:36:02 -0400[diff] [blame]1845 p += ETH_GSTRING_LEN;
1846 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1847 "veb.tc_%d_rx_bytes", i);
Neerav Parikhfe860af2015-07-10 19:36:02 -0400[diff] [blame]1848 p += ETH_GSTRING_LEN;
1849 }
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1850 }
1851 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
1852 snprintf(p, ETH_GSTRING_LEN, "port.%s",
1853 i40e_gstrings_stats[i].stat_string);
1854 p += ETH_GSTRING_LEN;
1855 }
1856 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1857 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1858 "port.tx_priority_%d_xon", i);
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1859 p += ETH_GSTRING_LEN;
1860 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1861 "port.tx_priority_%d_xoff", i);
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1862 p += ETH_GSTRING_LEN;
1863 }
1864 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1865 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1866 "port.rx_priority_%d_xon", i);
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1867 p += ETH_GSTRING_LEN;
1868 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1869 "port.rx_priority_%d_xoff", i);
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1870 p += ETH_GSTRING_LEN;
1871 }
1872 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1873 snprintf(p, ETH_GSTRING_LEN,
Heinrich Schuchardtfbcfac32016-08-11 01:07:22 +0200[diff] [blame]1874 "port.rx_priority_%d_xon_2_xoff", i);
Shannon Nelson8eab9cf2014-04-23 04:49:55 +0000[diff] [blame]1875 p += ETH_GSTRING_LEN;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1876 }
1877 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */
1878 break;
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]1879 case ETH_SS_PRIV_FLAGS:
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]1880 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
1881 snprintf(p, ETH_GSTRING_LEN, "%s",
1882 i40e_gstrings_priv_flags[i].flag_string);
1883 p += ETH_GSTRING_LEN;
1884 }
1885 if (pf->hw.pf_id != 0)
1886 break;
1887 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) {
1888 snprintf(p, ETH_GSTRING_LEN, "%s",
1889 i40e_gl_gstrings_priv_flags[i].flag_string);
1890 p += ETH_GSTRING_LEN;
1891 }
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]1892 break;
Akeem G Abodunrin579b23d2015-02-24 06:58:42 +0000[diff] [blame]1893 default:
1894 break;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1895 }
1896}
1897
1898static int i40e_get_ts_info(struct net_device *dev,
1899 struct ethtool_ts_info *info)
1900{
Jacob Kellerbeb0dff2014-01-11 05:43:19 +0000[diff] [blame]1901 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
1902
Jacob Kellerfe88bda2014-11-11 20:05:58 +0000[diff] [blame]1903 /* only report HW timestamping if PTP is enabled */
1904 if (!(pf->flags & I40E_FLAG_PTP))
1905 return ethtool_op_get_ts_info(dev, info);
1906
Jacob Kellerbeb0dff2014-01-11 05:43:19 +0000[diff] [blame]1907 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1908 SOF_TIMESTAMPING_RX_SOFTWARE |
1909 SOF_TIMESTAMPING_SOFTWARE |
1910 SOF_TIMESTAMPING_TX_HARDWARE |
1911 SOF_TIMESTAMPING_RX_HARDWARE |
1912 SOF_TIMESTAMPING_RAW_HARDWARE;
1913
1914 if (pf->ptp_clock)
1915 info->phc_index = ptp_clock_index(pf->ptp_clock);
1916 else
1917 info->phc_index = -1;
1918
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]1919 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
Jacob Kellerbeb0dff2014-01-11 05:43:19 +0000[diff] [blame]1920
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]1921 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
Jacob Keller1e28e862016-11-11 12:39:25 -0800[diff] [blame]1922 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
1923 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
1924 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1925
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]1926 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
Jacob Keller1e28e862016-11-11 12:39:25 -0800[diff] [blame]1927 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1928 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1929 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
1930 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1931 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
1932 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1933 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1934 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
Jacob Kellerbeb0dff2014-01-11 05:43:19 +0000[diff] [blame]1935
1936 return 0;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1937}
1938
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1939static int i40e_link_test(struct net_device *netdev, u64 *data)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1940{
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1941 struct i40e_netdev_priv *np = netdev_priv(netdev);
1942 struct i40e_pf *pf = np->vsi->back;
Jesse Brandeburga72a5abc2015-08-26 15:14:19 -0400[diff] [blame]1943 i40e_status status;
1944 bool link_up = false;
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1945
Shannon Nelsonb03aaa92013-11-20 10:03:06 +0000[diff] [blame]1946 netif_info(pf, hw, netdev, "link test\n");
Jesse Brandeburga72a5abc2015-08-26 15:14:19 -0400[diff] [blame]1947 status = i40e_get_link_status(&pf->hw, &link_up);
1948 if (status) {
1949 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
1950 *data = 1;
1951 return *data;
1952 }
1953
1954 if (link_up)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1955 *data = 0;
1956 else
1957 *data = 1;
1958
1959 return *data;
1960}
1961
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1962static int i40e_reg_test(struct net_device *netdev, u64 *data)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1963{
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1964 struct i40e_netdev_priv *np = netdev_priv(netdev);
1965 struct i40e_pf *pf = np->vsi->back;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1966
Shannon Nelsonb03aaa92013-11-20 10:03:06 +0000[diff] [blame]1967 netif_info(pf, hw, netdev, "register test\n");
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1968 *data = i40e_diag_reg_test(&pf->hw);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1969
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1970 return *data;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1971}
1972
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1973static int i40e_eeprom_test(struct net_device *netdev, u64 *data)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1974{
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1975 struct i40e_netdev_priv *np = netdev_priv(netdev);
1976 struct i40e_pf *pf = np->vsi->back;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1977
Shannon Nelsonb03aaa92013-11-20 10:03:06 +0000[diff] [blame]1978 netif_info(pf, hw, netdev, "eeprom test\n");
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1979 *data = i40e_diag_eeprom_test(&pf->hw);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1980
Shannon Nelson4443ec92014-11-13 08:23:12 +0000[diff] [blame]1981 /* forcebly clear the NVM Update state machine */
1982 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
1983
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1984 return *data;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1985}
1986
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1987static int i40e_intr_test(struct net_device *netdev, u64 *data)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]1988{
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]1989 struct i40e_netdev_priv *np = netdev_priv(netdev);
1990 struct i40e_pf *pf = np->vsi->back;
Shannon Nelsoncd92e722013-11-16 10:00:44 +0000[diff] [blame]1991 u16 swc_old = pf->sw_int_count;
1992
Shannon Nelsonb03aaa92013-11-20 10:03:06 +0000[diff] [blame]1993 netif_info(pf, hw, netdev, "interrupt test\n");
Shannon Nelsoncd92e722013-11-16 10:00:44 +0000[diff] [blame]1994 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
1995 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
Shannon Nelson5d1ff1062014-11-11 20:04:35 +0000[diff] [blame]1996 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
1997 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
1998 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
1999 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
Shannon Nelsoncd92e722013-11-16 10:00:44 +0000[diff] [blame]2000 usleep_range(1000, 2000);
2001 *data = (swc_old == pf->sw_int_count);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2002
2003 return *data;
2004}
2005
Greg Rosee17bc412015-04-16 20:05:59 -0400[diff] [blame]2006static inline bool i40e_active_vfs(struct i40e_pf *pf)
2007{
2008 struct i40e_vf *vfs = pf->vf;
2009 int i;
2010
2011 for (i = 0; i < pf->num_alloc_vfs; i++)
Jacob Keller6322e632017-04-13 04:45:54 -0400[diff] [blame]2012 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
Greg Rosee17bc412015-04-16 20:05:59 -0400[diff] [blame]2013 return true;
2014 return false;
2015}
2016
Greg Rose510efb22015-07-10 19:36:01 -0400[diff] [blame]2017static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
2018{
Alexander Duyck4b816442016-10-11 15:26:53 -0700[diff] [blame]2019 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
Greg Rose510efb22015-07-10 19:36:01 -0400[diff] [blame]2020}
2021
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2022static void i40e_diag_test(struct net_device *netdev,
2023 struct ethtool_test *eth_test, u64 *data)
2024{
2025 struct i40e_netdev_priv *np = netdev_priv(netdev);
Greg Rose5b86c5c2015-02-26 16:14:35 +0000[diff] [blame]2026 bool if_running = netif_running(netdev);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2027 struct i40e_pf *pf = np->vsi->back;
2028
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2029 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2030 /* Offline tests */
Shannon Nelsonb03aaa92013-11-20 10:03:06 +0000[diff] [blame]2031 netif_info(pf, drv, netdev, "offline testing starting\n");
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2032
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]2033 set_bit(__I40E_TESTING, pf->state);
Greg Rosee17bc412015-04-16 20:05:59 -0400[diff] [blame]2034
Greg Rose510efb22015-07-10 19:36:01 -0400[diff] [blame]2035 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
Greg Rosee17bc412015-04-16 20:05:59 -0400[diff] [blame]2036 dev_warn(&pf->pdev->dev,
Greg Rose510efb22015-07-10 19:36:01 -0400[diff] [blame]2037 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
Greg Rosee17bc412015-04-16 20:05:59 -0400[diff] [blame]2038 data[I40E_ETH_TEST_REG] = 1;
2039 data[I40E_ETH_TEST_EEPROM] = 1;
2040 data[I40E_ETH_TEST_INTR] = 1;
Greg Rosee17bc412015-04-16 20:05:59 -0400[diff] [blame]2041 data[I40E_ETH_TEST_LINK] = 1;
2042 eth_test->flags |= ETH_TEST_FL_FAILED;
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]2043 clear_bit(__I40E_TESTING, pf->state);
Greg Rosee17bc412015-04-16 20:05:59 -0400[diff] [blame]2044 goto skip_ol_tests;
2045 }
2046
Greg Rose5b86c5c2015-02-26 16:14:35 +0000[diff] [blame]2047 /* If the device is online then take it offline */
2048 if (if_running)
2049 /* indicate we're in test mode */
Stefan Assmann08ca3872016-02-03 09:20:47 +0100[diff] [blame]2050 i40e_close(netdev);
Greg Rose5b86c5c2015-02-26 16:14:35 +0000[diff] [blame]2051 else
Greg Roseb4e53f02015-07-10 19:36:03 -0400[diff] [blame]2052 /* This reset does not affect link - if it is
2053 * changed to a type of reset that does affect
2054 * link then the following link test would have
2055 * to be moved to before the reset
2056 */
Maciej Sosin373149f2017-04-05 07:50:55 -0400[diff] [blame]2057 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
Shannon Nelsonf551b432013-11-26 10:49:12 +0000[diff] [blame]2058
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]2059 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2060 eth_test->flags |= ETH_TEST_FL_FAILED;
2061
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]2062 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2063 eth_test->flags |= ETH_TEST_FL_FAILED;
2064
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]2065 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2066 eth_test->flags |= ETH_TEST_FL_FAILED;
2067
Shannon Nelsonf551b432013-11-26 10:49:12 +0000[diff] [blame]2068 /* run reg test last, a reset is required after it */
2069 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
2070 eth_test->flags |= ETH_TEST_FL_FAILED;
2071
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]2072 clear_bit(__I40E_TESTING, pf->state);
Maciej Sosin373149f2017-04-05 07:50:55 -0400[diff] [blame]2073 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
Greg Rose5b86c5c2015-02-26 16:14:35 +0000[diff] [blame]2074
2075 if (if_running)
Stefan Assmann08ca3872016-02-03 09:20:47 +0100[diff] [blame]2076 i40e_open(netdev);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2077 } else {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2078 /* Online tests */
Shannon Nelsonb03aaa92013-11-20 10:03:06 +0000[diff] [blame]2079 netif_info(pf, drv, netdev, "online testing starting\n");
2080
Shannon Nelson7b086392013-11-20 10:02:59 +0000[diff] [blame]2081 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2082 eth_test->flags |= ETH_TEST_FL_FAILED;
2083
2084 /* Offline only tests, not run in online; pass by default */
2085 data[I40E_ETH_TEST_REG] = 0;
2086 data[I40E_ETH_TEST_EEPROM] = 0;
2087 data[I40E_ETH_TEST_INTR] = 0;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2088 }
Shannon Nelsonc140c172013-11-20 10:02:58 +0000[diff] [blame]2089
Greg Rosee17bc412015-04-16 20:05:59 -0400[diff] [blame]2090skip_ol_tests:
2091
Shannon Nelsonb03aaa92013-11-20 10:03:06 +0000[diff] [blame]2092 netif_info(pf, drv, netdev, "testing finished\n");
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2093}
2094
2095static void i40e_get_wol(struct net_device *netdev,
2096 struct ethtool_wolinfo *wol)
2097{
Shannon Nelson8e2773a2013-11-28 06:39:22 +0000[diff] [blame]2098 struct i40e_netdev_priv *np = netdev_priv(netdev);
2099 struct i40e_pf *pf = np->vsi->back;
2100 struct i40e_hw *hw = &pf->hw;
2101 u16 wol_nvm_bits;
2102
2103 /* NVM bit on means WoL disabled for the port */
2104 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]2105 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
Shannon Nelson8e2773a2013-11-28 06:39:22 +0000[diff] [blame]2106 wol->supported = 0;
2107 wol->wolopts = 0;
2108 } else {
2109 wol->supported = WAKE_MAGIC;
2110 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
2111 }
2112}
2113
Shannon Nelsonf0d8c732014-12-11 07:06:32 +0000[diff] [blame]2114/**
2115 * i40e_set_wol - set the WakeOnLAN configuration
2116 * @netdev: the netdev in question
2117 * @wol: the ethtool WoL setting data
2118 **/
Shannon Nelson8e2773a2013-11-28 06:39:22 +0000[diff] [blame]2119static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2120{
2121 struct i40e_netdev_priv *np = netdev_priv(netdev);
2122 struct i40e_pf *pf = np->vsi->back;
Shannon Nelsonf0d8c732014-12-11 07:06:32 +0000[diff] [blame]2123 struct i40e_vsi *vsi = np->vsi;
Shannon Nelson8e2773a2013-11-28 06:39:22 +0000[diff] [blame]2124 struct i40e_hw *hw = &pf->hw;
2125 u16 wol_nvm_bits;
2126
Shannon Nelsonf0d8c732014-12-11 07:06:32 +0000[diff] [blame]2127 /* WoL not supported if this isn't the controlling PF on the port */
2128 if (hw->partition_id != 1) {
2129 i40e_partition_setting_complaint(pf);
2130 return -EOPNOTSUPP;
2131 }
2132
2133 if (vsi != pf->vsi[pf->lan_vsi])
2134 return -EOPNOTSUPP;
2135
Shannon Nelson8e2773a2013-11-28 06:39:22 +0000[diff] [blame]2136 /* NVM bit on means WoL disabled for the port */
2137 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]2138 if (BIT(hw->port) & wol_nvm_bits)
Shannon Nelson8e2773a2013-11-28 06:39:22 +0000[diff] [blame]2139 return -EOPNOTSUPP;
2140
2141 /* only magic packet is supported */
2142 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC))
2143 return -EOPNOTSUPP;
2144
2145 /* is this a new value? */
2146 if (pf->wol_en != !!wol->wolopts) {
2147 pf->wol_en = !!wol->wolopts;
2148 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2149 }
2150
2151 return 0;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2152}
2153
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2154static int i40e_set_phys_id(struct net_device *netdev,
2155 enum ethtool_phys_id_state state)
2156{
2157 struct i40e_netdev_priv *np = netdev_priv(netdev);
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2158 i40e_status ret = 0;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2159 struct i40e_pf *pf = np->vsi->back;
2160 struct i40e_hw *hw = &pf->hw;
2161 int blink_freq = 2;
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2162 u16 temp_status;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2163
2164 switch (state) {
2165 case ETHTOOL_ID_ACTIVE:
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2166 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2167 pf->led_status = i40e_led_get(hw);
2168 } else {
Mariusz Stachura052b93d2017-08-29 05:32:40 -0400[diff] [blame]2169 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2170 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
2171 NULL);
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2172 ret = i40e_led_get_phy(hw, &temp_status,
2173 &pf->phy_led_val);
2174 pf->led_status = temp_status;
2175 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2176 return blink_freq;
2177 case ETHTOOL_ID_ON:
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2178 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2179 i40e_led_set(hw, 0xf, false);
2180 else
2181 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2182 break;
2183 case ETHTOOL_ID_OFF:
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2184 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2185 i40e_led_set(hw, 0x0, false);
2186 else
2187 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2188 break;
2189 case ETHTOOL_ID_INACTIVE:
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2190 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
Henry Tieman4f9b4302016-11-08 13:05:18 -0800[diff] [blame]2191 i40e_led_set(hw, pf->led_status, false);
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2192 } else {
2193 ret = i40e_led_set_phy(hw, false, pf->led_status,
2194 (pf->phy_led_val |
2195 I40E_PHY_LED_MODE_ORIG));
Mariusz Stachura052b93d2017-08-29 05:32:40 -0400[diff] [blame]2196 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2197 i40e_aq_set_phy_debug(hw, 0, NULL);
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2198 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2199 break;
Akeem G Abodunrin579b23d2015-02-24 06:58:42 +0000[diff] [blame]2200 default:
2201 break;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2202 }
Carolyn Wyborny31b606d2016-02-17 16:12:12 -0800[diff] [blame]2203 if (ret)
2204 return -ENOENT;
2205 else
2206 return 0;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2207}
2208
2209/* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2210 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2211 * 125us (8000 interrupts per second) == ITR(62)
2212 */
2213
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2214/**
2215 * __i40e_get_coalesce - get per-queue coalesce settings
2216 * @netdev: the netdev to check
2217 * @ec: ethtool coalesce data structure
2218 * @queue: which queue to pick
2219 *
2220 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2221 * are per queue. If queue is <0 then we default to queue 0 as the
2222 * representative value.
2223 **/
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2224static int __i40e_get_coalesce(struct net_device *netdev,
2225 struct ethtool_coalesce *ec,
2226 int queue)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2227{
2228 struct i40e_netdev_priv *np = netdev_priv(netdev);
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2229 struct i40e_ring *rx_ring, *tx_ring;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2230 struct i40e_vsi *vsi = np->vsi;
2231
2232 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2233 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2234
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]2235 /* rx and tx usecs has per queue value. If user doesn't specify the
2236 * queue, return queue 0's value to represent.
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2237 */
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]2238 if (queue < 0)
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2239 queue = 0;
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]2240 else if (queue >= vsi->num_queue_pairs)
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2241 return -EINVAL;
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2242
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2243 rx_ring = vsi->rx_rings[queue];
2244 tx_ring = vsi->tx_rings[queue];
2245
2246 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting))
Mitch Williams32f5f542014-04-04 04:43:10 +0000[diff] [blame]2247 ec->use_adaptive_rx_coalesce = 1;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2248
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2249 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting))
Mitch Williams32f5f542014-04-04 04:43:10 +0000[diff] [blame]2250 ec->use_adaptive_tx_coalesce = 1;
2251
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2252 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC;
2253 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC;
2254
Jesse Brandeburgac26fc12015-09-28 14:12:37 -0400[diff] [blame]2255 /* we use the _usecs_high to store/set the interrupt rate limit
2256 * that the hardware supports, that almost but not quite
2257 * fits the original intent of the ethtool variable,
2258 * the rx_coalesce_usecs_high limits total interrupts
2259 * per second from both tx/rx sources.
2260 */
2261 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2262 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2263
2264 return 0;
2265}
2266
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2267/**
2268 * i40e_get_coalesce - get a netdev's coalesce settings
2269 * @netdev: the netdev to check
2270 * @ec: ethtool coalesce data structure
2271 *
2272 * Gets the coalesce settings for a particular netdev. Note that if user has
2273 * modified per-queue settings, this only guarantees to represent queue 0. See
2274 * __i40e_get_coalesce for more details.
2275 **/
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2276static int i40e_get_coalesce(struct net_device *netdev,
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2277 struct ethtool_coalesce *ec)
2278{
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2279 return __i40e_get_coalesce(netdev, ec, -1);
2280}
2281
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2282/**
2283 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2284 * @netdev: netdev structure
2285 * @ec: ethtool's coalesce settings
2286 * @queue: the particular queue to read
2287 *
2288 * Will read a specific queue's coalesce settings
2289 **/
Kan Liangbe280ba2016-02-19 09:24:05 -0500[diff] [blame]2290static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2291 struct ethtool_coalesce *ec)
2292{
2293 return __i40e_get_coalesce(netdev, ec, queue);
2294}
2295
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2296/**
2297 * i40e_set_itr_per_queue - set ITR values for specific queue
2298 * @vsi: the VSI to set values for
2299 * @ec: coalesce settings from ethtool
2300 * @queue: the queue to modify
2301 *
2302 * Change the ITR settings for a specific queue.
2303 **/
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2304static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2305 struct ethtool_coalesce *ec,
2306 int queue)
2307{
Alexander Duyckb5b5f372017-12-27 08:15:51 -0500[diff] [blame]2308 struct i40e_ring *rx_ring = vsi->rx_rings[queue];
2309 struct i40e_ring *tx_ring = vsi->tx_rings[queue];
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2310 struct i40e_pf *pf = vsi->back;
2311 struct i40e_hw *hw = &pf->hw;
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2312 struct i40e_q_vector *q_vector;
2313 u16 vector, intrl;
2314
Alan Brady1c0e6a32016-11-28 16:06:02 -0800[diff] [blame]2315 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2316
Alexander Duyckb5b5f372017-12-27 08:15:51 -0500[diff] [blame]2317 rx_ring->rx_itr_setting = ec->rx_coalesce_usecs;
2318 tx_ring->tx_itr_setting = ec->tx_coalesce_usecs;
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2319
2320 if (ec->use_adaptive_rx_coalesce)
Alexander Duyckb5b5f372017-12-27 08:15:51 -0500[diff] [blame]2321 rx_ring->rx_itr_setting |= I40E_ITR_DYNAMIC;
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2322 else
Alexander Duyckb5b5f372017-12-27 08:15:51 -0500[diff] [blame]2323 rx_ring->rx_itr_setting &= ~I40E_ITR_DYNAMIC;
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2324
2325 if (ec->use_adaptive_tx_coalesce)
Alexander Duyckb5b5f372017-12-27 08:15:51 -0500[diff] [blame]2326 tx_ring->tx_itr_setting |= I40E_ITR_DYNAMIC;
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2327 else
Alexander Duyckb5b5f372017-12-27 08:15:51 -0500[diff] [blame]2328 tx_ring->tx_itr_setting &= ~I40E_ITR_DYNAMIC;
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2329
Alexander Duyckb5b5f372017-12-27 08:15:51 -0500[diff] [blame]2330 q_vector = rx_ring->q_vector;
2331 q_vector->rx.itr = ITR_TO_REG(rx_ring->rx_itr_setting);
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2332 vector = vsi->base_vector + q_vector->v_idx;
2333 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr);
2334
Alexander Duyckb5b5f372017-12-27 08:15:51 -0500[diff] [blame]2335 q_vector = tx_ring->q_vector;
2336 q_vector->tx.itr = ITR_TO_REG(tx_ring->tx_itr_setting);
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2337 vector = vsi->base_vector + q_vector->v_idx;
2338 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr);
2339
2340 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl);
2341 i40e_flush(hw);
2342}
2343
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2344/**
2345 * __i40e_set_coalesce - set coalesce settings for particular queue
2346 * @netdev: the netdev to change
2347 * @ec: ethtool coalesce settings
2348 * @queue: the queue to change
2349 *
2350 * Sets the coalesce settings for a particular queue.
2351 **/
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2352static int __i40e_set_coalesce(struct net_device *netdev,
2353 struct ethtool_coalesce *ec,
2354 int queue)
2355{
2356 struct i40e_netdev_priv *np = netdev_priv(netdev);
Alan Brady06b2dec2017-07-12 05:46:06 -0400[diff] [blame]2357 u16 intrl_reg, cur_rx_itr, cur_tx_itr;
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2358 struct i40e_vsi *vsi = np->vsi;
2359 struct i40e_pf *pf = vsi->back;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2360 int i;
2361
2362 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2363 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2364
Alan Brady06b2dec2017-07-12 05:46:06 -0400[diff] [blame]2365 if (queue < 0) {
2366 cur_rx_itr = vsi->rx_rings[0]->rx_itr_setting;
2367 cur_tx_itr = vsi->tx_rings[0]->tx_itr_setting;
2368 } else if (queue < vsi->num_queue_pairs) {
2369 cur_rx_itr = vsi->rx_rings[queue]->rx_itr_setting;
2370 cur_tx_itr = vsi->tx_rings[queue]->tx_itr_setting;
2371 } else {
2372 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2373 vsi->num_queue_pairs - 1);
2374 return -EINVAL;
2375 }
2376
2377 cur_tx_itr &= ~I40E_ITR_DYNAMIC;
2378 cur_rx_itr &= ~I40E_ITR_DYNAMIC;
2379
Jesse Brandeburgac26fc12015-09-28 14:12:37 -0400[diff] [blame]2380 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
2381 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2382 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2383 return -EINVAL;
2384 }
2385
Alan Brady33084062016-11-28 16:06:03 -0800[diff] [blame]2386 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2387 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
2388 INTRL_REG_TO_USEC(I40E_MAX_INTRL));
Jesse Brandeburgac26fc12015-09-28 14:12:37 -0400[diff] [blame]2389 return -EINVAL;
2390 }
2391
Alan Brady06b2dec2017-07-12 05:46:06 -0400[diff] [blame]2392 if (ec->rx_coalesce_usecs != cur_rx_itr &&
2393 ec->use_adaptive_rx_coalesce) {
2394 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
2395 return -EINVAL;
Carolyn Wyborny5c2cebd2014-06-04 01:23:18 +0000[diff] [blame]2396 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2397
Alan Brady06b2dec2017-07-12 05:46:06 -0400[diff] [blame]2398 if (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1)) {
2399 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2400 return -EINVAL;
2401 }
2402
2403 if (ec->tx_coalesce_usecs != cur_tx_itr &&
2404 ec->use_adaptive_tx_coalesce) {
2405 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
2406 return -EINVAL;
2407 }
2408
2409 if (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1)) {
2410 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2411 return -EINVAL;
2412 }
2413
2414 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
2415 ec->rx_coalesce_usecs = I40E_MIN_ITR << 1;
2416
2417 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
2418 ec->tx_coalesce_usecs = I40E_MIN_ITR << 1;
2419
Alan Brady33084062016-11-28 16:06:03 -0800[diff] [blame]2420 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
2421 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
2422 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
2423 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
2424 vsi->int_rate_limit);
2425 }
Jesse Brandeburgac26fc12015-09-28 14:12:37 -0400[diff] [blame]2426
Alan Bradya03af692017-10-05 14:53:37 -0700[diff] [blame]2427 /* rx and tx usecs has per queue value. If user doesn't specify the
2428 * queue, apply to all queues.
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2429 */
2430 if (queue < 0) {
2431 for (i = 0; i < vsi->num_queue_pairs; i++)
2432 i40e_set_itr_per_queue(vsi, ec, i);
Carolyn Wyborny5c2cebd2014-06-04 01:23:18 +0000[diff] [blame]2433 } else {
Alan Brady06b2dec2017-07-12 05:46:06 -0400[diff] [blame]2434 i40e_set_itr_per_queue(vsi, ec, queue);
Carolyn Wyborny5c2cebd2014-06-04 01:23:18 +0000[diff] [blame]2435 }
Mitch Williams32f5f542014-04-04 04:43:10 +0000[diff] [blame]2436
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2437 return 0;
2438}
2439
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2440/**
2441 * i40e_set_coalesce - set coalesce settings for every queue on the netdev
2442 * @netdev: the netdev to change
2443 * @ec: ethtool coalesce settings
2444 *
2445 * This will set each queue to the same coalesce settings.
2446 **/
Kan Lianga75e8002016-02-19 09:24:04 -0500[diff] [blame]2447static int i40e_set_coalesce(struct net_device *netdev,
2448 struct ethtool_coalesce *ec)
2449{
2450 return __i40e_set_coalesce(netdev, ec, -1);
2451}
2452
Jacob Keller65e87c02016-09-12 14:18:44 -0700[diff] [blame]2453/**
2454 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
2455 * @netdev: the netdev to change
2456 * @ec: ethtool's coalesce settings
2457 * @queue: the queue to change
2458 *
2459 * Sets the specified queue's coalesce settings.
2460 **/
Kan Liangf3757a42016-02-19 09:24:06 -0500[diff] [blame]2461static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
2462 struct ethtool_coalesce *ec)
2463{
2464 return __i40e_set_coalesce(netdev, ec, queue);
2465}
2466
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2467/**
2468 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
2469 * @pf: pointer to the physical function struct
2470 * @cmd: ethtool rxnfc command
2471 *
2472 * Returns Success if the flow is supported, else Invalid Input.
2473 **/
2474static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
2475{
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2476 struct i40e_hw *hw = &pf->hw;
2477 u8 flow_pctype = 0;
2478 u64 i_set = 0;
2479
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2480 cmd->data = 0;
2481
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2482 switch (cmd->flow_type) {
2483 case TCP_V4_FLOW:
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2484 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2485 break;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2486 case UDP_V4_FLOW:
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2487 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2488 break;
2489 case TCP_V6_FLOW:
2490 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2491 break;
2492 case UDP_V6_FLOW:
2493 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2494 break;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2495 case SCTP_V4_FLOW:
2496 case AH_ESP_V4_FLOW:
2497 case AH_V4_FLOW:
2498 case ESP_V4_FLOW:
2499 case IPV4_FLOW:
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2500 case SCTP_V6_FLOW:
2501 case AH_ESP_V6_FLOW:
2502 case AH_V6_FLOW:
2503 case ESP_V6_FLOW:
2504 case IPV6_FLOW:
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2505 /* Default is src/dest for IP, no matter the L4 hashing */
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2506 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2507 break;
2508 default:
2509 return -EINVAL;
2510 }
2511
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2512 /* Read flow based hash input set register */
2513 if (flow_pctype) {
2514 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2515 flow_pctype)) |
2516 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2517 flow_pctype)) << 32);
2518 }
2519
2520 /* Process bits of hash input set */
2521 if (i_set) {
2522 if (i_set & I40E_L4_SRC_MASK)
2523 cmd->data |= RXH_L4_B_0_1;
2524 if (i_set & I40E_L4_DST_MASK)
2525 cmd->data |= RXH_L4_B_2_3;
2526
2527 if (cmd->flow_type == TCP_V4_FLOW ||
2528 cmd->flow_type == UDP_V4_FLOW) {
2529 if (i_set & I40E_L3_SRC_MASK)
2530 cmd->data |= RXH_IP_SRC;
2531 if (i_set & I40E_L3_DST_MASK)
2532 cmd->data |= RXH_IP_DST;
2533 } else if (cmd->flow_type == TCP_V6_FLOW ||
2534 cmd->flow_type == UDP_V6_FLOW) {
2535 if (i_set & I40E_L3_V6_SRC_MASK)
2536 cmd->data |= RXH_IP_SRC;
2537 if (i_set & I40E_L3_V6_DST_MASK)
2538 cmd->data |= RXH_IP_DST;
2539 }
2540 }
2541
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2542 return 0;
2543}
2544
2545/**
Jacob Kellere7930952017-02-06 14:38:49 -0800[diff] [blame]2546 * i40e_check_mask - Check whether a mask field is set
2547 * @mask: the full mask value
2548 * @field; mask of the field to check
2549 *
2550 * If the given mask is fully set, return positive value. If the mask for the
2551 * field is fully unset, return zero. Otherwise return a negative error code.
2552 **/
2553static int i40e_check_mask(u64 mask, u64 field)
2554{
2555 u64 value = mask & field;
2556
2557 if (value == field)
2558 return 1;
2559 else if (!value)
2560 return 0;
2561 else
2562 return -1;
2563}
2564
2565/**
2566 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
2567 * @fsp: pointer to rx flow specification
2568 * @data: pointer to userdef data structure for storage
2569 *
2570 * Read the user-defined data and deconstruct the value into a structure. No
2571 * other code should read the user-defined data, so as to ensure that every
2572 * place consistently reads the value correctly.
2573 *
2574 * The user-defined field is a 64bit Big Endian format value, which we
2575 * deconstruct by reading bits or bit fields from it. Single bit flags shall
2576 * be defined starting from the highest bits, while small bit field values
2577 * shall be defined starting from the lowest bits.
2578 *
2579 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
2580 * and the filter should be rejected. The data structure will always be
2581 * modified even if FLOW_EXT is not set.
2582 *
2583 **/
2584static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2585 struct i40e_rx_flow_userdef *data)
2586{
2587 u64 value, mask;
2588 int valid;
2589
2590 /* Zero memory first so it's always consistent. */
2591 memset(data, 0, sizeof(*data));
2592
2593 if (!(fsp->flow_type & FLOW_EXT))
2594 return 0;
2595
2596 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
2597 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
2598
2599#define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
2600#define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
2601#define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
2602
2603 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
2604 if (valid < 0) {
2605 return -EINVAL;
2606 } else if (valid) {
2607 data->flex_word = value & I40E_USERDEF_FLEX_WORD;
2608 data->flex_offset =
2609 (value & I40E_USERDEF_FLEX_OFFSET) >> 16;
2610 data->flex_filter = true;
2611 }
2612
2613 return 0;
2614}
2615
2616/**
2617 * i40e_fill_rx_flow_user_data - Fill in user-defined data field
2618 * @fsp: pointer to rx_flow specification
2619 *
2620 * Reads the userdef data structure and properly fills in the user defined
2621 * fields of the rx_flow_spec.
2622 **/
2623static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2624 struct i40e_rx_flow_userdef *data)
2625{
2626 u64 value = 0, mask = 0;
2627
2628 if (data->flex_filter) {
2629 value |= data->flex_word;
2630 value |= (u64)data->flex_offset << 16;
2631 mask |= I40E_USERDEF_FLEX_FILTER;
2632 }
2633
2634 if (value || mask)
2635 fsp->flow_type |= FLOW_EXT;
2636
2637 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
2638 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
2639}
2640
2641/**
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2642 * i40e_get_ethtool_fdir_all - Populates the rule count of a command
2643 * @pf: Pointer to the physical function struct
2644 * @cmd: The command to get or set Rx flow classification rules
2645 * @rule_locs: Array of used rule locations
2646 *
2647 * This function populates both the total and actual rule count of
2648 * the ethtool flow classification command
2649 *
2650 * Returns 0 on success or -EMSGSIZE if entry not found
2651 **/
2652static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
2653 struct ethtool_rxnfc *cmd,
2654 u32 *rule_locs)
2655{
2656 struct i40e_fdir_filter *rule;
2657 struct hlist_node *node2;
2658 int cnt = 0;
2659
2660 /* report total rule count */
Anjali Singhai Jain082def12014-04-09 05:59:00 +0000[diff] [blame]2661 cmd->data = i40e_get_fd_cnt_all(pf);
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2662
2663 hlist_for_each_entry_safe(rule, node2,
2664 &pf->fdir_filter_list, fdir_node) {
2665 if (cnt == cmd->rule_cnt)
2666 return -EMSGSIZE;
2667
2668 rule_locs[cnt] = rule->fd_id;
2669 cnt++;
2670 }
2671
2672 cmd->rule_cnt = cnt;
2673
2674 return 0;
2675}
2676
2677/**
2678 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
2679 * @pf: Pointer to the physical function struct
2680 * @cmd: The command to get or set Rx flow classification rules
2681 *
2682 * This function looks up a filter based on the Rx flow classification
2683 * command and fills the flow spec info for it if found
2684 *
2685 * Returns 0 on success or -EINVAL if filter not found
2686 **/
2687static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
2688 struct ethtool_rxnfc *cmd)
2689{
2690 struct ethtool_rx_flow_spec *fsp =
2691 (struct ethtool_rx_flow_spec *)&cmd->fs;
Jacob Kellere7930952017-02-06 14:38:49 -0800[diff] [blame]2692 struct i40e_rx_flow_userdef userdef = {0};
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2693 struct i40e_fdir_filter *rule = NULL;
2694 struct hlist_node *node2;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]2695 u64 input_set;
2696 u16 index;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2697
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2698 hlist_for_each_entry_safe(rule, node2,
2699 &pf->fdir_filter_list, fdir_node) {
2700 if (fsp->location <= rule->fd_id)
2701 break;
2702 }
2703
2704 if (!rule || fsp->location != rule->fd_id)
2705 return -EINVAL;
2706
2707 fsp->flow_type = rule->flow_type;
Anjali Singhai Jain7d54eb22014-03-14 07:32:21 +0000[diff] [blame]2708 if (fsp->flow_type == IP_USER_FLOW) {
2709 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2710 fsp->h_u.usr_ip4_spec.proto = 0;
2711 fsp->m_u.usr_ip4_spec.proto = 0;
2712 }
2713
Anjali Singhai Jain04b73bd2014-05-22 06:31:41 +0000[diff] [blame]2714 /* Reverse the src and dest notion, since the HW views them from
2715 * Tx perspective where as the user expects it from Rx filter view.
2716 */
2717 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
2718 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
Jacob Keller8ce43dc2017-02-06 14:38:39 -0800[diff] [blame]2719 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
2720 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
Anjali Singhai Jain387ce1a2014-05-22 06:32:23 +0000[diff] [blame]2721
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]2722 switch (rule->flow_type) {
Jacob Kellerf223c872017-02-06 14:38:51 -0800[diff] [blame]2723 case SCTP_V4_FLOW:
2724 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
2725 break;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]2726 case TCP_V4_FLOW:
2727 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2728 break;
2729 case UDP_V4_FLOW:
2730 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2731 break;
2732 case IP_USER_FLOW:
2733 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
2734 break;
2735 default:
2736 /* If we have stored a filter with a flow type not listed here
2737 * it is almost certainly a driver bug. WARN(), and then
2738 * assign the input_set as if all fields are enabled to avoid
2739 * reading unassigned memory.
2740 */
2741 WARN(1, "Missing input set index for flow_type %d\n",
2742 rule->flow_type);
2743 input_set = 0xFFFFFFFFFFFFFFFFULL;
2744 goto no_input_set;
2745 }
2746
2747 input_set = i40e_read_fd_input_set(pf, index);
2748
2749no_input_set:
2750 if (input_set & I40E_L3_SRC_MASK)
2751 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFF);
2752
2753 if (input_set & I40E_L3_DST_MASK)
2754 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFF);
2755
2756 if (input_set & I40E_L4_SRC_MASK)
2757 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFFFFFF);
2758
2759 if (input_set & I40E_L4_DST_MASK)
2760 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFFFFFF);
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]2761
Anjali Singhai Jain387ce1a2014-05-22 06:32:23 +0000[diff] [blame]2762 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
2763 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2764 else
2765 fsp->ring_cookie = rule->q_index;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2766
Anjali Singhai Jaine7c8c602015-04-07 19:45:31 -0400[diff] [blame]2767 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
2768 struct i40e_vsi *vsi;
2769
2770 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
2771 if (vsi && vsi->type == I40E_VSI_SRIOV) {
Jacob Keller43b15692017-02-06 14:38:48 -0800[diff] [blame]2772 /* VFs are zero-indexed by the driver, but ethtool
2773 * expects them to be one-indexed, so add one here
2774 */
2775 u64 ring_vf = vsi->vf_id + 1;
2776
2777 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
2778 fsp->ring_cookie |= ring_vf;
Anjali Singhai Jaine7c8c602015-04-07 19:45:31 -0400[diff] [blame]2779 }
2780 }
2781
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]2782 if (rule->flex_filter) {
2783 userdef.flex_filter = true;
2784 userdef.flex_word = be16_to_cpu(rule->flex_word);
2785 userdef.flex_offset = rule->flex_offset;
2786 }
2787
Jacob Kellere7930952017-02-06 14:38:49 -0800[diff] [blame]2788 i40e_fill_rx_flow_user_data(fsp, &userdef);
2789
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2790 return 0;
2791}
2792
2793/**
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2794 * i40e_get_rxnfc - command to get RX flow classification rules
2795 * @netdev: network interface device structure
2796 * @cmd: ethtool rxnfc command
2797 *
2798 * Returns Success if the command is supported.
2799 **/
2800static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
2801 u32 *rule_locs)
2802{
2803 struct i40e_netdev_priv *np = netdev_priv(netdev);
2804 struct i40e_vsi *vsi = np->vsi;
2805 struct i40e_pf *pf = vsi->back;
2806 int ret = -EOPNOTSUPP;
2807
2808 switch (cmd->cmd) {
2809 case ETHTOOL_GRXRINGS:
Amritha Nambiara9ce82f2017-09-07 04:00:22 -0700[diff] [blame]2810 cmd->data = vsi->rss_size;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2811 ret = 0;
2812 break;
2813 case ETHTOOL_GRXFH:
2814 ret = i40e_get_rss_hash_opts(pf, cmd);
2815 break;
2816 case ETHTOOL_GRXCLSRLCNT:
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2817 cmd->rule_cnt = pf->fdir_pf_active_filters;
Anjali Singhai Jain082def12014-04-09 05:59:00 +0000[diff] [blame]2818 /* report total rule count */
2819 cmd->data = i40e_get_fd_cnt_all(pf);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2820 ret = 0;
2821 break;
2822 case ETHTOOL_GRXCLSRULE:
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2823 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2824 break;
2825 case ETHTOOL_GRXCLSRLALL:
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2826 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
2827 break;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2828 default:
2829 break;
2830 }
2831
2832 return ret;
2833}
2834
2835/**
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2836 * i40e_get_rss_hash_bits - Read RSS Hash bits from register
2837 * @nfc: pointer to user request
2838 * @i_setc bits currently set
2839 *
2840 * Returns value of bits to be set per user request
2841 **/
2842static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
2843{
2844 u64 i_set = i_setc;
2845 u64 src_l3 = 0, dst_l3 = 0;
2846
2847 if (nfc->data & RXH_L4_B_0_1)
2848 i_set |= I40E_L4_SRC_MASK;
2849 else
2850 i_set &= ~I40E_L4_SRC_MASK;
2851 if (nfc->data & RXH_L4_B_2_3)
2852 i_set |= I40E_L4_DST_MASK;
2853 else
2854 i_set &= ~I40E_L4_DST_MASK;
2855
2856 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
2857 src_l3 = I40E_L3_V6_SRC_MASK;
2858 dst_l3 = I40E_L3_V6_DST_MASK;
2859 } else if (nfc->flow_type == TCP_V4_FLOW ||
2860 nfc->flow_type == UDP_V4_FLOW) {
2861 src_l3 = I40E_L3_SRC_MASK;
2862 dst_l3 = I40E_L3_DST_MASK;
2863 } else {
2864 /* Any other flow type are not supported here */
2865 return i_set;
2866 }
2867
2868 if (nfc->data & RXH_IP_SRC)
2869 i_set |= src_l3;
2870 else
2871 i_set &= ~src_l3;
2872 if (nfc->data & RXH_IP_DST)
2873 i_set |= dst_l3;
2874 else
2875 i_set &= ~dst_l3;
2876
2877 return i_set;
2878}
2879
2880/**
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2881 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
2882 * @pf: pointer to the physical function struct
2883 * @cmd: ethtool rxnfc command
2884 *
2885 * Returns Success if the flow input set is supported.
2886 **/
2887static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2888{
2889 struct i40e_hw *hw = &pf->hw;
Shannon Nelson272cdaf22016-02-17 16:12:21 -0800[diff] [blame]2890 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
2891 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2892 u8 flow_pctype = 0;
2893 u64 i_set, i_setc;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2894
Carolyn Wyborny83d14c52017-06-07 05:43:07 -0400[diff] [blame]2895 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
2896 dev_err(&pf->pdev->dev,
2897 "Change of RSS hash input set is not supported when MFP mode is enabled\n");
2898 return -EOPNOTSUPP;
2899 }
2900
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2901 /* RSS does not support anything other than hashing
2902 * to queues on src and dst IPs and ports
2903 */
2904 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2905 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2906 return -EINVAL;
2907
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2908 switch (nfc->flow_type) {
2909 case TCP_V4_FLOW:
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2910 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2911 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2912 hena |=
2913 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2914 break;
2915 case TCP_V6_FLOW:
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2916 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2917 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2918 hena |=
2919 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2920 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2921 hena |=
2922 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2923 break;
2924 case UDP_V4_FLOW:
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2925 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2926 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2927 hena |=
2928 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
2929 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
Anjali Singhai Jain3d0da5b2015-12-22 14:25:05 -0800[diff] [blame]2930
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2931 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2932 break;
2933 case UDP_V6_FLOW:
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2934 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
Jacob Kellerd36e41d2017-06-23 04:24:46 -0400[diff] [blame]2935 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2936 hena |=
2937 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
2938 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
Anjali Singhai Jain3d0da5b2015-12-22 14:25:05 -0800[diff] [blame]2939
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2940 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2941 break;
2942 case AH_ESP_V4_FLOW:
2943 case AH_V4_FLOW:
2944 case ESP_V4_FLOW:
2945 case SCTP_V4_FLOW:
2946 if ((nfc->data & RXH_L4_B_0_1) ||
2947 (nfc->data & RXH_L4_B_2_3))
2948 return -EINVAL;
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]2949 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2950 break;
2951 case AH_ESP_V6_FLOW:
2952 case AH_V6_FLOW:
2953 case ESP_V6_FLOW:
2954 case SCTP_V6_FLOW:
2955 if ((nfc->data & RXH_L4_B_0_1) ||
2956 (nfc->data & RXH_L4_B_2_3))
2957 return -EINVAL;
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]2958 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2959 break;
2960 case IPV4_FLOW:
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]2961 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
2962 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2963 break;
2964 case IPV6_FLOW:
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400[diff] [blame]2965 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
2966 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2967 break;
2968 default:
2969 return -EINVAL;
2970 }
2971
Carolyn Wybornyeb0dd6e2016-07-27 12:02:40 -0700[diff] [blame]2972 if (flow_pctype) {
2973 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2974 flow_pctype)) |
2975 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2976 flow_pctype)) << 32);
2977 i_set = i40e_get_rss_hash_bits(nfc, i_setc);
2978 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
2979 (u32)i_set);
2980 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
2981 (u32)(i_set >> 32));
2982 hena |= BIT_ULL(flow_pctype);
2983 }
2984
Shannon Nelson272cdaf22016-02-17 16:12:21 -0800[diff] [blame]2985 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
2986 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2987 i40e_flush(hw);
2988
2989 return 0;
2990}
2991
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2992/**
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2993 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
2994 * @vsi: Pointer to the targeted VSI
2995 * @input: The filter to update or NULL to indicate deletion
2996 * @sw_idx: Software index to the filter
2997 * @cmd: The command to get or set Rx flow classification rules
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]2998 *
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]2999 * This function updates (or deletes) a Flow Director entry from
3000 * the hlist of the corresponding PF
3001 *
3002 * Returns 0 on success
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3003 **/
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3004static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
3005 struct i40e_fdir_filter *input,
3006 u16 sw_idx,
3007 struct ethtool_rxnfc *cmd)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3008{
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3009 struct i40e_fdir_filter *rule, *parent;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3010 struct i40e_pf *pf = vsi->back;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3011 struct hlist_node *node2;
3012 int err = -EINVAL;
Jesse Brandeburgc35a1d72013-12-18 13:46:02 +0000[diff] [blame]3013
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3014 parent = NULL;
3015 rule = NULL;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3016
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3017 hlist_for_each_entry_safe(rule, node2,
3018 &pf->fdir_filter_list, fdir_node) {
3019 /* hash found, or no matching entry */
3020 if (rule->fd_id >= sw_idx)
3021 break;
3022 parent = rule;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3023 }
3024
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3025 /* if there is an old rule occupying our place remove it */
3026 if (rule && (rule->fd_id == sw_idx)) {
Jacob Kellerc6da5252017-02-06 14:39:13 -0800[diff] [blame]3027 /* Remove this rule, since we're either deleting it, or
3028 * replacing it.
3029 */
3030 err = i40e_add_del_fdir(vsi, rule, false);
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3031 hlist_del(&rule->fdir_node);
3032 kfree(rule);
3033 pf->fdir_pf_active_filters--;
3034 }
3035
Jacob Kellerc6da5252017-02-06 14:39:13 -0800[diff] [blame]3036 /* If we weren't given an input, this is a delete, so just return the
3037 * error code indicating if there was an entry at the requested slot
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3038 */
3039 if (!input)
3040 return err;
3041
Jacob Kellerc6da5252017-02-06 14:39:13 -0800[diff] [blame]3042 /* Otherwise, install the new rule as requested */
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3043 INIT_HLIST_NODE(&input->fdir_node);
3044
3045 /* add filter to the list */
3046 if (parent)
Ken Helias1d023282014-08-06 16:09:16 -0700[diff] [blame]3047 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3048 else
3049 hlist_add_head(&input->fdir_node,
3050 &pf->fdir_filter_list);
3051
3052 /* update counts */
3053 pf->fdir_pf_active_filters++;
3054
3055 return 0;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3056}
3057
3058/**
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3059 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
3060 * @pf: pointer to PF structure
3061 *
3062 * This function searches the list of filters and determines which FLX_PIT
3063 * entries are still required. It will prune any entries which are no longer
3064 * in use after the deletion.
3065 **/
3066static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
3067{
3068 struct i40e_flex_pit *entry, *tmp;
3069 struct i40e_fdir_filter *rule;
3070
3071 /* First, we'll check the l3 table */
3072 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
3073 bool found = false;
3074
3075 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3076 if (rule->flow_type != IP_USER_FLOW)
3077 continue;
3078 if (rule->flex_filter &&
3079 rule->flex_offset == entry->src_offset) {
3080 found = true;
3081 break;
3082 }
3083 }
3084
3085 /* If we didn't find the filter, then we can prune this entry
3086 * from the list.
3087 */
3088 if (!found) {
3089 list_del(&entry->list);
3090 kfree(entry);
3091 }
3092 }
3093
3094 /* Followed by the L4 table */
3095 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
3096 bool found = false;
3097
3098 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3099 /* Skip this filter if it's L3, since we already
3100 * checked those in the above loop
3101 */
3102 if (rule->flow_type == IP_USER_FLOW)
3103 continue;
3104 if (rule->flex_filter &&
3105 rule->flex_offset == entry->src_offset) {
3106 found = true;
3107 break;
3108 }
3109 }
3110
3111 /* If we didn't find the filter, then we can prune this entry
3112 * from the list.
3113 */
3114 if (!found) {
3115 list_del(&entry->list);
3116 kfree(entry);
3117 }
3118 }
3119}
3120
3121/**
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3122 * i40e_del_fdir_entry - Deletes a Flow Director filter entry
3123 * @vsi: Pointer to the targeted VSI
3124 * @cmd: The command to get or set Rx flow classification rules
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3125 *
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3126 * The function removes a Flow Director filter entry from the
3127 * hlist of the corresponding PF
3128 *
3129 * Returns 0 on success
3130 */
3131static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3132 struct ethtool_rxnfc *cmd)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3133{
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3134 struct ethtool_rx_flow_spec *fsp =
3135 (struct ethtool_rx_flow_spec *)&cmd->fs;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3136 struct i40e_pf *pf = vsi->back;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3137 int ret = 0;
Jesse Brandeburgc35a1d72013-12-18 13:46:02 +0000[diff] [blame]3138
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]3139 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3140 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
Anjali Singhai Jain60793f4a2014-07-09 07:46:23 +0000[diff] [blame]3141 return -EBUSY;
3142
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]3143 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
Anjali Singhai Jain1e1be8f2014-07-10 08:03:26 +0000[diff] [blame]3144 return -EBUSY;
3145
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3146 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3147
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3148 i40e_prune_flex_pit_list(pf);
3149
Anjali Singhai Jain55a5e602014-02-12 06:33:25 +0000[diff] [blame]3150 i40e_fdir_check_and_reenable(pf);
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3151 return ret;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3152}
3153
3154/**
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3155 * i40e_unused_pit_index - Find an unused PIT index for given list
3156 * @pf: the PF data structure
3157 *
3158 * Find the first unused flexible PIT index entry. We search both the L3 and
3159 * L4 flexible PIT lists so that the returned index is unique and unused by
3160 * either currently programmed L3 or L4 filters. We use a bit field as storage
3161 * to track which indexes are already used.
3162 **/
3163static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3164{
3165 unsigned long available_index = 0xFF;
3166 struct i40e_flex_pit *entry;
3167
3168 /* We need to make sure that the new index isn't in use by either L3
3169 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3170 * L4 to use the same index.
3171 */
3172
3173 list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3174 clear_bit(entry->pit_index, &available_index);
3175
3176 list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3177 clear_bit(entry->pit_index, &available_index);
3178
3179 return find_first_bit(&available_index, 8);
3180}
3181
3182/**
3183 * i40e_find_flex_offset - Find an existing flex src_offset
3184 * @flex_pit_list: L3 or L4 flex PIT list
3185 * @src_offset: new src_offset to find
3186 *
3187 * Searches the flex_pit_list for an existing offset. If no offset is
3188 * currently programmed, then this will return an ERR_PTR if there is no space
3189 * to add a new offset, otherwise it returns NULL.
3190 **/
3191static
3192struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3193 u16 src_offset)
3194{
3195 struct i40e_flex_pit *entry;
3196 int size = 0;
3197
3198 /* Search for the src_offset first. If we find a matching entry
3199 * already programmed, we can simply re-use it.
3200 */
3201 list_for_each_entry(entry, flex_pit_list, list) {
3202 size++;
3203 if (entry->src_offset == src_offset)
3204 return entry;
3205 }
3206
3207 /* If we haven't found an entry yet, then the provided src offset has
3208 * not yet been programmed. We will program the src offset later on,
3209 * but we need to indicate whether there is enough space to do so
3210 * here. We'll make use of ERR_PTR for this purpose.
3211 */
3212 if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3213 return ERR_PTR(-ENOSPC);
3214
3215 return NULL;
3216}
3217
3218/**
3219 * i40e_add_flex_offset - Add src_offset to flex PIT table list
3220 * @flex_pit_list: L3 or L4 flex PIT list
3221 * @src_offset: new src_offset to add
3222 * @pit_index: the PIT index to program
3223 *
3224 * This function programs the new src_offset to the list. It is expected that
3225 * i40e_find_flex_offset has already been tried and returned NULL, indicating
3226 * that this offset is not programmed, and that the list has enough space to
3227 * store another offset.
3228 *
3229 * Returns 0 on success, and negative value on error.
3230 **/
3231static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3232 u16 src_offset,
3233 u8 pit_index)
3234{
3235 struct i40e_flex_pit *new_pit, *entry;
3236
3237 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3238 if (!new_pit)
3239 return -ENOMEM;
3240
3241 new_pit->src_offset = src_offset;
3242 new_pit->pit_index = pit_index;
3243
3244 /* We need to insert this item such that the list is sorted by
3245 * src_offset in ascending order.
3246 */
3247 list_for_each_entry(entry, flex_pit_list, list) {
3248 if (new_pit->src_offset < entry->src_offset) {
3249 list_add_tail(&new_pit->list, &entry->list);
3250 return 0;
3251 }
3252
3253 /* If we found an entry with our offset already programmed we
3254 * can simply return here, after freeing the memory. However,
3255 * if the pit_index does not match we need to report an error.
3256 */
3257 if (new_pit->src_offset == entry->src_offset) {
3258 int err = 0;
3259
3260 /* If the PIT index is not the same we can't re-use
3261 * the entry, so we must report an error.
3262 */
3263 if (new_pit->pit_index != entry->pit_index)
3264 err = -EINVAL;
3265
3266 kfree(new_pit);
3267 return err;
3268 }
3269 }
3270
3271 /* If we reached here, then we haven't yet added the item. This means
3272 * that we should add the item at the end of the list.
3273 */
3274 list_add_tail(&new_pit->list, flex_pit_list);
3275 return 0;
3276}
3277
3278/**
3279 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
3280 * @pf: Pointer to the PF structure
3281 * @flex_pit_list: list of flexible src offsets in use
3282 * #flex_pit_start: index to first entry for this section of the table
3283 *
3284 * In order to handle flexible data, the hardware uses a table of values
3285 * called the FLX_PIT table. This table is used to indicate which sections of
3286 * the input correspond to what PIT index values. Unfortunately, hardware is
3287 * very restrictive about programming this table. Entries must be ordered by
3288 * src_offset in ascending order, without duplicates. Additionally, unused
3289 * entries must be set to the unused index value, and must have valid size and
3290 * length according to the src_offset ordering.
3291 *
3292 * This function will reprogram the FLX_PIT register from a book-keeping
3293 * structure that we guarantee is already ordered correctly, and has no more
3294 * than 3 entries.
3295 *
3296 * To make things easier, we only support flexible values of one word length,
3297 * rather than allowing variable length flexible values.
3298 **/
3299static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
3300 struct list_head *flex_pit_list,
3301 int flex_pit_start)
3302{
3303 struct i40e_flex_pit *entry = NULL;
3304 u16 last_offset = 0;
3305 int i = 0, j = 0;
3306
3307 /* First, loop over the list of flex PIT entries, and reprogram the
3308 * registers.
3309 */
3310 list_for_each_entry(entry, flex_pit_list, list) {
3311 /* We have to be careful when programming values for the
3312 * largest SRC_OFFSET value. It is possible that adding
3313 * additional empty values at the end would overflow the space
3314 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
3315 * we check here and add the empty values prior to adding the
3316 * largest value.
3317 *
3318 * To determine this, we will use a loop from i+1 to 3, which
3319 * will determine whether the unused entries would have valid
3320 * SRC_OFFSET. Note that there cannot be extra entries past
3321 * this value, because the only valid values would have been
3322 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
3323 * have been added to the list in the first place.
3324 */
3325 for (j = i + 1; j < 3; j++) {
3326 u16 offset = entry->src_offset + j;
3327 int index = flex_pit_start + i;
3328 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3329 1,
3330 offset - 3);
3331
3332 if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
3333 i40e_write_rx_ctl(&pf->hw,
3334 I40E_PRTQF_FLX_PIT(index),
3335 value);
3336 i++;
3337 }
3338 }
3339
3340 /* Now, we can program the actual value into the table */
3341 i40e_write_rx_ctl(&pf->hw,
3342 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3343 I40E_FLEX_PREP_VAL(entry->pit_index + 50,
3344 1,
3345 entry->src_offset));
3346 i++;
3347 }
3348
3349 /* In order to program the last entries in the table, we need to
3350 * determine the valid offset. If the list is empty, we'll just start
3351 * with 0. Otherwise, we'll start with the last item offset and add 1.
3352 * This ensures that all entries have valid sizes. If we don't do this
3353 * correctly, the hardware will disable flexible field parsing.
3354 */
3355 if (!list_empty(flex_pit_list))
3356 last_offset = list_prev_entry(entry, list)->src_offset + 1;
3357
3358 for (; i < 3; i++, last_offset++) {
3359 i40e_write_rx_ctl(&pf->hw,
3360 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3361 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3362 1,
3363 last_offset));
3364 }
3365}
3366
3367/**
3368 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
3369 * @pf: pointer to the PF structure
3370 *
3371 * This function reprograms both the L3 and L4 FLX_PIT tables. See the
3372 * internal helper function for implementation details.
3373 **/
3374static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
3375{
3376 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
3377 I40E_FLEX_PIT_IDX_START_L3);
3378
3379 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
3380 I40E_FLEX_PIT_IDX_START_L4);
3381
3382 /* We also need to program the L3 and L4 GLQF ORT register */
3383 i40e_write_rx_ctl(&pf->hw,
3384 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
3385 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
3386 3, 1));
3387
3388 i40e_write_rx_ctl(&pf->hw,
3389 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
3390 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
3391 3, 1));
3392}
3393
3394/**
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3395 * i40e_flow_str - Converts a flow_type into a human readable string
3396 * @flow_type: the flow type from a flow specification
3397 *
3398 * Currently only flow types we support are included here, and the string
3399 * value attempts to match what ethtool would use to configure this flow type.
3400 **/
3401static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
3402{
3403 switch (fsp->flow_type & ~FLOW_EXT) {
3404 case TCP_V4_FLOW:
3405 return "tcp4";
3406 case UDP_V4_FLOW:
3407 return "udp4";
3408 case SCTP_V4_FLOW:
3409 return "sctp4";
3410 case IP_USER_FLOW:
3411 return "ip4";
3412 default:
3413 return "unknown";
3414 }
3415}
3416
3417/**
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3418 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
3419 * @pit_index: PIT index to convert
3420 *
3421 * Returns the mask for a given PIT index. Will return 0 if the pit_index is
3422 * of range.
3423 **/
3424static u64 i40e_pit_index_to_mask(int pit_index)
3425{
3426 switch (pit_index) {
3427 case 0:
3428 return I40E_FLEX_50_MASK;
3429 case 1:
3430 return I40E_FLEX_51_MASK;
3431 case 2:
3432 return I40E_FLEX_52_MASK;
3433 case 3:
3434 return I40E_FLEX_53_MASK;
3435 case 4:
3436 return I40E_FLEX_54_MASK;
3437 case 5:
3438 return I40E_FLEX_55_MASK;
3439 case 6:
3440 return I40E_FLEX_56_MASK;
3441 case 7:
3442 return I40E_FLEX_57_MASK;
3443 default:
3444 return 0;
3445 }
3446}
3447
3448/**
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3449 * i40e_print_input_set - Show changes between two input sets
3450 * @vsi: the vsi being configured
3451 * @old: the old input set
3452 * @new: the new input set
3453 *
3454 * Print the difference between old and new input sets by showing which series
3455 * of words are toggled on or off. Only displays the bits we actually support
3456 * changing.
3457 **/
3458static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
3459{
3460 struct i40e_pf *pf = vsi->back;
3461 bool old_value, new_value;
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3462 int i;
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3463
3464 old_value = !!(old & I40E_L3_SRC_MASK);
3465 new_value = !!(new & I40E_L3_SRC_MASK);
3466 if (old_value != new_value)
3467 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
3468 old_value ? "ON" : "OFF",
3469 new_value ? "ON" : "OFF");
3470
3471 old_value = !!(old & I40E_L3_DST_MASK);
3472 new_value = !!(new & I40E_L3_DST_MASK);
3473 if (old_value != new_value)
3474 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
3475 old_value ? "ON" : "OFF",
3476 new_value ? "ON" : "OFF");
3477
3478 old_value = !!(old & I40E_L4_SRC_MASK);
3479 new_value = !!(new & I40E_L4_SRC_MASK);
3480 if (old_value != new_value)
3481 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
3482 old_value ? "ON" : "OFF",
3483 new_value ? "ON" : "OFF");
3484
3485 old_value = !!(old & I40E_L4_DST_MASK);
3486 new_value = !!(new & I40E_L4_DST_MASK);
3487 if (old_value != new_value)
3488 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
3489 old_value ? "ON" : "OFF",
3490 new_value ? "ON" : "OFF");
3491
3492 old_value = !!(old & I40E_VERIFY_TAG_MASK);
3493 new_value = !!(new & I40E_VERIFY_TAG_MASK);
3494 if (old_value != new_value)
3495 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
3496 old_value ? "ON" : "OFF",
3497 new_value ? "ON" : "OFF");
3498
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3499 /* Show change of flexible filter entries */
3500 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
3501 u64 flex_mask = i40e_pit_index_to_mask(i);
3502
3503 old_value = !!(old & flex_mask);
3504 new_value = !!(new & flex_mask);
3505 if (old_value != new_value)
3506 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
3507 i,
3508 old_value ? "ON" : "OFF",
3509 new_value ? "ON" : "OFF");
3510 }
3511
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3512 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
3513 old);
3514 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
3515 new);
3516}
3517
3518/**
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3519 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3520 * @vsi: pointer to the targeted VSI
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3521 * @fsp: pointer to Rx flow specification
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3522 * @userdef: userdefined data from flow specification
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3523 *
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3524 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
3525 * for partial matches exists with a few limitations. First, hardware only
3526 * supports masking by word boundary (2 bytes) and not per individual bit.
3527 * Second, hardware is limited to using one mask for a flow type and cannot
3528 * use a separate mask for each filter.
3529 *
3530 * To support these limitations, if we already have a configured filter for
3531 * the specified type, this function enforces that new filters of the type
3532 * match the configured input set. Otherwise, if we do not have a filter of
3533 * the specified type, we allow the input set to be updated to match the
3534 * desired filter.
3535 *
3536 * To help ensure that administrators understand why filters weren't displayed
3537 * as supported, we print a diagnostic message displaying how the input set
3538 * would change and warning to delete the preexisting filters if required.
3539 *
3540 * Returns 0 on successful input set match, and a negative return code on
3541 * failure.
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3542 **/
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3543static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3544 struct ethtool_rx_flow_spec *fsp,
3545 struct i40e_rx_flow_userdef *userdef)
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3546{
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3547 struct i40e_pf *pf = vsi->back;
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3548 struct ethtool_tcpip4_spec *tcp_ip4_spec;
3549 struct ethtool_usrip4_spec *usr_ip4_spec;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3550 u64 current_mask, new_mask;
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3551 bool new_flex_offset = false;
3552 bool flex_l3 = false;
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3553 u16 *fdir_filter_count;
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3554 u16 index, src_offset = 0;
3555 u8 pit_index = 0;
3556 int err;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3557
3558 switch (fsp->flow_type & ~FLOW_EXT) {
Jacob Kellerf223c872017-02-06 14:38:51 -0800[diff] [blame]3559 case SCTP_V4_FLOW:
3560 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3561 fdir_filter_count = &pf->fd_sctp4_filter_cnt;
3562 break;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3563 case TCP_V4_FLOW:
3564 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3565 fdir_filter_count = &pf->fd_tcp4_filter_cnt;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3566 break;
3567 case UDP_V4_FLOW:
3568 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3569 fdir_filter_count = &pf->fd_udp4_filter_cnt;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3570 break;
3571 case IP_USER_FLOW:
3572 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3573 fdir_filter_count = &pf->fd_ip4_filter_cnt;
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3574 flex_l3 = true;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3575 break;
3576 default:
3577 return -EOPNOTSUPP;
3578 }
3579
3580 /* Read the current input set from register memory. */
3581 current_mask = i40e_read_fd_input_set(pf, index);
3582 new_mask = current_mask;
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3583
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3584 /* Determine, if any, the required changes to the input set in order
3585 * to support the provided mask.
3586 *
3587 * Hardware only supports masking at word (2 byte) granularity and does
3588 * not support full bitwise masking. This implementation simplifies
3589 * even further and only supports fully enabled or fully disabled
3590 * masks for each field, even though we could split the ip4src and
3591 * ip4dst fields.
3592 */
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3593 switch (fsp->flow_type & ~FLOW_EXT) {
Jacob Kellerf223c872017-02-06 14:38:51 -0800[diff] [blame]3594 case SCTP_V4_FLOW:
3595 new_mask &= ~I40E_VERIFY_TAG_MASK;
3596 /* Fall through */
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3597 case TCP_V4_FLOW:
3598 case UDP_V4_FLOW:
3599 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
3600
3601 /* IPv4 source address */
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3602 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3603 new_mask |= I40E_L3_SRC_MASK;
3604 else if (!tcp_ip4_spec->ip4src)
3605 new_mask &= ~I40E_L3_SRC_MASK;
3606 else
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3607 return -EOPNOTSUPP;
3608
3609 /* IPv4 destination address */
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3610 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3611 new_mask |= I40E_L3_DST_MASK;
3612 else if (!tcp_ip4_spec->ip4dst)
3613 new_mask &= ~I40E_L3_DST_MASK;
3614 else
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3615 return -EOPNOTSUPP;
3616
3617 /* L4 source port */
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3618 if (tcp_ip4_spec->psrc == htons(0xFFFF))
3619 new_mask |= I40E_L4_SRC_MASK;
3620 else if (!tcp_ip4_spec->psrc)
3621 new_mask &= ~I40E_L4_SRC_MASK;
3622 else
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3623 return -EOPNOTSUPP;
3624
3625 /* L4 destination port */
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3626 if (tcp_ip4_spec->pdst == htons(0xFFFF))
3627 new_mask |= I40E_L4_DST_MASK;
3628 else if (!tcp_ip4_spec->pdst)
3629 new_mask &= ~I40E_L4_DST_MASK;
3630 else
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3631 return -EOPNOTSUPP;
3632
3633 /* Filtering on Type of Service is not supported. */
3634 if (tcp_ip4_spec->tos)
3635 return -EOPNOTSUPP;
3636
3637 break;
3638 case IP_USER_FLOW:
3639 usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
3640
3641 /* IPv4 source address */
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3642 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3643 new_mask |= I40E_L3_SRC_MASK;
3644 else if (!usr_ip4_spec->ip4src)
3645 new_mask &= ~I40E_L3_SRC_MASK;
3646 else
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3647 return -EOPNOTSUPP;
3648
3649 /* IPv4 destination address */
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3650 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3651 new_mask |= I40E_L3_DST_MASK;
3652 else if (!usr_ip4_spec->ip4dst)
3653 new_mask &= ~I40E_L3_DST_MASK;
3654 else
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3655 return -EOPNOTSUPP;
3656
3657 /* First 4 bytes of L4 header */
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3658 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF))
3659 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK;
3660 else if (!usr_ip4_spec->l4_4_bytes)
3661 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
3662 else
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3663 return -EOPNOTSUPP;
3664
3665 /* Filtering on Type of Service is not supported. */
3666 if (usr_ip4_spec->tos)
3667 return -EOPNOTSUPP;
3668
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3669 /* Filtering on IP version is not supported */
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3670 if (usr_ip4_spec->ip_ver)
3671 return -EINVAL;
3672
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3673 /* Filtering on L4 protocol is not supported */
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3674 if (usr_ip4_spec->proto)
3675 return -EINVAL;
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3676
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3677 break;
3678 default:
3679 return -EOPNOTSUPP;
3680 }
3681
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3682 /* First, clear all flexible filter entries */
3683 new_mask &= ~I40E_FLEX_INPUT_MASK;
3684
3685 /* If we have a flexible filter, try to add this offset to the correct
3686 * flexible filter PIT list. Once finished, we can update the mask.
3687 * If the src_offset changed, we will get a new mask value which will
3688 * trigger an input set change.
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3689 */
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3690 if (userdef->flex_filter) {
3691 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
3692
3693 /* Flexible offset must be even, since the flexible payload
3694 * must be aligned on 2-byte boundary.
3695 */
3696 if (userdef->flex_offset & 0x1) {
3697 dev_warn(&pf->pdev->dev,
3698 "Flexible data offset must be 2-byte aligned\n");
3699 return -EINVAL;
3700 }
3701
3702 src_offset = userdef->flex_offset >> 1;
3703
3704 /* FLX_PIT source offset value is only so large */
3705 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
3706 dev_warn(&pf->pdev->dev,
3707 "Flexible data must reside within first 64 bytes of the packet payload\n");
3708 return -EINVAL;
3709 }
3710
3711 /* See if this offset has already been programmed. If we get
3712 * an ERR_PTR, then the filter is not safe to add. Otherwise,
3713 * if we get a NULL pointer, this means we will need to add
3714 * the offset.
3715 */
3716 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
3717 src_offset);
3718 if (IS_ERR(flex_pit))
3719 return PTR_ERR(flex_pit);
3720
3721 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
3722 * packet types, and thus we need to program both L3 and L4
3723 * flexible values. These must have identical flexible index,
3724 * as otherwise we can't correctly program the input set. So
3725 * we'll find both an L3 and L4 index and make sure they are
3726 * the same.
3727 */
3728 if (flex_l3) {
3729 l3_flex_pit =
3730 i40e_find_flex_offset(&pf->l3_flex_pit_list,
3731 src_offset);
3732 if (IS_ERR(l3_flex_pit))
3733 return PTR_ERR(l3_flex_pit);
3734
3735 if (flex_pit) {
3736 /* If we already had a matching L4 entry, we
3737 * need to make sure that the L3 entry we
3738 * obtained uses the same index.
3739 */
3740 if (l3_flex_pit) {
3741 if (l3_flex_pit->pit_index !=
3742 flex_pit->pit_index) {
3743 return -EINVAL;
3744 }
3745 } else {
3746 new_flex_offset = true;
3747 }
3748 } else {
3749 flex_pit = l3_flex_pit;
3750 }
3751 }
3752
3753 /* If we didn't find an existing flex offset, we need to
3754 * program a new one. However, we don't immediately program it
3755 * here because we will wait to program until after we check
3756 * that it is safe to change the input set.
3757 */
3758 if (!flex_pit) {
3759 new_flex_offset = true;
3760 pit_index = i40e_unused_pit_index(pf);
3761 } else {
3762 pit_index = flex_pit->pit_index;
3763 }
3764
3765 /* Update the mask with the new offset */
3766 new_mask |= i40e_pit_index_to_mask(pit_index);
3767 }
3768
3769 /* If the mask and flexible filter offsets for this filter match the
3770 * currently programmed values we don't need any input set change, so
3771 * this filter is safe to install.
3772 */
3773 if (new_mask == current_mask && !new_flex_offset)
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3774 return 0;
3775
3776 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
3777 i40e_flow_str(fsp));
3778 i40e_print_input_set(vsi, current_mask, new_mask);
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3779 if (new_flex_offset) {
3780 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
3781 pit_index, src_offset);
3782 }
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3783
3784 /* Hardware input sets are global across multiple ports, so even the
3785 * main port cannot change them when in MFP mode as this would impact
3786 * any filters on the other ports.
3787 */
3788 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3789 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3790 return -EOPNOTSUPP;
Jacob Keller9229e992017-02-06 14:38:47 -0800[diff] [blame]3791 }
3792
3793 /* This filter requires us to update the input set. However, hardware
3794 * only supports one input set per flow type, and does not support
3795 * separate masks for each filter. This means that we can only support
3796 * a single mask for all filters of a specific type.
3797 *
3798 * If we have preexisting filters, they obviously depend on the
3799 * current programmed input set. Display a diagnostic message in this
3800 * case explaining why the filter could not be accepted.
3801 */
3802 if (*fdir_filter_count) {
3803 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
3804 i40e_flow_str(fsp),
3805 *fdir_filter_count);
3806 return -EOPNOTSUPP;
3807 }
3808
3809 i40e_write_fd_input_set(pf, index, new_mask);
Jacob Keller36777d92017-03-07 15:05:23 -0800[diff] [blame]3810
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3811 /* Add the new offset and update table, if necessary */
3812 if (new_flex_offset) {
3813 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
3814 pit_index);
3815 if (err)
3816 return err;
3817
3818 if (flex_l3) {
3819 err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
3820 src_offset,
3821 pit_index);
3822 if (err)
3823 return err;
3824 }
3825
3826 i40e_reprogram_flex_pit(pf);
3827 }
3828
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3829 return 0;
3830}
3831
3832/**
Anjali Singhai Jain1eaa3842014-03-06 08:59:59 +0000[diff] [blame]3833 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3834 * @vsi: pointer to the targeted VSI
3835 * @cmd: command to get or set RX flow classification rules
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3836 *
Anjali Singhai Jain1eaa3842014-03-06 08:59:59 +0000[diff] [blame]3837 * Add Flow Director filters for a specific flow spec based on their
3838 * protocol. Returns 0 if the filters were successfully added.
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3839 **/
Anjali Singhai Jain1eaa3842014-03-06 08:59:59 +0000[diff] [blame]3840static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
3841 struct ethtool_rxnfc *cmd)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3842{
Jacob Kellere7930952017-02-06 14:38:49 -0800[diff] [blame]3843 struct i40e_rx_flow_userdef userdef;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3844 struct ethtool_rx_flow_spec *fsp;
3845 struct i40e_fdir_filter *input;
Jacob Keller43b15692017-02-06 14:38:48 -0800[diff] [blame]3846 u16 dest_vsi = 0, q_index = 0;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3847 struct i40e_pf *pf;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3848 int ret = -EINVAL;
Jacob Keller43b15692017-02-06 14:38:48 -0800[diff] [blame]3849 u8 dest_ctl;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3850
3851 if (!vsi)
3852 return -EINVAL;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3853 pf = vsi->back;
3854
Anjali Singhai Jain55a5e602014-02-12 06:33:25 +0000[diff] [blame]3855 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3856 return -EOPNOTSUPP;
3857
Jacob Keller47994c12017-04-19 09:25:57 -0400[diff] [blame]3858 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED)
Anjali Singhai Jain55a5e602014-02-12 06:33:25 +0000[diff] [blame]3859 return -ENOSPC;
3860
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]3861 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3862 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
Anjali Singhai Jain60793f4a2014-07-09 07:46:23 +0000[diff] [blame]3863 return -EBUSY;
3864
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]3865 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
Anjali Singhai Jain1e1be8f2014-07-10 08:03:26 +0000[diff] [blame]3866 return -EBUSY;
3867
Anjali Singhai Jain55a5e602014-02-12 06:33:25 +0000[diff] [blame]3868 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
3869
Jacob Kellere7930952017-02-06 14:38:49 -0800[diff] [blame]3870 /* Parse the user-defined field */
3871 if (i40e_parse_rx_flow_user_data(fsp, &userdef))
3872 return -EINVAL;
3873
Jacob Keller1ec8dea2017-02-06 14:39:12 -0800[diff] [blame]3874 /* Extended MAC field is not supported */
3875 if (fsp->flow_type & FLOW_MAC_EXT)
3876 return -EINVAL;
3877
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3878 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
Jacob Kellerfaa16e02017-03-07 15:05:22 -0800[diff] [blame]3879 if (ret)
3880 return ret;
3881
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3882 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
3883 pf->hw.func_caps.fd_filters_guaranteed)) {
3884 return -EINVAL;
3885 }
3886
Jacob Keller43b15692017-02-06 14:38:48 -0800[diff] [blame]3887 /* ring_cookie is either the drop index, or is a mask of the queue
3888 * index and VF id we wish to target.
3889 */
3890 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
3891 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
3892 } else {
3893 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
3894 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
3895
3896 if (!vf) {
3897 if (ring >= vsi->num_queue_pairs)
3898 return -EINVAL;
3899 dest_vsi = vsi->id;
3900 } else {
3901 /* VFs are zero-indexed, so we subtract one here */
3902 vf--;
3903
3904 if (vf >= pf->num_alloc_vfs)
3905 return -EINVAL;
3906 if (ring >= pf->vf[vf].num_queue_pairs)
3907 return -EINVAL;
3908 dest_vsi = pf->vf[vf].lan_vsi_id;
3909 }
3910 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
3911 q_index = ring;
3912 }
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3913
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3914 input = kzalloc(sizeof(*input), GFP_KERNEL);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3915
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3916 if (!input)
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3917 return -ENOMEM;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3918
3919 input->fd_id = fsp->location;
Jacob Keller43b15692017-02-06 14:38:48 -0800[diff] [blame]3920 input->q_index = q_index;
3921 input->dest_vsi = dest_vsi;
3922 input->dest_ctl = dest_ctl;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3923 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
Anjali Singhai Jain0bf4b1b2015-04-16 20:06:02 -0400[diff] [blame]3924 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
Jacob Keller43b15692017-02-06 14:38:48 -0800[diff] [blame]3925 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
3926 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
Jacob Kellere7930952017-02-06 14:38:49 -0800[diff] [blame]3927 input->flow_type = fsp->flow_type & ~FLOW_EXT;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3928 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
Anjali Singhai Jain04b73bd2014-05-22 06:31:41 +0000[diff] [blame]3929
3930 /* Reverse the src and dest notion, since the HW expects them to be from
3931 * Tx perspective where as the input from user is from Rx filter view.
3932 */
3933 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
3934 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
Jacob Keller8ce43dc2017-02-06 14:38:39 -0800[diff] [blame]3935 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
3936 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3937
Jacob Keller0e588de2017-02-06 14:38:50 -0800[diff] [blame]3938 if (userdef.flex_filter) {
3939 input->flex_filter = true;
3940 input->flex_word = cpu_to_be16(userdef.flex_word);
3941 input->flex_offset = userdef.flex_offset;
3942 }
3943
Jacob Keller01016da2017-02-06 14:38:40 -0800[diff] [blame]3944 /* Add the input filter to the fdir_input_list, possibly replacing
3945 * a previous filter. Do not free the input structure after adding it
3946 * to the list as this would cause a use-after-free bug.
3947 */
3948 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
Patryk Małekca6e1d02017-12-27 07:32:31 -0500[diff] [blame]3949 ret = i40e_add_del_fdir(vsi, input, true);
3950 if (ret)
3951 goto remove_sw_rule;
Jacob Keller01016da2017-02-06 14:38:40 -0800[diff] [blame]3952 return 0;
3953
Patryk Małekca6e1d02017-12-27 07:32:31 -0500[diff] [blame]3954remove_sw_rule:
3955 hlist_del(&input->fdir_node);
3956 pf->fdir_pf_active_filters--;
Jacob Keller01016da2017-02-06 14:38:40 -0800[diff] [blame]3957 kfree(input);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3958 return ret;
3959}
Jesse Brandeburg8fb905b2014-01-17 15:36:33 -0800[diff] [blame]3960
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3961/**
3962 * i40e_set_rxnfc - command to set RX flow classification rules
3963 * @netdev: network interface device structure
3964 * @cmd: ethtool rxnfc command
3965 *
3966 * Returns Success if the command is supported.
3967 **/
3968static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
3969{
3970 struct i40e_netdev_priv *np = netdev_priv(netdev);
3971 struct i40e_vsi *vsi = np->vsi;
3972 struct i40e_pf *pf = vsi->back;
3973 int ret = -EOPNOTSUPP;
3974
3975 switch (cmd->cmd) {
3976 case ETHTOOL_SRXFH:
3977 ret = i40e_set_rss_hash_opt(pf, cmd);
3978 break;
3979 case ETHTOOL_SRXCLSRLINS:
Anjali Singhai Jain1eaa3842014-03-06 08:59:59 +0000[diff] [blame]3980 ret = i40e_add_fdir_ethtool(vsi, cmd);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3981 break;
3982 case ETHTOOL_SRXCLSRLDEL:
Joseph Gasparakis17a73f62014-02-12 01:45:30 +0000[diff] [blame]3983 ret = i40e_del_fdir_entry(vsi, cmd);
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]3984 break;
3985 default:
3986 break;
3987 }
3988
3989 return ret;
3990}
3991
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]3992/**
3993 * i40e_max_channels - get Max number of combined channels supported
3994 * @vsi: vsi pointer
3995 **/
3996static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
3997{
3998 /* TODO: This code assumes DCB and FD is disabled for now. */
3999 return vsi->alloc_queue_pairs;
4000}
4001
4002/**
4003 * i40e_get_channels - Get the current channels enabled and max supported etc.
4004 * @netdev: network interface device structure
4005 * @ch: ethtool channels structure
4006 *
4007 * We don't support separate tx and rx queues as channels. The other count
4008 * represents how many queues are being used for control. max_combined counts
4009 * how many queue pairs we can support. They may not be mapped 1 to 1 with
4010 * q_vectors since we support a lot more queue pairs than q_vectors.
4011 **/
4012static void i40e_get_channels(struct net_device *dev,
4013 struct ethtool_channels *ch)
4014{
4015 struct i40e_netdev_priv *np = netdev_priv(dev);
4016 struct i40e_vsi *vsi = np->vsi;
4017 struct i40e_pf *pf = vsi->back;
4018
4019 /* report maximum channels */
4020 ch->max_combined = i40e_max_channels(vsi);
4021
4022 /* report info for other vector */
Jesse Brandeburg60ea5f82014-01-17 15:36:34 -0800[diff] [blame]4023 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4024 ch->max_other = ch->other_count;
4025
4026 /* Note: This code assumes DCB is disabled for now. */
4027 ch->combined_count = vsi->num_queue_pairs;
4028}
4029
4030/**
4031 * i40e_set_channels - Set the new channels count.
4032 * @netdev: network interface device structure
4033 * @ch: ethtool channels structure
4034 *
4035 * The new channels count may not be the same as requested by the user
4036 * since it gets rounded down to a power of 2 value.
4037 **/
4038static int i40e_set_channels(struct net_device *dev,
4039 struct ethtool_channels *ch)
4040{
Jacob Keller59826d92016-07-27 12:02:35 -0700[diff] [blame]4041 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4042 struct i40e_netdev_priv *np = netdev_priv(dev);
4043 unsigned int count = ch->combined_count;
4044 struct i40e_vsi *vsi = np->vsi;
4045 struct i40e_pf *pf = vsi->back;
Jacob Keller59826d92016-07-27 12:02:35 -0700[diff] [blame]4046 struct i40e_fdir_filter *rule;
4047 struct hlist_node *node2;
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4048 int new_count;
Jacob Keller59826d92016-07-27 12:02:35 -0700[diff] [blame]4049 int err = 0;
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4050
4051 /* We do not support setting channels for any other VSI at present */
4052 if (vsi->type != I40E_VSI_MAIN)
4053 return -EINVAL;
4054
Amritha Nambiara9ce82f2017-09-07 04:00:22 -0700[diff] [blame]4055 /* We do not support setting channels via ethtool when TCs are
4056 * configured through mqprio
4057 */
4058 if (pf->flags & I40E_FLAG_TC_MQPRIO)
4059 return -EINVAL;
4060
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4061 /* verify they are not requesting separate vectors */
4062 if (!count || ch->rx_count || ch->tx_count)
4063 return -EINVAL;
4064
4065 /* verify other_count has not changed */
Jesse Brandeburg60ea5f82014-01-17 15:36:34 -0800[diff] [blame]4066 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4067 return -EINVAL;
4068
4069 /* verify the number of channels does not exceed hardware limits */
4070 if (count > i40e_max_channels(vsi))
4071 return -EINVAL;
4072
Jacob Keller59826d92016-07-27 12:02:35 -0700[diff] [blame]4073 /* verify that the number of channels does not invalidate any current
4074 * flow director rules
4075 */
4076 hlist_for_each_entry_safe(rule, node2,
4077 &pf->fdir_filter_list, fdir_node) {
4078 if (rule->dest_ctl != drop && count <= rule->q_index) {
4079 dev_warn(&pf->pdev->dev,
4080 "Existing user defined filter %d assigns flow to queue %d\n",
4081 rule->fd_id, rule->q_index);
4082 err = -EINVAL;
4083 }
4084 }
4085
4086 if (err) {
4087 dev_err(&pf->pdev->dev,
4088 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
4089 count);
4090 return err;
4091 }
4092
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4093 /* update feature limits from largest to smallest supported values */
4094 /* TODO: Flow director limit, DCB etc */
4095
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4096 /* use rss_reconfig to rebuild with new queue count and update traffic
4097 * class queue mapping
4098 */
4099 new_count = i40e_reconfig_rss_queues(pf, count);
Anjali Singhai Jain5f90f422013-12-21 05:44:43 +0000[diff] [blame]4100 if (new_count > 0)
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4101 return 0;
4102 else
4103 return -EINVAL;
4104}
4105
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4106/**
4107 * i40e_get_rxfh_key_size - get the RSS hash key size
4108 * @netdev: network interface device structure
4109 *
4110 * Returns the table size.
4111 **/
4112static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
4113{
4114 return I40E_HKEY_ARRAY_SIZE;
4115}
4116
4117/**
4118 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
4119 * @netdev: network interface device structure
4120 *
4121 * Returns the table size.
4122 **/
4123static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
4124{
4125 return I40E_HLUT_ARRAY_SIZE;
4126}
4127
Alan Brady21675bd2017-10-05 14:53:33 -0700[diff] [blame]4128/**
4129 * i40e_get_rxfh - get the rx flow hash indirection table
4130 * @netdev: network interface device structure
4131 * @indir: indirection table
4132 * @key: hash key
4133 * @hfunc: hash function
4134 *
4135 * Reads the indirection table directly from the hardware. Returns 0 on
4136 * success.
4137 **/
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4138static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
4139 u8 *hfunc)
4140{
4141 struct i40e_netdev_priv *np = netdev_priv(netdev);
4142 struct i40e_vsi *vsi = np->vsi;
Helin Zhang043dd652015-10-21 19:56:23 -0400[diff] [blame]4143 u8 *lut, *seed = NULL;
4144 int ret;
4145 u16 i;
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4146
4147 if (hfunc)
4148 *hfunc = ETH_RSS_HASH_TOP;
4149
4150 if (!indir)
4151 return 0;
4152
Helin Zhang043dd652015-10-21 19:56:23 -0400[diff] [blame]4153 seed = key;
4154 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4155 if (!lut)
4156 return -ENOMEM;
4157 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
4158 if (ret)
4159 goto out;
4160 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4161 indir[i] = (u32)(lut[i]);
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4162
Helin Zhang043dd652015-10-21 19:56:23 -0400[diff] [blame]4163out:
4164 kfree(lut);
4165
4166 return ret;
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4167}
4168
4169/**
4170 * i40e_set_rxfh - set the rx flow hash indirection table
4171 * @netdev: network interface device structure
4172 * @indir: indirection table
4173 * @key: hash key
4174 *
Mitch Williamscd494fb2015-07-10 19:36:04 -0400[diff] [blame]4175 * Returns -EINVAL if the table specifies an invalid queue id, otherwise
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4176 * returns 0 after programming the table.
4177 **/
4178static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
4179 const u8 *key, const u8 hfunc)
4180{
4181 struct i40e_netdev_priv *np = netdev_priv(netdev);
4182 struct i40e_vsi *vsi = np->vsi;
Alan Bradyf1582352016-08-24 11:33:46 -0700[diff] [blame]4183 struct i40e_pf *pf = vsi->back;
Helin Zhang28c58692015-10-26 19:44:27 -0400[diff] [blame]4184 u8 *seed = NULL;
Helin Zhang043dd652015-10-21 19:56:23 -0400[diff] [blame]4185 u16 i;
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4186
4187 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
4188 return -EOPNOTSUPP;
4189
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4190 if (key) {
Helin Zhang28c58692015-10-26 19:44:27 -0400[diff] [blame]4191 if (!vsi->rss_hkey_user) {
4192 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
4193 GFP_KERNEL);
4194 if (!vsi->rss_hkey_user)
4195 return -ENOMEM;
4196 }
4197 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
4198 seed = vsi->rss_hkey_user;
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4199 }
Helin Zhang28c58692015-10-26 19:44:27 -0400[diff] [blame]4200 if (!vsi->rss_lut_user) {
4201 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4202 if (!vsi->rss_lut_user)
4203 return -ENOMEM;
4204 }
Helin Zhang043dd652015-10-21 19:56:23 -0400[diff] [blame]4205
Helin Zhang28c58692015-10-26 19:44:27 -0400[diff] [blame]4206 /* Each 32 bits pointed by 'indir' is stored with a lut entry */
Alan Bradyf1582352016-08-24 11:33:46 -0700[diff] [blame]4207 if (indir)
4208 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4209 vsi->rss_lut_user[i] = (u8)(indir[i]);
4210 else
4211 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
4212 vsi->rss_size);
Helin Zhang28c58692015-10-26 19:44:27 -0400[diff] [blame]4213
4214 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
4215 I40E_HLUT_ARRAY_SIZE);
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4216}
4217
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]4218/**
4219 * i40e_get_priv_flags - report device private flags
4220 * @dev: network interface device structure
4221 *
4222 * The get string set count and the string set should be matched for each
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4223 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]4224 * array.
4225 *
4226 * Returns a u32 bitmap of flags.
4227 **/
Jesse Brandeburg5bbc3302015-02-26 16:15:20 +0000[diff] [blame]4228static u32 i40e_get_priv_flags(struct net_device *dev)
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]4229{
4230 struct i40e_netdev_priv *np = netdev_priv(dev);
4231 struct i40e_vsi *vsi = np->vsi;
4232 struct i40e_pf *pf = vsi->back;
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4233 u32 i, j, ret_flags = 0;
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]4234
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4235 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4236 const struct i40e_priv_flags *priv_flags;
4237
4238 priv_flags = &i40e_gstrings_priv_flags[i];
4239
4240 if (priv_flags->flag & pf->flags)
4241 ret_flags |= BIT(i);
4242 }
4243
4244 if (pf->hw.pf_id != 0)
4245 return ret_flags;
4246
4247 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4248 const struct i40e_priv_flags *priv_flags;
4249
4250 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4251
4252 if (priv_flags->flag & pf->flags)
4253 ret_flags |= BIT(i + j);
Anjali Singhai Jainb5569892016-05-03 15:13:12 -0700[diff] [blame]4254 }
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]4255
4256 return ret_flags;
4257}
4258
Shannon Nelson9ac77262015-08-27 11:42:40 -0400[diff] [blame]4259/**
4260 * i40e_set_priv_flags - set private flags
4261 * @dev: network interface device structure
4262 * @flags: bit flags to be set
4263 **/
4264static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
4265{
4266 struct i40e_netdev_priv *np = netdev_priv(dev);
4267 struct i40e_vsi *vsi = np->vsi;
4268 struct i40e_pf *pf = vsi->back;
Alice Michael60f481b2017-12-27 08:17:50 -0500[diff] [blame^]4269 u64 orig_flags, new_flags, changed_flags;
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4270 u32 i, j;
Jesse Brandeburg827de392015-11-06 15:26:07 -0800[diff] [blame]4271
Jacob Keller841c9502017-06-23 04:24:50 -0400[diff] [blame]4272 orig_flags = READ_ONCE(pf->flags);
4273 new_flags = orig_flags;
Jesse Brandeburg827de392015-11-06 15:26:07 -0800[diff] [blame]4274
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4275 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4276 const struct i40e_priv_flags *priv_flags;
Shannon Nelson9ac77262015-08-27 11:42:40 -0400[diff] [blame]4277
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4278 priv_flags = &i40e_gstrings_priv_flags[i];
4279
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4280 if (flags & BIT(i))
Jacob Keller841c9502017-06-23 04:24:50 -0400[diff] [blame]4281 new_flags |= priv_flags->flag;
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4282 else
Jacob Keller841c9502017-06-23 04:24:50 -0400[diff] [blame]4283 new_flags &= ~(priv_flags->flag);
4284
4285 /* If this is a read-only flag, it can't be changed */
4286 if (priv_flags->read_only &&
4287 ((orig_flags ^ new_flags) & ~BIT(i)))
4288 return -EOPNOTSUPP;
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4289 }
4290
4291 if (pf->hw.pf_id != 0)
4292 goto flags_complete;
4293
4294 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4295 const struct i40e_priv_flags *priv_flags;
4296
4297 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4298
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4299 if (flags & BIT(i + j))
Jacob Keller841c9502017-06-23 04:24:50 -0400[diff] [blame]4300 new_flags |= priv_flags->flag;
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4301 else
Jacob Keller841c9502017-06-23 04:24:50 -0400[diff] [blame]4302 new_flags &= ~(priv_flags->flag);
4303
4304 /* If this is a read-only flag, it can't be changed */
4305 if (priv_flags->read_only &&
4306 ((orig_flags ^ new_flags) & ~BIT(i)))
4307 return -EOPNOTSUPP;
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4308 }
4309
4310flags_complete:
Jacob Keller841c9502017-06-23 04:24:50 -0400[diff] [blame]4311 /* Before we finalize any flag changes, we need to perform some
4312 * checks to ensure that the changes are supported and safe.
4313 */
4314
4315 /* ATR eviction is not supported on all devices */
4316 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
4317 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
4318 return -EOPNOTSUPP;
4319
4320 /* Compare and exchange the new flags into place. If we failed, that
Jacob Kellerb74f5712017-09-01 13:54:07 -0700[diff] [blame]4321 * is if cmpxchg returns anything but the old value, this means that
Jacob Keller841c9502017-06-23 04:24:50 -0400[diff] [blame]4322 * something else has modified the flags variable since we copied it
4323 * originally. We'll just punt with an error and log something in the
4324 * message buffer.
4325 */
Alice Michael60f481b2017-12-27 08:17:50 -0500[diff] [blame^]4326 if (cmpxchg64(&pf->flags, orig_flags, new_flags) != orig_flags) {
Jacob Keller841c9502017-06-23 04:24:50 -0400[diff] [blame]4327 dev_warn(&pf->pdev->dev,
4328 "Unable to update pf->flags as it was modified by another thread...\n");
4329 return -EAGAIN;
4330 }
4331
4332 changed_flags = orig_flags ^ new_flags;
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4333
4334 /* Process any additional changes needed as a result of flag changes.
4335 * The changed_flags value reflects the list of bits that were
4336 * changed in the code above.
Jesse Brandeburgef171782015-09-03 17:18:49 -0400[diff] [blame]4337 */
Jacob Keller234dc4e2016-09-06 18:05:09 -0700[diff] [blame]4338
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4339 /* Flush current ATR settings if ATR was disabled */
4340 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
4341 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) {
Jacob Keller47994c12017-04-19 09:25:57 -0400[diff] [blame]4342 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED;
Jacob Keller0da36b92017-04-19 09:25:55 -0400[diff] [blame]4343 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
Jesse Brandeburgef171782015-09-03 17:18:49 -0400[diff] [blame]4344 }
4345
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4346 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
4347 u16 sw_flags = 0, valid_flags = 0;
4348 int ret;
4349
Anjali Singhai Jainb5569892016-05-03 15:13:12 -0700[diff] [blame]4350 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
4351 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4352 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4353 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
Amritha Nambiar5efe0c62017-10-27 02:35:45 -0700[diff] [blame]4354 0, NULL);
Anjali Singhai Jainb5569892016-05-03 15:13:12 -0700[diff] [blame]4355 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
4356 dev_info(&pf->pdev->dev,
4357 "couldn't set switch config bits, err %s aq_err %s\n",
4358 i40e_stat_str(&pf->hw, ret),
4359 i40e_aq_str(&pf->hw,
4360 pf->hw.aq.asq_last_status));
4361 /* not a fatal problem, just keep going */
4362 }
4363 }
4364
Alexander Duyckaca955d2017-03-10 12:22:01 -0800[diff] [blame]4365 /* Issue reset to cause things to take effect, as additional bits
4366 * are added we will need to create a mask of bits requiring reset
4367 */
Mitch Williams64615b52017-08-29 05:32:30 -0400[diff] [blame]4368 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
4369 I40E_FLAG_LEGACY_RX |
4370 I40E_FLAG_SOURCE_PRUNING_DISABLED))
Maciej Sosin373149f2017-04-05 07:50:55 -0400[diff] [blame]4371 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
Jesse Brandeburg827de392015-11-06 15:26:07 -0800[diff] [blame]4372
Shannon Nelson9ac77262015-08-27 11:42:40 -0400[diff] [blame]4373 return 0;
4374}
4375
Filip Sadowski9c0e5ca2017-08-22 06:57:44 -0400[diff] [blame]4376/**
4377 * i40e_get_module_info - get (Q)SFP+ module type info
4378 * @netdev: network interface device structure
4379 * @modinfo: module EEPROM size and layout information structure
4380 **/
4381static int i40e_get_module_info(struct net_device *netdev,
4382 struct ethtool_modinfo *modinfo)
4383{
4384 struct i40e_netdev_priv *np = netdev_priv(netdev);
4385 struct i40e_vsi *vsi = np->vsi;
4386 struct i40e_pf *pf = vsi->back;
4387 struct i40e_hw *hw = &pf->hw;
4388 u32 sff8472_comp = 0;
4389 u32 sff8472_swap = 0;
4390 u32 sff8636_rev = 0;
4391 i40e_status status;
4392 u32 type = 0;
4393
4394 /* Check if firmware supports reading module EEPROM. */
4395 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) {
4396 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
4397 return -EINVAL;
4398 }
4399
4400 status = i40e_update_link_info(hw);
4401 if (status)
4402 return -EIO;
4403
4404 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
4405 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
4406 return -EINVAL;
4407 }
4408
4409 type = hw->phy.link_info.module_type[0];
4410
4411 switch (type) {
4412 case I40E_MODULE_TYPE_SFP:
4413 status = i40e_aq_get_phy_register(hw,
4414 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4415 I40E_I2C_EEPROM_DEV_ADDR,
4416 I40E_MODULE_SFF_8472_COMP,
4417 &sff8472_comp, NULL);
4418 if (status)
4419 return -EIO;
4420
4421 status = i40e_aq_get_phy_register(hw,
4422 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4423 I40E_I2C_EEPROM_DEV_ADDR,
4424 I40E_MODULE_SFF_8472_SWAP,
4425 &sff8472_swap, NULL);
4426 if (status)
4427 return -EIO;
4428
4429 /* Check if the module requires address swap to access
4430 * the other EEPROM memory page.
4431 */
4432 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
4433 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
4434 modinfo->type = ETH_MODULE_SFF_8079;
4435 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
4436 } else if (sff8472_comp == 0x00) {
4437 /* Module is not SFF-8472 compliant */
4438 modinfo->type = ETH_MODULE_SFF_8079;
4439 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
4440 } else {
4441 modinfo->type = ETH_MODULE_SFF_8472;
4442 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
4443 }
4444 break;
4445 case I40E_MODULE_TYPE_QSFP_PLUS:
4446 /* Read from memory page 0. */
4447 status = i40e_aq_get_phy_register(hw,
4448 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4449 0,
4450 I40E_MODULE_REVISION_ADDR,
4451 &sff8636_rev, NULL);
4452 if (status)
4453 return -EIO;
4454 /* Determine revision compliance byte */
4455 if (sff8636_rev > 0x02) {
4456 /* Module is SFF-8636 compliant */
4457 modinfo->type = ETH_MODULE_SFF_8636;
4458 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4459 } else {
4460 modinfo->type = ETH_MODULE_SFF_8436;
4461 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4462 }
4463 break;
4464 case I40E_MODULE_TYPE_QSFP28:
4465 modinfo->type = ETH_MODULE_SFF_8636;
4466 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4467 break;
4468 default:
4469 netdev_err(vsi->netdev, "Module type unrecognized\n");
4470 return -EINVAL;
4471 }
4472 return 0;
4473}
4474
4475/**
4476 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
4477 * @netdev: network interface device structure
4478 * @ee: EEPROM dump request structure
4479 * @data: buffer to be filled with EEPROM contents
4480 **/
4481static int i40e_get_module_eeprom(struct net_device *netdev,
4482 struct ethtool_eeprom *ee,
4483 u8 *data)
4484{
4485 struct i40e_netdev_priv *np = netdev_priv(netdev);
4486 struct i40e_vsi *vsi = np->vsi;
4487 struct i40e_pf *pf = vsi->back;
4488 struct i40e_hw *hw = &pf->hw;
4489 bool is_sfp = false;
4490 i40e_status status;
4491 u32 value = 0;
4492 int i;
4493
4494 if (!ee || !ee->len || !data)
4495 return -EINVAL;
4496
4497 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
4498 is_sfp = true;
4499
4500 for (i = 0; i < ee->len; i++) {
4501 u32 offset = i + ee->offset;
4502 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
4503
4504 /* Check if we need to access the other memory page */
4505 if (is_sfp) {
4506 if (offset >= ETH_MODULE_SFF_8079_LEN) {
4507 offset -= ETH_MODULE_SFF_8079_LEN;
4508 addr = I40E_I2C_EEPROM_DEV_ADDR2;
4509 }
4510 } else {
4511 while (offset >= ETH_MODULE_SFF_8436_LEN) {
4512 /* Compute memory page number and offset. */
4513 offset -= ETH_MODULE_SFF_8436_LEN / 2;
4514 addr++;
4515 }
4516 }
4517
4518 status = i40e_aq_get_phy_register(hw,
4519 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4520 addr, offset, &value, NULL);
4521 if (status)
4522 return -EIO;
4523 data[i] = value;
4524 }
4525 return 0;
4526}
4527
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]4528static const struct ethtool_ops i40e_ethtool_ops = {
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]4529 .get_drvinfo = i40e_get_drvinfo,
4530 .get_regs_len = i40e_get_regs_len,
4531 .get_regs = i40e_get_regs,
4532 .nway_reset = i40e_nway_reset,
4533 .get_link = ethtool_op_get_link,
4534 .get_wol = i40e_get_wol,
Shannon Nelson8e2773a2013-11-28 06:39:22 +0000[diff] [blame]4535 .set_wol = i40e_set_wol,
Shannon Nelsoncd552cb2014-07-09 07:46:09 +0000[diff] [blame]4536 .set_eeprom = i40e_set_eeprom,
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]4537 .get_eeprom_len = i40e_get_eeprom_len,
4538 .get_eeprom = i40e_get_eeprom,
4539 .get_ringparam = i40e_get_ringparam,
4540 .set_ringparam = i40e_set_ringparam,
4541 .get_pauseparam = i40e_get_pauseparam,
Catherine Sullivan2becc352014-06-04 08:45:27 +0000[diff] [blame]4542 .set_pauseparam = i40e_set_pauseparam,
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]4543 .get_msglevel = i40e_get_msglevel,
4544 .set_msglevel = i40e_set_msglevel,
4545 .get_rxnfc = i40e_get_rxnfc,
4546 .set_rxnfc = i40e_set_rxnfc,
4547 .self_test = i40e_diag_test,
4548 .get_strings = i40e_get_strings,
4549 .set_phys_id = i40e_set_phys_id,
4550 .get_sset_count = i40e_get_sset_count,
4551 .get_ethtool_stats = i40e_get_ethtool_stats,
4552 .get_coalesce = i40e_get_coalesce,
4553 .set_coalesce = i40e_set_coalesce,
Mitch A Williamsb29e13b2015-03-05 04:14:40 +0000[diff] [blame]4554 .get_rxfh_key_size = i40e_get_rxfh_key_size,
4555 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
4556 .get_rxfh = i40e_get_rxfh,
4557 .set_rxfh = i40e_set_rxfh,
Anjali Singhai Jain4b7820c2013-11-26 11:59:30 +0000[diff] [blame]4558 .get_channels = i40e_get_channels,
4559 .set_channels = i40e_set_channels,
Filip Sadowski9c0e5ca2017-08-22 06:57:44 -0400[diff] [blame]4560 .get_module_info = i40e_get_module_info,
4561 .get_module_eeprom = i40e_get_module_eeprom,
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]4562 .get_ts_info = i40e_get_ts_info,
Greg Rose7e45ab42015-02-06 08:52:19 +0000[diff] [blame]4563 .get_priv_flags = i40e_get_priv_flags,
Shannon Nelson9ac77262015-08-27 11:42:40 -0400[diff] [blame]4564 .set_priv_flags = i40e_set_priv_flags,
Kan Liangbe280ba2016-02-19 09:24:05 -0500[diff] [blame]4565 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
Kan Liangf3757a42016-02-19 09:24:06 -0500[diff] [blame]4566 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
Philippe Reynesa7f90942017-02-04 22:05:06 +0100[diff] [blame]4567 .get_link_ksettings = i40e_get_link_ksettings,
4568 .set_link_ksettings = i40e_set_link_ksettings,
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]4569};
4570
4571void i40e_set_ethtool_ops(struct net_device *netdev)
4572{
Wilfried Klaebe7ad24ea2014-05-11 00:12:32 +0000[diff] [blame]4573 netdev->ethtool_ops = &i40e_ethtool_ops;
Jesse Brandeburgc7d05ca2013-09-11 08:39:56 +0000[diff] [blame]4574}