blob: 099719649c98ace5f492ec67d21462484f5447dc [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
24#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25#define IEEE80211_ACTION_CAT_HT 7
26#define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28static char *dev_info = "ath9k";
29
30MODULE_AUTHOR("Atheros Communications");
31MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33MODULE_LICENSE("Dual BSD/GPL");
34
35static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42};
43
44static int ath_get_channel(struct ath_softc *sc,
45 struct ieee80211_channel *chan)
46{
47 int i;
48
49 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
50 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
51 return i;
52 }
53
54 return -1;
55}
56
57static u32 ath_get_extchanmode(struct ath_softc *sc,
58 struct ieee80211_channel *chan)
59{
60 u32 chanmode = 0;
61 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
62 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63
64 switch (chan->band) {
65 case IEEE80211_BAND_2GHZ:
66 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
67 (tx_chan_width == ATH9K_HT_MACMODE_20))
68 chanmode = CHANNEL_G_HT20;
69 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
70 (tx_chan_width == ATH9K_HT_MACMODE_2040))
71 chanmode = CHANNEL_G_HT40PLUS;
72 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
73 (tx_chan_width == ATH9K_HT_MACMODE_2040))
74 chanmode = CHANNEL_G_HT40MINUS;
75 break;
76 case IEEE80211_BAND_5GHZ:
77 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
78 (tx_chan_width == ATH9K_HT_MACMODE_20))
79 chanmode = CHANNEL_A_HT20;
80 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
81 (tx_chan_width == ATH9K_HT_MACMODE_2040))
82 chanmode = CHANNEL_A_HT40PLUS;
83 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
84 (tx_chan_width == ATH9K_HT_MACMODE_2040))
85 chanmode = CHANNEL_A_HT40MINUS;
86 break;
87 default:
88 break;
89 }
90
91 return chanmode;
92}
93
94
95static int ath_setkey_tkip(struct ath_softc *sc,
96 struct ieee80211_key_conf *key,
97 struct ath9k_keyval *hk,
98 const u8 *addr)
99{
100 u8 *key_rxmic = NULL;
101 u8 *key_txmic = NULL;
102
103 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
104 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105
106 if (addr == NULL) {
107 /* Group key installation */
108 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
109 return ath_keyset(sc, key->keyidx, hk, addr);
110 }
111 if (!sc->sc_splitmic) {
112 /*
113 * data key goes at first index,
114 * the hal handles the MIC keys at index+64.
115 */
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
118 return ath_keyset(sc, key->keyidx, hk, addr);
119 }
120 /*
121 * TX key goes at first index, RX key at +32.
122 * The hal handles the MIC keys at index+64.
123 */
124 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
125 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
126 /* Txmic entry failed. No need to proceed further */
127 DPRINTF(sc, ATH_DBG_KEYCACHE,
128 "%s Setting TX MIC Key Failed\n", __func__);
129 return 0;
130 }
131
132 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
133 /* XXX delete tx key on failure? */
134 return ath_keyset(sc, key->keyidx+32, hk, addr);
135}
136
137static int ath_key_config(struct ath_softc *sc,
138 const u8 *addr,
139 struct ieee80211_key_conf *key)
140{
141 struct ieee80211_vif *vif;
142 struct ath9k_keyval hk;
143 const u8 *mac = NULL;
144 int ret = 0;
145 enum ieee80211_if_types opmode;
146
147 memset(&hk, 0, sizeof(hk));
148
149 switch (key->alg) {
150 case ALG_WEP:
151 hk.kv_type = ATH9K_CIPHER_WEP;
152 break;
153 case ALG_TKIP:
154 hk.kv_type = ATH9K_CIPHER_TKIP;
155 break;
156 case ALG_CCMP:
157 hk.kv_type = ATH9K_CIPHER_AES_CCM;
158 break;
159 default:
160 return -EINVAL;
161 }
162
163 hk.kv_len = key->keylen;
164 memcpy(hk.kv_val, key->key, key->keylen);
165
166 if (!sc->sc_vaps[0])
167 return -EIO;
168
169 vif = sc->sc_vaps[0]->av_if_data;
170 opmode = vif->type;
171
172 /*
173 * Strategy:
174 * For _M_STA mc tx, we will not setup a key at all since we never
175 * tx mc.
176 * _M_STA mc rx, we will use the keyID.
177 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
178 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
179 * peer node. BUT we will plumb a cleartext key so that we can do
180 * perSta default key table lookup in software.
181 */
182 if (is_broadcast_ether_addr(addr)) {
183 switch (opmode) {
184 case IEEE80211_IF_TYPE_STA:
185 /* default key: could be group WPA key
186 * or could be static WEP key */
187 mac = NULL;
188 break;
189 case IEEE80211_IF_TYPE_IBSS:
190 break;
191 case IEEE80211_IF_TYPE_AP:
192 break;
193 default:
194 ASSERT(0);
195 break;
196 }
197 } else {
198 mac = addr;
199 }
200
201 if (key->alg == ALG_TKIP)
202 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 else
204 ret = ath_keyset(sc, key->keyidx, &hk, mac);
205
206 if (!ret)
207 return -EIO;
208
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700209 return 0;
210}
211
212static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
213{
214#define ATH_MAX_NUM_KEYS 4
215 int freeslot;
216
217 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
218 ath_key_reset(sc, key->keyidx, freeslot);
219#undef ATH_MAX_NUM_KEYS
220}
221
222static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
223{
224/* Until mac80211 includes these fields */
225
226#define IEEE80211_HT_CAP_DSSSCCK40 0x1000
227#define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
228#define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
229
230 ht_info->ht_supported = 1;
231 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
232 |(u16)IEEE80211_HT_CAP_MIMO_PS
233 |(u16)IEEE80211_HT_CAP_SGI_40
234 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
235
236 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
237 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
238 /* setup supported mcs set */
239 memset(ht_info->supp_mcs_set, 0, 16);
240 ht_info->supp_mcs_set[0] = 0xff;
241 ht_info->supp_mcs_set[1] = 0xff;
242 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
243}
244
245static int ath_rate2idx(struct ath_softc *sc, int rate)
246{
247 int i = 0, cur_band, n_rates;
248 struct ieee80211_hw *hw = sc->hw;
249
250 cur_band = hw->conf.channel->band;
251 n_rates = sc->sbands[cur_band].n_bitrates;
252
253 for (i = 0; i < n_rates; i++) {
254 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
255 break;
256 }
257
258 /*
259 * NB:mac80211 validates rx rate index against the supported legacy rate
260 * index only (should be done against ht rates also), return the highest
261 * legacy rate index for rx rate which does not match any one of the
262 * supported basic and extended rates to make mac80211 happy.
263 * The following hack will be cleaned up once the issue with
264 * the rx rate index validation in mac80211 is fixed.
265 */
266 if (i == n_rates)
267 return n_rates - 1;
268 return i;
269}
270
271static void ath9k_rx_prepare(struct ath_softc *sc,
272 struct sk_buff *skb,
273 struct ath_recv_status *status,
274 struct ieee80211_rx_status *rx_status)
275{
276 struct ieee80211_hw *hw = sc->hw;
277 struct ieee80211_channel *curchan = hw->conf.channel;
278
279 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
280
281 rx_status->mactime = status->tsf;
282 rx_status->band = curchan->band;
283 rx_status->freq = curchan->center_freq;
284 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
285 rx_status->signal = rx_status->noise + status->rssi;
286 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
287 rx_status->antenna = status->antenna;
288 rx_status->qual = status->rssi * 100 / 64;
289
290 if (status->flags & ATH_RX_MIC_ERROR)
291 rx_status->flag |= RX_FLAG_MMIC_ERROR;
292 if (status->flags & ATH_RX_FCS_ERROR)
293 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
294
295 rx_status->flag |= RX_FLAG_TSFT;
296}
297
298static u8 parse_mpdudensity(u8 mpdudensity)
299{
300 /*
301 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
302 * 0 for no restriction
303 * 1 for 1/4 us
304 * 2 for 1/2 us
305 * 3 for 1 us
306 * 4 for 2 us
307 * 5 for 4 us
308 * 6 for 8 us
309 * 7 for 16 us
310 */
311 switch (mpdudensity) {
312 case 0:
313 return 0;
314 case 1:
315 case 2:
316 case 3:
317 /* Our lower layer calculations limit our precision to
318 1 microsecond */
319 return 1;
320 case 4:
321 return 2;
322 case 5:
323 return 4;
324 case 6:
325 return 8;
326 case 7:
327 return 16;
328 default:
329 return 0;
330 }
331}
332
333static int ath9k_start(struct ieee80211_hw *hw)
334{
335 struct ath_softc *sc = hw->priv;
336 struct ieee80211_channel *curchan = hw->conf.channel;
337 int error = 0, pos;
338
339 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
340 "initial channel: %d MHz\n", __func__, curchan->center_freq);
341
342 /* setup initial channel */
343
344 pos = ath_get_channel(sc, curchan);
345 if (pos == -1) {
346 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
347 return -EINVAL;
348 }
349
350 sc->sc_ah->ah_channels[pos].chanmode =
351 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
352
353 /* open ath_dev */
354 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
355 if (error) {
356 DPRINTF(sc, ATH_DBG_FATAL,
357 "%s: Unable to complete ath_open\n", __func__);
358 return error;
359 }
360
361 ieee80211_wake_queues(hw);
362 return 0;
363}
364
365static int ath9k_tx(struct ieee80211_hw *hw,
366 struct sk_buff *skb)
367{
368 struct ath_softc *sc = hw->priv;
369 int hdrlen, padsize;
Jouni Malinen69da6b82008-08-11 14:01:50 +0300370 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
371
372 /*
373 * As a temporary workaround, assign seq# here; this will likely need
374 * to be cleaned up to work better with Beacon transmission and virtual
375 * BSSes.
376 */
377 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
378 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
379 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
380 sc->seq_no += 0x10;
381 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
382 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
383 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700384
385 /* Add the padding after the header if this is not already done */
386 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
387 if (hdrlen & 3) {
388 padsize = hdrlen % 4;
389 if (skb_headroom(skb) < padsize)
390 return -1;
391 skb_push(skb, padsize);
392 memmove(skb->data, skb->data + padsize, hdrlen);
393 }
394
395 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
396 __func__,
397 skb);
398
399 if (ath_tx_start(sc, skb) != 0) {
400 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
401 dev_kfree_skb_any(skb);
402 /* FIXME: Check for proper return value from ATH_DEV */
403 return 0;
404 }
405
406 return 0;
407}
408
409static void ath9k_stop(struct ieee80211_hw *hw)
410{
411 struct ath_softc *sc = hw->priv;
412 int error;
413
414 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
415
416 error = ath_suspend(sc);
417 if (error)
418 DPRINTF(sc, ATH_DBG_CONFIG,
419 "%s: Device is no longer present\n", __func__);
420
421 ieee80211_stop_queues(hw);
422}
423
424static int ath9k_add_interface(struct ieee80211_hw *hw,
425 struct ieee80211_if_init_conf *conf)
426{
427 struct ath_softc *sc = hw->priv;
428 int error, ic_opmode = 0;
429
430 /* Support only vap for now */
431
432 if (sc->sc_nvaps)
433 return -ENOBUFS;
434
435 switch (conf->type) {
436 case IEEE80211_IF_TYPE_STA:
437 ic_opmode = ATH9K_M_STA;
438 break;
439 case IEEE80211_IF_TYPE_IBSS:
440 ic_opmode = ATH9K_M_IBSS;
441 break;
442 default:
443 DPRINTF(sc, ATH_DBG_FATAL,
444 "%s: Only STA and IBSS are supported currently\n",
445 __func__);
446 return -EOPNOTSUPP;
447 }
448
449 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
450 __func__,
451 ic_opmode);
452
453 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
454 if (error) {
455 DPRINTF(sc, ATH_DBG_FATAL,
456 "%s: Unable to attach vap, error: %d\n",
457 __func__, error);
458 return error;
459 }
460
461 return 0;
462}
463
464static void ath9k_remove_interface(struct ieee80211_hw *hw,
465 struct ieee80211_if_init_conf *conf)
466{
467 struct ath_softc *sc = hw->priv;
468 struct ath_vap *avp;
469 int error;
470
471 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
472
473 avp = sc->sc_vaps[0];
474 if (avp == NULL) {
475 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
476 __func__);
477 return;
478 }
479
480#ifdef CONFIG_SLOW_ANT_DIV
481 ath_slow_ant_div_stop(&sc->sc_antdiv);
482#endif
483
484 /* Update ratectrl */
485 ath_rate_newstate(sc, avp);
486
487 /* Reclaim beacon resources */
488 if (sc->sc_opmode == ATH9K_M_HOSTAP || sc->sc_opmode == ATH9K_M_IBSS) {
489 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
490 ath_beacon_return(sc, avp);
491 }
492
493 /* Set interrupt mask */
494 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
495 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
496 sc->sc_beacons = 0;
497
498 error = ath_vap_detach(sc, 0);
499 if (error)
500 DPRINTF(sc, ATH_DBG_FATAL,
501 "%s: Unable to detach vap, error: %d\n",
502 __func__, error);
503}
504
505static int ath9k_config(struct ieee80211_hw *hw,
506 struct ieee80211_conf *conf)
507{
508 struct ath_softc *sc = hw->priv;
509 struct ieee80211_channel *curchan = hw->conf.channel;
510 int pos;
511
512 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
513 __func__,
514 curchan->center_freq);
515
516 pos = ath_get_channel(sc, curchan);
517 if (pos == -1) {
518 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
519 return -EINVAL;
520 }
521
522 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +0530523 (curchan->band == IEEE80211_BAND_2GHZ) ?
524 CHANNEL_G : CHANNEL_A;
525
526 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
527 sc->sc_ah->ah_channels[pos].chanmode =
528 ath_get_extchanmode(sc, curchan);
529
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700530 sc->sc_config.txpowlimit = 2 * conf->power_level;
531
532 /* set h/w channel */
533 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
534 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
535 __func__);
536
537 return 0;
538}
539
540static int ath9k_config_interface(struct ieee80211_hw *hw,
541 struct ieee80211_vif *vif,
542 struct ieee80211_if_conf *conf)
543{
544 struct ath_softc *sc = hw->priv;
545 struct ath_vap *avp;
546 u32 rfilt = 0;
547 int error, i;
548 DECLARE_MAC_BUF(mac);
549
550 avp = sc->sc_vaps[0];
551 if (avp == NULL) {
552 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
553 __func__);
554 return -EINVAL;
555 }
556
557 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
558 !is_zero_ether_addr(conf->bssid)) {
559 switch (vif->type) {
560 case IEEE80211_IF_TYPE_STA:
561 case IEEE80211_IF_TYPE_IBSS:
562 /* Update ratectrl about the new state */
563 ath_rate_newstate(sc, avp);
564
565 /* Set rx filter */
566 rfilt = ath_calcrxfilter(sc);
567 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
568
569 /* Set BSSID */
570 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
571 sc->sc_curaid = 0;
572 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
573 sc->sc_curaid);
574
575 /* Set aggregation protection mode parameters */
576 sc->sc_config.ath_aggr_prot = 0;
577
578 /*
579 * Reset our TSF so that its value is lower than the
580 * beacon that we are trying to catch.
581 * Only then hw will update its TSF register with the
582 * new beacon. Reset the TSF before setting the BSSID
583 * to avoid allowing in any frames that would update
584 * our TSF only to have us clear it
585 * immediately thereafter.
586 */
587 ath9k_hw_reset_tsf(sc->sc_ah);
588
589 /* Disable BMISS interrupt when we're not associated */
590 ath9k_hw_set_interrupts(sc->sc_ah,
591 sc->sc_imask &
592 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
593 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
594
595 DPRINTF(sc, ATH_DBG_CONFIG,
596 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
597 __func__, rfilt,
598 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
599
600 /* need to reconfigure the beacon */
601 sc->sc_beacons = 0;
602
603 break;
604 default:
605 break;
606 }
607 }
608
609 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
610 (vif->type == IEEE80211_IF_TYPE_IBSS)) {
611 /*
612 * Allocate and setup the beacon frame.
613 *
614 * Stop any previous beacon DMA. This may be
615 * necessary, for example, when an ibss merge
616 * causes reconfiguration; we may be called
617 * with beacon transmission active.
618 */
619 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
620
621 error = ath_beacon_alloc(sc, 0);
622 if (error != 0)
623 return error;
624
625 ath_beacon_sync(sc, 0);
626 }
627
628 /* Check for WLAN_CAPABILITY_PRIVACY ? */
629 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
630 for (i = 0; i < IEEE80211_WEP_NKID; i++)
631 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
632 ath9k_hw_keysetmac(sc->sc_ah,
633 (u16)i,
634 sc->sc_curbssid);
635 }
636
637 /* Only legacy IBSS for now */
638 if (vif->type == IEEE80211_IF_TYPE_IBSS)
639 ath_update_chainmask(sc, 0);
640
641 return 0;
642}
643
644#define SUPPORTED_FILTERS \
645 (FIF_PROMISC_IN_BSS | \
646 FIF_ALLMULTI | \
647 FIF_CONTROL | \
648 FIF_OTHER_BSS | \
649 FIF_BCN_PRBRESP_PROMISC | \
650 FIF_FCSFAIL)
651
652/* Accept unicast, bcast and mcast frames */
653
654static void ath9k_configure_filter(struct ieee80211_hw *hw,
655 unsigned int changed_flags,
656 unsigned int *total_flags,
657 int mc_count,
658 struct dev_mc_list *mclist)
659{
660 struct ath_softc *sc = hw->priv;
661
662 changed_flags &= SUPPORTED_FILTERS;
663 *total_flags &= SUPPORTED_FILTERS;
664
665 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
666 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
667 ath_scan_start(sc);
668 else
669 ath_scan_end(sc);
670 }
671}
672
673static void ath9k_sta_notify(struct ieee80211_hw *hw,
674 struct ieee80211_vif *vif,
675 enum sta_notify_cmd cmd,
676 const u8 *addr)
677{
678 struct ath_softc *sc = hw->priv;
679 struct ath_node *an;
680 unsigned long flags;
681 DECLARE_MAC_BUF(mac);
682
683 spin_lock_irqsave(&sc->node_lock, flags);
684 an = ath_node_find(sc, (u8 *) addr);
685 spin_unlock_irqrestore(&sc->node_lock, flags);
686
687 switch (cmd) {
688 case STA_NOTIFY_ADD:
689 spin_lock_irqsave(&sc->node_lock, flags);
690 if (!an) {
691 ath_node_attach(sc, (u8 *)addr, 0);
692 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
693 __func__,
694 print_mac(mac, addr));
695 } else {
696 ath_node_get(sc, (u8 *)addr);
697 }
698 spin_unlock_irqrestore(&sc->node_lock, flags);
699 break;
700 case STA_NOTIFY_REMOVE:
701 if (!an)
702 DPRINTF(sc, ATH_DBG_FATAL,
703 "%s: Removal of a non-existent node\n",
704 __func__);
705 else {
706 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
707 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
708 __func__,
709 print_mac(mac, addr));
710 }
711 break;
712 default:
713 break;
714 }
715}
716
717static int ath9k_conf_tx(struct ieee80211_hw *hw,
718 u16 queue,
719 const struct ieee80211_tx_queue_params *params)
720{
721 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +0530722 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700723 int ret = 0, qnum;
724
725 if (queue >= WME_NUM_AC)
726 return 0;
727
728 qi.tqi_aifs = params->aifs;
729 qi.tqi_cwmin = params->cw_min;
730 qi.tqi_cwmax = params->cw_max;
731 qi.tqi_burstTime = params->txop;
732 qnum = ath_get_hal_qnum(queue, sc);
733
734 DPRINTF(sc, ATH_DBG_CONFIG,
735 "%s: Configure tx [queue/halq] [%d/%d], "
736 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
737 __func__,
738 queue,
739 qnum,
740 params->aifs,
741 params->cw_min,
742 params->cw_max,
743 params->txop);
744
745 ret = ath_txq_update(sc, qnum, &qi);
746 if (ret)
747 DPRINTF(sc, ATH_DBG_FATAL,
748 "%s: TXQ Update failed\n", __func__);
749
750 return ret;
751}
752
753static int ath9k_set_key(struct ieee80211_hw *hw,
754 enum set_key_cmd cmd,
755 const u8 *local_addr,
756 const u8 *addr,
757 struct ieee80211_key_conf *key)
758{
759 struct ath_softc *sc = hw->priv;
760 int ret = 0;
761
762 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
763
764 switch (cmd) {
765 case SET_KEY:
766 ret = ath_key_config(sc, addr, key);
767 if (!ret) {
768 set_bit(key->keyidx, sc->sc_keymap);
769 key->hw_key_idx = key->keyidx;
770 /* push IV and Michael MIC generation to stack */
771 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +0530772 if (key->alg == ALG_TKIP)
773 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700774 }
775 break;
776 case DISABLE_KEY:
777 ath_key_delete(sc, key);
778 clear_bit(key->keyidx, sc->sc_keymap);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700779 break;
780 default:
781 ret = -EINVAL;
782 }
783
784 return ret;
785}
786
787static void ath9k_ht_conf(struct ath_softc *sc,
788 struct ieee80211_bss_conf *bss_conf)
789{
790#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
791 struct ath_ht_info *ht_info = &sc->sc_ht_info;
792
793 if (bss_conf->assoc_ht) {
794 ht_info->ext_chan_offset =
795 bss_conf->ht_bss_conf->bss_cap &
796 IEEE80211_HT_IE_CHA_SEC_OFFSET;
797
798 if (!(bss_conf->ht_conf->cap &
799 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
800 (bss_conf->ht_bss_conf->bss_cap &
801 IEEE80211_HT_IE_CHA_WIDTH))
802 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
803 else
804 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
805
806 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
807 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
808 bss_conf->ht_conf->ampdu_factor);
809 ht_info->mpdudensity =
810 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
811
812 }
813
814#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
815}
816
817static void ath9k_bss_assoc_info(struct ath_softc *sc,
818 struct ieee80211_bss_conf *bss_conf)
819{
820 struct ieee80211_hw *hw = sc->hw;
821 struct ieee80211_channel *curchan = hw->conf.channel;
822 struct ath_vap *avp;
823 int pos;
824 DECLARE_MAC_BUF(mac);
825
826 if (bss_conf->assoc) {
827 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
828 __func__,
829 bss_conf->aid);
830
831 avp = sc->sc_vaps[0];
832 if (avp == NULL) {
833 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
834 __func__);
835 return;
836 }
837
838 /* New association, store aid */
839 if (avp->av_opmode == ATH9K_M_STA) {
840 sc->sc_curaid = bss_conf->aid;
841 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
842 sc->sc_curaid);
843 }
844
845 /* Configure the beacon */
846 ath_beacon_config(sc, 0);
847 sc->sc_beacons = 1;
848
849 /* Reset rssi stats */
850 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
851 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
852 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
853 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
854
855 /* Update chainmask */
856 ath_update_chainmask(sc, bss_conf->assoc_ht);
857
858 DPRINTF(sc, ATH_DBG_CONFIG,
859 "%s: bssid %s aid 0x%x\n",
860 __func__,
861 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
862
863 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
864 __func__,
865 curchan->center_freq);
866
867 pos = ath_get_channel(sc, curchan);
868 if (pos == -1) {
869 DPRINTF(sc, ATH_DBG_FATAL,
870 "%s: Invalid channel\n", __func__);
871 return;
872 }
873
874 if (hw->conf.ht_conf.ht_supported)
875 sc->sc_ah->ah_channels[pos].chanmode =
876 ath_get_extchanmode(sc, curchan);
877 else
878 sc->sc_ah->ah_channels[pos].chanmode =
879 (curchan->band == IEEE80211_BAND_2GHZ) ?
880 CHANNEL_G : CHANNEL_A;
881
882 /* set h/w channel */
883 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
884 DPRINTF(sc, ATH_DBG_FATAL,
885 "%s: Unable to set channel\n",
886 __func__);
887
888 ath_rate_newstate(sc, avp);
889 /* Update ratectrl about the new state */
890 ath_rc_node_update(hw, avp->rc_node);
891 } else {
892 DPRINTF(sc, ATH_DBG_CONFIG,
893 "%s: Bss Info DISSOC\n", __func__);
894 sc->sc_curaid = 0;
895 }
896}
897
898static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
899 struct ieee80211_vif *vif,
900 struct ieee80211_bss_conf *bss_conf,
901 u32 changed)
902{
903 struct ath_softc *sc = hw->priv;
904
905 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
906 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
907 __func__,
908 bss_conf->use_short_preamble);
909 if (bss_conf->use_short_preamble)
910 sc->sc_flags |= ATH_PREAMBLE_SHORT;
911 else
912 sc->sc_flags &= ~ATH_PREAMBLE_SHORT;
913 }
914
915 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
916 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
917 __func__,
918 bss_conf->use_cts_prot);
919 if (bss_conf->use_cts_prot &&
920 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
921 sc->sc_flags |= ATH_PROTECT_ENABLE;
922 else
923 sc->sc_flags &= ~ATH_PROTECT_ENABLE;
924 }
925
926 if (changed & BSS_CHANGED_HT) {
927 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
928 __func__,
929 bss_conf->assoc_ht);
930 ath9k_ht_conf(sc, bss_conf);
931 }
932
933 if (changed & BSS_CHANGED_ASSOC) {
934 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
935 __func__,
936 bss_conf->assoc);
937 ath9k_bss_assoc_info(sc, bss_conf);
938 }
939}
940
941static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
942{
943 u64 tsf;
944 struct ath_softc *sc = hw->priv;
945 struct ath_hal *ah = sc->sc_ah;
946
947 tsf = ath9k_hw_gettsf64(ah);
948
949 return tsf;
950}
951
952static void ath9k_reset_tsf(struct ieee80211_hw *hw)
953{
954 struct ath_softc *sc = hw->priv;
955 struct ath_hal *ah = sc->sc_ah;
956
957 ath9k_hw_reset_tsf(ah);
958}
959
960static int ath9k_ampdu_action(struct ieee80211_hw *hw,
961 enum ieee80211_ampdu_mlme_action action,
962 const u8 *addr,
963 u16 tid,
964 u16 *ssn)
965{
966 struct ath_softc *sc = hw->priv;
967 int ret = 0;
968
969 switch (action) {
970 case IEEE80211_AMPDU_RX_START:
971 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
972 if (ret < 0)
973 DPRINTF(sc, ATH_DBG_FATAL,
974 "%s: Unable to start RX aggregation\n",
975 __func__);
976 break;
977 case IEEE80211_AMPDU_RX_STOP:
978 ret = ath_rx_aggr_stop(sc, addr, tid);
979 if (ret < 0)
980 DPRINTF(sc, ATH_DBG_FATAL,
981 "%s: Unable to stop RX aggregation\n",
982 __func__);
983 break;
984 case IEEE80211_AMPDU_TX_START:
985 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
986 if (ret < 0)
987 DPRINTF(sc, ATH_DBG_FATAL,
988 "%s: Unable to start TX aggregation\n",
989 __func__);
990 else
991 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
992 break;
993 case IEEE80211_AMPDU_TX_STOP:
994 ret = ath_tx_aggr_stop(sc, addr, tid);
995 if (ret < 0)
996 DPRINTF(sc, ATH_DBG_FATAL,
997 "%s: Unable to stop TX aggregation\n",
998 __func__);
999
1000 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1001 break;
1002 default:
1003 DPRINTF(sc, ATH_DBG_FATAL,
1004 "%s: Unknown AMPDU action\n", __func__);
1005 }
1006
1007 return ret;
1008}
1009
1010static struct ieee80211_ops ath9k_ops = {
1011 .tx = ath9k_tx,
1012 .start = ath9k_start,
1013 .stop = ath9k_stop,
1014 .add_interface = ath9k_add_interface,
1015 .remove_interface = ath9k_remove_interface,
1016 .config = ath9k_config,
1017 .config_interface = ath9k_config_interface,
1018 .configure_filter = ath9k_configure_filter,
1019 .get_stats = NULL,
1020 .sta_notify = ath9k_sta_notify,
1021 .conf_tx = ath9k_conf_tx,
1022 .get_tx_stats = NULL,
1023 .bss_info_changed = ath9k_bss_info_changed,
1024 .set_tim = NULL,
1025 .set_key = ath9k_set_key,
1026 .hw_scan = NULL,
1027 .get_tkip_seq = NULL,
1028 .set_rts_threshold = NULL,
1029 .set_frag_threshold = NULL,
1030 .set_retry_limit = NULL,
1031 .get_tsf = ath9k_get_tsf,
1032 .reset_tsf = ath9k_reset_tsf,
1033 .tx_last_beacon = NULL,
1034 .ampdu_action = ath9k_ampdu_action
1035};
1036
1037void ath_get_beaconconfig(struct ath_softc *sc,
1038 int if_id,
1039 struct ath_beacon_config *conf)
1040{
1041 struct ieee80211_hw *hw = sc->hw;
1042
1043 /* fill in beacon config data */
1044
1045 conf->beacon_interval = hw->conf.beacon_int;
1046 conf->listen_interval = 100;
1047 conf->dtim_count = 1;
1048 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1049}
1050
1051int ath_update_beacon(struct ath_softc *sc,
1052 int if_id,
1053 struct ath_beacon_offset *bo,
1054 struct sk_buff *skb,
1055 int mcast)
1056{
1057 return 0;
1058}
1059
1060void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1061 struct ath_xmit_status *tx_status, struct ath_node *an)
1062{
1063 struct ieee80211_hw *hw = sc->hw;
1064 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1065
1066 DPRINTF(sc, ATH_DBG_XMIT,
1067 "%s: TX complete: skb: %p\n", __func__, skb);
1068
1069 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1070 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1071 /* free driver's private data area of tx_info */
1072 if (tx_info->driver_data[0] != NULL)
1073 kfree(tx_info->driver_data[0]);
1074 tx_info->driver_data[0] = NULL;
1075 }
1076
1077 if (tx_status->flags & ATH_TX_BAR) {
1078 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1079 tx_status->flags &= ~ATH_TX_BAR;
1080 }
Jouni Malinen43f30ae2008-08-11 14:01:49 +03001081
1082 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
1083 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1084 /* Frame was not ACKed, but an ACK was expected */
1085 tx_info->status.excessive_retries = 1;
1086 }
1087 } else {
1088 /* Frame was ACKed */
1089 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1090 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001091
1092 tx_info->status.retry_count = tx_status->retries;
1093
1094 ieee80211_tx_status(hw, skb);
1095 if (an)
1096 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1097}
1098
1099int ath__rx_indicate(struct ath_softc *sc,
1100 struct sk_buff *skb,
1101 struct ath_recv_status *status,
1102 u16 keyix)
1103{
1104 struct ieee80211_hw *hw = sc->hw;
1105 struct ath_node *an = NULL;
1106 struct ieee80211_rx_status rx_status;
1107 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1108 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1109 int padsize;
1110 enum ATH_RX_TYPE st;
1111
1112 /* see if any padding is done by the hw and remove it */
1113 if (hdrlen & 3) {
1114 padsize = hdrlen % 4;
1115 memmove(skb->data + padsize, skb->data, hdrlen);
1116 skb_pull(skb, padsize);
1117 }
1118
1119 /* remove FCS before passing up to protocol stack */
1120 skb_trim(skb, (skb->len - FCS_LEN));
1121
1122 /* Prepare rx status */
1123 ath9k_rx_prepare(sc, skb, status, &rx_status);
1124
1125 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1126 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1127 rx_status.flag |= RX_FLAG_DECRYPTED;
1128 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1129 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1130 && skb->len >= hdrlen + 4) {
1131 keyix = skb->data[hdrlen + 3] >> 6;
1132
1133 if (test_bit(keyix, sc->sc_keymap))
1134 rx_status.flag |= RX_FLAG_DECRYPTED;
1135 }
1136
1137 spin_lock_bh(&sc->node_lock);
1138 an = ath_node_find(sc, hdr->addr2);
1139 spin_unlock_bh(&sc->node_lock);
1140
1141 if (an) {
1142 ath_rx_input(sc, an,
1143 hw->conf.ht_conf.ht_supported,
1144 skb, status, &st);
1145 }
1146 if (!an || (st != ATH_RX_CONSUMED))
1147 __ieee80211_rx(hw, skb, &rx_status);
1148
1149 return 0;
1150}
1151
1152int ath_rx_subframe(struct ath_node *an,
1153 struct sk_buff *skb,
1154 struct ath_recv_status *status)
1155{
1156 struct ath_softc *sc = an->an_sc;
1157 struct ieee80211_hw *hw = sc->hw;
1158 struct ieee80211_rx_status rx_status;
1159
1160 /* Prepare rx status */
1161 ath9k_rx_prepare(sc, skb, status, &rx_status);
1162 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1163 rx_status.flag |= RX_FLAG_DECRYPTED;
1164
1165 __ieee80211_rx(hw, skb, &rx_status);
1166
1167 return 0;
1168}
1169
1170enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1171{
1172 return sc->sc_ht_info.tx_chan_width;
1173}
1174
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001175static int ath_detach(struct ath_softc *sc)
1176{
1177 struct ieee80211_hw *hw = sc->hw;
1178
1179 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1180
1181 /* Unregister hw */
1182
1183 ieee80211_unregister_hw(hw);
1184
1185 /* unregister Rate control */
1186 ath_rate_control_unregister();
1187
1188 /* tx/rx cleanup */
1189
1190 ath_rx_cleanup(sc);
1191 ath_tx_cleanup(sc);
1192
1193 /* Deinit */
1194
1195 ath_deinit(sc);
1196
1197 return 0;
1198}
1199
1200static int ath_attach(u16 devid,
1201 struct ath_softc *sc)
1202{
1203 struct ieee80211_hw *hw = sc->hw;
1204 int error = 0;
1205
1206 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1207
1208 error = ath_init(devid, sc);
1209 if (error != 0)
1210 return error;
1211
1212 /* Init nodes */
1213
1214 INIT_LIST_HEAD(&sc->node_list);
1215 spin_lock_init(&sc->node_lock);
1216
1217 /* get mac address from hardware and set in mac80211 */
1218
1219 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1220
1221 /* setup channels and rates */
1222
1223 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1224 sc->channels[IEEE80211_BAND_2GHZ];
1225 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1226 sc->rates[IEEE80211_BAND_2GHZ];
1227 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1228
Sujith60b67f52008-08-07 10:52:38 +05301229 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001230 /* Setup HT capabilities for 2.4Ghz*/
1231 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1232
1233 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1234 &sc->sbands[IEEE80211_BAND_2GHZ];
1235
Sujith86b89ee2008-08-07 10:54:57 +05301236 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001237 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1238 sc->channels[IEEE80211_BAND_5GHZ];
1239 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1240 sc->rates[IEEE80211_BAND_5GHZ];
1241 sc->sbands[IEEE80211_BAND_5GHZ].band =
1242 IEEE80211_BAND_5GHZ;
1243
Sujith60b67f52008-08-07 10:52:38 +05301244 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001245 /* Setup HT capabilities for 5Ghz*/
1246 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1247
1248 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1249 &sc->sbands[IEEE80211_BAND_5GHZ];
1250 }
1251
1252 /* FIXME: Have to figure out proper hw init values later */
1253
1254 hw->queues = 4;
1255 hw->ampdu_queues = 1;
1256
1257 /* Register rate control */
1258 hw->rate_control_algorithm = "ath9k_rate_control";
1259 error = ath_rate_control_register();
1260 if (error != 0) {
1261 DPRINTF(sc, ATH_DBG_FATAL,
1262 "%s: Unable to register rate control "
1263 "algorithm:%d\n", __func__, error);
1264 ath_rate_control_unregister();
1265 goto bad;
1266 }
1267
1268 error = ieee80211_register_hw(hw);
1269 if (error != 0) {
1270 ath_rate_control_unregister();
1271 goto bad;
1272 }
1273
1274 /* initialize tx/rx engine */
1275
1276 error = ath_tx_init(sc, ATH_TXBUF);
1277 if (error != 0)
1278 goto bad1;
1279
1280 error = ath_rx_init(sc, ATH_RXBUF);
1281 if (error != 0)
1282 goto bad1;
1283
1284 return 0;
1285bad1:
1286 ath_detach(sc);
1287bad:
1288 return error;
1289}
1290
1291static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1292{
1293 void __iomem *mem;
1294 struct ath_softc *sc;
1295 struct ieee80211_hw *hw;
1296 const char *athname;
1297 u8 csz;
1298 u32 val;
1299 int ret = 0;
1300
1301 if (pci_enable_device(pdev))
1302 return -EIO;
1303
1304 /* XXX 32-bit addressing only */
1305 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1306 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1307 ret = -ENODEV;
1308 goto bad;
1309 }
1310
1311 /*
1312 * Cache line size is used to size and align various
1313 * structures used to communicate with the hardware.
1314 */
1315 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1316 if (csz == 0) {
1317 /*
1318 * Linux 2.4.18 (at least) writes the cache line size
1319 * register as a 16-bit wide register which is wrong.
1320 * We must have this setup properly for rx buffer
1321 * DMA to work so force a reasonable value here if it
1322 * comes up zero.
1323 */
1324 csz = L1_CACHE_BYTES / sizeof(u32);
1325 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1326 }
1327 /*
1328 * The default setting of latency timer yields poor results,
1329 * set it to the value used by other systems. It may be worth
1330 * tweaking this setting more.
1331 */
1332 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1333
1334 pci_set_master(pdev);
1335
1336 /*
1337 * Disable the RETRY_TIMEOUT register (0x41) to keep
1338 * PCI Tx retries from interfering with C3 CPU state.
1339 */
1340 pci_read_config_dword(pdev, 0x40, &val);
1341 if ((val & 0x0000ff00) != 0)
1342 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1343
1344 ret = pci_request_region(pdev, 0, "ath9k");
1345 if (ret) {
1346 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1347 ret = -ENODEV;
1348 goto bad;
1349 }
1350
1351 mem = pci_iomap(pdev, 0, 0);
1352 if (!mem) {
1353 printk(KERN_ERR "PCI memory map error\n") ;
1354 ret = -EIO;
1355 goto bad1;
1356 }
1357
1358 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1359 if (hw == NULL) {
1360 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1361 goto bad2;
1362 }
1363
1364 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1365 IEEE80211_HW_NOISE_DBM;
1366
1367 SET_IEEE80211_DEV(hw, &pdev->dev);
1368 pci_set_drvdata(pdev, hw);
1369
1370 sc = hw->priv;
1371 sc->hw = hw;
1372 sc->pdev = pdev;
1373 sc->mem = mem;
1374
1375 if (ath_attach(id->device, sc) != 0) {
1376 ret = -ENODEV;
1377 goto bad3;
1378 }
1379
1380 /* setup interrupt service routine */
1381
1382 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1383 printk(KERN_ERR "%s: request_irq failed\n",
1384 wiphy_name(hw->wiphy));
1385 ret = -EIO;
1386 goto bad4;
1387 }
1388
1389 athname = ath9k_hw_probe(id->vendor, id->device);
1390
1391 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1392 wiphy_name(hw->wiphy),
1393 athname ? athname : "Atheros ???",
1394 (unsigned long)mem, pdev->irq);
1395
1396 return 0;
1397bad4:
1398 ath_detach(sc);
1399bad3:
1400 ieee80211_free_hw(hw);
1401bad2:
1402 pci_iounmap(pdev, mem);
1403bad1:
1404 pci_release_region(pdev, 0);
1405bad:
1406 pci_disable_device(pdev);
1407 return ret;
1408}
1409
1410static void ath_pci_remove(struct pci_dev *pdev)
1411{
1412 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1413 struct ath_softc *sc = hw->priv;
1414
1415 if (pdev->irq)
1416 free_irq(pdev->irq, sc);
1417 ath_detach(sc);
1418 pci_iounmap(pdev, sc->mem);
1419 pci_release_region(pdev, 0);
1420 pci_disable_device(pdev);
1421 ieee80211_free_hw(hw);
1422}
1423
1424#ifdef CONFIG_PM
1425
1426static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1427{
1428 pci_save_state(pdev);
1429 pci_disable_device(pdev);
1430 pci_set_power_state(pdev, 3);
1431
1432 return 0;
1433}
1434
1435static int ath_pci_resume(struct pci_dev *pdev)
1436{
1437 u32 val;
1438 int err;
1439
1440 err = pci_enable_device(pdev);
1441 if (err)
1442 return err;
1443 pci_restore_state(pdev);
1444 /*
1445 * Suspend/Resume resets the PCI configuration space, so we have to
1446 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1447 * PCI Tx retries from interfering with C3 CPU state
1448 */
1449 pci_read_config_dword(pdev, 0x40, &val);
1450 if ((val & 0x0000ff00) != 0)
1451 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1452
1453 return 0;
1454}
1455
1456#endif /* CONFIG_PM */
1457
1458MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1459
1460static struct pci_driver ath_pci_driver = {
1461 .name = "ath9k",
1462 .id_table = ath_pci_id_table,
1463 .probe = ath_pci_probe,
1464 .remove = ath_pci_remove,
1465#ifdef CONFIG_PM
1466 .suspend = ath_pci_suspend,
1467 .resume = ath_pci_resume,
1468#endif /* CONFIG_PM */
1469};
1470
1471static int __init init_ath_pci(void)
1472{
1473 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1474
1475 if (pci_register_driver(&ath_pci_driver) < 0) {
1476 printk(KERN_ERR
1477 "ath_pci: No devices found, driver not installed.\n");
1478 pci_unregister_driver(&ath_pci_driver);
1479 return -ENODEV;
1480 }
1481
1482 return 0;
1483}
1484module_init(init_ath_pci);
1485
1486static void __exit exit_ath_pci(void)
1487{
1488 pci_unregister_driver(&ath_pci_driver);
1489 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1490}
1491module_exit(exit_ath_pci);