Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-5.4 / 62f6924cb1543a10d05150d77f9a5e01e12c9ce1 / . / arch / powerpc / kvm / e500_emulate.c
blob: ce7291c79f6c7d72a2def9d7d4a0681e09776564 [file] [log] [blame]
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]1/*
Scott Wood5ce941e2011-04-27 17:24:21 -0500[diff] [blame]2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]17#include <asm/dbell.h>
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]18
19#include "booke.h"
Scott Wood29a5a6f2011-12-20 15:34:29 +0000[diff] [blame]20#include "e500.h"
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]21
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]22#define XOP_DCBTLS 166
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]23#define XOP_MSGSND 206
24#define XOP_MSGCLR 238
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]25#define XOP_TLBIVAX 786
26#define XOP_TLBSX 914
27#define XOP_TLBRE 946
28#define XOP_TLBWE 978
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]29#define XOP_TLBILX 18
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]30#define XOP_EHPRIV 270
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]31
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]32#ifdef CONFIG_KVM_E500MC
33static int dbell2prio(ulong param)
34{
35 int msg = param & PPC_DBELL_TYPE_MASK;
36 int prio = -1;
37
38 switch (msg) {
39 case PPC_DBELL_TYPE(PPC_DBELL):
40 prio = BOOKE_IRQPRIO_DBELL;
41 break;
42 case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
43 prio = BOOKE_IRQPRIO_DBELL_CRIT;
44 break;
45 default:
46 break;
47 }
48
49 return prio;
50}
51
52static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
53{
54 ulong param = vcpu->arch.gpr[rb];
55 int prio = dbell2prio(param);
56
57 if (prio < 0)
58 return EMULATE_FAIL;
59
60 clear_bit(prio, &vcpu->arch.pending_exceptions);
61 return EMULATE_DONE;
62}
63
64static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
65{
66 ulong param = vcpu->arch.gpr[rb];
67 int prio = dbell2prio(rb);
68 int pir = param & PPC_DBELL_PIR_MASK;
69 int i;
70 struct kvm_vcpu *cvcpu;
71
72 if (prio < 0)
73 return EMULATE_FAIL;
74
75 kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
76 int cpir = cvcpu->arch.shared->pir;
77 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
78 set_bit(prio, &cvcpu->arch.pending_exceptions);
79 kvm_vcpu_kick(cvcpu);
80 }
81 }
82
83 return EMULATE_DONE;
84}
85#endif
86
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]87static int kvmppc_e500_emul_ehpriv(struct kvm_run *run, struct kvm_vcpu *vcpu,
88 unsigned int inst, int *advance)
89{
90 int emulated = EMULATE_DONE;
91
92 switch (get_oc(inst)) {
93 case EHPRIV_OC_DEBUG:
94 run->exit_reason = KVM_EXIT_DEBUG;
95 run->debug.arch.address = vcpu->arch.pc;
96 run->debug.arch.status = 0;
97 kvmppc_account_exit(vcpu, DEBUG_EXITS);
98 emulated = EMULATE_EXIT_USER;
99 *advance = 0;
100 break;
101 default:
102 emulated = EMULATE_FAIL;
103 }
104 return emulated;
105}
106
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]107static int kvmppc_e500_emul_dcbtls(struct kvm_vcpu *vcpu)
108{
109 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
110
111 /* Always fail to lock the cache */
112 vcpu_e500->l1csr0 |= L1CSR0_CUL;
113 return EMULATE_DONE;
114}
115
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]116int kvmppc_core_emulate_op_e500(struct kvm_run *run, struct kvm_vcpu *vcpu,
117 unsigned int inst, int *advance)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]118{
119 int emulated = EMULATE_DONE;
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]120 int ra = get_ra(inst);
121 int rb = get_rb(inst);
122 int rt = get_rt(inst);
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]123 gva_t ea;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]124
125 switch (get_op(inst)) {
126 case 31:
127 switch (get_xop(inst)) {
128
Alexander Graf8f20a3a2014-04-17 13:25:33 +0200[diff] [blame]129 case XOP_DCBTLS:
130 emulated = kvmppc_e500_emul_dcbtls(vcpu);
131 break;
132
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]133#ifdef CONFIG_KVM_E500MC
134 case XOP_MSGSND:
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]135 emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]136 break;
137
138 case XOP_MSGCLR:
Alexander Grafc46dc9a2012-05-04 14:01:33 +0200[diff] [blame]139 emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
Alexander Graf4ab96912012-02-15 13:28:48 +0000[diff] [blame]140 break;
141#endif
142
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]143 case XOP_TLBRE:
144 emulated = kvmppc_e500_emul_tlbre(vcpu);
145 break;
146
147 case XOP_TLBWE:
148 emulated = kvmppc_e500_emul_tlbwe(vcpu);
149 break;
150
151 case XOP_TLBSX:
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]152 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
153 emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]154 break;
155
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]156 case XOP_TLBILX: {
157 int type = rt & 0x3;
158 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
159 emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]160 break;
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]161 }
Scott Woodab9fc402011-12-20 15:34:39 +0000[diff] [blame]162
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]163 case XOP_TLBIVAX:
Mihai Caraman7cdd7a92012-10-11 06:13:22 +0000[diff] [blame]164 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
165 emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]166 break;
167
Bharat Bhushanb12c7842013-07-04 12:27:45 +0530[diff] [blame]168 case XOP_EHPRIV:
169 emulated = kvmppc_e500_emul_ehpriv(run, vcpu, inst,
170 advance);
171 break;
172
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]173 default:
174 emulated = EMULATE_FAIL;
175 }
176
177 break;
178
179 default:
180 emulated = EMULATE_FAIL;
181 }
182
183 if (emulated == EMULATE_FAIL)
184 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
185
186 return emulated;
187}
188
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]189int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]190{
191 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
192 int emulated = EMULATE_DONE;
193
194 switch (sprn) {
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]195#ifndef CONFIG_KVM_BOOKE_HV
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]196 case SPRN_PID:
Scott Wood5ce941e2011-04-27 17:24:21 -0500[diff] [blame]197 kvmppc_set_pid(vcpu, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]198 break;
199 case SPRN_PID1:
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500[diff] [blame]200 if (spr_val != 0)
201 return EMULATE_FAIL;
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]202 vcpu_e500->pid[1] = spr_val;
203 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]204 case SPRN_PID2:
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500[diff] [blame]205 if (spr_val != 0)
206 return EMULATE_FAIL;
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]207 vcpu_e500->pid[2] = spr_val;
208 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]209 case SPRN_MAS0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]210 vcpu->arch.shared->mas0 = spr_val;
211 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]212 case SPRN_MAS1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]213 vcpu->arch.shared->mas1 = spr_val;
214 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]215 case SPRN_MAS2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]216 vcpu->arch.shared->mas2 = spr_val;
217 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]218 case SPRN_MAS3:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]219 vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
220 vcpu->arch.shared->mas7_3 |= spr_val;
Scott Wooddc83b8b2011-08-18 15:25:21 -0500[diff] [blame]221 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]222 case SPRN_MAS4:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]223 vcpu->arch.shared->mas4 = spr_val;
224 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]225 case SPRN_MAS6:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]226 vcpu->arch.shared->mas6 = spr_val;
227 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]228 case SPRN_MAS7:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]229 vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
230 vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
Scott Wooddc83b8b2011-08-18 15:25:21 -0500[diff] [blame]231 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]232#endif
Liu Yud86be072010-01-22 18:50:29 +0800[diff] [blame]233 case SPRN_L1CSR0:
234 vcpu_e500->l1csr0 = spr_val;
235 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
236 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]237 case SPRN_L1CSR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]238 vcpu_e500->l1csr1 = spr_val;
Alexander Graf07fec1c2014-04-17 12:53:13 +0200[diff] [blame]239 vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR);
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]240 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]241 case SPRN_HID0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]242 vcpu_e500->hid0 = spr_val;
243 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]244 case SPRN_HID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]245 vcpu_e500->hid1 = spr_val;
246 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]247
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]248 case SPRN_MMUCSR0:
249 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]250 spr_val);
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]251 break;
252
Mihai Caramandebf27d2014-07-04 11:17:28 +0300[diff] [blame]253 case SPRN_PWRMGTCR0:
254 /*
255 * Guest relies on host power management configurations
256 * Treat the request as a general store
257 */
258 vcpu->arch.pwrmgtcr0 = spr_val;
259 break;
260
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]261 /* extra exceptions */
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]262#ifdef CONFIG_SPE_POSSIBLE
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]263 case SPRN_IVOR32:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]264 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]265 break;
266 case SPRN_IVOR33:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]267 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]268 break;
269 case SPRN_IVOR34:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]270 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]271 break;
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]272#endif
273#ifdef CONFIG_ALTIVEC
274 case SPRN_IVOR32:
275 vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val;
276 break;
277 case SPRN_IVOR33:
278 vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val;
279 break;
280#endif
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]281 case SPRN_IVOR35:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]282 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]283 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]284#ifdef CONFIG_KVM_BOOKE_HV
285 case SPRN_IVOR36:
286 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
287 break;
288 case SPRN_IVOR37:
289 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
290 break;
291#endif
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]292 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]293 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]294 }
295
296 return emulated;
297}
298
Aneesh Kumar K.V3a167bea2013-10-07 22:17:53 +0530[diff] [blame]299int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]300{
301 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
302 int emulated = EMULATE_DONE;
303
304 switch (sprn) {
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]305#ifndef CONFIG_KVM_BOOKE_HV
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]306 case SPRN_PID:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]307 *spr_val = vcpu_e500->pid[0];
308 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]309 case SPRN_PID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]310 *spr_val = vcpu_e500->pid[1];
311 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]312 case SPRN_PID2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]313 *spr_val = vcpu_e500->pid[2];
314 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]315 case SPRN_MAS0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]316 *spr_val = vcpu->arch.shared->mas0;
317 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]318 case SPRN_MAS1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]319 *spr_val = vcpu->arch.shared->mas1;
320 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]321 case SPRN_MAS2:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]322 *spr_val = vcpu->arch.shared->mas2;
323 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]324 case SPRN_MAS3:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]325 *spr_val = (u32)vcpu->arch.shared->mas7_3;
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]326 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]327 case SPRN_MAS4:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]328 *spr_val = vcpu->arch.shared->mas4;
329 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]330 case SPRN_MAS6:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]331 *spr_val = vcpu->arch.shared->mas6;
332 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]333 case SPRN_MAS7:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]334 *spr_val = vcpu->arch.shared->mas7_3 >> 32;
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]335 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]336#endif
Bharat Bhushan21bd0002012-05-20 23:21:23 +0000[diff] [blame]337 case SPRN_DECAR:
338 *spr_val = vcpu->arch.decar;
339 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]340 case SPRN_TLB0CFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]341 *spr_val = vcpu->arch.tlbcfg[0];
342 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]343 case SPRN_TLB1CFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]344 *spr_val = vcpu->arch.tlbcfg[1];
345 break;
Mihai Caraman307d9002013-04-11 00:03:10 +0000[diff] [blame]346 case SPRN_TLB0PS:
347 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
348 return EMULATE_FAIL;
349 *spr_val = vcpu->arch.tlbps[0];
350 break;
351 case SPRN_TLB1PS:
352 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
353 return EMULATE_FAIL;
354 *spr_val = vcpu->arch.tlbps[1];
355 break;
Liu Yud86be072010-01-22 18:50:29 +0800[diff] [blame]356 case SPRN_L1CSR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]357 *spr_val = vcpu_e500->l1csr0;
358 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]359 case SPRN_L1CSR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]360 *spr_val = vcpu_e500->l1csr1;
361 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]362 case SPRN_HID0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]363 *spr_val = vcpu_e500->hid0;
364 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]365 case SPRN_HID1:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]366 *spr_val = vcpu_e500->hid1;
367 break;
Scott Wood90d34b02011-03-29 16:49:10 -0500[diff] [blame]368 case SPRN_SVR:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]369 *spr_val = vcpu_e500->svr;
370 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]371
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]372 case SPRN_MMUCSR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]373 *spr_val = 0;
374 break;
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]375
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]376 case SPRN_MMUCFG:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]377 *spr_val = vcpu->arch.mmucfg;
378 break;
Mihai Caraman9a6061d2013-04-11 00:03:11 +0000[diff] [blame]379 case SPRN_EPTCFG:
380 if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
381 return EMULATE_FAIL;
382 /*
383 * Legacy Linux guests access EPTCFG register even if the E.PT
384 * category is disabled in the VM. Give them a chance to live.
385 */
386 *spr_val = vcpu->arch.eptcfg;
387 break;
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]388
Mihai Caramandebf27d2014-07-04 11:17:28 +0300[diff] [blame]389 case SPRN_PWRMGTCR0:
390 *spr_val = vcpu->arch.pwrmgtcr0;
391 break;
392
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]393 /* extra exceptions */
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]394#ifdef CONFIG_SPE_POSSIBLE
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]395 case SPRN_IVOR32:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]396 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]397 break;
398 case SPRN_IVOR33:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]399 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]400 break;
401 case SPRN_IVOR34:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]402 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]403 break;
Mihai Caraman95d80a22014-08-20 16:36:23 +0300[diff] [blame]404#endif
405#ifdef CONFIG_ALTIVEC
406 case SPRN_IVOR32:
407 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL];
408 break;
409 case SPRN_IVOR33:
410 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST];
411 break;
412#endif
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]413 case SPRN_IVOR35:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]414 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]415 break;
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]416#ifdef CONFIG_KVM_BOOKE_HV
417 case SPRN_IVOR36:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]418 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]419 break;
420 case SPRN_IVOR37:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]421 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
Scott Wood73196cd32011-12-20 15:34:47 +0000[diff] [blame]422 break;
423#endif
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]424 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200[diff] [blame]425 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]426 }
427
428 return emulated;
429}
430