Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 1 | /* |
| 2 | * net/dsa/dsa2.c - Hardware switch handling, binding version 2 |
| 3 | * Copyright (c) 2008-2009 Marvell Semiconductor |
| 4 | * Copyright (c) 2013 Florian Fainelli <florian@openwrt.org> |
| 5 | * Copyright (c) 2016 Andrew Lunn <andrew@lunn.ch> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/device.h> |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/list.h> |
Andrew Lunn | c6e970a | 2017-03-28 23:45:06 +0200 | [diff] [blame] | 16 | #include <linux/netdevice.h> |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 17 | #include <linux/slab.h> |
| 18 | #include <linux/rtnetlink.h> |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 19 | #include <linux/of.h> |
| 20 | #include <linux/of_net.h> |
Vivien Didelot | ea5dd34 | 2017-05-17 15:46:03 -0400 | [diff] [blame] | 21 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 22 | #include "dsa_priv.h" |
| 23 | |
| 24 | static LIST_HEAD(dsa_switch_trees); |
| 25 | static DEFINE_MUTEX(dsa2_mutex); |
| 26 | |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 27 | static const struct devlink_ops dsa_devlink_ops = { |
| 28 | }; |
| 29 | |
Vivien Didelot | 49463b7 | 2017-11-03 19:05:21 -0400 | [diff] [blame] | 30 | static struct dsa_switch_tree *dsa_get_dst(unsigned int index) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 31 | { |
| 32 | struct dsa_switch_tree *dst; |
| 33 | |
| 34 | list_for_each_entry(dst, &dsa_switch_trees, list) |
Vivien Didelot | 8e5bf97 | 2017-11-03 19:05:22 -0400 | [diff] [blame^] | 35 | if (dst->index == index) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 36 | return dst; |
Vivien Didelot | 8e5bf97 | 2017-11-03 19:05:22 -0400 | [diff] [blame^] | 37 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 38 | return NULL; |
| 39 | } |
| 40 | |
| 41 | static void dsa_free_dst(struct kref *ref) |
| 42 | { |
| 43 | struct dsa_switch_tree *dst = container_of(ref, struct dsa_switch_tree, |
| 44 | refcount); |
| 45 | |
| 46 | list_del(&dst->list); |
| 47 | kfree(dst); |
| 48 | } |
| 49 | |
Vivien Didelot | 49463b7 | 2017-11-03 19:05:21 -0400 | [diff] [blame] | 50 | static struct dsa_switch_tree *dsa_add_dst(unsigned int index) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 51 | { |
| 52 | struct dsa_switch_tree *dst; |
| 53 | |
| 54 | dst = kzalloc(sizeof(*dst), GFP_KERNEL); |
| 55 | if (!dst) |
| 56 | return NULL; |
Vivien Didelot | 49463b7 | 2017-11-03 19:05:21 -0400 | [diff] [blame] | 57 | dst->index = index; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 58 | INIT_LIST_HEAD(&dst->list); |
| 59 | list_add_tail(&dsa_switch_trees, &dst->list); |
Vivien Didelot | 8e5bf97 | 2017-11-03 19:05:22 -0400 | [diff] [blame^] | 60 | |
| 61 | /* Initialize the reference counter to the number of switches, not 1 */ |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 62 | kref_init(&dst->refcount); |
Vivien Didelot | 8e5bf97 | 2017-11-03 19:05:22 -0400 | [diff] [blame^] | 63 | refcount_set(&dst->refcount.refcount, 0); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 64 | |
| 65 | return dst; |
| 66 | } |
| 67 | |
| 68 | static void dsa_dst_add_ds(struct dsa_switch_tree *dst, |
| 69 | struct dsa_switch *ds, u32 index) |
| 70 | { |
| 71 | kref_get(&dst->refcount); |
| 72 | dst->ds[index] = ds; |
| 73 | } |
| 74 | |
| 75 | static void dsa_dst_del_ds(struct dsa_switch_tree *dst, |
| 76 | struct dsa_switch *ds, u32 index) |
| 77 | { |
| 78 | dst->ds[index] = NULL; |
| 79 | kref_put(&dst->refcount, dsa_free_dst); |
| 80 | } |
| 81 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 82 | /* For platform data configurations, we need to have a valid name argument to |
| 83 | * differentiate a disabled port from an enabled one |
| 84 | */ |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 85 | static bool dsa_port_is_valid(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 86 | { |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 87 | return port->type != DSA_PORT_TYPE_UNUSED; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 88 | } |
| 89 | |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 90 | static bool dsa_port_is_dsa(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 91 | { |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 92 | return port->type == DSA_PORT_TYPE_DSA; |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 93 | } |
| 94 | |
| 95 | static bool dsa_port_is_cpu(struct dsa_port *port) |
| 96 | { |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 97 | return port->type == DSA_PORT_TYPE_CPU; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 98 | } |
| 99 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 100 | static bool dsa_ds_find_port_dn(struct dsa_switch *ds, |
| 101 | struct device_node *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 102 | { |
| 103 | u32 index; |
| 104 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 105 | for (index = 0; index < ds->num_ports; index++) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 106 | if (ds->ports[index].dn == port) |
| 107 | return true; |
| 108 | return false; |
| 109 | } |
| 110 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 111 | static struct dsa_switch *dsa_dst_find_port_dn(struct dsa_switch_tree *dst, |
| 112 | struct device_node *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 113 | { |
| 114 | struct dsa_switch *ds; |
| 115 | u32 index; |
| 116 | |
| 117 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 118 | ds = dst->ds[index]; |
| 119 | if (!ds) |
| 120 | continue; |
| 121 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 122 | if (dsa_ds_find_port_dn(ds, port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 123 | return ds; |
| 124 | } |
| 125 | |
| 126 | return NULL; |
| 127 | } |
| 128 | |
| 129 | static int dsa_port_complete(struct dsa_switch_tree *dst, |
| 130 | struct dsa_switch *src_ds, |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 131 | struct dsa_port *port, |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 132 | u32 src_port) |
| 133 | { |
| 134 | struct device_node *link; |
| 135 | int index; |
| 136 | struct dsa_switch *dst_ds; |
| 137 | |
| 138 | for (index = 0;; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 139 | link = of_parse_phandle(port->dn, "link", index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 140 | if (!link) |
| 141 | break; |
| 142 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 143 | dst_ds = dsa_dst_find_port_dn(dst, link); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 144 | of_node_put(link); |
| 145 | |
| 146 | if (!dst_ds) |
| 147 | return 1; |
| 148 | |
| 149 | src_ds->rtable[dst_ds->index] = src_port; |
| 150 | } |
| 151 | |
| 152 | return 0; |
| 153 | } |
| 154 | |
| 155 | /* A switch is complete if all the DSA ports phandles point to ports |
| 156 | * known in the tree. A return value of 1 means the tree is not |
| 157 | * complete. This is not an error condition. A value of 0 is |
| 158 | * success. |
| 159 | */ |
| 160 | static int dsa_ds_complete(struct dsa_switch_tree *dst, struct dsa_switch *ds) |
| 161 | { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 162 | struct dsa_port *port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 163 | u32 index; |
| 164 | int err; |
| 165 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 166 | for (index = 0; index < ds->num_ports; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 167 | port = &ds->ports[index]; |
| 168 | if (!dsa_port_is_valid(port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 169 | continue; |
| 170 | |
| 171 | if (!dsa_port_is_dsa(port)) |
| 172 | continue; |
| 173 | |
| 174 | err = dsa_port_complete(dst, ds, port, index); |
| 175 | if (err != 0) |
| 176 | return err; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 177 | } |
| 178 | |
| 179 | return 0; |
| 180 | } |
| 181 | |
| 182 | /* A tree is complete if all the DSA ports phandles point to ports |
| 183 | * known in the tree. A return value of 1 means the tree is not |
| 184 | * complete. This is not an error condition. A value of 0 is |
| 185 | * success. |
| 186 | */ |
| 187 | static int dsa_dst_complete(struct dsa_switch_tree *dst) |
| 188 | { |
| 189 | struct dsa_switch *ds; |
| 190 | u32 index; |
| 191 | int err; |
| 192 | |
| 193 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 194 | ds = dst->ds[index]; |
| 195 | if (!ds) |
| 196 | continue; |
| 197 | |
| 198 | err = dsa_ds_complete(dst, ds); |
| 199 | if (err != 0) |
| 200 | return err; |
| 201 | } |
| 202 | |
| 203 | return 0; |
| 204 | } |
| 205 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 206 | static int dsa_dsa_port_apply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 207 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 208 | struct dsa_switch *ds = port->ds; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 209 | int err; |
| 210 | |
Vivien Didelot | 57ab1ca | 2017-10-26 10:50:07 -0400 | [diff] [blame] | 211 | err = dsa_port_fixed_link_register_of(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 212 | if (err) { |
| 213 | dev_warn(ds->dev, "Failed to setup dsa port %d: %d\n", |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 214 | port->index, err); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 215 | return err; |
| 216 | } |
| 217 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 218 | memset(&port->devlink_port, 0, sizeof(port->devlink_port)); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 219 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 220 | return devlink_port_register(ds->devlink, &port->devlink_port, |
| 221 | port->index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 222 | } |
| 223 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 224 | static void dsa_dsa_port_unapply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 225 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 226 | devlink_port_unregister(&port->devlink_port); |
Vivien Didelot | 57ab1ca | 2017-10-26 10:50:07 -0400 | [diff] [blame] | 227 | dsa_port_fixed_link_unregister_of(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 228 | } |
| 229 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 230 | static int dsa_cpu_port_apply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 231 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 232 | struct dsa_switch *ds = port->ds; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 233 | int err; |
| 234 | |
Vivien Didelot | 57ab1ca | 2017-10-26 10:50:07 -0400 | [diff] [blame] | 235 | err = dsa_port_fixed_link_register_of(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 236 | if (err) { |
| 237 | dev_warn(ds->dev, "Failed to setup cpu port %d: %d\n", |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 238 | port->index, err); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 239 | return err; |
| 240 | } |
| 241 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 242 | memset(&port->devlink_port, 0, sizeof(port->devlink_port)); |
| 243 | err = devlink_port_register(ds->devlink, &port->devlink_port, |
| 244 | port->index); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 245 | return err; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 246 | } |
| 247 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 248 | static void dsa_cpu_port_unapply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 249 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 250 | devlink_port_unregister(&port->devlink_port); |
Vivien Didelot | 57ab1ca | 2017-10-26 10:50:07 -0400 | [diff] [blame] | 251 | dsa_port_fixed_link_unregister_of(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 252 | } |
| 253 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 254 | static int dsa_user_port_apply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 255 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 256 | struct dsa_switch *ds = port->ds; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 257 | int err; |
| 258 | |
Vivien Didelot | 951259aa | 2017-10-27 15:55:19 -0400 | [diff] [blame] | 259 | err = dsa_slave_create(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 260 | if (err) { |
| 261 | dev_warn(ds->dev, "Failed to create slave %d: %d\n", |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 262 | port->index, err); |
Vivien Didelot | f8b8b1c | 2017-10-16 11:12:18 -0400 | [diff] [blame] | 263 | port->slave = NULL; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 264 | return err; |
| 265 | } |
| 266 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 267 | memset(&port->devlink_port, 0, sizeof(port->devlink_port)); |
| 268 | err = devlink_port_register(ds->devlink, &port->devlink_port, |
| 269 | port->index); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 270 | if (err) |
| 271 | return err; |
| 272 | |
Vivien Didelot | f8b8b1c | 2017-10-16 11:12:18 -0400 | [diff] [blame] | 273 | devlink_port_type_eth_set(&port->devlink_port, port->slave); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 274 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 275 | return 0; |
| 276 | } |
| 277 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 278 | static void dsa_user_port_unapply(struct dsa_port *port) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 279 | { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 280 | devlink_port_unregister(&port->devlink_port); |
Vivien Didelot | f8b8b1c | 2017-10-16 11:12:18 -0400 | [diff] [blame] | 281 | if (port->slave) { |
| 282 | dsa_slave_destroy(port->slave); |
| 283 | port->slave = NULL; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 284 | } |
| 285 | } |
| 286 | |
| 287 | static int dsa_ds_apply(struct dsa_switch_tree *dst, struct dsa_switch *ds) |
| 288 | { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 289 | struct dsa_port *port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 290 | u32 index; |
| 291 | int err; |
| 292 | |
Florian Fainelli | 6e830d8 | 2016-06-07 16:32:39 -0700 | [diff] [blame] | 293 | /* Initialize ds->phys_mii_mask before registering the slave MDIO bus |
Vivien Didelot | 9d490b4 | 2016-08-23 12:38:56 -0400 | [diff] [blame] | 294 | * driver and before ops->setup() has run, since the switch drivers and |
Florian Fainelli | 6e830d8 | 2016-06-07 16:32:39 -0700 | [diff] [blame] | 295 | * the slave MDIO bus driver rely on these values for probing PHY |
| 296 | * devices or not |
| 297 | */ |
Vivien Didelot | 02bc6e5 | 2017-10-26 11:22:56 -0400 | [diff] [blame] | 298 | ds->phys_mii_mask |= dsa_user_ports(ds); |
Florian Fainelli | 6e830d8 | 2016-06-07 16:32:39 -0700 | [diff] [blame] | 299 | |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 300 | /* Add the switch to devlink before calling setup, so that setup can |
| 301 | * add dpipe tables |
| 302 | */ |
| 303 | ds->devlink = devlink_alloc(&dsa_devlink_ops, 0); |
| 304 | if (!ds->devlink) |
| 305 | return -ENOMEM; |
| 306 | |
| 307 | err = devlink_register(ds->devlink, ds->dev); |
| 308 | if (err) |
| 309 | return err; |
| 310 | |
Vivien Didelot | 9d490b4 | 2016-08-23 12:38:56 -0400 | [diff] [blame] | 311 | err = ds->ops->setup(ds); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 312 | if (err < 0) |
| 313 | return err; |
| 314 | |
Vivien Didelot | f515f19 | 2017-02-03 13:20:20 -0500 | [diff] [blame] | 315 | err = dsa_switch_register_notifier(ds); |
| 316 | if (err) |
| 317 | return err; |
| 318 | |
Vivien Didelot | 9d490b4 | 2016-08-23 12:38:56 -0400 | [diff] [blame] | 319 | if (!ds->slave_mii_bus && ds->ops->phy_read) { |
Florian Fainelli | 1eb5944 | 2016-06-07 16:32:40 -0700 | [diff] [blame] | 320 | ds->slave_mii_bus = devm_mdiobus_alloc(ds->dev); |
| 321 | if (!ds->slave_mii_bus) |
| 322 | return -ENOMEM; |
| 323 | |
| 324 | dsa_slave_mii_bus_init(ds); |
| 325 | |
| 326 | err = mdiobus_register(ds->slave_mii_bus); |
| 327 | if (err < 0) |
| 328 | return err; |
| 329 | } |
| 330 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 331 | for (index = 0; index < ds->num_ports; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 332 | port = &ds->ports[index]; |
| 333 | if (!dsa_port_is_valid(port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 334 | continue; |
| 335 | |
| 336 | if (dsa_port_is_dsa(port)) { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 337 | err = dsa_dsa_port_apply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 338 | if (err) |
| 339 | return err; |
| 340 | continue; |
| 341 | } |
| 342 | |
| 343 | if (dsa_port_is_cpu(port)) { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 344 | err = dsa_cpu_port_apply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 345 | if (err) |
| 346 | return err; |
| 347 | continue; |
| 348 | } |
| 349 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 350 | err = dsa_user_port_apply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 351 | if (err) |
| 352 | continue; |
| 353 | } |
| 354 | |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | static void dsa_ds_unapply(struct dsa_switch_tree *dst, struct dsa_switch *ds) |
| 359 | { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 360 | struct dsa_port *port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 361 | u32 index; |
| 362 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 363 | for (index = 0; index < ds->num_ports; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 364 | port = &ds->ports[index]; |
| 365 | if (!dsa_port_is_valid(port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 366 | continue; |
| 367 | |
| 368 | if (dsa_port_is_dsa(port)) { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 369 | dsa_dsa_port_unapply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 370 | continue; |
| 371 | } |
| 372 | |
| 373 | if (dsa_port_is_cpu(port)) { |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 374 | dsa_cpu_port_unapply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 375 | continue; |
| 376 | } |
| 377 | |
Florian Fainelli | e41c1b5 | 2017-06-02 12:31:22 -0700 | [diff] [blame] | 378 | dsa_user_port_unapply(port); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 379 | } |
Florian Fainelli | 1eb5944 | 2016-06-07 16:32:40 -0700 | [diff] [blame] | 380 | |
Vivien Didelot | 9d490b4 | 2016-08-23 12:38:56 -0400 | [diff] [blame] | 381 | if (ds->slave_mii_bus && ds->ops->phy_read) |
Florian Fainelli | 1eb5944 | 2016-06-07 16:32:40 -0700 | [diff] [blame] | 382 | mdiobus_unregister(ds->slave_mii_bus); |
Vivien Didelot | f515f19 | 2017-02-03 13:20:20 -0500 | [diff] [blame] | 383 | |
| 384 | dsa_switch_unregister_notifier(ds); |
Andrew Lunn | 96567d5 | 2017-03-28 23:45:07 +0200 | [diff] [blame] | 385 | |
| 386 | if (ds->devlink) { |
| 387 | devlink_unregister(ds->devlink); |
| 388 | devlink_free(ds->devlink); |
| 389 | ds->devlink = NULL; |
| 390 | } |
| 391 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 392 | } |
| 393 | |
| 394 | static int dsa_dst_apply(struct dsa_switch_tree *dst) |
| 395 | { |
| 396 | struct dsa_switch *ds; |
| 397 | u32 index; |
| 398 | int err; |
| 399 | |
| 400 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 401 | ds = dst->ds[index]; |
| 402 | if (!ds) |
| 403 | continue; |
| 404 | |
| 405 | err = dsa_ds_apply(dst, ds); |
| 406 | if (err) |
| 407 | return err; |
| 408 | } |
| 409 | |
| 410 | /* If we use a tagging format that doesn't have an ethertype |
| 411 | * field, make sure that all packets from this point on get |
| 412 | * sent to the tag format's receive function. |
| 413 | */ |
| 414 | wmb(); |
Vivien Didelot | f8b8b1c | 2017-10-16 11:12:18 -0400 | [diff] [blame] | 415 | dst->cpu_dp->master->dsa_ptr = dst->cpu_dp; |
Vivien Didelot | 1943563 | 2017-09-19 11:56:59 -0400 | [diff] [blame] | 416 | |
Vivien Didelot | f8b8b1c | 2017-10-16 11:12:18 -0400 | [diff] [blame] | 417 | err = dsa_master_ethtool_setup(dst->cpu_dp->master); |
Vivien Didelot | 1943563 | 2017-09-19 11:56:59 -0400 | [diff] [blame] | 418 | if (err) |
| 419 | return err; |
| 420 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 421 | dst->applied = true; |
| 422 | |
| 423 | return 0; |
| 424 | } |
| 425 | |
| 426 | static void dsa_dst_unapply(struct dsa_switch_tree *dst) |
| 427 | { |
| 428 | struct dsa_switch *ds; |
| 429 | u32 index; |
| 430 | |
| 431 | if (!dst->applied) |
| 432 | return; |
| 433 | |
Vivien Didelot | f8b8b1c | 2017-10-16 11:12:18 -0400 | [diff] [blame] | 434 | dsa_master_ethtool_restore(dst->cpu_dp->master); |
Vivien Didelot | 1943563 | 2017-09-19 11:56:59 -0400 | [diff] [blame] | 435 | |
Vivien Didelot | f8b8b1c | 2017-10-16 11:12:18 -0400 | [diff] [blame] | 436 | dst->cpu_dp->master->dsa_ptr = NULL; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 437 | |
| 438 | /* If we used a tagging format that doesn't have an ethertype |
| 439 | * field, make sure that all packets from this point get sent |
| 440 | * without the tag and go through the regular receive path. |
| 441 | */ |
| 442 | wmb(); |
| 443 | |
| 444 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 445 | ds = dst->ds[index]; |
| 446 | if (!ds) |
| 447 | continue; |
| 448 | |
| 449 | dsa_ds_unapply(dst, ds); |
| 450 | } |
| 451 | |
Vivien Didelot | cd8d7dd | 2017-09-19 11:56:58 -0400 | [diff] [blame] | 452 | dst->cpu_dp = NULL; |
Florian Fainelli | 0c73c52 | 2016-06-07 16:32:42 -0700 | [diff] [blame] | 453 | |
Vivien Didelot | 49463b7 | 2017-11-03 19:05:21 -0400 | [diff] [blame] | 454 | pr_info("DSA: tree %d unapplied\n", dst->index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 455 | dst->applied = false; |
| 456 | } |
| 457 | |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 458 | static int dsa_cpu_parse(struct dsa_port *port, u32 index, |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 459 | struct dsa_switch_tree *dst, |
| 460 | struct dsa_switch *ds) |
| 461 | { |
Vivien Didelot | 62fc958 | 2017-09-29 17:19:17 -0400 | [diff] [blame] | 462 | const struct dsa_device_ops *tag_ops; |
Andrew Lunn | 7b31436 | 2016-08-22 16:01:01 +0200 | [diff] [blame] | 463 | enum dsa_tag_protocol tag_protocol; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 464 | |
Vivien Didelot | cbabb0a | 2017-10-27 15:55:17 -0400 | [diff] [blame] | 465 | if (!dst->cpu_dp) |
Vivien Didelot | 8b0d3ea | 2017-05-16 14:10:33 -0400 | [diff] [blame] | 466 | dst->cpu_dp = port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 467 | |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 468 | tag_protocol = ds->ops->get_tag_protocol(ds); |
Vivien Didelot | 62fc958 | 2017-09-29 17:19:17 -0400 | [diff] [blame] | 469 | tag_ops = dsa_resolve_tag_protocol(tag_protocol); |
| 470 | if (IS_ERR(tag_ops)) { |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 471 | dev_warn(ds->dev, "No tagger for this switch\n"); |
Vivien Didelot | 62fc958 | 2017-09-29 17:19:17 -0400 | [diff] [blame] | 472 | return PTR_ERR(tag_ops); |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 473 | } |
| 474 | |
Vivien Didelot | 1524024 | 2017-09-29 17:19:18 -0400 | [diff] [blame] | 475 | dst->cpu_dp->tag_ops = tag_ops; |
Vivien Didelot | 3e41f93 | 2017-09-29 17:19:19 -0400 | [diff] [blame] | 476 | |
| 477 | /* Make a few copies for faster access in master receive hot path */ |
| 478 | dst->cpu_dp->rcv = dst->cpu_dp->tag_ops->rcv; |
Vivien Didelot | 3e41f93 | 2017-09-29 17:19:19 -0400 | [diff] [blame] | 479 | dst->cpu_dp->dst = dst; |
Florian Fainelli | 9f9e772 | 2017-07-24 10:49:23 -0700 | [diff] [blame] | 480 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 481 | return 0; |
| 482 | } |
| 483 | |
| 484 | static int dsa_ds_parse(struct dsa_switch_tree *dst, struct dsa_switch *ds) |
| 485 | { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 486 | struct dsa_port *port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 487 | u32 index; |
| 488 | int err; |
| 489 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 490 | for (index = 0; index < ds->num_ports; index++) { |
Florian Fainelli | 293784a | 2017-01-26 10:45:52 -0800 | [diff] [blame] | 491 | port = &ds->ports[index]; |
Florian Fainelli | 14be36c | 2017-06-02 12:31:23 -0700 | [diff] [blame] | 492 | if (!dsa_port_is_valid(port) || |
| 493 | dsa_port_is_dsa(port)) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 494 | continue; |
| 495 | |
| 496 | if (dsa_port_is_cpu(port)) { |
| 497 | err = dsa_cpu_parse(port, index, dst, ds); |
| 498 | if (err) |
| 499 | return err; |
| 500 | } |
Florian Fainelli | 14be36c | 2017-06-02 12:31:23 -0700 | [diff] [blame] | 501 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 502 | } |
| 503 | |
Vivien Didelot | 49463b7 | 2017-11-03 19:05:21 -0400 | [diff] [blame] | 504 | pr_info("DSA: switch %d %d parsed\n", dst->index, ds->index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 505 | |
| 506 | return 0; |
| 507 | } |
| 508 | |
| 509 | static int dsa_dst_parse(struct dsa_switch_tree *dst) |
| 510 | { |
| 511 | struct dsa_switch *ds; |
Vivien Didelot | e4b7778 | 2017-06-15 15:06:54 -0400 | [diff] [blame] | 512 | struct dsa_port *dp; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 513 | u32 index; |
Vivien Didelot | e4b7778 | 2017-06-15 15:06:54 -0400 | [diff] [blame] | 514 | int port; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 515 | int err; |
| 516 | |
| 517 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 518 | ds = dst->ds[index]; |
| 519 | if (!ds) |
| 520 | continue; |
| 521 | |
| 522 | err = dsa_ds_parse(dst, ds); |
| 523 | if (err) |
| 524 | return err; |
| 525 | } |
| 526 | |
Florian Fainelli | c784839 | 2017-08-28 17:10:51 -0700 | [diff] [blame] | 527 | if (!dst->cpu_dp) { |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 528 | pr_warn("Tree has no master device\n"); |
| 529 | return -EINVAL; |
| 530 | } |
| 531 | |
Vivien Didelot | e4b7778 | 2017-06-15 15:06:54 -0400 | [diff] [blame] | 532 | /* Assign the default CPU port to all ports of the fabric */ |
| 533 | for (index = 0; index < DSA_MAX_SWITCHES; index++) { |
| 534 | ds = dst->ds[index]; |
| 535 | if (!ds) |
| 536 | continue; |
| 537 | |
| 538 | for (port = 0; port < ds->num_ports; port++) { |
| 539 | dp = &ds->ports[port]; |
| 540 | if (!dsa_port_is_valid(dp) || |
| 541 | dsa_port_is_dsa(dp) || |
| 542 | dsa_port_is_cpu(dp)) |
| 543 | continue; |
| 544 | |
| 545 | dp->cpu_dp = dst->cpu_dp; |
| 546 | } |
| 547 | } |
| 548 | |
Vivien Didelot | 49463b7 | 2017-11-03 19:05:21 -0400 | [diff] [blame] | 549 | pr_info("DSA: tree %d parsed\n", dst->index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 550 | |
| 551 | return 0; |
| 552 | } |
| 553 | |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 554 | static int dsa_port_parse_of(struct dsa_port *dp, struct device_node *dn) |
| 555 | { |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 556 | struct device_node *ethernet = of_parse_phandle(dn, "ethernet", 0); |
| 557 | struct device_node *link = of_parse_phandle(dn, "link", 0); |
Vivien Didelot | 1838fa8 | 2017-10-27 15:55:18 -0400 | [diff] [blame] | 558 | const char *name = of_get_property(dn, "label", NULL); |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 559 | |
| 560 | if (ethernet) { |
Vivien Didelot | cbabb0a | 2017-10-27 15:55:17 -0400 | [diff] [blame] | 561 | struct net_device *master; |
| 562 | |
| 563 | master = of_find_net_device_by_node(ethernet); |
| 564 | if (!master) |
| 565 | return -EPROBE_DEFER; |
| 566 | |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 567 | dp->type = DSA_PORT_TYPE_CPU; |
Vivien Didelot | cbabb0a | 2017-10-27 15:55:17 -0400 | [diff] [blame] | 568 | dp->master = master; |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 569 | } else if (link) { |
| 570 | dp->type = DSA_PORT_TYPE_DSA; |
| 571 | } else { |
Vivien Didelot | 1838fa8 | 2017-10-27 15:55:18 -0400 | [diff] [blame] | 572 | if (!name) |
| 573 | name = "eth%d"; |
| 574 | |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 575 | dp->type = DSA_PORT_TYPE_USER; |
Vivien Didelot | 1838fa8 | 2017-10-27 15:55:18 -0400 | [diff] [blame] | 576 | dp->name = name; |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 577 | } |
| 578 | |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 579 | dp->dn = dn; |
| 580 | |
| 581 | return 0; |
| 582 | } |
| 583 | |
Vivien Didelot | 5b32fe0 | 2017-10-27 15:55:13 -0400 | [diff] [blame] | 584 | static int dsa_parse_ports_of(struct device_node *dn, struct dsa_switch *ds) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 585 | { |
Vivien Didelot | 5b32fe0 | 2017-10-27 15:55:13 -0400 | [diff] [blame] | 586 | struct device_node *ports, *port; |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 587 | struct dsa_port *dp; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 588 | u32 reg; |
Vivien Didelot | 5b32fe0 | 2017-10-27 15:55:13 -0400 | [diff] [blame] | 589 | int err; |
| 590 | |
| 591 | ports = of_get_child_by_name(dn, "ports"); |
| 592 | if (!ports) { |
| 593 | dev_err(ds->dev, "no ports child node found\n"); |
| 594 | return -EINVAL; |
| 595 | } |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 596 | |
| 597 | for_each_available_child_of_node(ports, port) { |
| 598 | err = of_property_read_u32(port, "reg", ®); |
| 599 | if (err) |
| 600 | return err; |
| 601 | |
Vivien Didelot | 26895e2 | 2017-01-27 15:29:37 -0500 | [diff] [blame] | 602 | if (reg >= ds->num_ports) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 603 | return -EINVAL; |
| 604 | |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 605 | dp = &ds->ports[reg]; |
| 606 | |
| 607 | err = dsa_port_parse_of(dp, port); |
| 608 | if (err) |
| 609 | return err; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 610 | } |
| 611 | |
| 612 | return 0; |
| 613 | } |
| 614 | |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 615 | static int dsa_port_parse(struct dsa_port *dp, const char *name, |
| 616 | struct device *dev) |
| 617 | { |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 618 | if (!strcmp(name, "cpu")) { |
Vivien Didelot | cbabb0a | 2017-10-27 15:55:17 -0400 | [diff] [blame] | 619 | struct net_device *master; |
| 620 | |
| 621 | master = dsa_dev_to_net_device(dev); |
| 622 | if (!master) |
| 623 | return -EPROBE_DEFER; |
| 624 | |
| 625 | dev_put(master); |
| 626 | |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 627 | dp->type = DSA_PORT_TYPE_CPU; |
Vivien Didelot | cbabb0a | 2017-10-27 15:55:17 -0400 | [diff] [blame] | 628 | dp->master = master; |
Vivien Didelot | 6d4e5c5 | 2017-10-27 15:55:15 -0400 | [diff] [blame] | 629 | } else if (!strcmp(name, "dsa")) { |
| 630 | dp->type = DSA_PORT_TYPE_DSA; |
| 631 | } else { |
| 632 | dp->type = DSA_PORT_TYPE_USER; |
| 633 | } |
| 634 | |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 635 | dp->name = name; |
| 636 | |
| 637 | return 0; |
| 638 | } |
| 639 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 640 | static int dsa_parse_ports(struct dsa_chip_data *cd, struct dsa_switch *ds) |
| 641 | { |
| 642 | bool valid_name_found = false; |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 643 | struct dsa_port *dp; |
| 644 | struct device *dev; |
| 645 | const char *name; |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 646 | unsigned int i; |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 647 | int err; |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 648 | |
| 649 | for (i = 0; i < DSA_MAX_PORTS; i++) { |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 650 | name = cd->port_names[i]; |
| 651 | dev = cd->netdev[i]; |
| 652 | dp = &ds->ports[i]; |
| 653 | |
| 654 | if (!name) |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 655 | continue; |
| 656 | |
Vivien Didelot | fd223e2 | 2017-10-27 15:55:14 -0400 | [diff] [blame] | 657 | err = dsa_port_parse(dp, name, dev); |
| 658 | if (err) |
| 659 | return err; |
| 660 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 661 | valid_name_found = true; |
| 662 | } |
| 663 | |
| 664 | if (!valid_name_found && i == DSA_MAX_PORTS) |
| 665 | return -EINVAL; |
| 666 | |
| 667 | return 0; |
| 668 | } |
| 669 | |
Florian Fainelli | 3512a8e | 2017-01-26 10:45:53 -0800 | [diff] [blame] | 670 | static int dsa_parse_member_dn(struct device_node *np, u32 *tree, u32 *index) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 671 | { |
| 672 | int err; |
| 673 | |
| 674 | *tree = *index = 0; |
| 675 | |
| 676 | err = of_property_read_u32_index(np, "dsa,member", 0, tree); |
| 677 | if (err) { |
| 678 | /* Does not exist, but it is optional */ |
| 679 | if (err == -EINVAL) |
| 680 | return 0; |
| 681 | return err; |
| 682 | } |
| 683 | |
| 684 | err = of_property_read_u32_index(np, "dsa,member", 1, index); |
| 685 | if (err) |
| 686 | return err; |
| 687 | |
| 688 | if (*index >= DSA_MAX_SWITCHES) |
| 689 | return -EINVAL; |
| 690 | |
| 691 | return 0; |
| 692 | } |
| 693 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 694 | static int dsa_parse_member(struct dsa_chip_data *pd, u32 *tree, u32 *index) |
| 695 | { |
| 696 | if (!pd) |
| 697 | return -ENODEV; |
| 698 | |
| 699 | /* We do not support complex trees with dsa_chip_data */ |
| 700 | *tree = 0; |
| 701 | *index = 0; |
| 702 | |
| 703 | return 0; |
| 704 | } |
| 705 | |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 706 | static int _dsa_register_switch(struct dsa_switch *ds) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 707 | { |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 708 | struct dsa_chip_data *pdata = ds->dev->platform_data; |
| 709 | struct device_node *np = ds->dev->of_node; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 710 | struct dsa_switch_tree *dst; |
| 711 | u32 tree, index; |
Vivien Didelot | d390238 | 2016-07-06 20:03:54 -0400 | [diff] [blame] | 712 | int i, err; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 713 | |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 714 | if (np) { |
| 715 | err = dsa_parse_member_dn(np, &tree, &index); |
| 716 | if (err) |
| 717 | return err; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 718 | |
Vivien Didelot | 5b32fe0 | 2017-10-27 15:55:13 -0400 | [diff] [blame] | 719 | err = dsa_parse_ports_of(np, ds); |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 720 | if (err) |
| 721 | return err; |
| 722 | } else { |
| 723 | err = dsa_parse_member(pdata, &tree, &index); |
| 724 | if (err) |
| 725 | return err; |
| 726 | |
| 727 | err = dsa_parse_ports(pdata, ds); |
| 728 | if (err) |
| 729 | return err; |
| 730 | } |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 731 | |
| 732 | dst = dsa_get_dst(tree); |
| 733 | if (!dst) { |
| 734 | dst = dsa_add_dst(tree); |
| 735 | if (!dst) |
| 736 | return -ENOMEM; |
| 737 | } |
| 738 | |
Vivien Didelot | 8e5bf97 | 2017-11-03 19:05:22 -0400 | [diff] [blame^] | 739 | if (dst->ds[index]) |
| 740 | return -EBUSY; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 741 | |
| 742 | ds->dst = dst; |
| 743 | ds->index = index; |
Florian Fainelli | 71e0bbd | 2017-02-04 13:02:43 -0800 | [diff] [blame] | 744 | ds->cd = pdata; |
Vivien Didelot | d390238 | 2016-07-06 20:03:54 -0400 | [diff] [blame] | 745 | |
| 746 | /* Initialize the routing table */ |
| 747 | for (i = 0; i < DSA_MAX_SWITCHES; ++i) |
| 748 | ds->rtable[i] = DSA_RTABLE_NONE; |
| 749 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 750 | dsa_dst_add_ds(dst, ds, index); |
| 751 | |
| 752 | err = dsa_dst_complete(dst); |
| 753 | if (err < 0) |
| 754 | goto out_del_dst; |
| 755 | |
Vivien Didelot | 8e5bf97 | 2017-11-03 19:05:22 -0400 | [diff] [blame^] | 756 | /* Not all switches registered yet */ |
| 757 | if (err == 1) |
| 758 | return 0; |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 759 | |
| 760 | if (dst->applied) { |
| 761 | pr_info("DSA: Disjoint trees?\n"); |
| 762 | return -EINVAL; |
| 763 | } |
| 764 | |
| 765 | err = dsa_dst_parse(dst); |
Vivien Didelot | cbabb0a | 2017-10-27 15:55:17 -0400 | [diff] [blame] | 766 | if (err) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 767 | goto out_del_dst; |
| 768 | |
| 769 | err = dsa_dst_apply(dst); |
| 770 | if (err) { |
| 771 | dsa_dst_unapply(dst); |
| 772 | goto out_del_dst; |
| 773 | } |
| 774 | |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 775 | return 0; |
| 776 | |
| 777 | out_del_dst: |
| 778 | dsa_dst_del_ds(dst, ds, ds->index); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 779 | |
| 780 | return err; |
| 781 | } |
| 782 | |
Vivien Didelot | a0c0216 | 2017-01-27 15:29:36 -0500 | [diff] [blame] | 783 | struct dsa_switch *dsa_switch_alloc(struct device *dev, size_t n) |
| 784 | { |
| 785 | size_t size = sizeof(struct dsa_switch) + n * sizeof(struct dsa_port); |
| 786 | struct dsa_switch *ds; |
Vivien Didelot | 818be84 | 2017-01-27 15:29:38 -0500 | [diff] [blame] | 787 | int i; |
Vivien Didelot | a0c0216 | 2017-01-27 15:29:36 -0500 | [diff] [blame] | 788 | |
| 789 | ds = devm_kzalloc(dev, size, GFP_KERNEL); |
| 790 | if (!ds) |
| 791 | return NULL; |
| 792 | |
| 793 | ds->dev = dev; |
| 794 | ds->num_ports = n; |
| 795 | |
Vivien Didelot | 818be84 | 2017-01-27 15:29:38 -0500 | [diff] [blame] | 796 | for (i = 0; i < ds->num_ports; ++i) { |
| 797 | ds->ports[i].index = i; |
| 798 | ds->ports[i].ds = ds; |
| 799 | } |
| 800 | |
Vivien Didelot | a0c0216 | 2017-01-27 15:29:36 -0500 | [diff] [blame] | 801 | return ds; |
| 802 | } |
| 803 | EXPORT_SYMBOL_GPL(dsa_switch_alloc); |
| 804 | |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 805 | int dsa_register_switch(struct dsa_switch *ds) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 806 | { |
| 807 | int err; |
| 808 | |
| 809 | mutex_lock(&dsa2_mutex); |
Vivien Didelot | 23c9ee4 | 2017-05-26 18:12:51 -0400 | [diff] [blame] | 810 | err = _dsa_register_switch(ds); |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 811 | mutex_unlock(&dsa2_mutex); |
| 812 | |
| 813 | return err; |
| 814 | } |
| 815 | EXPORT_SYMBOL_GPL(dsa_register_switch); |
| 816 | |
Wei Yongjun | 85c22ba | 2016-07-12 15:24:10 +0000 | [diff] [blame] | 817 | static void _dsa_unregister_switch(struct dsa_switch *ds) |
Andrew Lunn | 83c0afa | 2016-06-04 21:17:07 +0200 | [diff] [blame] | 818 | { |
| 819 | struct dsa_switch_tree *dst = ds->dst; |
| 820 | |
| 821 | dsa_dst_unapply(dst); |
| 822 | |
| 823 | dsa_dst_del_ds(dst, ds, ds->index); |
| 824 | } |
| 825 | |
| 826 | void dsa_unregister_switch(struct dsa_switch *ds) |
| 827 | { |
| 828 | mutex_lock(&dsa2_mutex); |
| 829 | _dsa_unregister_switch(ds); |
| 830 | mutex_unlock(&dsa2_mutex); |
| 831 | } |
| 832 | EXPORT_SYMBOL_GPL(dsa_unregister_switch); |