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gerrit-public.fairphone.software / kernel / msm-5.4 / 667daedaecd15b89d0ded7af49519f28d6ea2cf4 / . / include / linux / mlx5 / port.h
blob: 4adfac15f0e933aa6a9fc85abaa2991ed821e500 [file] [log] [blame]
Achiad Shochatada68c32016-02-22 18:17:23 +0200[diff] [blame]1/*
2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#ifndef __MLX5_PORT_H__
34#define __MLX5_PORT_H__
35
36#include <linux/mlx5/driver.h>
37
Gal Pressmanda54d242016-04-24 22:51:53 +0300[diff] [blame]38enum mlx5_beacon_duration {
39 MLX5_BEACON_DURATION_OFF = 0x0,
40 MLX5_BEACON_DURATION_INF = 0xffff,
41};
42
Gal Pressmanbb641432016-04-24 22:51:54 +0300[diff] [blame]43enum mlx5_module_id {
44 MLX5_MODULE_ID_SFP = 0x3,
45 MLX5_MODULE_ID_QSFP = 0xC,
46 MLX5_MODULE_ID_QSFP_PLUS = 0xD,
47 MLX5_MODULE_ID_QSFP28 = 0x11,
48};
49
50#define MLX5_EEPROM_MAX_BYTES 32
51#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff
52#define MLX5_I2C_ADDR_LOW 0x50
53#define MLX5_I2C_ADDR_HIGH 0x51
54#define MLX5_EEPROM_PAGE_LENGTH 256
55
Achiad Shochatada68c32016-02-22 18:17:23 +0200[diff] [blame]56int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps);
57int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
58 int ptys_size, int proto_mask, u8 local_port);
59int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev,
60 u32 *proto_cap, int proto_mask);
61int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev,
62 u32 *proto_admin, int proto_mask);
63int mlx5_query_port_link_width_oper(struct mlx5_core_dev *dev,
64 u8 *link_width_oper, u8 local_port);
65int mlx5_query_port_proto_oper(struct mlx5_core_dev *dev,
66 u8 *proto_oper, int proto_mask,
67 u8 local_port);
68int mlx5_set_port_proto(struct mlx5_core_dev *dev, u32 proto_admin,
69 int proto_mask);
Gal Pressman667daed2016-06-23 17:02:42 +0300[diff] [blame^]70void mlx5_toggle_port_link(struct mlx5_core_dev *dev);
Achiad Shochatada68c32016-02-22 18:17:23 +0200[diff] [blame]71int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
72 enum mlx5_port_status status);
73int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
74 enum mlx5_port_status *status);
Gal Pressmanda54d242016-04-24 22:51:53 +0300[diff] [blame]75int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
Achiad Shochatada68c32016-02-22 18:17:23 +0200[diff] [blame]76
Saeed Mahameed046339e2016-04-22 00:33:03 +0300[diff] [blame]77int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
78void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu, u8 port);
79void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu,
Achiad Shochatada68c32016-02-22 18:17:23 +0200[diff] [blame]80 u8 port);
81
82int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,
83 u8 *vl_hw_cap, u8 local_port);
84
85int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);
86int mlx5_query_port_pause(struct mlx5_core_dev *dev,
87 u32 *rx_pause, u32 *tx_pause);
88
Achiad Shochatad909eb2016-02-22 18:17:24 +0200[diff] [blame]89int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);
90int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,
91 u8 *pfc_en_rx);
92
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200[diff] [blame]93int mlx5_max_tc(struct mlx5_core_dev *mdev);
94
95int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);
96int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);
97int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);
Tariq Toukand8880792016-02-22 18:17:28 +0200[diff] [blame]98int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,
99 u8 *max_bw_value,
100 u8 *max_bw_unit);
101int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,
102 u8 *max_bw_value,
103 u8 *max_bw_unit);
Tariq Toukan928cfe82016-02-22 18:17:29 +0200[diff] [blame]104int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
105int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200[diff] [blame]106
Eran Ben Elisha94cb1eb2016-04-24 22:51:52 +0300[diff] [blame]107int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);
108void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,
109 bool *enabled);
Gal Pressmanbb641432016-04-24 22:51:54 +0300[diff] [blame]110int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
111 u16 offset, u16 size, u8 *data);
Eran Ben Elisha94cb1eb2016-04-24 22:51:52 +0300[diff] [blame]112
Achiad Shochatada68c32016-02-22 18:17:23 +0200[diff] [blame]113#endif /* __MLX5_PORT_H__ */