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Greg Rose5321a212013-12-21 06:13:06 +00001/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
Mitch Williamsa3773842014-02-13 03:48:49 -08004 * Copyright(c) 2013 - 2014 Intel Corporation.
Greg Rose5321a212013-12-21 06:13:06 +00005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
Jesse Brandeburgb8316072014-04-05 07:46:11 +000015 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
Greg Rose5321a212013-12-21 06:13:06 +000018 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40EVF_H_
28#define _I40EVF_H_
29
30#include <linux/module.h>
31#include <linux/pci.h>
32#include <linux/aer.h>
33#include <linux/netdevice.h>
34#include <linux/vmalloc.h>
35#include <linux/interrupt.h>
36#include <linux/ethtool.h>
37#include <linux/if_vlan.h>
38#include <linux/ip.h>
39#include <linux/tcp.h>
40#include <linux/sctp.h>
41#include <linux/ipv6.h>
42#include <net/ip6_checksum.h>
43#include <net/udp.h>
Greg Rose5321a212013-12-21 06:13:06 +000044
45#include "i40e_type.h"
46#include "i40e_virtchnl.h"
47#include "i40e_txrx.h"
48
49#define DEFAULT_DEBUG_LEVEL_SHIFT 3
50#define PFX "i40evf: "
Greg Rose5321a212013-12-21 06:13:06 +000051
52/* dummy struct to make common code less painful */
53struct i40e_vsi {
54 struct i40evf_adapter *back;
55 struct net_device *netdev;
56 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
57 u16 seid;
58 u16 id;
59 unsigned long state;
60 int base_vector;
61 u16 work_limit;
62 /* high bit set means dynamic, use accessor routines to read/write.
63 * hardware only supports 2us resolution for the ITR registers.
64 * these values always store the USER setting, and must be converted
65 * before programming to a register.
66 */
67 u16 rx_itr_setting;
68 u16 tx_itr_setting;
Mitch Williamsf578f5f2015-08-28 17:55:58 -040069 u16 qs_handle;
Greg Rose5321a212013-12-21 06:13:06 +000070};
71
72/* How many Rx Buffers do we bundle into one write to the hardware ? */
73#define I40EVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
74#define I40EVF_DEFAULT_TXD 512
75#define I40EVF_DEFAULT_RXD 512
76#define I40EVF_MAX_TXD 4096
77#define I40EVF_MIN_TXD 64
78#define I40EVF_MAX_RXD 4096
79#define I40EVF_MIN_RXD 64
Mitch Williams337eb082014-04-23 04:50:08 +000080#define I40EVF_REQ_DESCRIPTOR_MULTIPLE 32
Greg Rose5321a212013-12-21 06:13:06 +000081
82/* Supported Rx Buffer Sizes */
83#define I40EVF_RXBUFFER_64 64 /* Used for packet split */
84#define I40EVF_RXBUFFER_128 128 /* Used for packet split */
85#define I40EVF_RXBUFFER_256 256 /* Used for packet split */
86#define I40EVF_RXBUFFER_2048 2048
87#define I40EVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */
88#define I40EVF_MAX_AQ_BUF_SIZE 4096
89#define I40EVF_AQ_LEN 32
Mitch Williams3f7e5c32015-09-28 14:12:42 -040090#define I40EVF_AQ_MAX_ERR 20 /* times to try before resetting AQ */
Greg Rose5321a212013-12-21 06:13:06 +000091
92#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
93
94#define I40E_RX_DESC(R, i) (&(((union i40e_32byte_rx_desc *)((R)->desc))[i]))
95#define I40E_TX_DESC(R, i) (&(((struct i40e_tx_desc *)((R)->desc))[i]))
96#define I40E_TX_CTXTDESC(R, i) \
97 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
98#define MAX_RX_QUEUES 8
99#define MAX_TX_QUEUES MAX_RX_QUEUES
100
Anjali Singhai Jaine25d00b82015-06-23 19:00:04 -0400101#define I40EVF_HKEY_ARRAY_SIZE ((I40E_VFQF_HKEY_MAX_INDEX + 1) * 4)
Helin Zhang2c86ac32015-10-27 16:15:06 -0400102#define I40EVF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT_MAX_INDEX + 1) * 4)
Anjali Singhai Jaine25d00b82015-06-23 19:00:04 -0400103
Greg Rose5321a212013-12-21 06:13:06 +0000104/* MAX_MSIX_Q_VECTORS of these are allocated,
105 * but we only use one per queue-specific vector.
106 */
107struct i40e_q_vector {
108 struct i40evf_adapter *adapter;
109 struct i40e_vsi *vsi;
110 struct napi_struct napi;
111 unsigned long reg_idx;
112 struct i40e_ring_container rx;
113 struct i40e_ring_container tx;
114 u32 ring_mask;
115 u8 num_ringpairs; /* total number of ring pairs in vector */
Jesse Brandeburgee2319c2015-09-28 14:16:54 -0400116#define ITR_COUNTDOWN_START 100
117 u8 itr_countdown; /* when 0 or 1 update ITR */
Greg Rose5321a212013-12-21 06:13:06 +0000118 int v_idx; /* vector index in list */
119 char name[IFNAMSIZ + 9];
Anjali Singhai Jain8e0764b2015-06-05 12:20:30 -0400120 bool arm_wb_state;
Greg Rose5321a212013-12-21 06:13:06 +0000121 cpumask_var_t affinity_mask;
122};
123
124/* Helper macros to switch between ints/sec and what the register uses.
125 * And yes, it's the same math going both ways. The lowest value
126 * supported by all of the i40e hardware is 8.
127 */
128#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
129 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
130#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
131
132#define I40EVF_DESC_UNUSED(R) \
133 ((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
134 (R)->next_to_clean - (R)->next_to_use - 1)
135
136#define I40EVF_RX_DESC_ADV(R, i) \
137 (&(((union i40e_adv_rx_desc *)((R).desc))[i]))
138#define I40EVF_TX_DESC_ADV(R, i) \
139 (&(((union i40e_adv_tx_desc *)((R).desc))[i]))
140#define I40EVF_TX_CTXTDESC_ADV(R, i) \
141 (&(((struct i40e_adv_tx_context_desc *)((R).desc))[i]))
142
143#define OTHER_VECTOR 1
144#define NONQ_VECS (OTHER_VECTOR)
145
146#define MAX_MSIX_Q_VECTORS 4
147#define MAX_MSIX_COUNT 5
148
149#define MIN_MSIX_Q_VECTORS 1
150#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NONQ_VECS)
151
152#define I40EVF_QUEUE_END_OF_LIST 0x7FF
153#define I40EVF_FREE_VECTOR 0x7FFF
154struct i40evf_mac_filter {
155 struct list_head list;
156 u8 macaddr[ETH_ALEN];
157 bool remove; /* filter needs to be removed */
158 bool add; /* filter needs to be added */
159};
160
161struct i40evf_vlan_filter {
162 struct list_head list;
163 u16 vlan;
164 bool remove; /* filter needs to be removed */
165 bool add; /* filter needs to be added */
166};
167
168/* Driver state. The order of these is important! */
169enum i40evf_state_t {
170 __I40EVF_STARTUP, /* driver loaded, probe complete */
Greg Rose5321a212013-12-21 06:13:06 +0000171 __I40EVF_REMOVE, /* driver is being unloaded */
172 __I40EVF_INIT_VERSION_CHECK, /* aq msg sent, awaiting reply */
173 __I40EVF_INIT_GET_RESOURCES, /* aq msg sent, awaiting reply */
174 __I40EVF_INIT_SW, /* got resources, setting up structs */
Mitch Williamsef8693e2014-02-13 03:48:53 -0800175 __I40EVF_RESETTING, /* in reset */
Greg Rose5321a212013-12-21 06:13:06 +0000176 /* Below here, watchdog is running */
177 __I40EVF_DOWN, /* ready, can be opened */
178 __I40EVF_TESTING, /* in ethtool self-test */
Greg Rose5321a212013-12-21 06:13:06 +0000179 __I40EVF_RUNNING, /* opened, working */
180};
181
182enum i40evf_critical_section_t {
183 __I40EVF_IN_CRITICAL_TASK, /* cannot be interrupted */
184};
185/* make common code happy */
186#define __I40E_DOWN __I40EVF_DOWN
187
188/* board specific private data structure */
189struct i40evf_adapter {
190 struct timer_list watchdog_timer;
Greg Rose5321a212013-12-21 06:13:06 +0000191 struct work_struct reset_task;
192 struct work_struct adminq_task;
193 struct delayed_work init_task;
194 struct i40e_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
195 struct list_head vlan_filter_list;
Mitch Williamse1dfee82014-02-13 03:48:51 -0800196 char misc_vector_name[IFNAMSIZ + 9];
Mitch Williamscc052922014-10-25 03:24:34 +0000197 int num_active_queues;
Greg Rose5321a212013-12-21 06:13:06 +0000198
Greg Rose5321a212013-12-21 06:13:06 +0000199 /* TX */
200 struct i40e_ring *tx_rings[I40E_MAX_VSI_QP];
Greg Rose5321a212013-12-21 06:13:06 +0000201 u32 tx_timeout_count;
202 struct list_head mac_filter_list;
Mitch Williamsd732a182014-04-24 06:41:37 +0000203 u32 tx_desc_count;
Greg Rose5321a212013-12-21 06:13:06 +0000204
205 /* RX */
206 struct i40e_ring *rx_rings[I40E_MAX_VSI_QP];
Greg Rose5321a212013-12-21 06:13:06 +0000207 u64 hw_csum_rx_error;
Mitch Williamsd732a182014-04-24 06:41:37 +0000208 u32 rx_desc_count;
Greg Rose5321a212013-12-21 06:13:06 +0000209 int num_msix_vectors;
210 struct msix_entry *msix_entries;
211
Mitch Williamse8106eb2014-02-13 03:48:52 -0800212 u32 flags;
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400213#define I40EVF_FLAG_RX_CSUM_ENABLED BIT(0)
214#define I40EVF_FLAG_RX_1BUF_CAPABLE BIT(1)
215#define I40EVF_FLAG_RX_PS_CAPABLE BIT(2)
216#define I40EVF_FLAG_RX_PS_ENABLED BIT(3)
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400217#define I40EVF_FLAG_IMIR_ENABLED BIT(5)
218#define I40EVF_FLAG_MQ_CAPABLE BIT(6)
219#define I40EVF_FLAG_NEED_LINK_UPDATE BIT(7)
220#define I40EVF_FLAG_PF_COMMS_FAILED BIT(8)
221#define I40EVF_FLAG_RESET_PENDING BIT(9)
222#define I40EVF_FLAG_RESET_NEEDED BIT(10)
Anjali Singhai Jaind502ce02015-06-05 12:20:26 -0400223#define I40EVF_FLAG_WB_ON_ITR_CAPABLE BIT(11)
224#define I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE BIT(12)
Mitch Williams14e52ee2015-08-31 19:54:44 -0400225#define I40EVF_FLAG_ADDR_SET_BY_PF BIT(13)
Anjali Singhai Jaind502ce02015-06-05 12:20:26 -0400226/* duplicates for common code */
Greg Rose5321a212013-12-21 06:13:06 +0000227#define I40E_FLAG_FDIR_ATR_ENABLED 0
228#define I40E_FLAG_DCB_ENABLED 0
Greg Rose5321a212013-12-21 06:13:06 +0000229#define I40E_FLAG_RX_CSUM_ENABLED I40EVF_FLAG_RX_CSUM_ENABLED
Anjali Singhai Jaind502ce02015-06-05 12:20:26 -0400230#define I40E_FLAG_WB_ON_ITR_CAPABLE I40EVF_FLAG_WB_ON_ITR_CAPABLE
231#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE
Greg Rose5321a212013-12-21 06:13:06 +0000232 /* flags for admin queue service task */
233 u32 aq_required;
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400234#define I40EVF_FLAG_AQ_ENABLE_QUEUES BIT(0)
235#define I40EVF_FLAG_AQ_DISABLE_QUEUES BIT(1)
236#define I40EVF_FLAG_AQ_ADD_MAC_FILTER BIT(2)
237#define I40EVF_FLAG_AQ_ADD_VLAN_FILTER BIT(3)
238#define I40EVF_FLAG_AQ_DEL_MAC_FILTER BIT(4)
239#define I40EVF_FLAG_AQ_DEL_VLAN_FILTER BIT(5)
240#define I40EVF_FLAG_AQ_CONFIGURE_QUEUES BIT(6)
241#define I40EVF_FLAG_AQ_MAP_VECTORS BIT(7)
242#define I40EVF_FLAG_AQ_HANDLE_RESET BIT(8)
Anjali Singhai Jaind502ce02015-06-05 12:20:26 -0400243#define I40EVF_FLAG_AQ_CONFIGURE_RSS BIT(9)
Jesse Brandeburg41a1d042015-06-04 16:24:02 -0400244#define I40EVF_FLAG_AQ_GET_CONFIG BIT(10)
Mitch Williamsef8693e2014-02-13 03:48:53 -0800245
Greg Rose5321a212013-12-21 06:13:06 +0000246 /* OS defined structs */
247 struct net_device *netdev;
248 struct pci_dev *pdev;
249 struct net_device_stats net_stats;
250
Mitch Williams708e8c22014-02-13 03:48:50 -0800251 struct i40e_hw hw; /* defined in i40e_type.h */
Greg Rose5321a212013-12-21 06:13:06 +0000252
253 enum i40evf_state_t state;
Mitch Williams75a64432014-11-11 20:02:42 +0000254 unsigned long crit_section;
Greg Rose5321a212013-12-21 06:13:06 +0000255
256 struct work_struct watchdog_task;
257 bool netdev_registered;
Greg Rose5321a212013-12-21 06:13:06 +0000258 bool link_up;
259 enum i40e_virtchnl_ops current_op;
Mitch Williams17a65a72015-06-04 16:23:56 -0400260#define CLIENT_ENABLED(_a) ((_a)->vf_res->vf_offload_flags & \
261 I40E_VIRTCHNL_VF_OFFLOAD_IWARP)
262#define RSS_AQ(_a) ((_a)->vf_res->vf_offload_flags & \
263 I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ)
264#define VLAN_ALLOWED(_a) ((_a)->vf_res->vf_offload_flags & \
265 I40E_VIRTCHNL_VF_OFFLOAD_VLAN)
Greg Rose5321a212013-12-21 06:13:06 +0000266 struct i40e_virtchnl_vf_resource *vf_res; /* incl. all VSIs */
267 struct i40e_virtchnl_vsi_resource *vsi_res; /* our LAN VSI */
Mitch Williams17a65a72015-06-04 16:23:56 -0400268 struct i40e_virtchnl_version_info pf_version;
269#define PF_IS_V11(_a) (((_a)->pf_version.major == 1) && \
270 ((_a)->pf_version.minor == 1))
Greg Rose5321a212013-12-21 06:13:06 +0000271 u16 msg_enable;
272 struct i40e_eth_stats current_stats;
273 struct i40e_vsi vsi;
274 u32 aq_wait_count;
275};
276
Greg Rose5321a212013-12-21 06:13:06 +0000277
278/* needed by i40evf_ethtool.c */
279extern char i40evf_driver_name[];
280extern const char i40evf_driver_version[];
281
282int i40evf_up(struct i40evf_adapter *adapter);
283void i40evf_down(struct i40evf_adapter *adapter);
Mitch Williamse6d038d2015-06-04 16:23:58 -0400284int i40evf_process_config(struct i40evf_adapter *adapter);
Greg Rose5321a212013-12-21 06:13:06 +0000285void i40evf_reset(struct i40evf_adapter *adapter);
286void i40evf_set_ethtool_ops(struct net_device *netdev);
287void i40evf_update_stats(struct i40evf_adapter *adapter);
288void i40evf_reset_interrupt_capability(struct i40evf_adapter *adapter);
289int i40evf_init_interrupt_scheme(struct i40evf_adapter *adapter);
290void i40evf_irq_enable_queues(struct i40evf_adapter *adapter, u32 mask);
Mitch Williamse284fc82015-03-27 00:12:09 -0700291void i40evf_free_all_tx_resources(struct i40evf_adapter *adapter);
292void i40evf_free_all_rx_resources(struct i40evf_adapter *adapter);
Greg Rose5321a212013-12-21 06:13:06 +0000293
294void i40e_napi_add_all(struct i40evf_adapter *adapter);
295void i40e_napi_del_all(struct i40evf_adapter *adapter);
296
297int i40evf_send_api_ver(struct i40evf_adapter *adapter);
298int i40evf_verify_api_ver(struct i40evf_adapter *adapter);
299int i40evf_send_vf_config_msg(struct i40evf_adapter *adapter);
300int i40evf_get_vf_config(struct i40evf_adapter *adapter);
301void i40evf_irq_enable(struct i40evf_adapter *adapter, bool flush);
302void i40evf_configure_queues(struct i40evf_adapter *adapter);
303void i40evf_deconfigure_queues(struct i40evf_adapter *adapter);
304void i40evf_enable_queues(struct i40evf_adapter *adapter);
305void i40evf_disable_queues(struct i40evf_adapter *adapter);
306void i40evf_map_queues(struct i40evf_adapter *adapter);
307void i40evf_add_ether_addrs(struct i40evf_adapter *adapter);
308void i40evf_del_ether_addrs(struct i40evf_adapter *adapter);
309void i40evf_add_vlans(struct i40evf_adapter *adapter);
310void i40evf_del_vlans(struct i40evf_adapter *adapter);
311void i40evf_set_promiscuous(struct i40evf_adapter *adapter, int flags);
312void i40evf_request_stats(struct i40evf_adapter *adapter);
Mitch Williams625777e2014-02-20 19:29:05 -0800313void i40evf_request_reset(struct i40evf_adapter *adapter);
Greg Rose5321a212013-12-21 06:13:06 +0000314void i40evf_virtchnl_completion(struct i40evf_adapter *adapter,
315 enum i40e_virtchnl_ops v_opcode,
316 i40e_status v_retval, u8 *msg, u16 msglen);
Helin Zhang2c86ac32015-10-27 16:15:06 -0400317int i40evf_config_rss(struct i40e_vsi *vsi, const u8 *seed, u8 *lut,
318 u16 lut_size);
Helin Zhang90b02b42015-10-26 19:44:33 -0400319int i40evf_get_rss(struct i40e_vsi *vsi, const u8 *seed, u8 *lut,
320 u16 lut_size);
Greg Rose5321a212013-12-21 06:13:06 +0000321#endif /* _I40EVF_H_ */