Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
| 3 | * Copyright(c) 2009-2010 Realtek Corporation. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of version 2 of the GNU General Public License as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., |
| 16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 17 | * |
| 18 | * The full GNU General Public License is included in this distribution in the |
| 19 | * file called LICENSE. |
| 20 | * |
| 21 | * Contact Information: |
| 22 | * wlanfae <wlanfae@realtek.com> |
| 23 | * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, |
| 24 | * Hsinchu 300, Taiwan. |
| 25 | * |
| 26 | * Larry Finger <Larry.Finger@lwfinger.net> |
| 27 | * |
| 28 | *****************************************************************************/ |
| 29 | |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 30 | #include "dm_common.h" |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 31 | #include "phy_common.h" |
| 32 | #include "../pci.h" |
| 33 | #include "../base.h" |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 34 | |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 35 | struct dig_t dm_digtable; |
| 36 | static struct ps_t dm_pstable; |
| 37 | |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 38 | #define BT_RSSI_STATE_NORMAL_POWER BIT_OFFSET_LEN_MASK_32(0, 1) |
| 39 | #define BT_RSSI_STATE_AMDPU_OFF BIT_OFFSET_LEN_MASK_32(1, 1) |
| 40 | #define BT_RSSI_STATE_SPECIAL_LOW BIT_OFFSET_LEN_MASK_32(2, 1) |
| 41 | #define BT_RSSI_STATE_BG_EDCA_LOW BIT_OFFSET_LEN_MASK_32(3, 1) |
| 42 | #define BT_RSSI_STATE_TXPOWER_LOW BIT_OFFSET_LEN_MASK_32(4, 1) |
| 43 | |
| 44 | #define RTLPRIV (struct rtl_priv *) |
| 45 | #define GET_UNDECORATED_AVERAGE_RSSI(_priv) \ |
| 46 | ((RTLPRIV(_priv))->mac80211.opmode == \ |
| 47 | NL80211_IFTYPE_ADHOC) ? \ |
| 48 | ((RTLPRIV(_priv))->dm.entry_min_undecoratedsmoothed_pwdb) : \ |
| 49 | ((RTLPRIV(_priv))->dm.undecorated_smoothed_pwdb) |
| 50 | |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 51 | static const u32 ofdmswing_table[OFDM_TABLE_SIZE] = { |
| 52 | 0x7f8001fe, |
| 53 | 0x788001e2, |
| 54 | 0x71c001c7, |
| 55 | 0x6b8001ae, |
| 56 | 0x65400195, |
| 57 | 0x5fc0017f, |
| 58 | 0x5a400169, |
| 59 | 0x55400155, |
| 60 | 0x50800142, |
| 61 | 0x4c000130, |
| 62 | 0x47c0011f, |
| 63 | 0x43c0010f, |
| 64 | 0x40000100, |
| 65 | 0x3c8000f2, |
| 66 | 0x390000e4, |
| 67 | 0x35c000d7, |
| 68 | 0x32c000cb, |
| 69 | 0x300000c0, |
| 70 | 0x2d4000b5, |
| 71 | 0x2ac000ab, |
| 72 | 0x288000a2, |
| 73 | 0x26000098, |
| 74 | 0x24000090, |
| 75 | 0x22000088, |
| 76 | 0x20000080, |
| 77 | 0x1e400079, |
| 78 | 0x1c800072, |
| 79 | 0x1b00006c, |
| 80 | 0x19800066, |
| 81 | 0x18000060, |
| 82 | 0x16c0005b, |
| 83 | 0x15800056, |
| 84 | 0x14400051, |
| 85 | 0x1300004c, |
| 86 | 0x12000048, |
| 87 | 0x11000044, |
| 88 | 0x10000040, |
| 89 | }; |
| 90 | |
| 91 | static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = { |
| 92 | {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, |
| 93 | {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, |
| 94 | {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, |
| 95 | {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, |
| 96 | {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, |
| 97 | {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, |
| 98 | {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, |
| 99 | {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, |
| 100 | {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, |
| 101 | {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, |
| 102 | {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, |
| 103 | {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, |
| 104 | {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, |
| 105 | {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, |
| 106 | {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, |
| 107 | {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, |
| 108 | {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, |
| 109 | {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, |
| 110 | {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, |
| 111 | {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, |
| 112 | {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, |
| 113 | {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, |
| 114 | {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, |
| 115 | {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, |
| 116 | {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, |
| 117 | {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, |
| 118 | {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, |
| 119 | {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, |
| 120 | {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, |
| 121 | {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, |
| 122 | {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, |
| 123 | {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, |
| 124 | {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} |
| 125 | }; |
| 126 | |
| 127 | static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = { |
| 128 | {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, |
| 129 | {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, |
| 130 | {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, |
| 131 | {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, |
| 132 | {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, |
| 133 | {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, |
| 134 | {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, |
| 135 | {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, |
| 136 | {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, |
| 137 | {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, |
| 138 | {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, |
| 139 | {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, |
| 140 | {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, |
| 141 | {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, |
| 142 | {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, |
| 143 | {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, |
| 144 | {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, |
| 145 | {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, |
| 146 | {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, |
| 147 | {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, |
| 148 | {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, |
| 149 | {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, |
| 150 | {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, |
| 151 | {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, |
| 152 | {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, |
| 153 | {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, |
| 154 | {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, |
| 155 | {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, |
| 156 | {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, |
| 157 | {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, |
| 158 | {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, |
| 159 | {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, |
| 160 | {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} |
| 161 | }; |
| 162 | |
| 163 | static void rtl92c_dm_diginit(struct ieee80211_hw *hw) |
| 164 | { |
| 165 | dm_digtable.dig_enable_flag = true; |
| 166 | dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; |
| 167 | dm_digtable.cur_igvalue = 0x20; |
| 168 | dm_digtable.pre_igvalue = 0x0; |
| 169 | dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT; |
| 170 | dm_digtable.presta_connectstate = DIG_STA_DISCONNECT; |
| 171 | dm_digtable.curmultista_connectstate = DIG_MULTISTA_DISCONNECT; |
| 172 | dm_digtable.rssi_lowthresh = DM_DIG_THRESH_LOW; |
| 173 | dm_digtable.rssi_highthresh = DM_DIG_THRESH_HIGH; |
| 174 | dm_digtable.fa_lowthresh = DM_FALSEALARM_THRESH_LOW; |
| 175 | dm_digtable.fa_highthresh = DM_FALSEALARM_THRESH_HIGH; |
| 176 | dm_digtable.rx_gain_range_max = DM_DIG_MAX; |
| 177 | dm_digtable.rx_gain_range_min = DM_DIG_MIN; |
| 178 | dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT; |
| 179 | dm_digtable.backoff_val_range_max = DM_DIG_BACKOFF_MAX; |
| 180 | dm_digtable.backoff_val_range_min = DM_DIG_BACKOFF_MIN; |
| 181 | dm_digtable.pre_cck_pd_state = CCK_PD_STAGE_MAX; |
| 182 | dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX; |
| 183 | } |
| 184 | |
| 185 | static u8 rtl92c_dm_initial_gain_min_pwdb(struct ieee80211_hw *hw) |
| 186 | { |
| 187 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 188 | long rssi_val_min = 0; |
| 189 | |
| 190 | if ((dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) && |
| 191 | (dm_digtable.cursta_connectctate == DIG_STA_CONNECT)) { |
| 192 | if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb != 0) |
| 193 | rssi_val_min = |
| 194 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb > |
| 195 | rtlpriv->dm.undecorated_smoothed_pwdb) ? |
| 196 | rtlpriv->dm.undecorated_smoothed_pwdb : |
| 197 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; |
| 198 | else |
| 199 | rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb; |
| 200 | } else if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT || |
| 201 | dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT) { |
| 202 | rssi_val_min = rtlpriv->dm.undecorated_smoothed_pwdb; |
| 203 | } else if (dm_digtable.curmultista_connectstate == |
| 204 | DIG_MULTISTA_CONNECT) { |
| 205 | rssi_val_min = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; |
| 206 | } |
| 207 | |
| 208 | return (u8) rssi_val_min; |
| 209 | } |
| 210 | |
| 211 | static void rtl92c_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw) |
| 212 | { |
| 213 | u32 ret_value; |
| 214 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 215 | struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt); |
| 216 | |
| 217 | ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD); |
| 218 | falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16); |
| 219 | |
| 220 | ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD); |
| 221 | falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff); |
| 222 | falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16); |
| 223 | |
| 224 | ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD); |
| 225 | falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff); |
| 226 | falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail + |
| 227 | falsealm_cnt->cnt_rate_illegal + |
| 228 | falsealm_cnt->cnt_crc8_fail + falsealm_cnt->cnt_mcs_fail; |
| 229 | |
| 230 | rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, BIT(14), 1); |
| 231 | ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0); |
| 232 | falsealm_cnt->cnt_cck_fail = ret_value; |
| 233 | |
| 234 | ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3); |
| 235 | falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8; |
| 236 | falsealm_cnt->cnt_all = (falsealm_cnt->cnt_parity_fail + |
| 237 | falsealm_cnt->cnt_rate_illegal + |
| 238 | falsealm_cnt->cnt_crc8_fail + |
| 239 | falsealm_cnt->cnt_mcs_fail + |
| 240 | falsealm_cnt->cnt_cck_fail); |
| 241 | |
| 242 | rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1); |
| 243 | rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0); |
| 244 | rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0); |
| 245 | rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2); |
| 246 | |
| 247 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
| 248 | ("cnt_parity_fail = %d, cnt_rate_illegal = %d, " |
| 249 | "cnt_crc8_fail = %d, cnt_mcs_fail = %d\n", |
| 250 | falsealm_cnt->cnt_parity_fail, |
| 251 | falsealm_cnt->cnt_rate_illegal, |
| 252 | falsealm_cnt->cnt_crc8_fail, falsealm_cnt->cnt_mcs_fail)); |
| 253 | |
| 254 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
| 255 | ("cnt_ofdm_fail = %x, cnt_cck_fail = %x, cnt_all = %x\n", |
| 256 | falsealm_cnt->cnt_ofdm_fail, |
| 257 | falsealm_cnt->cnt_cck_fail, falsealm_cnt->cnt_all)); |
| 258 | } |
| 259 | |
| 260 | static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw) |
| 261 | { |
| 262 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 263 | u8 value_igi = dm_digtable.cur_igvalue; |
| 264 | |
| 265 | if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0) |
| 266 | value_igi--; |
| 267 | else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1) |
| 268 | value_igi += 0; |
| 269 | else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2) |
| 270 | value_igi++; |
| 271 | else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2) |
| 272 | value_igi += 2; |
| 273 | if (value_igi > DM_DIG_FA_UPPER) |
| 274 | value_igi = DM_DIG_FA_UPPER; |
| 275 | else if (value_igi < DM_DIG_FA_LOWER) |
| 276 | value_igi = DM_DIG_FA_LOWER; |
| 277 | if (rtlpriv->falsealm_cnt.cnt_all > 10000) |
| 278 | value_igi = 0x32; |
| 279 | |
| 280 | dm_digtable.cur_igvalue = value_igi; |
| 281 | rtl92c_dm_write_dig(hw); |
| 282 | } |
| 283 | |
| 284 | static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw) |
| 285 | { |
| 286 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 287 | |
| 288 | if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable.fa_highthresh) { |
| 289 | if ((dm_digtable.backoff_val - 2) < |
| 290 | dm_digtable.backoff_val_range_min) |
| 291 | dm_digtable.backoff_val = |
| 292 | dm_digtable.backoff_val_range_min; |
| 293 | else |
| 294 | dm_digtable.backoff_val -= 2; |
| 295 | } else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable.fa_lowthresh) { |
| 296 | if ((dm_digtable.backoff_val + 2) > |
| 297 | dm_digtable.backoff_val_range_max) |
| 298 | dm_digtable.backoff_val = |
| 299 | dm_digtable.backoff_val_range_max; |
| 300 | else |
| 301 | dm_digtable.backoff_val += 2; |
| 302 | } |
| 303 | |
| 304 | if ((dm_digtable.rssi_val_min + 10 - dm_digtable.backoff_val) > |
| 305 | dm_digtable.rx_gain_range_max) |
| 306 | dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_max; |
| 307 | else if ((dm_digtable.rssi_val_min + 10 - |
| 308 | dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min) |
| 309 | dm_digtable.cur_igvalue = dm_digtable.rx_gain_range_min; |
| 310 | else |
| 311 | dm_digtable.cur_igvalue = dm_digtable.rssi_val_min + 10 - |
| 312 | dm_digtable.backoff_val; |
| 313 | |
| 314 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
| 315 | ("rssi_val_min = %x backoff_val %x\n", |
| 316 | dm_digtable.rssi_val_min, dm_digtable.backoff_val)); |
| 317 | |
| 318 | rtl92c_dm_write_dig(hw); |
| 319 | } |
| 320 | |
| 321 | static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw) |
| 322 | { |
Chaoming_Li | 2b8359f | 2011-04-25 12:53:55 -0500 | [diff] [blame] | 323 | static u8 initialized; /* initialized to false */ |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 324 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 325 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
| 326 | long rssi_strength = rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 327 | bool multi_sta = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 328 | |
| 329 | if (mac->opmode == NL80211_IFTYPE_ADHOC) |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 330 | multi_sta = true; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 331 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 332 | if ((multi_sta == false) || (dm_digtable.cursta_connectctate != |
| 333 | DIG_STA_DISCONNECT)) { |
Chaoming_Li | 2b8359f | 2011-04-25 12:53:55 -0500 | [diff] [blame] | 334 | initialized = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 335 | dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; |
| 336 | return; |
Chaoming_Li | 2b8359f | 2011-04-25 12:53:55 -0500 | [diff] [blame] | 337 | } else if (initialized == false) { |
| 338 | initialized = true; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 339 | dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0; |
| 340 | dm_digtable.cur_igvalue = 0x20; |
| 341 | rtl92c_dm_write_dig(hw); |
| 342 | } |
| 343 | |
| 344 | if (dm_digtable.curmultista_connectstate == DIG_MULTISTA_CONNECT) { |
| 345 | if ((rssi_strength < dm_digtable.rssi_lowthresh) && |
| 346 | (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) { |
| 347 | |
| 348 | if (dm_digtable.dig_ext_port_stage == |
| 349 | DIG_EXT_PORT_STAGE_2) { |
| 350 | dm_digtable.cur_igvalue = 0x20; |
| 351 | rtl92c_dm_write_dig(hw); |
| 352 | } |
| 353 | |
| 354 | dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_1; |
| 355 | } else if (rssi_strength > dm_digtable.rssi_highthresh) { |
| 356 | dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_2; |
| 357 | rtl92c_dm_ctrl_initgain_by_fa(hw); |
| 358 | } |
| 359 | } else if (dm_digtable.dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) { |
| 360 | dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_0; |
| 361 | dm_digtable.cur_igvalue = 0x20; |
| 362 | rtl92c_dm_write_dig(hw); |
| 363 | } |
| 364 | |
| 365 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
| 366 | ("curmultista_connectstate = " |
| 367 | "%x dig_ext_port_stage %x\n", |
| 368 | dm_digtable.curmultista_connectstate, |
| 369 | dm_digtable.dig_ext_port_stage)); |
| 370 | } |
| 371 | |
| 372 | static void rtl92c_dm_initial_gain_sta(struct ieee80211_hw *hw) |
| 373 | { |
| 374 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 375 | |
| 376 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
| 377 | ("presta_connectstate = %x," |
| 378 | " cursta_connectctate = %x\n", |
| 379 | dm_digtable.presta_connectstate, |
| 380 | dm_digtable.cursta_connectctate)); |
| 381 | |
| 382 | if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate |
| 383 | || dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT |
| 384 | || dm_digtable.cursta_connectctate == DIG_STA_CONNECT) { |
| 385 | |
| 386 | if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) { |
| 387 | dm_digtable.rssi_val_min = |
| 388 | rtl92c_dm_initial_gain_min_pwdb(hw); |
| 389 | rtl92c_dm_ctrl_initgain_by_rssi(hw); |
| 390 | } |
| 391 | } else { |
| 392 | dm_digtable.rssi_val_min = 0; |
| 393 | dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; |
| 394 | dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT; |
| 395 | dm_digtable.cur_igvalue = 0x20; |
| 396 | dm_digtable.pre_igvalue = 0; |
| 397 | rtl92c_dm_write_dig(hw); |
| 398 | } |
| 399 | } |
| 400 | |
| 401 | static void rtl92c_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw) |
| 402 | { |
| 403 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 404 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 405 | |
| 406 | if (dm_digtable.cursta_connectctate == DIG_STA_CONNECT) { |
| 407 | dm_digtable.rssi_val_min = rtl92c_dm_initial_gain_min_pwdb(hw); |
| 408 | |
| 409 | if (dm_digtable.pre_cck_pd_state == CCK_PD_STAGE_LowRssi) { |
| 410 | if (dm_digtable.rssi_val_min <= 25) |
| 411 | dm_digtable.cur_cck_pd_state = |
| 412 | CCK_PD_STAGE_LowRssi; |
| 413 | else |
| 414 | dm_digtable.cur_cck_pd_state = |
| 415 | CCK_PD_STAGE_HighRssi; |
| 416 | } else { |
| 417 | if (dm_digtable.rssi_val_min <= 20) |
| 418 | dm_digtable.cur_cck_pd_state = |
| 419 | CCK_PD_STAGE_LowRssi; |
| 420 | else |
| 421 | dm_digtable.cur_cck_pd_state = |
| 422 | CCK_PD_STAGE_HighRssi; |
| 423 | } |
| 424 | } else { |
| 425 | dm_digtable.cur_cck_pd_state = CCK_PD_STAGE_MAX; |
| 426 | } |
| 427 | |
| 428 | if (dm_digtable.pre_cck_pd_state != dm_digtable.cur_cck_pd_state) { |
| 429 | if (dm_digtable.cur_cck_pd_state == CCK_PD_STAGE_LowRssi) { |
| 430 | if (rtlpriv->falsealm_cnt.cnt_cck_fail > 800) |
| 431 | dm_digtable.cur_cck_fa_state = |
| 432 | CCK_FA_STAGE_High; |
| 433 | else |
| 434 | dm_digtable.cur_cck_fa_state = CCK_FA_STAGE_Low; |
| 435 | |
| 436 | if (dm_digtable.pre_cck_fa_state != |
| 437 | dm_digtable.cur_cck_fa_state) { |
| 438 | if (dm_digtable.cur_cck_fa_state == |
| 439 | CCK_FA_STAGE_Low) |
| 440 | rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, |
| 441 | 0x83); |
| 442 | else |
| 443 | rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, |
| 444 | 0xcd); |
| 445 | |
| 446 | dm_digtable.pre_cck_fa_state = |
| 447 | dm_digtable.cur_cck_fa_state; |
| 448 | } |
| 449 | |
| 450 | rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x40); |
| 451 | |
| 452 | if (IS_92C_SERIAL(rtlhal->version)) |
| 453 | rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, |
| 454 | MASKBYTE2, 0xd7); |
| 455 | } else { |
| 456 | rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd); |
| 457 | rtl_set_bbreg(hw, RCCK0_SYSTEM, MASKBYTE1, 0x47); |
| 458 | |
| 459 | if (IS_92C_SERIAL(rtlhal->version)) |
| 460 | rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, |
| 461 | MASKBYTE2, 0xd3); |
| 462 | } |
| 463 | dm_digtable.pre_cck_pd_state = dm_digtable.cur_cck_pd_state; |
| 464 | } |
| 465 | |
| 466 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
| 467 | ("CCKPDStage=%x\n", dm_digtable.cur_cck_pd_state)); |
| 468 | |
| 469 | RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE, |
| 470 | ("is92C=%x\n", IS_92C_SERIAL(rtlhal->version))); |
| 471 | } |
| 472 | |
| 473 | static void rtl92c_dm_ctrl_initgain_by_twoport(struct ieee80211_hw *hw) |
| 474 | { |
| 475 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
| 476 | |
Mike McCormack | e10542c | 2011-06-20 10:47:51 +0900 | [diff] [blame] | 477 | if (mac->act_scanning) |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 478 | return; |
| 479 | |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 480 | if (mac->link_state >= MAC80211_LINKED) |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 481 | dm_digtable.cursta_connectctate = DIG_STA_CONNECT; |
| 482 | else |
| 483 | dm_digtable.cursta_connectctate = DIG_STA_DISCONNECT; |
| 484 | |
| 485 | rtl92c_dm_initial_gain_sta(hw); |
| 486 | rtl92c_dm_initial_gain_multi_sta(hw); |
| 487 | rtl92c_dm_cck_packet_detection_thresh(hw); |
| 488 | |
| 489 | dm_digtable.presta_connectstate = dm_digtable.cursta_connectctate; |
| 490 | |
| 491 | } |
| 492 | |
| 493 | static void rtl92c_dm_dig(struct ieee80211_hw *hw) |
| 494 | { |
| 495 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 496 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 497 | if (rtlpriv->dm.dm_initialgain_enable == false) |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 498 | return; |
| 499 | if (dm_digtable.dig_enable_flag == false) |
| 500 | return; |
| 501 | |
| 502 | rtl92c_dm_ctrl_initgain_by_twoport(hw); |
| 503 | |
| 504 | } |
| 505 | |
| 506 | static void rtl92c_dm_init_dynamic_txpower(struct ieee80211_hw *hw) |
| 507 | { |
| 508 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 509 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 510 | rtlpriv->dm.dynamic_txpower_enable = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 511 | |
| 512 | rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL; |
| 513 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; |
| 514 | } |
| 515 | |
| 516 | void rtl92c_dm_write_dig(struct ieee80211_hw *hw) |
| 517 | { |
| 518 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 519 | |
| 520 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
| 521 | ("cur_igvalue = 0x%x, " |
| 522 | "pre_igvalue = 0x%x, backoff_val = %d\n", |
| 523 | dm_digtable.cur_igvalue, dm_digtable.pre_igvalue, |
| 524 | dm_digtable.backoff_val)); |
| 525 | |
| 526 | if (dm_digtable.pre_igvalue != dm_digtable.cur_igvalue) { |
| 527 | rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f, |
| 528 | dm_digtable.cur_igvalue); |
| 529 | rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f, |
| 530 | dm_digtable.cur_igvalue); |
| 531 | |
| 532 | dm_digtable.pre_igvalue = dm_digtable.cur_igvalue; |
| 533 | } |
| 534 | } |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 535 | EXPORT_SYMBOL(rtl92c_dm_write_dig); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 536 | |
| 537 | static void rtl92c_dm_pwdb_monitor(struct ieee80211_hw *hw) |
| 538 | { |
| 539 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 540 | long tmpentry_max_pwdb = 0, tmpentry_min_pwdb = 0xff; |
| 541 | |
| 542 | u8 h2c_parameter[3] = { 0 }; |
| 543 | |
| 544 | return; |
| 545 | |
| 546 | if (tmpentry_max_pwdb != 0) { |
| 547 | rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = |
| 548 | tmpentry_max_pwdb; |
| 549 | } else { |
| 550 | rtlpriv->dm.entry_max_undecoratedsmoothed_pwdb = 0; |
| 551 | } |
| 552 | |
| 553 | if (tmpentry_min_pwdb != 0xff) { |
| 554 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = |
| 555 | tmpentry_min_pwdb; |
| 556 | } else { |
| 557 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb = 0; |
| 558 | } |
| 559 | |
| 560 | h2c_parameter[2] = (u8) (rtlpriv->dm.undecorated_smoothed_pwdb & 0xFF); |
| 561 | h2c_parameter[0] = 0; |
| 562 | |
| 563 | rtl92c_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, h2c_parameter); |
| 564 | } |
| 565 | |
| 566 | void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw) |
| 567 | { |
| 568 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 569 | rtlpriv->dm.current_turbo_edca = false; |
| 570 | rtlpriv->dm.is_any_nonbepkts = false; |
| 571 | rtlpriv->dm.is_cur_rdlstate = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 572 | } |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 573 | EXPORT_SYMBOL(rtl92c_dm_init_edca_turbo); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 574 | |
| 575 | static void rtl92c_dm_check_edca_turbo(struct ieee80211_hw *hw) |
| 576 | { |
| 577 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 578 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 579 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 580 | |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 581 | static u64 last_txok_cnt; |
| 582 | static u64 last_rxok_cnt; |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 583 | static u32 last_bt_edca_ul; |
| 584 | static u32 last_bt_edca_dl; |
| 585 | u64 cur_txok_cnt = 0; |
| 586 | u64 cur_rxok_cnt = 0; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 587 | u32 edca_be_ul = 0x5ea42b; |
| 588 | u32 edca_be_dl = 0x5ea42b; |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 589 | bool bt_change_edca = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 590 | |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 591 | if ((last_bt_edca_ul != rtlpcipriv->bt_coexist.bt_edca_ul) || |
| 592 | (last_bt_edca_dl != rtlpcipriv->bt_coexist.bt_edca_dl)) { |
| 593 | rtlpriv->dm.current_turbo_edca = false; |
| 594 | last_bt_edca_ul = rtlpcipriv->bt_coexist.bt_edca_ul; |
| 595 | last_bt_edca_dl = rtlpcipriv->bt_coexist.bt_edca_dl; |
| 596 | } |
| 597 | |
| 598 | if (rtlpcipriv->bt_coexist.bt_edca_ul != 0) { |
| 599 | edca_be_ul = rtlpcipriv->bt_coexist.bt_edca_ul; |
| 600 | bt_change_edca = true; |
| 601 | } |
| 602 | |
| 603 | if (rtlpcipriv->bt_coexist.bt_edca_dl != 0) { |
| 604 | edca_be_ul = rtlpcipriv->bt_coexist.bt_edca_dl; |
| 605 | bt_change_edca = true; |
| 606 | } |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 607 | |
| 608 | if (mac->link_state != MAC80211_LINKED) { |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 609 | rtlpriv->dm.current_turbo_edca = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 610 | return; |
| 611 | } |
| 612 | |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 613 | if ((!mac->ht_enable) && (!rtlpcipriv->bt_coexist.bt_coexistence)) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 614 | if (!(edca_be_ul & 0xffff0000)) |
| 615 | edca_be_ul |= 0x005e0000; |
| 616 | |
| 617 | if (!(edca_be_dl & 0xffff0000)) |
| 618 | edca_be_dl |= 0x005e0000; |
| 619 | } |
| 620 | |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 621 | if ((bt_change_edca) || ((!rtlpriv->dm.is_any_nonbepkts) && |
| 622 | (!rtlpriv->dm.disable_framebursting))) { |
| 623 | |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 624 | cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt; |
| 625 | cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt; |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 626 | |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 627 | if (cur_rxok_cnt > 4 * cur_txok_cnt) { |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 628 | if (!rtlpriv->dm.is_cur_rdlstate || |
| 629 | !rtlpriv->dm.current_turbo_edca) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 630 | rtl_write_dword(rtlpriv, |
| 631 | REG_EDCA_BE_PARAM, |
| 632 | edca_be_dl); |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 633 | rtlpriv->dm.is_cur_rdlstate = true; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 634 | } |
| 635 | } else { |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 636 | if (rtlpriv->dm.is_cur_rdlstate || |
| 637 | !rtlpriv->dm.current_turbo_edca) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 638 | rtl_write_dword(rtlpriv, |
| 639 | REG_EDCA_BE_PARAM, |
| 640 | edca_be_ul); |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 641 | rtlpriv->dm.is_cur_rdlstate = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 642 | } |
| 643 | } |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 644 | rtlpriv->dm.current_turbo_edca = true; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 645 | } else { |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 646 | if (rtlpriv->dm.current_turbo_edca) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 647 | u8 tmp = AC0_BE; |
| 648 | rtlpriv->cfg->ops->set_hw_reg(hw, |
| 649 | HW_VAR_AC_PARAM, |
| 650 | (u8 *) (&tmp)); |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 651 | rtlpriv->dm.current_turbo_edca = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 652 | } |
| 653 | } |
| 654 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 655 | rtlpriv->dm.is_any_nonbepkts = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 656 | last_txok_cnt = rtlpriv->stats.txbytesunicast; |
| 657 | last_rxok_cnt = rtlpriv->stats.rxbytesunicast; |
| 658 | } |
| 659 | |
| 660 | static void rtl92c_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw |
| 661 | *hw) |
| 662 | { |
| 663 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 664 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 665 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 666 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); |
| 667 | u8 thermalvalue, delta, delta_lck, delta_iqk; |
| 668 | long ele_a, ele_d, temp_cck, val_x, value32; |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 669 | long val_y, ele_c = 0; |
Larry Finger | 9f219bd | 2011-04-13 21:00:02 -0500 | [diff] [blame] | 670 | u8 ofdm_index[2], cck_index = 0, ofdm_index_old[2], cck_index_old = 0; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 671 | int i; |
| 672 | bool is2t = IS_92C_SERIAL(rtlhal->version); |
Larry Finger | 7101f40 | 2011-06-10 11:05:23 -0500 | [diff] [blame] | 673 | s8 txpwr_level[2] = {0, 0}; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 674 | u8 ofdm_min_index = 6, rf; |
| 675 | |
Chaoming_Li | 3dad618 | 2011-04-25 12:52:49 -0500 | [diff] [blame] | 676 | rtlpriv->dm.txpower_trackinginit = true; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 677 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 678 | ("rtl92c_dm_txpower_tracking_callback_thermalmeter\n")); |
| 679 | |
| 680 | thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f); |
| 681 | |
| 682 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 683 | ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x " |
| 684 | "eeprom_thermalmeter 0x%x\n", |
| 685 | thermalvalue, rtlpriv->dm.thermalvalue, |
| 686 | rtlefuse->eeprom_thermalmeter)); |
| 687 | |
| 688 | rtl92c_phy_ap_calibrate(hw, (thermalvalue - |
| 689 | rtlefuse->eeprom_thermalmeter)); |
| 690 | if (is2t) |
| 691 | rf = 2; |
| 692 | else |
| 693 | rf = 1; |
| 694 | |
| 695 | if (thermalvalue) { |
| 696 | ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE, |
| 697 | MASKDWORD) & MASKOFDM_D; |
| 698 | |
| 699 | for (i = 0; i < OFDM_TABLE_LENGTH; i++) { |
| 700 | if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) { |
| 701 | ofdm_index_old[0] = (u8) i; |
| 702 | |
| 703 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 704 | ("Initial pathA ele_d reg0x%x = 0x%lx, " |
| 705 | "ofdm_index=0x%x\n", |
| 706 | ROFDM0_XATXIQIMBALANCE, |
| 707 | ele_d, ofdm_index_old[0])); |
| 708 | break; |
| 709 | } |
| 710 | } |
| 711 | |
| 712 | if (is2t) { |
| 713 | ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE, |
| 714 | MASKDWORD) & MASKOFDM_D; |
| 715 | |
| 716 | for (i = 0; i < OFDM_TABLE_LENGTH; i++) { |
| 717 | if (ele_d == (ofdmswing_table[i] & |
| 718 | MASKOFDM_D)) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 719 | |
| 720 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, |
| 721 | DBG_LOUD, |
| 722 | ("Initial pathB ele_d reg0x%x = " |
| 723 | "0x%lx, ofdm_index=0x%x\n", |
| 724 | ROFDM0_XBTXIQIMBALANCE, ele_d, |
| 725 | ofdm_index_old[1])); |
| 726 | break; |
| 727 | } |
| 728 | } |
| 729 | } |
| 730 | |
| 731 | temp_cck = |
| 732 | rtl_get_bbreg(hw, RCCK0_TXFILTER2, MASKDWORD) & MASKCCK; |
| 733 | |
| 734 | for (i = 0; i < CCK_TABLE_LENGTH; i++) { |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 735 | if (rtlpriv->dm.cck_inch14) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 736 | if (memcmp((void *)&temp_cck, |
| 737 | (void *)&cckswing_table_ch14[i][2], |
| 738 | 4) == 0) { |
| 739 | cck_index_old = (u8) i; |
| 740 | |
| 741 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, |
| 742 | DBG_LOUD, |
| 743 | ("Initial reg0x%x = 0x%lx, " |
| 744 | "cck_index=0x%x, ch 14 %d\n", |
| 745 | RCCK0_TXFILTER2, temp_cck, |
| 746 | cck_index_old, |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 747 | rtlpriv->dm.cck_inch14)); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 748 | break; |
| 749 | } |
| 750 | } else { |
| 751 | if (memcmp((void *)&temp_cck, |
| 752 | (void *) |
| 753 | &cckswing_table_ch1ch13[i][2], |
| 754 | 4) == 0) { |
| 755 | cck_index_old = (u8) i; |
| 756 | |
| 757 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, |
| 758 | DBG_LOUD, |
| 759 | ("Initial reg0x%x = 0x%lx, " |
| 760 | "cck_index=0x%x, ch14 %d\n", |
| 761 | RCCK0_TXFILTER2, temp_cck, |
| 762 | cck_index_old, |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 763 | rtlpriv->dm.cck_inch14)); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 764 | break; |
| 765 | } |
| 766 | } |
| 767 | } |
| 768 | |
| 769 | if (!rtlpriv->dm.thermalvalue) { |
| 770 | rtlpriv->dm.thermalvalue = |
| 771 | rtlefuse->eeprom_thermalmeter; |
| 772 | rtlpriv->dm.thermalvalue_lck = thermalvalue; |
| 773 | rtlpriv->dm.thermalvalue_iqk = thermalvalue; |
| 774 | for (i = 0; i < rf; i++) |
| 775 | rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i]; |
| 776 | rtlpriv->dm.cck_index = cck_index_old; |
| 777 | } |
| 778 | |
| 779 | delta = (thermalvalue > rtlpriv->dm.thermalvalue) ? |
| 780 | (thermalvalue - rtlpriv->dm.thermalvalue) : |
| 781 | (rtlpriv->dm.thermalvalue - thermalvalue); |
| 782 | |
| 783 | delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ? |
| 784 | (thermalvalue - rtlpriv->dm.thermalvalue_lck) : |
| 785 | (rtlpriv->dm.thermalvalue_lck - thermalvalue); |
| 786 | |
| 787 | delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ? |
| 788 | (thermalvalue - rtlpriv->dm.thermalvalue_iqk) : |
| 789 | (rtlpriv->dm.thermalvalue_iqk - thermalvalue); |
| 790 | |
| 791 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 792 | ("Readback Thermal Meter = 0x%x pre thermal meter 0x%x " |
| 793 | "eeprom_thermalmeter 0x%x delta 0x%x " |
| 794 | "delta_lck 0x%x delta_iqk 0x%x\n", |
| 795 | thermalvalue, rtlpriv->dm.thermalvalue, |
| 796 | rtlefuse->eeprom_thermalmeter, delta, delta_lck, |
| 797 | delta_iqk)); |
| 798 | |
| 799 | if (delta_lck > 1) { |
| 800 | rtlpriv->dm.thermalvalue_lck = thermalvalue; |
| 801 | rtl92c_phy_lc_calibrate(hw); |
| 802 | } |
| 803 | |
| 804 | if (delta > 0 && rtlpriv->dm.txpower_track_control) { |
| 805 | if (thermalvalue > rtlpriv->dm.thermalvalue) { |
| 806 | for (i = 0; i < rf; i++) |
| 807 | rtlpriv->dm.ofdm_index[i] -= delta; |
| 808 | rtlpriv->dm.cck_index -= delta; |
| 809 | } else { |
| 810 | for (i = 0; i < rf; i++) |
| 811 | rtlpriv->dm.ofdm_index[i] += delta; |
| 812 | rtlpriv->dm.cck_index += delta; |
| 813 | } |
| 814 | |
| 815 | if (is2t) { |
| 816 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 817 | ("temp OFDM_A_index=0x%x, " |
| 818 | "OFDM_B_index=0x%x," |
| 819 | "cck_index=0x%x\n", |
| 820 | rtlpriv->dm.ofdm_index[0], |
| 821 | rtlpriv->dm.ofdm_index[1], |
| 822 | rtlpriv->dm.cck_index)); |
| 823 | } else { |
| 824 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 825 | ("temp OFDM_A_index=0x%x," |
| 826 | "cck_index=0x%x\n", |
| 827 | rtlpriv->dm.ofdm_index[0], |
| 828 | rtlpriv->dm.cck_index)); |
| 829 | } |
| 830 | |
| 831 | if (thermalvalue > rtlefuse->eeprom_thermalmeter) { |
| 832 | for (i = 0; i < rf; i++) |
| 833 | ofdm_index[i] = |
| 834 | rtlpriv->dm.ofdm_index[i] |
| 835 | + 1; |
| 836 | cck_index = rtlpriv->dm.cck_index + 1; |
| 837 | } else { |
| 838 | for (i = 0; i < rf; i++) |
| 839 | ofdm_index[i] = |
| 840 | rtlpriv->dm.ofdm_index[i]; |
| 841 | cck_index = rtlpriv->dm.cck_index; |
| 842 | } |
| 843 | |
| 844 | for (i = 0; i < rf; i++) { |
| 845 | if (txpwr_level[i] >= 0 && |
| 846 | txpwr_level[i] <= 26) { |
| 847 | if (thermalvalue > |
| 848 | rtlefuse->eeprom_thermalmeter) { |
| 849 | if (delta < 5) |
| 850 | ofdm_index[i] -= 1; |
| 851 | |
| 852 | else |
| 853 | ofdm_index[i] -= 2; |
| 854 | } else if (delta > 5 && thermalvalue < |
| 855 | rtlefuse-> |
| 856 | eeprom_thermalmeter) { |
| 857 | ofdm_index[i] += 1; |
| 858 | } |
| 859 | } else if (txpwr_level[i] >= 27 && |
| 860 | txpwr_level[i] <= 32 |
| 861 | && thermalvalue > |
| 862 | rtlefuse->eeprom_thermalmeter) { |
| 863 | if (delta < 5) |
| 864 | ofdm_index[i] -= 1; |
| 865 | |
| 866 | else |
| 867 | ofdm_index[i] -= 2; |
| 868 | } else if (txpwr_level[i] >= 32 && |
| 869 | txpwr_level[i] <= 38 && |
| 870 | thermalvalue > |
| 871 | rtlefuse->eeprom_thermalmeter |
| 872 | && delta > 5) { |
| 873 | ofdm_index[i] -= 1; |
| 874 | } |
| 875 | } |
| 876 | |
| 877 | if (txpwr_level[i] >= 0 && txpwr_level[i] <= 26) { |
| 878 | if (thermalvalue > |
| 879 | rtlefuse->eeprom_thermalmeter) { |
| 880 | if (delta < 5) |
| 881 | cck_index -= 1; |
| 882 | |
| 883 | else |
| 884 | cck_index -= 2; |
| 885 | } else if (delta > 5 && thermalvalue < |
| 886 | rtlefuse->eeprom_thermalmeter) { |
| 887 | cck_index += 1; |
| 888 | } |
| 889 | } else if (txpwr_level[i] >= 27 && |
| 890 | txpwr_level[i] <= 32 && |
| 891 | thermalvalue > |
| 892 | rtlefuse->eeprom_thermalmeter) { |
| 893 | if (delta < 5) |
| 894 | cck_index -= 1; |
| 895 | |
| 896 | else |
| 897 | cck_index -= 2; |
| 898 | } else if (txpwr_level[i] >= 32 && |
| 899 | txpwr_level[i] <= 38 && |
| 900 | thermalvalue > rtlefuse->eeprom_thermalmeter |
| 901 | && delta > 5) { |
| 902 | cck_index -= 1; |
| 903 | } |
| 904 | |
| 905 | for (i = 0; i < rf; i++) { |
| 906 | if (ofdm_index[i] > OFDM_TABLE_SIZE - 1) |
| 907 | ofdm_index[i] = OFDM_TABLE_SIZE - 1; |
| 908 | |
| 909 | else if (ofdm_index[i] < ofdm_min_index) |
| 910 | ofdm_index[i] = ofdm_min_index; |
| 911 | } |
| 912 | |
| 913 | if (cck_index > CCK_TABLE_SIZE - 1) |
| 914 | cck_index = CCK_TABLE_SIZE - 1; |
| 915 | else if (cck_index < 0) |
| 916 | cck_index = 0; |
| 917 | |
| 918 | if (is2t) { |
| 919 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 920 | ("new OFDM_A_index=0x%x, " |
| 921 | "OFDM_B_index=0x%x," |
| 922 | "cck_index=0x%x\n", |
| 923 | ofdm_index[0], ofdm_index[1], |
| 924 | cck_index)); |
| 925 | } else { |
| 926 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 927 | ("new OFDM_A_index=0x%x," |
| 928 | "cck_index=0x%x\n", |
| 929 | ofdm_index[0], cck_index)); |
| 930 | } |
| 931 | } |
| 932 | |
| 933 | if (rtlpriv->dm.txpower_track_control && delta != 0) { |
| 934 | ele_d = |
| 935 | (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22; |
| 936 | val_x = rtlphy->reg_e94; |
| 937 | val_y = rtlphy->reg_e9c; |
| 938 | |
| 939 | if (val_x != 0) { |
| 940 | if ((val_x & 0x00000200) != 0) |
| 941 | val_x = val_x | 0xFFFFFC00; |
| 942 | ele_a = ((val_x * ele_d) >> 8) & 0x000003FF; |
| 943 | |
| 944 | if ((val_y & 0x00000200) != 0) |
| 945 | val_y = val_y | 0xFFFFFC00; |
| 946 | ele_c = ((val_y * ele_d) >> 8) & 0x000003FF; |
| 947 | |
| 948 | value32 = (ele_d << 22) | |
| 949 | ((ele_c & 0x3F) << 16) | ele_a; |
| 950 | |
| 951 | rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, |
| 952 | MASKDWORD, value32); |
| 953 | |
| 954 | value32 = (ele_c & 0x000003C0) >> 6; |
| 955 | rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS, |
| 956 | value32); |
| 957 | |
| 958 | value32 = ((val_x * ele_d) >> 7) & 0x01; |
| 959 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, |
| 960 | BIT(31), value32); |
| 961 | |
| 962 | value32 = ((val_y * ele_d) >> 7) & 0x01; |
| 963 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, |
| 964 | BIT(29), value32); |
| 965 | } else { |
| 966 | rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, |
| 967 | MASKDWORD, |
| 968 | ofdmswing_table[ofdm_index[0]]); |
| 969 | |
| 970 | rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS, |
| 971 | 0x00); |
| 972 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, |
| 973 | BIT(31) | BIT(29), 0x00); |
| 974 | } |
| 975 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 976 | if (!rtlpriv->dm.cck_inch14) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 977 | rtl_write_byte(rtlpriv, 0xa22, |
| 978 | cckswing_table_ch1ch13[cck_index] |
| 979 | [0]); |
| 980 | rtl_write_byte(rtlpriv, 0xa23, |
| 981 | cckswing_table_ch1ch13[cck_index] |
| 982 | [1]); |
| 983 | rtl_write_byte(rtlpriv, 0xa24, |
| 984 | cckswing_table_ch1ch13[cck_index] |
| 985 | [2]); |
| 986 | rtl_write_byte(rtlpriv, 0xa25, |
| 987 | cckswing_table_ch1ch13[cck_index] |
| 988 | [3]); |
| 989 | rtl_write_byte(rtlpriv, 0xa26, |
| 990 | cckswing_table_ch1ch13[cck_index] |
| 991 | [4]); |
| 992 | rtl_write_byte(rtlpriv, 0xa27, |
| 993 | cckswing_table_ch1ch13[cck_index] |
| 994 | [5]); |
| 995 | rtl_write_byte(rtlpriv, 0xa28, |
| 996 | cckswing_table_ch1ch13[cck_index] |
| 997 | [6]); |
| 998 | rtl_write_byte(rtlpriv, 0xa29, |
| 999 | cckswing_table_ch1ch13[cck_index] |
| 1000 | [7]); |
| 1001 | } else { |
| 1002 | rtl_write_byte(rtlpriv, 0xa22, |
| 1003 | cckswing_table_ch14[cck_index] |
| 1004 | [0]); |
| 1005 | rtl_write_byte(rtlpriv, 0xa23, |
| 1006 | cckswing_table_ch14[cck_index] |
| 1007 | [1]); |
| 1008 | rtl_write_byte(rtlpriv, 0xa24, |
| 1009 | cckswing_table_ch14[cck_index] |
| 1010 | [2]); |
| 1011 | rtl_write_byte(rtlpriv, 0xa25, |
| 1012 | cckswing_table_ch14[cck_index] |
| 1013 | [3]); |
| 1014 | rtl_write_byte(rtlpriv, 0xa26, |
| 1015 | cckswing_table_ch14[cck_index] |
| 1016 | [4]); |
| 1017 | rtl_write_byte(rtlpriv, 0xa27, |
| 1018 | cckswing_table_ch14[cck_index] |
| 1019 | [5]); |
| 1020 | rtl_write_byte(rtlpriv, 0xa28, |
| 1021 | cckswing_table_ch14[cck_index] |
| 1022 | [6]); |
| 1023 | rtl_write_byte(rtlpriv, 0xa29, |
| 1024 | cckswing_table_ch14[cck_index] |
| 1025 | [7]); |
| 1026 | } |
| 1027 | |
| 1028 | if (is2t) { |
| 1029 | ele_d = (ofdmswing_table[ofdm_index[1]] & |
| 1030 | 0xFFC00000) >> 22; |
| 1031 | |
| 1032 | val_x = rtlphy->reg_eb4; |
| 1033 | val_y = rtlphy->reg_ebc; |
| 1034 | |
| 1035 | if (val_x != 0) { |
| 1036 | if ((val_x & 0x00000200) != 0) |
| 1037 | val_x = val_x | 0xFFFFFC00; |
| 1038 | ele_a = ((val_x * ele_d) >> 8) & |
| 1039 | 0x000003FF; |
| 1040 | |
| 1041 | if ((val_y & 0x00000200) != 0) |
| 1042 | val_y = val_y | 0xFFFFFC00; |
| 1043 | ele_c = ((val_y * ele_d) >> 8) & |
| 1044 | 0x00003FF; |
| 1045 | |
| 1046 | value32 = (ele_d << 22) | |
| 1047 | ((ele_c & 0x3F) << 16) | ele_a; |
| 1048 | rtl_set_bbreg(hw, |
| 1049 | ROFDM0_XBTXIQIMBALANCE, |
| 1050 | MASKDWORD, value32); |
| 1051 | |
| 1052 | value32 = (ele_c & 0x000003C0) >> 6; |
| 1053 | rtl_set_bbreg(hw, ROFDM0_XDTXAFE, |
| 1054 | MASKH4BITS, value32); |
| 1055 | |
| 1056 | value32 = ((val_x * ele_d) >> 7) & 0x01; |
| 1057 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, |
| 1058 | BIT(27), value32); |
| 1059 | |
| 1060 | value32 = ((val_y * ele_d) >> 7) & 0x01; |
| 1061 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, |
| 1062 | BIT(25), value32); |
| 1063 | } else { |
| 1064 | rtl_set_bbreg(hw, |
| 1065 | ROFDM0_XBTXIQIMBALANCE, |
| 1066 | MASKDWORD, |
| 1067 | ofdmswing_table[ofdm_index |
| 1068 | [1]]); |
| 1069 | rtl_set_bbreg(hw, ROFDM0_XDTXAFE, |
| 1070 | MASKH4BITS, 0x00); |
| 1071 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, |
| 1072 | BIT(27) | BIT(25), 0x00); |
| 1073 | } |
| 1074 | |
| 1075 | } |
| 1076 | } |
| 1077 | |
| 1078 | if (delta_iqk > 3) { |
| 1079 | rtlpriv->dm.thermalvalue_iqk = thermalvalue; |
| 1080 | rtl92c_phy_iq_calibrate(hw, false); |
| 1081 | } |
| 1082 | |
| 1083 | if (rtlpriv->dm.txpower_track_control) |
| 1084 | rtlpriv->dm.thermalvalue = thermalvalue; |
| 1085 | } |
| 1086 | |
| 1087 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, ("<===\n")); |
| 1088 | |
| 1089 | } |
| 1090 | |
| 1091 | static void rtl92c_dm_initialize_txpower_tracking_thermalmeter( |
| 1092 | struct ieee80211_hw *hw) |
| 1093 | { |
| 1094 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1095 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1096 | rtlpriv->dm.txpower_tracking = true; |
Chaoming_Li | 3dad618 | 2011-04-25 12:52:49 -0500 | [diff] [blame] | 1097 | rtlpriv->dm.txpower_trackinginit = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1098 | |
| 1099 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1100 | ("pMgntInfo->txpower_tracking = %d\n", |
| 1101 | rtlpriv->dm.txpower_tracking)); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1102 | } |
| 1103 | |
| 1104 | static void rtl92c_dm_initialize_txpower_tracking(struct ieee80211_hw *hw) |
| 1105 | { |
| 1106 | rtl92c_dm_initialize_txpower_tracking_thermalmeter(hw); |
| 1107 | } |
| 1108 | |
| 1109 | static void rtl92c_dm_txpower_tracking_directcall(struct ieee80211_hw *hw) |
| 1110 | { |
| 1111 | rtl92c_dm_txpower_tracking_callback_thermalmeter(hw); |
| 1112 | } |
| 1113 | |
| 1114 | static void rtl92c_dm_check_txpower_tracking_thermal_meter( |
| 1115 | struct ieee80211_hw *hw) |
| 1116 | { |
| 1117 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1118 | static u8 tm_trigger; |
| 1119 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1120 | if (!rtlpriv->dm.txpower_tracking) |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1121 | return; |
| 1122 | |
| 1123 | if (!tm_trigger) { |
| 1124 | rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, RFREG_OFFSET_MASK, |
| 1125 | 0x60); |
| 1126 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 1127 | ("Trigger 92S Thermal Meter!!\n")); |
| 1128 | tm_trigger = 1; |
| 1129 | return; |
| 1130 | } else { |
| 1131 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
| 1132 | ("Schedule TxPowerTracking direct call!!\n")); |
| 1133 | rtl92c_dm_txpower_tracking_directcall(hw); |
| 1134 | tm_trigger = 0; |
| 1135 | } |
| 1136 | } |
| 1137 | |
| 1138 | void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw) |
| 1139 | { |
| 1140 | rtl92c_dm_check_txpower_tracking_thermal_meter(hw); |
| 1141 | } |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 1142 | EXPORT_SYMBOL(rtl92c_dm_check_txpower_tracking); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1143 | |
| 1144 | void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw) |
| 1145 | { |
| 1146 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1147 | struct rate_adaptive *p_ra = &(rtlpriv->ra); |
| 1148 | |
| 1149 | p_ra->ratr_state = DM_RATR_STA_INIT; |
| 1150 | p_ra->pre_ratr_state = DM_RATR_STA_INIT; |
| 1151 | |
| 1152 | if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER) |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1153 | rtlpriv->dm.useramask = true; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1154 | else |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1155 | rtlpriv->dm.useramask = false; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1156 | |
| 1157 | } |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 1158 | EXPORT_SYMBOL(rtl92c_dm_init_rate_adaptive_mask); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1159 | |
| 1160 | static void rtl92c_dm_refresh_rate_adaptive_mask(struct ieee80211_hw *hw) |
| 1161 | { |
| 1162 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1163 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 1164 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
| 1165 | struct rate_adaptive *p_ra = &(rtlpriv->ra); |
| 1166 | u32 low_rssithresh_for_ra, high_rssithresh_for_ra; |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1167 | struct ieee80211_sta *sta = NULL; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1168 | |
| 1169 | if (is_hal_stop(rtlhal)) { |
| 1170 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, |
| 1171 | ("<---- driver is going to unload\n")); |
| 1172 | return; |
| 1173 | } |
| 1174 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1175 | if (!rtlpriv->dm.useramask) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1176 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, |
| 1177 | ("<---- driver does not control rate adaptive mask\n")); |
| 1178 | return; |
| 1179 | } |
| 1180 | |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1181 | if (mac->link_state == MAC80211_LINKED && |
| 1182 | mac->opmode == NL80211_IFTYPE_STATION) { |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1183 | switch (p_ra->pre_ratr_state) { |
| 1184 | case DM_RATR_STA_HIGH: |
| 1185 | high_rssithresh_for_ra = 50; |
| 1186 | low_rssithresh_for_ra = 20; |
| 1187 | break; |
| 1188 | case DM_RATR_STA_MIDDLE: |
| 1189 | high_rssithresh_for_ra = 55; |
| 1190 | low_rssithresh_for_ra = 20; |
| 1191 | break; |
| 1192 | case DM_RATR_STA_LOW: |
| 1193 | high_rssithresh_for_ra = 50; |
| 1194 | low_rssithresh_for_ra = 25; |
| 1195 | break; |
| 1196 | default: |
| 1197 | high_rssithresh_for_ra = 50; |
| 1198 | low_rssithresh_for_ra = 20; |
| 1199 | break; |
| 1200 | } |
| 1201 | |
| 1202 | if (rtlpriv->dm.undecorated_smoothed_pwdb > |
| 1203 | (long)high_rssithresh_for_ra) |
| 1204 | p_ra->ratr_state = DM_RATR_STA_HIGH; |
| 1205 | else if (rtlpriv->dm.undecorated_smoothed_pwdb > |
| 1206 | (long)low_rssithresh_for_ra) |
| 1207 | p_ra->ratr_state = DM_RATR_STA_MIDDLE; |
| 1208 | else |
| 1209 | p_ra->ratr_state = DM_RATR_STA_LOW; |
| 1210 | |
| 1211 | if (p_ra->pre_ratr_state != p_ra->ratr_state) { |
| 1212 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, |
| 1213 | ("RSSI = %ld\n", |
| 1214 | rtlpriv->dm.undecorated_smoothed_pwdb)); |
| 1215 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, |
| 1216 | ("RSSI_LEVEL = %d\n", p_ra->ratr_state)); |
| 1217 | RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD, |
| 1218 | ("PreState = %d, CurState = %d\n", |
| 1219 | p_ra->pre_ratr_state, p_ra->ratr_state)); |
| 1220 | |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1221 | rcu_read_lock(); |
| 1222 | sta = ieee80211_find_sta(mac->vif, mac->bssid); |
| 1223 | rtlpriv->cfg->ops->update_rate_tbl(hw, sta, |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1224 | p_ra->ratr_state); |
| 1225 | |
| 1226 | p_ra->pre_ratr_state = p_ra->ratr_state; |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1227 | rcu_read_unlock(); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1228 | } |
| 1229 | } |
| 1230 | } |
| 1231 | |
| 1232 | static void rtl92c_dm_init_dynamic_bb_powersaving(struct ieee80211_hw *hw) |
| 1233 | { |
| 1234 | dm_pstable.pre_ccastate = CCA_MAX; |
| 1235 | dm_pstable.cur_ccasate = CCA_MAX; |
| 1236 | dm_pstable.pre_rfstate = RF_MAX; |
| 1237 | dm_pstable.cur_rfstate = RF_MAX; |
| 1238 | dm_pstable.rssi_val_min = 0; |
| 1239 | } |
| 1240 | |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1241 | void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal) |
| 1242 | { |
| 1243 | static u8 initialize; |
| 1244 | static u32 reg_874, reg_c70, reg_85c, reg_a74; |
| 1245 | |
| 1246 | if (initialize == 0) { |
| 1247 | reg_874 = (rtl_get_bbreg(hw, RFPGA0_XCD_RFINTERFACESW, |
| 1248 | MASKDWORD) & 0x1CC000) >> 14; |
| 1249 | |
| 1250 | reg_c70 = (rtl_get_bbreg(hw, ROFDM0_AGCPARAMETER1, |
| 1251 | MASKDWORD) & BIT(3)) >> 3; |
| 1252 | |
| 1253 | reg_85c = (rtl_get_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, |
| 1254 | MASKDWORD) & 0xFF000000) >> 24; |
| 1255 | |
| 1256 | reg_a74 = (rtl_get_bbreg(hw, 0xa74, MASKDWORD) & 0xF000) >> 12; |
| 1257 | |
| 1258 | initialize = 1; |
| 1259 | } |
| 1260 | |
| 1261 | if (!bforce_in_normal) { |
| 1262 | if (dm_pstable.rssi_val_min != 0) { |
| 1263 | if (dm_pstable.pre_rfstate == RF_NORMAL) { |
| 1264 | if (dm_pstable.rssi_val_min >= 30) |
| 1265 | dm_pstable.cur_rfstate = RF_SAVE; |
| 1266 | else |
| 1267 | dm_pstable.cur_rfstate = RF_NORMAL; |
| 1268 | } else { |
| 1269 | if (dm_pstable.rssi_val_min <= 25) |
| 1270 | dm_pstable.cur_rfstate = RF_NORMAL; |
| 1271 | else |
| 1272 | dm_pstable.cur_rfstate = RF_SAVE; |
| 1273 | } |
| 1274 | } else { |
| 1275 | dm_pstable.cur_rfstate = RF_MAX; |
| 1276 | } |
| 1277 | } else { |
| 1278 | dm_pstable.cur_rfstate = RF_NORMAL; |
| 1279 | } |
| 1280 | |
| 1281 | if (dm_pstable.pre_rfstate != dm_pstable.cur_rfstate) { |
| 1282 | if (dm_pstable.cur_rfstate == RF_SAVE) { |
| 1283 | rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW, |
| 1284 | 0x1C0000, 0x2); |
| 1285 | rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), 0); |
| 1286 | rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, |
| 1287 | 0xFF000000, 0x63); |
| 1288 | rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW, |
| 1289 | 0xC000, 0x2); |
| 1290 | rtl_set_bbreg(hw, 0xa74, 0xF000, 0x3); |
| 1291 | rtl_set_bbreg(hw, 0x818, BIT(28), 0x0); |
| 1292 | rtl_set_bbreg(hw, 0x818, BIT(28), 0x1); |
| 1293 | } else { |
| 1294 | rtl_set_bbreg(hw, RFPGA0_XCD_RFINTERFACESW, |
| 1295 | 0x1CC000, reg_874); |
| 1296 | rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, BIT(3), |
| 1297 | reg_c70); |
| 1298 | rtl_set_bbreg(hw, RFPGA0_XCD_SWITCHCONTROL, 0xFF000000, |
| 1299 | reg_85c); |
| 1300 | rtl_set_bbreg(hw, 0xa74, 0xF000, reg_a74); |
| 1301 | rtl_set_bbreg(hw, 0x818, BIT(28), 0x0); |
| 1302 | } |
| 1303 | |
| 1304 | dm_pstable.pre_rfstate = dm_pstable.cur_rfstate; |
| 1305 | } |
| 1306 | } |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 1307 | EXPORT_SYMBOL(rtl92c_dm_rf_saving); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1308 | |
| 1309 | static void rtl92c_dm_dynamic_bb_powersaving(struct ieee80211_hw *hw) |
| 1310 | { |
| 1311 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1312 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
| 1313 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
| 1314 | |
| 1315 | if (((mac->link_state == MAC80211_NOLINK)) && |
| 1316 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) { |
| 1317 | dm_pstable.rssi_val_min = 0; |
| 1318 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, |
| 1319 | ("Not connected to any\n")); |
| 1320 | } |
| 1321 | |
| 1322 | if (mac->link_state == MAC80211_LINKED) { |
| 1323 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
| 1324 | dm_pstable.rssi_val_min = |
| 1325 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; |
| 1326 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, |
| 1327 | ("AP Client PWDB = 0x%lx\n", |
| 1328 | dm_pstable.rssi_val_min)); |
| 1329 | } else { |
| 1330 | dm_pstable.rssi_val_min = |
| 1331 | rtlpriv->dm.undecorated_smoothed_pwdb; |
| 1332 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, |
| 1333 | ("STA Default Port PWDB = 0x%lx\n", |
| 1334 | dm_pstable.rssi_val_min)); |
| 1335 | } |
| 1336 | } else { |
| 1337 | dm_pstable.rssi_val_min = |
| 1338 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; |
| 1339 | |
| 1340 | RT_TRACE(rtlpriv, DBG_LOUD, DBG_LOUD, |
| 1341 | ("AP Ext Port PWDB = 0x%lx\n", |
| 1342 | dm_pstable.rssi_val_min)); |
| 1343 | } |
| 1344 | |
| 1345 | if (IS_92C_SERIAL(rtlhal->version)) |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1346 | ;/* rtl92c_dm_1r_cca(hw); */ |
| 1347 | else |
| 1348 | rtl92c_dm_rf_saving(hw, false); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1349 | } |
| 1350 | |
| 1351 | void rtl92c_dm_init(struct ieee80211_hw *hw) |
| 1352 | { |
| 1353 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1354 | |
| 1355 | rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER; |
| 1356 | rtl92c_dm_diginit(hw); |
| 1357 | rtl92c_dm_init_dynamic_txpower(hw); |
| 1358 | rtl92c_dm_init_edca_turbo(hw); |
| 1359 | rtl92c_dm_init_rate_adaptive_mask(hw); |
| 1360 | rtl92c_dm_initialize_txpower_tracking(hw); |
| 1361 | rtl92c_dm_init_dynamic_bb_powersaving(hw); |
| 1362 | } |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 1363 | EXPORT_SYMBOL(rtl92c_dm_init); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1364 | |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1365 | void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw) |
| 1366 | { |
| 1367 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1368 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
| 1369 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
| 1370 | long undecorated_smoothed_pwdb; |
| 1371 | |
| 1372 | if (!rtlpriv->dm.dynamic_txpower_enable) |
| 1373 | return; |
| 1374 | |
| 1375 | if (rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) { |
| 1376 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; |
| 1377 | return; |
| 1378 | } |
| 1379 | |
| 1380 | if ((mac->link_state < MAC80211_LINKED) && |
| 1381 | (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0)) { |
| 1382 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, |
| 1383 | ("Not connected to any\n")); |
| 1384 | |
| 1385 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; |
| 1386 | |
| 1387 | rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL; |
| 1388 | return; |
| 1389 | } |
| 1390 | |
| 1391 | if (mac->link_state >= MAC80211_LINKED) { |
| 1392 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { |
| 1393 | undecorated_smoothed_pwdb = |
| 1394 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; |
| 1395 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
| 1396 | ("AP Client PWDB = 0x%lx\n", |
| 1397 | undecorated_smoothed_pwdb)); |
| 1398 | } else { |
| 1399 | undecorated_smoothed_pwdb = |
| 1400 | rtlpriv->dm.undecorated_smoothed_pwdb; |
| 1401 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
| 1402 | ("STA Default Port PWDB = 0x%lx\n", |
| 1403 | undecorated_smoothed_pwdb)); |
| 1404 | } |
| 1405 | } else { |
| 1406 | undecorated_smoothed_pwdb = |
| 1407 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; |
| 1408 | |
| 1409 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
| 1410 | ("AP Ext Port PWDB = 0x%lx\n", |
| 1411 | undecorated_smoothed_pwdb)); |
| 1412 | } |
| 1413 | |
| 1414 | if (undecorated_smoothed_pwdb >= TX_POWER_NEAR_FIELD_THRESH_LVL2) { |
| 1415 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; |
| 1416 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
| 1417 | ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n")); |
| 1418 | } else if ((undecorated_smoothed_pwdb < |
| 1419 | (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) && |
| 1420 | (undecorated_smoothed_pwdb >= |
| 1421 | TX_POWER_NEAR_FIELD_THRESH_LVL1)) { |
| 1422 | |
| 1423 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_LEVEL1; |
| 1424 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
| 1425 | ("TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n")); |
| 1426 | } else if (undecorated_smoothed_pwdb < |
| 1427 | (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { |
| 1428 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; |
| 1429 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
| 1430 | ("TXHIGHPWRLEVEL_NORMAL\n")); |
| 1431 | } |
| 1432 | |
| 1433 | if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) { |
| 1434 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, |
| 1435 | ("PHY_SetTxPowerLevel8192S() Channel = %d\n", |
| 1436 | rtlphy->current_channel)); |
| 1437 | rtl92c_phy_set_txpower_level(hw, rtlphy->current_channel); |
| 1438 | } |
| 1439 | |
| 1440 | rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl; |
| 1441 | } |
| 1442 | |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1443 | void rtl92c_dm_watchdog(struct ieee80211_hw *hw) |
| 1444 | { |
| 1445 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1446 | struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1447 | bool fw_current_inpsmode = false; |
| 1448 | bool fw_ps_awake = true; |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1449 | |
| 1450 | rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FW_PSMODE_STATUS, |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1451 | (u8 *) (&fw_current_inpsmode)); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1452 | rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_FWLPS_RF_ON, |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1453 | (u8 *) (&fw_ps_awake)); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1454 | |
Larry Finger | 7ea4724 | 2011-02-19 16:28:57 -0600 | [diff] [blame] | 1455 | if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) && |
| 1456 | fw_ps_awake) |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1457 | && (!ppsc->rfchange_inprogress)) { |
| 1458 | rtl92c_dm_pwdb_monitor(hw); |
| 1459 | rtl92c_dm_dig(hw); |
| 1460 | rtl92c_dm_false_alarm_counter_statistics(hw); |
| 1461 | rtl92c_dm_dynamic_bb_powersaving(hw); |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1462 | rtl92c_dm_dynamic_txpower(hw); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1463 | rtl92c_dm_check_txpower_tracking(hw); |
| 1464 | rtl92c_dm_refresh_rate_adaptive_mask(hw); |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1465 | rtl92c_dm_bt_coexist(hw); |
Larry Finger | 8c96fcf | 2011-02-11 14:33:58 -0600 | [diff] [blame] | 1466 | rtl92c_dm_check_edca_turbo(hw); |
| 1467 | } |
| 1468 | } |
Larry Finger | 1472d3a | 2011-02-23 10:24:58 -0600 | [diff] [blame] | 1469 | EXPORT_SYMBOL(rtl92c_dm_watchdog); |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1470 | |
Chaoming_Li | 2b8359f | 2011-04-25 12:53:55 -0500 | [diff] [blame] | 1471 | u8 rtl92c_bt_rssi_state_change(struct ieee80211_hw *hw) |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1472 | { |
| 1473 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1474 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
| 1475 | long undecorated_smoothed_pwdb; |
| 1476 | u8 curr_bt_rssi_state = 0x00; |
| 1477 | |
| 1478 | if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { |
| 1479 | undecorated_smoothed_pwdb = |
| 1480 | GET_UNDECORATED_AVERAGE_RSSI(rtlpriv); |
| 1481 | } else { |
| 1482 | if (rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb == 0) |
| 1483 | undecorated_smoothed_pwdb = 100; |
| 1484 | else |
| 1485 | undecorated_smoothed_pwdb = |
| 1486 | rtlpriv->dm.entry_min_undecoratedsmoothed_pwdb; |
| 1487 | } |
| 1488 | |
| 1489 | /* Check RSSI to determine HighPower/NormalPower state for |
| 1490 | * BT coexistence. */ |
| 1491 | if (undecorated_smoothed_pwdb >= 67) |
| 1492 | curr_bt_rssi_state &= (~BT_RSSI_STATE_NORMAL_POWER); |
| 1493 | else if (undecorated_smoothed_pwdb < 62) |
| 1494 | curr_bt_rssi_state |= BT_RSSI_STATE_NORMAL_POWER; |
| 1495 | |
| 1496 | /* Check RSSI to determine AMPDU setting for BT coexistence. */ |
| 1497 | if (undecorated_smoothed_pwdb >= 40) |
| 1498 | curr_bt_rssi_state &= (~BT_RSSI_STATE_AMDPU_OFF); |
| 1499 | else if (undecorated_smoothed_pwdb <= 32) |
| 1500 | curr_bt_rssi_state |= BT_RSSI_STATE_AMDPU_OFF; |
| 1501 | |
| 1502 | /* Marked RSSI state. It will be used to determine BT coexistence |
| 1503 | * setting later. */ |
| 1504 | if (undecorated_smoothed_pwdb < 35) |
| 1505 | curr_bt_rssi_state |= BT_RSSI_STATE_SPECIAL_LOW; |
| 1506 | else |
| 1507 | curr_bt_rssi_state &= (~BT_RSSI_STATE_SPECIAL_LOW); |
| 1508 | |
| 1509 | /* Set Tx Power according to BT status. */ |
| 1510 | if (undecorated_smoothed_pwdb >= 30) |
| 1511 | curr_bt_rssi_state |= BT_RSSI_STATE_TXPOWER_LOW; |
| 1512 | else if (undecorated_smoothed_pwdb < 25) |
| 1513 | curr_bt_rssi_state &= (~BT_RSSI_STATE_TXPOWER_LOW); |
| 1514 | |
| 1515 | /* Check BT state related to BT_Idle in B/G mode. */ |
| 1516 | if (undecorated_smoothed_pwdb < 15) |
| 1517 | curr_bt_rssi_state |= BT_RSSI_STATE_BG_EDCA_LOW; |
| 1518 | else |
| 1519 | curr_bt_rssi_state &= (~BT_RSSI_STATE_BG_EDCA_LOW); |
| 1520 | |
| 1521 | if (curr_bt_rssi_state != rtlpcipriv->bt_coexist.bt_rssi_state) { |
| 1522 | rtlpcipriv->bt_coexist.bt_rssi_state = curr_bt_rssi_state; |
| 1523 | return true; |
| 1524 | } else { |
| 1525 | return false; |
| 1526 | } |
| 1527 | } |
Chaoming_Li | 2b8359f | 2011-04-25 12:53:55 -0500 | [diff] [blame] | 1528 | EXPORT_SYMBOL(rtl92c_bt_rssi_state_change); |
Chaoming_Li | beb5bc4 | 2011-04-25 12:53:35 -0500 | [diff] [blame] | 1529 | |
| 1530 | static bool rtl92c_bt_state_change(struct ieee80211_hw *hw) |
| 1531 | { |
| 1532 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1533 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
| 1534 | |
| 1535 | u32 polling, ratio_tx, ratio_pri; |
| 1536 | u32 bt_tx, bt_pri; |
| 1537 | u8 bt_state; |
| 1538 | u8 cur_service_type; |
| 1539 | |
| 1540 | if (rtlpriv->mac80211.link_state < MAC80211_LINKED) |
| 1541 | return false; |
| 1542 | |
| 1543 | bt_state = rtl_read_byte(rtlpriv, 0x4fd); |
| 1544 | bt_tx = rtl_read_dword(rtlpriv, 0x488); |
| 1545 | bt_tx = bt_tx & 0x00ffffff; |
| 1546 | bt_pri = rtl_read_dword(rtlpriv, 0x48c); |
| 1547 | bt_pri = bt_pri & 0x00ffffff; |
| 1548 | polling = rtl_read_dword(rtlpriv, 0x490); |
| 1549 | |
| 1550 | if (bt_tx == 0xffffffff && bt_pri == 0xffffffff && |
| 1551 | polling == 0xffffffff && bt_state == 0xff) |
| 1552 | return false; |
| 1553 | |
| 1554 | bt_state &= BIT_OFFSET_LEN_MASK_32(0, 1); |
| 1555 | if (bt_state != rtlpcipriv->bt_coexist.bt_cur_state) { |
| 1556 | rtlpcipriv->bt_coexist.bt_cur_state = bt_state; |
| 1557 | |
| 1558 | if (rtlpcipriv->bt_coexist.reg_bt_sco == 3) { |
| 1559 | rtlpcipriv->bt_coexist.bt_service = BT_IDLE; |
| 1560 | |
| 1561 | bt_state = bt_state | |
| 1562 | ((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ? |
| 1563 | 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) | |
| 1564 | BIT_OFFSET_LEN_MASK_32(2, 1); |
| 1565 | rtl_write_byte(rtlpriv, 0x4fd, bt_state); |
| 1566 | } |
| 1567 | return true; |
| 1568 | } |
| 1569 | |
| 1570 | ratio_tx = bt_tx * 1000 / polling; |
| 1571 | ratio_pri = bt_pri * 1000 / polling; |
| 1572 | rtlpcipriv->bt_coexist.ratio_tx = ratio_tx; |
| 1573 | rtlpcipriv->bt_coexist.ratio_pri = ratio_pri; |
| 1574 | |
| 1575 | if (bt_state && rtlpcipriv->bt_coexist.reg_bt_sco == 3) { |
| 1576 | |
| 1577 | if ((ratio_tx < 30) && (ratio_pri < 30)) |
| 1578 | cur_service_type = BT_IDLE; |
| 1579 | else if ((ratio_pri > 110) && (ratio_pri < 250)) |
| 1580 | cur_service_type = BT_SCO; |
| 1581 | else if ((ratio_tx >= 200) && (ratio_pri >= 200)) |
| 1582 | cur_service_type = BT_BUSY; |
| 1583 | else if ((ratio_tx >= 350) && (ratio_tx < 500)) |
| 1584 | cur_service_type = BT_OTHERBUSY; |
| 1585 | else if (ratio_tx >= 500) |
| 1586 | cur_service_type = BT_PAN; |
| 1587 | else |
| 1588 | cur_service_type = BT_OTHER_ACTION; |
| 1589 | |
| 1590 | if (cur_service_type != rtlpcipriv->bt_coexist.bt_service) { |
| 1591 | rtlpcipriv->bt_coexist.bt_service = cur_service_type; |
| 1592 | bt_state = bt_state | |
| 1593 | ((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ? |
| 1594 | 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) | |
| 1595 | ((rtlpcipriv->bt_coexist.bt_service != BT_IDLE) ? |
| 1596 | 0 : BIT_OFFSET_LEN_MASK_32(2, 1)); |
| 1597 | |
| 1598 | /* Add interrupt migration when bt is not ini |
| 1599 | * idle state (no traffic). */ |
| 1600 | if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) { |
| 1601 | rtl_write_word(rtlpriv, 0x504, 0x0ccc); |
| 1602 | rtl_write_byte(rtlpriv, 0x506, 0x54); |
| 1603 | rtl_write_byte(rtlpriv, 0x507, 0x54); |
| 1604 | } else { |
| 1605 | rtl_write_byte(rtlpriv, 0x506, 0x00); |
| 1606 | rtl_write_byte(rtlpriv, 0x507, 0x00); |
| 1607 | } |
| 1608 | |
| 1609 | rtl_write_byte(rtlpriv, 0x4fd, bt_state); |
| 1610 | return true; |
| 1611 | } |
| 1612 | } |
| 1613 | |
| 1614 | return false; |
| 1615 | |
| 1616 | } |
| 1617 | |
| 1618 | static bool rtl92c_bt_wifi_connect_change(struct ieee80211_hw *hw) |
| 1619 | { |
| 1620 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1621 | static bool media_connect; |
| 1622 | |
| 1623 | if (rtlpriv->mac80211.link_state < MAC80211_LINKED) { |
| 1624 | media_connect = false; |
| 1625 | } else { |
| 1626 | if (!media_connect) { |
| 1627 | media_connect = true; |
| 1628 | return true; |
| 1629 | } |
| 1630 | media_connect = true; |
| 1631 | } |
| 1632 | |
| 1633 | return false; |
| 1634 | } |
| 1635 | |
| 1636 | static void rtl92c_bt_set_normal(struct ieee80211_hw *hw) |
| 1637 | { |
| 1638 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1639 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
| 1640 | |
| 1641 | |
| 1642 | if (rtlpcipriv->bt_coexist.bt_service == BT_OTHERBUSY) { |
| 1643 | rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea72b; |
| 1644 | rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea72b; |
| 1645 | } else if (rtlpcipriv->bt_coexist.bt_service == BT_BUSY) { |
| 1646 | rtlpcipriv->bt_coexist.bt_edca_ul = 0x5eb82f; |
| 1647 | rtlpcipriv->bt_coexist.bt_edca_dl = 0x5eb82f; |
| 1648 | } else if (rtlpcipriv->bt_coexist.bt_service == BT_SCO) { |
| 1649 | if (rtlpcipriv->bt_coexist.ratio_tx > 160) { |
| 1650 | rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea72f; |
| 1651 | rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea72f; |
| 1652 | } else { |
| 1653 | rtlpcipriv->bt_coexist.bt_edca_ul = 0x5ea32b; |
| 1654 | rtlpcipriv->bt_coexist.bt_edca_dl = 0x5ea42b; |
| 1655 | } |
| 1656 | } else { |
| 1657 | rtlpcipriv->bt_coexist.bt_edca_ul = 0; |
| 1658 | rtlpcipriv->bt_coexist.bt_edca_dl = 0; |
| 1659 | } |
| 1660 | |
| 1661 | if ((rtlpcipriv->bt_coexist.bt_service != BT_IDLE) && |
| 1662 | (rtlpriv->mac80211.mode == WIRELESS_MODE_G || |
| 1663 | (rtlpriv->mac80211.mode == (WIRELESS_MODE_G | WIRELESS_MODE_B))) && |
| 1664 | (rtlpcipriv->bt_coexist.bt_rssi_state & |
| 1665 | BT_RSSI_STATE_BG_EDCA_LOW)) { |
| 1666 | rtlpcipriv->bt_coexist.bt_edca_ul = 0x5eb82b; |
| 1667 | rtlpcipriv->bt_coexist.bt_edca_dl = 0x5eb82b; |
| 1668 | } |
| 1669 | } |
| 1670 | |
| 1671 | static void rtl92c_bt_ant_isolation(struct ieee80211_hw *hw) |
| 1672 | { |
| 1673 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1674 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
| 1675 | |
| 1676 | |
| 1677 | /* Only enable HW BT coexist when BT in "Busy" state. */ |
| 1678 | if (rtlpriv->mac80211.vendor == PEER_CISCO && |
| 1679 | rtlpcipriv->bt_coexist.bt_service == BT_OTHER_ACTION) { |
| 1680 | rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0); |
| 1681 | } else { |
| 1682 | if ((rtlpcipriv->bt_coexist.bt_service == BT_BUSY) && |
| 1683 | (rtlpcipriv->bt_coexist.bt_rssi_state & |
| 1684 | BT_RSSI_STATE_NORMAL_POWER)) { |
| 1685 | rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0); |
| 1686 | } else if ((rtlpcipriv->bt_coexist.bt_service == |
| 1687 | BT_OTHER_ACTION) && (rtlpriv->mac80211.mode < |
| 1688 | WIRELESS_MODE_N_24G) && |
| 1689 | (rtlpcipriv->bt_coexist.bt_rssi_state & |
| 1690 | BT_RSSI_STATE_SPECIAL_LOW)) { |
| 1691 | rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0); |
| 1692 | } else if (rtlpcipriv->bt_coexist.bt_service == BT_PAN) { |
| 1693 | rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00); |
| 1694 | } else { |
| 1695 | rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00); |
| 1696 | } |
| 1697 | } |
| 1698 | |
| 1699 | if (rtlpcipriv->bt_coexist.bt_service == BT_PAN) |
| 1700 | rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x10100); |
| 1701 | else |
| 1702 | rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x0); |
| 1703 | |
| 1704 | if (rtlpcipriv->bt_coexist.bt_rssi_state & |
| 1705 | BT_RSSI_STATE_NORMAL_POWER) { |
| 1706 | rtl92c_bt_set_normal(hw); |
| 1707 | } else { |
| 1708 | rtlpcipriv->bt_coexist.bt_edca_ul = 0; |
| 1709 | rtlpcipriv->bt_coexist.bt_edca_dl = 0; |
| 1710 | } |
| 1711 | |
| 1712 | if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) { |
| 1713 | rtlpriv->cfg->ops->set_rfreg(hw, |
| 1714 | RF90_PATH_A, |
| 1715 | 0x1e, |
| 1716 | 0xf0, 0xf); |
| 1717 | } else { |
| 1718 | rtlpriv->cfg->ops->set_rfreg(hw, |
| 1719 | RF90_PATH_A, 0x1e, 0xf0, |
| 1720 | rtlpcipriv->bt_coexist.bt_rfreg_origin_1e); |
| 1721 | } |
| 1722 | |
| 1723 | if (!rtlpriv->dm.dynamic_txpower_enable) { |
| 1724 | if (rtlpcipriv->bt_coexist.bt_service != BT_IDLE) { |
| 1725 | if (rtlpcipriv->bt_coexist.bt_rssi_state & |
| 1726 | BT_RSSI_STATE_TXPOWER_LOW) { |
| 1727 | rtlpriv->dm.dynamic_txhighpower_lvl = |
| 1728 | TXHIGHPWRLEVEL_BT2; |
| 1729 | } else { |
| 1730 | rtlpriv->dm.dynamic_txhighpower_lvl = |
| 1731 | TXHIGHPWRLEVEL_BT1; |
| 1732 | } |
| 1733 | } else { |
| 1734 | rtlpriv->dm.dynamic_txhighpower_lvl = |
| 1735 | TXHIGHPWRLEVEL_NORMAL; |
| 1736 | } |
| 1737 | rtl92c_phy_set_txpower_level(hw, |
| 1738 | rtlpriv->phy.current_channel); |
| 1739 | } |
| 1740 | } |
| 1741 | |
| 1742 | static void rtl92c_check_bt_change(struct ieee80211_hw *hw) |
| 1743 | { |
| 1744 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
| 1745 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
| 1746 | |
| 1747 | if (rtlpcipriv->bt_coexist.bt_cur_state) { |
| 1748 | if (rtlpcipriv->bt_coexist.bt_ant_isolation) |
| 1749 | rtl92c_bt_ant_isolation(hw); |
| 1750 | } else { |
| 1751 | rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0x00); |
| 1752 | rtlpriv->cfg->ops->set_rfreg(hw, RF90_PATH_A, 0x1e, 0xf0, |
| 1753 | rtlpcipriv->bt_coexist.bt_rfreg_origin_1e); |
| 1754 | |
| 1755 | rtlpcipriv->bt_coexist.bt_edca_ul = 0; |
| 1756 | rtlpcipriv->bt_coexist.bt_edca_dl = 0; |
| 1757 | } |
| 1758 | } |
| 1759 | |
| 1760 | void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw) |
| 1761 | { |
| 1762 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); |
| 1763 | |
| 1764 | bool wifi_connect_change; |
| 1765 | bool bt_state_change; |
| 1766 | bool rssi_state_change; |
| 1767 | |
| 1768 | if ((rtlpcipriv->bt_coexist.bt_coexistence) && |
| 1769 | (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) { |
| 1770 | |
| 1771 | wifi_connect_change = rtl92c_bt_wifi_connect_change(hw); |
| 1772 | bt_state_change = rtl92c_bt_state_change(hw); |
| 1773 | rssi_state_change = rtl92c_bt_rssi_state_change(hw); |
| 1774 | |
| 1775 | if (wifi_connect_change || bt_state_change || rssi_state_change) |
| 1776 | rtl92c_check_bt_change(hw); |
| 1777 | } |
| 1778 | } |
Chaoming_Li | 2b8359f | 2011-04-25 12:53:55 -0500 | [diff] [blame] | 1779 | EXPORT_SYMBOL(rtl92c_dm_bt_coexist); |