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Jayachandran C5c64250672011-05-07 01:36:40 +05301/*
2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
9 * license below:
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
20 * distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
Jayachandran C0c965402011-11-11 17:08:29 +053035#ifndef _NETLOGIC_COMMON_H_
36#define _NETLOGIC_COMMON_H_
Jayachandran C5c64250672011-05-07 01:36:40 +053037
Jayachandran C0c965402011-11-11 17:08:29 +053038/*
39 * Common SMP definitions
40 */
Ralf Baechle70342282013-01-22 12:59:30 +010041#define RESET_VEC_PHYS 0x1fc00000
42#define RESET_DATA_PHYS (RESET_VEC_PHYS + (1<<10))
43#define BOOT_THREAD_MODE 0
44#define BOOT_NMI_LOCK 4
45#define BOOT_NMI_HANDLER 8
Jayachandran C66d29982011-11-16 00:21:29 +000046
47#ifndef __ASSEMBLY__
Jayachandran C2a37b1a2012-10-31 12:01:37 +000048#include <linux/cpumask.h>
Jayachandran C77ae7982012-10-31 12:01:39 +000049#include <linux/spinlock.h>
50#include <asm/irq.h>
Jayachandran Cbb1e4bc2012-10-31 12:01:40 +000051#include <asm/mach-netlogic/multi-node.h>
Jayachandran C2a37b1a2012-10-31 12:01:37 +000052
Jayachandran C0c965402011-11-11 17:08:29 +053053struct irq_desc;
Jayachandran C0c965402011-11-11 17:08:29 +053054void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc);
55void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc);
Jayachandran C38541742012-10-31 12:01:41 +000056void nlm_smp_irq_init(int hwcpuid);
Jayachandran C66d29982011-11-16 00:21:29 +000057void nlm_boot_secondary_cpus(void);
Jayachandran C2a37b1a2012-10-31 12:01:37 +000058int nlm_wakeup_secondary_cpus(void);
Jayachandran C66d29982011-11-16 00:21:29 +000059void nlm_rmiboot_preboot(void);
Ganesan Ramalingamed21cfe2012-10-31 12:01:42 +000060void nlm_percpu_init(int hwcpuid);
Jayachandran C66d29982011-11-16 00:21:29 +000061
62static inline void
63nlm_set_nmi_handler(void *handler)
64{
65 char *reset_data;
66
67 reset_data = (char *)CKSEG1ADDR(RESET_DATA_PHYS);
68 *(int64_t *)(reset_data + BOOT_NMI_HANDLER) = (long)handler;
69}
Jayachandran C5c64250672011-05-07 01:36:40 +053070
Jayachandran C0c965402011-11-11 17:08:29 +053071/*
72 * Misc.
73 */
Jayachandran C66d29982011-11-16 00:21:29 +000074unsigned int nlm_get_cpu_frequency(void);
Jayachandran C77ae7982012-10-31 12:01:39 +000075void nlm_node_init(int node);
76extern struct plat_smp_ops nlm_smp_ops;
77extern char nlm_reset_entry[], nlm_reset_entry_end[];
Jayachandran C66d29982011-11-16 00:21:29 +000078
Jayachandran C77ae7982012-10-31 12:01:39 +000079extern unsigned int nlm_threads_per_core;
Jayachandran C2a37b1a2012-10-31 12:01:37 +000080extern cpumask_t nlm_cpumask;
Jayachandran C77ae7982012-10-31 12:01:39 +000081
82struct nlm_soc_info {
Ralf Baechle70342282013-01-22 12:59:30 +010083 unsigned long coremask; /* cores enabled on the soc */
Jayachandran C77ae7982012-10-31 12:01:39 +000084 unsigned long ebase;
85 uint64_t irqmask;
86 uint64_t sysbase; /* only for XLP */
87 uint64_t picbase;
88 spinlock_t piclock;
89};
90
Ralf Baechle70342282013-01-22 12:59:30 +010091#define nlm_get_node(i) (&nlm_nodes[i])
Jayachandran Cbb1e4bc2012-10-31 12:01:40 +000092#ifdef CONFIG_CPU_XLR
Ralf Baechle70342282013-01-22 12:59:30 +010093#define nlm_current_node() (&nlm_nodes[0])
Jayachandran Cbb1e4bc2012-10-31 12:01:40 +000094#else
95#define nlm_current_node() (&nlm_nodes[nlm_nodeid()])
96#endif
Jayachandran C77ae7982012-10-31 12:01:39 +000097
98struct irq_data;
99uint64_t nlm_pci_irqmask(int node);
100void nlm_set_pic_extra_ack(int node, int irq, void (*xack)(struct irq_data *));
101
102/*
103 * The NR_IRQs is divided between nodes, each of them has a separate irq space
104 */
105static inline int nlm_irq_to_xirq(int node, int irq)
106{
107 return node * NR_IRQS / NLM_NR_NODES + irq;
108}
109
110extern struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
111extern int nlm_cpu_ready[];
Jayachandran C66d29982011-11-16 00:21:29 +0000112#endif
Jayachandran C0c965402011-11-11 17:08:29 +0530113#endif /* _NETLOGIC_COMMON_H_ */