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Sujithf1dc5602008-10-29 10:16:30 +05301/*
Sujith Manoharan5b681382011-05-17 13:36:18 +05302 * Copyright (c) 2008-2011 Atheros Communications Inc.
Sujithf1dc5602008-10-29 10:16:30 +05303 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -070017#include "hw.h"
Sujithf1dc5602008-10-29 10:16:30 +053018
Sujith79d7f4b2010-06-01 15:14:06 +053019void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val)
20{
21 REG_WRITE(ah, reg, val);
22
23 if (ah->config.analog_shiftreg)
24 udelay(100);
25}
26
Sujithb5aec952009-08-07 09:45:15 +053027void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask,
28 u32 shift, u32 val)
Sujithf1dc5602008-10-29 10:16:30 +053029{
30 u32 regVal;
31
32 regVal = REG_READ(ah, reg) & ~mask;
33 regVal |= (val << shift) & mask;
34
35 REG_WRITE(ah, reg, regVal);
36
Sujith2660b812009-02-09 13:27:26 +053037 if (ah->config.analog_shiftreg)
Sujithf1dc5602008-10-29 10:16:30 +053038 udelay(100);
Sujithf1dc5602008-10-29 10:16:30 +053039}
40
Sujithb5aec952009-08-07 09:45:15 +053041int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight,
42 int16_t targetLeft, int16_t targetRight)
Sujithf1dc5602008-10-29 10:16:30 +053043{
44 int16_t rv;
45
46 if (srcRight == srcLeft) {
47 rv = targetLeft;
48 } else {
49 rv = (int16_t) (((target - srcLeft) * targetRight +
50 (srcRight - target) * targetLeft) /
51 (srcRight - srcLeft));
52 }
53 return rv;
54}
55
Sujithb5aec952009-08-07 09:45:15 +053056bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
57 u16 *indexL, u16 *indexR)
Sujithf1dc5602008-10-29 10:16:30 +053058{
59 u16 i;
60
61 if (target <= pList[0]) {
62 *indexL = *indexR = 0;
63 return true;
64 }
65 if (target >= pList[listSize - 1]) {
66 *indexL = *indexR = (u16) (listSize - 1);
67 return true;
68 }
69
70 for (i = 0; i < listSize - 1; i++) {
71 if (pList[i] == target) {
72 *indexL = *indexR = i;
73 return true;
74 }
75 if (target < pList[i + 1]) {
76 *indexL = i;
77 *indexR = (u16) (i + 1);
78 return false;
79 }
80 }
81 return false;
82}
83
Sujith Manoharan04cf53f2011-01-04 13:17:28 +053084void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data,
85 int eep_start_loc, int size)
86{
87 int i = 0, j, addr;
88 u32 addrdata[8];
89 u32 data[8];
90
91 for (addr = 0; addr < size; addr++) {
92 addrdata[i] = AR5416_EEPROM_OFFSET +
93 ((addr + eep_start_loc) << AR5416_EEPROM_S);
94 i++;
95 if (i == 8) {
96 REG_READ_MULTI(ah, addrdata, data, i);
97
98 for (j = 0; j < i; j++) {
99 *eep_data = data[j];
100 eep_data++;
101 }
102 i = 0;
103 }
104 }
105
106 if (i != 0) {
107 REG_READ_MULTI(ah, addrdata, data, i);
108
109 for (j = 0; j < i; j++) {
110 *eep_data = data[j];
111 eep_data++;
112 }
113 }
114}
115
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -0700116bool ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data)
Sujithf1dc5602008-10-29 10:16:30 +0530117{
Gabor Juhos2fd2cdf2012-12-10 15:30:25 +0100118 bool ret;
119
120 ret = common->bus_ops->eeprom_read(common, off, data);
121 if (!ret)
122 ath_dbg(common, EEPROM, "Unable to read eeprom region\n");
123
124 return ret;
Sujithf1dc5602008-10-29 10:16:30 +0530125}
126
Sujithb5aec952009-08-07 09:45:15 +0530127void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
128 u8 *pVpdList, u16 numIntercepts,
129 u8 *pRetVpdList)
Sujithf74df6f2009-02-09 13:27:24 +0530130{
131 u16 i, k;
132 u8 currPwr = pwrMin;
133 u16 idxL = 0, idxR = 0;
134
135 for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) {
136 ath9k_hw_get_lower_upper_index(currPwr, pPwrList,
137 numIntercepts, &(idxL),
138 &(idxR));
139 if (idxR < 1)
140 idxR = 1;
141 if (idxL == numIntercepts - 1)
142 idxL = (u16) (numIntercepts - 2);
143 if (pPwrList[idxL] == pPwrList[idxR])
144 k = pVpdList[idxL];
145 else
146 k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] +
147 (pPwrList[idxR] - currPwr) * pVpdList[idxL]) /
148 (pPwrList[idxR] - pPwrList[idxL]));
149 pRetVpdList[i] = (u8) k;
150 currPwr += 2;
151 }
Sujithf74df6f2009-02-09 13:27:24 +0530152}
153
Sujithb5aec952009-08-07 09:45:15 +0530154void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah,
155 struct ath9k_channel *chan,
156 struct cal_target_power_leg *powInfo,
157 u16 numChannels,
158 struct cal_target_power_leg *pNewPower,
159 u16 numRates, bool isExtTarget)
Sujithf74df6f2009-02-09 13:27:24 +0530160{
161 struct chan_centers centers;
162 u16 clo, chi;
163 int i;
164 int matchIndex = -1, lowIndex = -1;
165 u16 freq;
166
167 ath9k_hw_get_channel_centers(ah, chan, &centers);
168 freq = (isExtTarget) ? centers.ext_center : centers.ctl_center;
169
170 if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel,
171 IS_CHAN_2GHZ(chan))) {
172 matchIndex = 0;
173 } else {
174 for (i = 0; (i < numChannels) &&
175 (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
176 if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
177 IS_CHAN_2GHZ(chan))) {
178 matchIndex = i;
179 break;
Roel Kluin73f57f82009-08-07 23:50:00 +0200180 } else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
181 IS_CHAN_2GHZ(chan)) && i > 0 &&
182 freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
183 IS_CHAN_2GHZ(chan))) {
Sujithf74df6f2009-02-09 13:27:24 +0530184 lowIndex = i - 1;
185 break;
186 }
187 }
188 if ((matchIndex == -1) && (lowIndex == -1))
189 matchIndex = i - 1;
190 }
191
192 if (matchIndex != -1) {
193 *pNewPower = powInfo[matchIndex];
194 } else {
195 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
196 IS_CHAN_2GHZ(chan));
197 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
198 IS_CHAN_2GHZ(chan));
199
200 for (i = 0; i < numRates; i++) {
201 pNewPower->tPow2x[i] =
202 (u8)ath9k_hw_interpolate(freq, clo, chi,
203 powInfo[lowIndex].tPow2x[i],
204 powInfo[lowIndex + 1].tPow2x[i]);
205 }
206 }
207}
208
Sujithb5aec952009-08-07 09:45:15 +0530209void ath9k_hw_get_target_powers(struct ath_hw *ah,
210 struct ath9k_channel *chan,
211 struct cal_target_power_ht *powInfo,
212 u16 numChannels,
213 struct cal_target_power_ht *pNewPower,
214 u16 numRates, bool isHt40Target)
Sujithf74df6f2009-02-09 13:27:24 +0530215{
216 struct chan_centers centers;
217 u16 clo, chi;
218 int i;
219 int matchIndex = -1, lowIndex = -1;
220 u16 freq;
221
222 ath9k_hw_get_channel_centers(ah, chan, &centers);
223 freq = isHt40Target ? centers.synth_center : centers.ctl_center;
224
225 if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) {
226 matchIndex = 0;
227 } else {
228 for (i = 0; (i < numChannels) &&
229 (powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
230 if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel,
231 IS_CHAN_2GHZ(chan))) {
232 matchIndex = i;
233 break;
234 } else
Roel Kluin73f57f82009-08-07 23:50:00 +0200235 if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel,
236 IS_CHAN_2GHZ(chan)) && i > 0 &&
237 freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel,
238 IS_CHAN_2GHZ(chan))) {
Sujithf74df6f2009-02-09 13:27:24 +0530239 lowIndex = i - 1;
240 break;
241 }
242 }
243 if ((matchIndex == -1) && (lowIndex == -1))
244 matchIndex = i - 1;
245 }
246
247 if (matchIndex != -1) {
248 *pNewPower = powInfo[matchIndex];
249 } else {
250 clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel,
251 IS_CHAN_2GHZ(chan));
252 chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel,
253 IS_CHAN_2GHZ(chan));
254
255 for (i = 0; i < numRates; i++) {
256 pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq,
257 clo, chi,
258 powInfo[lowIndex].tPow2x[i],
259 powInfo[lowIndex + 1].tPow2x[i]);
260 }
261 }
262}
263
Sujithb5aec952009-08-07 09:45:15 +0530264u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
265 bool is2GHz, int num_band_edges)
Sujithf74df6f2009-02-09 13:27:24 +0530266{
Felix Fietkau4ddfcd72010-12-12 00:51:08 +0100267 u16 twiceMaxEdgePower = MAX_RATE_POWER;
Sujithf74df6f2009-02-09 13:27:24 +0530268 int i;
269
270 for (i = 0; (i < num_band_edges) &&
271 (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
272 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
Felix Fietkaue702ba12010-12-01 19:07:46 +0100273 twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
Sujithf74df6f2009-02-09 13:27:24 +0530274 break;
275 } else if ((i > 0) &&
276 (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
277 is2GHz))) {
278 if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
279 is2GHz) < freq &&
Felix Fietkaue702ba12010-12-01 19:07:46 +0100280 CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
Sujithf74df6f2009-02-09 13:27:24 +0530281 twiceMaxEdgePower =
Felix Fietkaue702ba12010-12-01 19:07:46 +0100282 CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
Sujithf74df6f2009-02-09 13:27:24 +0530283 }
284 break;
285 }
286 }
287
288 return twiceMaxEdgePower;
289}
290
Gabor Juhosea6f7922012-04-14 22:01:58 +0200291u16 ath9k_hw_get_scaled_power(struct ath_hw *ah, u16 power_limit,
292 u8 antenna_reduction)
293{
Gabor Juhos8f942b92012-04-14 22:01:59 +0200294 u16 reduction = antenna_reduction;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200295
296 /*
297 * Reduce scaled Power by number of chains active
298 * to get the per chain tx power level.
299 */
300 switch (ar5416_get_ntxchains(ah->txchainmask)) {
301 case 1:
302 break;
303 case 2:
Gabor Juhos6010e722012-04-16 22:22:49 +0200304 reduction += POWER_CORRECTION_FOR_TWO_CHAIN;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200305 break;
306 case 3:
Gabor Juhos6010e722012-04-16 22:22:49 +0200307 reduction += POWER_CORRECTION_FOR_THREE_CHAIN;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200308 break;
309 }
310
Gabor Juhos8f942b92012-04-14 22:01:59 +0200311 if (power_limit > reduction)
312 power_limit -= reduction;
313 else
314 power_limit = 0;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200315
Gabor Juhos8f942b92012-04-14 22:01:59 +0200316 return power_limit;
Gabor Juhosea6f7922012-04-14 22:01:58 +0200317}
318
Sujitha55f8582010-06-01 15:14:07 +0530319void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
320{
321 struct ath_common *common = ath9k_hw_common(ah);
322 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
323
324 switch (ar5416_get_ntxchains(ah->txchainmask)) {
325 case 1:
326 break;
327 case 2:
Gabor Juhos6010e722012-04-16 22:22:49 +0200328 regulatory->max_power_level += POWER_CORRECTION_FOR_TWO_CHAIN;
Sujitha55f8582010-06-01 15:14:07 +0530329 break;
330 case 3:
Gabor Juhos6010e722012-04-16 22:22:49 +0200331 regulatory->max_power_level += POWER_CORRECTION_FOR_THREE_CHAIN;
Sujitha55f8582010-06-01 15:14:07 +0530332 break;
333 default:
Joe Perchesd2182b62011-12-15 14:55:53 -0800334 ath_dbg(common, EEPROM, "Invalid chainmask configuration\n");
Sujitha55f8582010-06-01 15:14:07 +0530335 break;
336 }
337}
338
Felix Fietkau115277a2010-12-12 00:51:09 +0100339void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah,
340 struct ath9k_channel *chan,
341 void *pRawDataSet,
342 u8 *bChans, u16 availPiers,
343 u16 tPdGainOverlap,
344 u16 *pPdGainBoundaries, u8 *pPDADCValues,
345 u16 numXpdGains)
346{
347 int i, j, k;
348 int16_t ss;
349 u16 idxL = 0, idxR = 0, numPiers;
350 static u8 vpdTableL[AR5416_NUM_PD_GAINS]
351 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
352 static u8 vpdTableR[AR5416_NUM_PD_GAINS]
353 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
354 static u8 vpdTableI[AR5416_NUM_PD_GAINS]
355 [AR5416_MAX_PWR_RANGE_IN_HALF_DB];
356
357 u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR;
358 u8 minPwrT4[AR5416_NUM_PD_GAINS];
359 u8 maxPwrT4[AR5416_NUM_PD_GAINS];
360 int16_t vpdStep;
361 int16_t tmpVal;
362 u16 sizeCurrVpdTable, maxIndex, tgtIndex;
363 bool match;
364 int16_t minDelta = 0;
365 struct chan_centers centers;
366 int pdgain_boundary_default;
367 struct cal_data_per_freq *data_def = pRawDataSet;
368 struct cal_data_per_freq_4k *data_4k = pRawDataSet;
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100369 struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet;
Felix Fietkau115277a2010-12-12 00:51:09 +0100370 bool eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah);
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100371 int intercepts;
372
373 if (AR_SREV_9287(ah))
374 intercepts = AR9287_PD_GAIN_ICEPTS;
375 else
376 intercepts = AR5416_PD_GAIN_ICEPTS;
Felix Fietkau115277a2010-12-12 00:51:09 +0100377
378 memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS);
379 ath9k_hw_get_channel_centers(ah, chan, &centers);
380
381 for (numPiers = 0; numPiers < availPiers; numPiers++) {
382 if (bChans[numPiers] == AR5416_BCHAN_UNUSED)
383 break;
384 }
385
386 match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center,
387 IS_CHAN_2GHZ(chan)),
388 bChans, numPiers, &idxL, &idxR);
389
390 if (match) {
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100391 if (AR_SREV_9287(ah)) {
392 /* FIXME: array overrun? */
393 for (i = 0; i < numXpdGains; i++) {
394 minPwrT4[i] = data_9287[idxL].pwrPdg[i][0];
395 maxPwrT4[i] = data_9287[idxL].pwrPdg[i][4];
396 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
397 data_9287[idxL].pwrPdg[i],
398 data_9287[idxL].vpdPdg[i],
399 intercepts,
400 vpdTableI[i]);
401 }
402 } else if (eeprom_4k) {
Felix Fietkau115277a2010-12-12 00:51:09 +0100403 for (i = 0; i < numXpdGains; i++) {
404 minPwrT4[i] = data_4k[idxL].pwrPdg[i][0];
405 maxPwrT4[i] = data_4k[idxL].pwrPdg[i][4];
406 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
407 data_4k[idxL].pwrPdg[i],
408 data_4k[idxL].vpdPdg[i],
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100409 intercepts,
Felix Fietkau115277a2010-12-12 00:51:09 +0100410 vpdTableI[i]);
411 }
412 } else {
413 for (i = 0; i < numXpdGains; i++) {
414 minPwrT4[i] = data_def[idxL].pwrPdg[i][0];
415 maxPwrT4[i] = data_def[idxL].pwrPdg[i][4];
416 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
417 data_def[idxL].pwrPdg[i],
418 data_def[idxL].vpdPdg[i],
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100419 intercepts,
Felix Fietkau115277a2010-12-12 00:51:09 +0100420 vpdTableI[i]);
421 }
422 }
423 } else {
424 for (i = 0; i < numXpdGains; i++) {
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100425 if (AR_SREV_9287(ah)) {
426 pVpdL = data_9287[idxL].vpdPdg[i];
427 pPwrL = data_9287[idxL].pwrPdg[i];
428 pVpdR = data_9287[idxR].vpdPdg[i];
429 pPwrR = data_9287[idxR].pwrPdg[i];
430 } else if (eeprom_4k) {
Felix Fietkau115277a2010-12-12 00:51:09 +0100431 pVpdL = data_4k[idxL].vpdPdg[i];
432 pPwrL = data_4k[idxL].pwrPdg[i];
433 pVpdR = data_4k[idxR].vpdPdg[i];
434 pPwrR = data_4k[idxR].pwrPdg[i];
435 } else {
436 pVpdL = data_def[idxL].vpdPdg[i];
437 pPwrL = data_def[idxL].pwrPdg[i];
438 pVpdR = data_def[idxR].vpdPdg[i];
439 pPwrR = data_def[idxR].pwrPdg[i];
440 }
441
442 minPwrT4[i] = max(pPwrL[0], pPwrR[0]);
443
444 maxPwrT4[i] =
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100445 min(pPwrL[intercepts - 1],
446 pPwrR[intercepts - 1]);
Felix Fietkau115277a2010-12-12 00:51:09 +0100447
448
449 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
450 pPwrL, pVpdL,
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100451 intercepts,
Felix Fietkau115277a2010-12-12 00:51:09 +0100452 vpdTableL[i]);
453 ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i],
454 pPwrR, pVpdR,
Felix Fietkau940cd2c2010-12-12 00:51:10 +0100455 intercepts,
Felix Fietkau115277a2010-12-12 00:51:09 +0100456 vpdTableR[i]);
457
458 for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) {
459 vpdTableI[i][j] =
460 (u8)(ath9k_hw_interpolate((u16)
461 FREQ2FBIN(centers.
462 synth_center,
463 IS_CHAN_2GHZ
464 (chan)),
465 bChans[idxL], bChans[idxR],
466 vpdTableL[i][j], vpdTableR[i][j]));
467 }
468 }
469 }
470
471 k = 0;
472
473 for (i = 0; i < numXpdGains; i++) {
474 if (i == (numXpdGains - 1))
475 pPdGainBoundaries[i] =
476 (u16)(maxPwrT4[i] / 2);
477 else
478 pPdGainBoundaries[i] =
479 (u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4);
480
481 pPdGainBoundaries[i] =
482 min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
483
Felix Fietkau1b8714f2011-09-15 14:25:35 +0200484 minDelta = 0;
Felix Fietkau115277a2010-12-12 00:51:09 +0100485
486 if (i == 0) {
487 if (AR_SREV_9280_20_OR_LATER(ah))
488 ss = (int16_t)(0 - (minPwrT4[i] / 2));
489 else
490 ss = 0;
491 } else {
492 ss = (int16_t)((pPdGainBoundaries[i - 1] -
493 (minPwrT4[i] / 2)) -
494 tPdGainOverlap + 1 + minDelta);
495 }
496 vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]);
497 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
498
499 while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
500 tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep);
501 pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal);
502 ss++;
503 }
504
505 sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1);
506 tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap -
507 (minPwrT4[i] / 2));
508 maxIndex = (tgtIndex < sizeCurrVpdTable) ?
509 tgtIndex : sizeCurrVpdTable;
510
511 while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) {
512 pPDADCValues[k++] = vpdTableI[i][ss++];
513 }
514
515 vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] -
516 vpdTableI[i][sizeCurrVpdTable - 2]);
517 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
518
519 if (tgtIndex >= maxIndex) {
520 while ((ss <= tgtIndex) &&
521 (k < (AR5416_NUM_PDADC_VALUES - 1))) {
522 tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] +
523 (ss - maxIndex + 1) * vpdStep));
524 pPDADCValues[k++] = (u8)((tmpVal > 255) ?
525 255 : tmpVal);
526 ss++;
527 }
528 }
529 }
530
531 if (eeprom_4k)
532 pdgain_boundary_default = 58;
533 else
534 pdgain_boundary_default = pPdGainBoundaries[i - 1];
535
536 while (i < AR5416_PD_GAINS_IN_MASK) {
537 pPdGainBoundaries[i] = pdgain_boundary_default;
538 i++;
539 }
540
541 while (k < AR5416_NUM_PDADC_VALUES) {
542 pPDADCValues[k] = pPDADCValues[k - 1];
543 k++;
544 }
545}
546
Luis R. Rodriguezf637cfd2009-08-03 12:24:46 -0700547int ath9k_hw_eeprom_init(struct ath_hw *ah)
Sujithf1dc5602008-10-29 10:16:30 +0530548{
549 int status;
Sujithc16c9d02009-08-07 09:45:11 +0530550
Senthil Balasubramanian15c9ee72010-04-15 17:39:14 -0400551 if (AR_SREV_9300_20_OR_LATER(ah))
552 ah->eep_ops = &eep_ar9300_ops;
553 else if (AR_SREV_9287(ah)) {
Luis R. Rodriguez0b8f6f2b12010-04-15 17:39:12 -0400554 ah->eep_ops = &eep_ar9287_ops;
Luis R. Rodriguezd7e7d222009-08-03 23:14:12 -0400555 } else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
Sujithf74df6f2009-02-09 13:27:24 +0530556 ah->eep_ops = &eep_4k_ops;
557 } else {
Sujithf74df6f2009-02-09 13:27:24 +0530558 ah->eep_ops = &eep_def_ops;
559 }
Senthil Balasubramaniane7594072008-12-08 19:43:48 +0530560
Sujithf74df6f2009-02-09 13:27:24 +0530561 if (!ah->eep_ops->fill_eeprom(ah))
Sujithf1dc5602008-10-29 10:16:30 +0530562 return -EIO;
563
Sujithf74df6f2009-02-09 13:27:24 +0530564 status = ah->eep_ops->check_eeprom(ah);
Sujithf1dc5602008-10-29 10:16:30 +0530565
566 return status;
567}