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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Sreedhara DS9a58a332010-04-26 18:13:05 +01002#ifndef _ASM_X86_INTEL_SCU_IPC_H_
3#define _ASM_X86_INTEL_SCU_IPC_H_
4
Alan Cox42c25442011-09-07 16:06:51 +03005#include <linux/notifier.h>
6
Andy Shevchenkod27a7e22017-04-05 19:05:28 +03007#define IPCMSG_INDIRECT_READ 0x02
8#define IPCMSG_INDIRECT_WRITE 0x05
9
Andy Shevchenkobda7b072016-09-07 15:39:55 +030010#define IPCMSG_COLD_OFF 0x80 /* Only for Tangier */
11
Jacob Pan48bc5562011-11-16 16:07:22 +000012#define IPCMSG_WARM_RESET 0xF0
13#define IPCMSG_COLD_RESET 0xF1
14#define IPCMSG_SOFT_RESET 0xF2
15#define IPCMSG_COLD_BOOT 0xF3
Feng Tang35f29152010-06-01 13:07:34 +010016
Jacob Pan48bc5562011-11-16 16:07:22 +000017#define IPCMSG_VRTC 0xFA /* Set vRTC device */
18 /* Command id associated with message IPCMSG_VRTC */
19 #define IPC_CMD_VRTC_SETTIME 1 /* Set time */
20 #define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */
Feng Tang35f29152010-06-01 13:07:34 +010021
Sreedhara DS9a58a332010-04-26 18:13:05 +010022/* Read single register */
23int intel_scu_ipc_ioread8(u16 addr, u8 *data);
24
25/* Read two sequential registers */
26int intel_scu_ipc_ioread16(u16 addr, u16 *data);
27
28/* Read four sequential registers */
29int intel_scu_ipc_ioread32(u16 addr, u32 *data);
30
31/* Read a vector */
32int intel_scu_ipc_readv(u16 *addr, u8 *data, int len);
33
34/* Write single register */
35int intel_scu_ipc_iowrite8(u16 addr, u8 data);
36
37/* Write two sequential registers */
38int intel_scu_ipc_iowrite16(u16 addr, u16 data);
39
40/* Write four sequential registers */
41int intel_scu_ipc_iowrite32(u16 addr, u32 data);
42
43/* Write a vector */
44int intel_scu_ipc_writev(u16 *addr, u8 *data, int len);
45
46/* Update single register based on the mask */
47int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask);
48
Sreedhara DS9a58a332010-04-26 18:13:05 +010049/* Issue commands to the SCU with or without data */
50int intel_scu_ipc_simple_command(int cmd, int sub);
51int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
Andy Shevchenkod27a7e22017-04-05 19:05:28 +030052 u32 *out, int outlen);
53int intel_scu_ipc_raw_command(int cmd, int sub, u8 *in, int inlen,
54 u32 *out, int outlen, u32 dptr, u32 sptr);
55
Sreedhara DS9a58a332010-04-26 18:13:05 +010056/* I2C control api */
57int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data);
58
59/* Update FW version */
60int intel_scu_ipc_fw_update(u8 *buffer, u32 length);
61
Alan Cox42c25442011-09-07 16:06:51 +030062extern struct blocking_notifier_head intel_scu_notifier;
63
64static inline void intel_scu_notifier_add(struct notifier_block *nb)
65{
66 blocking_notifier_chain_register(&intel_scu_notifier, nb);
67}
68
69static inline void intel_scu_notifier_remove(struct notifier_block *nb)
70{
71 blocking_notifier_chain_unregister(&intel_scu_notifier, nb);
72}
73
74static inline int intel_scu_notifier_post(unsigned long v, void *p)
75{
76 return blocking_notifier_call_chain(&intel_scu_notifier, v, p);
77}
78
79#define SCU_AVAILABLE 1
80#define SCU_DOWN 2
81
Sreedhara DS9a58a332010-04-26 18:13:05 +010082#endif