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Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001/*
2 * AMD 10Gb Ethernet driver
3 *
4 * This file is available to you under your choice of the following two
5 * licenses:
6 *
7 * License 1: GPLv2
8 *
Lendacky, Thomas491aefb2016-02-17 11:48:19 -06009 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -050010 *
11 * This file is free software; you may copy, redistribute and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 *
24 * This file incorporates work covered by the following copyright and
25 * permission notice:
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
29 * and you.
30 *
31 * The Software IS NOT an item of Licensed Software or Licensed Product
32 * under any End User Software License Agreement or Agreement for Licensed
33 * Product with Synopsys or any supplement thereto. Permission is hereby
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
43 *
44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54 * THE POSSIBILITY OF SUCH DAMAGE.
55 *
56 *
57 * License 2: Modified BSD
58 *
Lendacky, Thomas491aefb2016-02-17 11:48:19 -060059 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -050060 * All rights reserved.
61 *
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions are met:
64 * * Redistributions of source code must retain the above copyright
65 * notice, this list of conditions and the following disclaimer.
66 * * Redistributions in binary form must reproduce the above copyright
67 * notice, this list of conditions and the following disclaimer in the
68 * documentation and/or other materials provided with the distribution.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
70 * names of its contributors may be used to endorse or promote products
71 * derived from this software without specific prior written permission.
72 *
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83 *
84 * This file incorporates work covered by the following copyright and
85 * permission notice:
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88 * Inc. unless otherwise expressly agreed to in writing between Synopsys
89 * and you.
90 *
91 * The Software IS NOT an item of Licensed Software or Licensed Product
92 * under any End User Software License Agreement or Agreement for Licensed
93 * Product with Synopsys or any supplement thereto. Permission is hereby
94 * granted, free of charge, to any person obtaining a copy of this software
95 * annotated with this license and the Software, to deal in the Software
96 * without restriction, including without limitation the rights to use,
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98 * of the Software, and to permit persons to whom the Software is furnished
99 * to do so, subject to the following conditions:
100 *
101 * The above copyright notice and this permission notice shall be included
102 * in all copies or substantial portions of the Software.
103 *
104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114 * THE POSSIBILITY OF SUCH DAMAGE.
115 */
116
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600117#include <linux/module.h>
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500118#include <linux/spinlock.h>
119#include <linux/tcp.h>
120#include <linux/if_vlan.h>
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500121#include <net/busy_poll.h>
122#include <linux/clk.h>
123#include <linux/if_ether.h>
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -0500124#include <linux/net_tstamp.h>
Lendacky, Thomas88131a82014-08-05 13:30:44 -0500125#include <linux/phy.h>
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500126
127#include "xgbe.h"
128#include "xgbe-common.h"
129
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600130static unsigned int ecc_sec_info_threshold = 10;
131static unsigned int ecc_sec_warn_threshold = 10000;
132static unsigned int ecc_sec_period = 600;
133static unsigned int ecc_ded_threshold = 2;
134static unsigned int ecc_ded_period = 600;
135
136#ifdef CONFIG_AMD_XGBE_HAVE_ECC
137/* Only expose the ECC parameters if supported */
138module_param(ecc_sec_info_threshold, uint, S_IWUSR | S_IRUGO);
139MODULE_PARM_DESC(ecc_sec_info_threshold,
140 " ECC corrected error informational threshold setting");
141
142module_param(ecc_sec_warn_threshold, uint, S_IWUSR | S_IRUGO);
143MODULE_PARM_DESC(ecc_sec_warn_threshold,
144 " ECC corrected error warning threshold setting");
145
146module_param(ecc_sec_period, uint, S_IWUSR | S_IRUGO);
147MODULE_PARM_DESC(ecc_sec_period, " ECC corrected error period (in seconds)");
148
149module_param(ecc_ded_threshold, uint, S_IWUSR | S_IRUGO);
150MODULE_PARM_DESC(ecc_ded_threshold, " ECC detected error threshold setting");
151
152module_param(ecc_ded_period, uint, S_IWUSR | S_IRUGO);
153MODULE_PARM_DESC(ecc_ded_period, " ECC detected error period (in seconds)");
154#endif
155
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600156static int xgbe_one_poll(struct napi_struct *, int);
157static int xgbe_all_poll(struct napi_struct *, int);
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600158static void xgbe_stop(struct xgbe_prv_data *);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500159
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -0600160static int xgbe_alloc_channels(struct xgbe_prv_data *pdata)
161{
162 struct xgbe_channel *channel_mem, *channel;
163 struct xgbe_ring *tx_ring, *rx_ring;
164 unsigned int count, i;
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600165 int ret = -ENOMEM;
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -0600166
167 count = max_t(unsigned int, pdata->tx_ring_count, pdata->rx_ring_count);
168
169 channel_mem = kcalloc(count, sizeof(struct xgbe_channel), GFP_KERNEL);
170 if (!channel_mem)
171 goto err_channel;
172
173 tx_ring = kcalloc(pdata->tx_ring_count, sizeof(struct xgbe_ring),
174 GFP_KERNEL);
175 if (!tx_ring)
176 goto err_tx_ring;
177
178 rx_ring = kcalloc(pdata->rx_ring_count, sizeof(struct xgbe_ring),
179 GFP_KERNEL);
180 if (!rx_ring)
181 goto err_rx_ring;
182
183 for (i = 0, channel = channel_mem; i < count; i++, channel++) {
xypron.glpk@gmx.defb160eb2016-07-31 10:07:18 +0200184 snprintf(channel->name, sizeof(channel->name), "channel-%u", i);
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -0600185 channel->pdata = pdata;
186 channel->queue_index = i;
187 channel->dma_regs = pdata->xgmac_regs + DMA_CH_BASE +
188 (DMA_CH_INC * i);
189
Lendacky, Thomasbd8255d2016-11-03 13:19:27 -0500190 if (pdata->per_channel_irq)
191 channel->dma_irq = pdata->channel_irq[i];
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600192
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -0600193 if (i < pdata->tx_ring_count) {
194 spin_lock_init(&tx_ring->lock);
195 channel->tx_ring = tx_ring++;
196 }
197
198 if (i < pdata->rx_ring_count) {
199 spin_lock_init(&rx_ring->lock);
200 channel->rx_ring = rx_ring++;
201 }
202
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -0500203 netif_dbg(pdata, drv, pdata->netdev,
204 "%s: dma_regs=%p, dma_irq=%d, tx=%p, rx=%p\n",
205 channel->name, channel->dma_regs, channel->dma_irq,
206 channel->tx_ring, channel->rx_ring);
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -0600207 }
208
209 pdata->channel = channel_mem;
210 pdata->channel_count = count;
211
212 return 0;
213
214err_rx_ring:
215 kfree(tx_ring);
216
217err_tx_ring:
218 kfree(channel_mem);
219
220err_channel:
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600221 return ret;
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -0600222}
223
224static void xgbe_free_channels(struct xgbe_prv_data *pdata)
225{
226 if (!pdata->channel)
227 return;
228
229 kfree(pdata->channel->rx_ring);
230 kfree(pdata->channel->tx_ring);
231 kfree(pdata->channel);
232
233 pdata->channel = NULL;
234 pdata->channel_count = 0;
235}
236
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500237static inline unsigned int xgbe_tx_avail_desc(struct xgbe_ring *ring)
238{
239 return (ring->rdesc_count - (ring->cur - ring->dirty));
240}
241
Lendacky, Thomas270894e2015-01-16 12:46:50 -0600242static inline unsigned int xgbe_rx_dirty_desc(struct xgbe_ring *ring)
243{
244 return (ring->cur - ring->dirty);
245}
246
Lendacky, Thomas16958a22014-11-20 11:04:08 -0600247static int xgbe_maybe_stop_tx_queue(struct xgbe_channel *channel,
248 struct xgbe_ring *ring, unsigned int count)
249{
250 struct xgbe_prv_data *pdata = channel->pdata;
251
252 if (count > xgbe_tx_avail_desc(ring)) {
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -0500253 netif_info(pdata, drv, pdata->netdev,
254 "Tx queue stopped, not enough descriptors available\n");
Lendacky, Thomas16958a22014-11-20 11:04:08 -0600255 netif_stop_subqueue(pdata->netdev, channel->queue_index);
256 ring->tx.queue_stopped = 1;
257
258 /* If we haven't notified the hardware because of xmit_more
259 * support, tell it now
260 */
261 if (ring->tx.xmit_more)
262 pdata->hw_if.tx_start_xmit(channel, ring);
263
264 return NETDEV_TX_BUSY;
265 }
266
267 return 0;
268}
269
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500270static int xgbe_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu)
271{
272 unsigned int rx_buf_size;
273
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500274 rx_buf_size = mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600275 rx_buf_size = clamp_val(rx_buf_size, XGBE_RX_MIN_BUF_SIZE, PAGE_SIZE);
276
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -0500277 rx_buf_size = (rx_buf_size + XGBE_RX_BUF_ALIGN - 1) &
278 ~(XGBE_RX_BUF_ALIGN - 1);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500279
280 return rx_buf_size;
281}
282
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600283static void xgbe_enable_rx_tx_int(struct xgbe_prv_data *pdata,
284 struct xgbe_channel *channel)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500285{
286 struct xgbe_hw_if *hw_if = &pdata->hw_if;
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -0500287 enum xgbe_int int_id;
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600288
289 if (channel->tx_ring && channel->rx_ring)
290 int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
291 else if (channel->tx_ring)
292 int_id = XGMAC_INT_DMA_CH_SR_TI;
293 else if (channel->rx_ring)
294 int_id = XGMAC_INT_DMA_CH_SR_RI;
295 else
296 return;
297
298 hw_if->enable_int(channel, int_id);
299}
300
301static void xgbe_enable_rx_tx_ints(struct xgbe_prv_data *pdata)
302{
303 struct xgbe_channel *channel;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500304 unsigned int i;
305
306 channel = pdata->channel;
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600307 for (i = 0; i < pdata->channel_count; i++, channel++)
308 xgbe_enable_rx_tx_int(pdata, channel);
309}
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -0500310
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600311static void xgbe_disable_rx_tx_int(struct xgbe_prv_data *pdata,
312 struct xgbe_channel *channel)
313{
314 struct xgbe_hw_if *hw_if = &pdata->hw_if;
315 enum xgbe_int int_id;
316
317 if (channel->tx_ring && channel->rx_ring)
318 int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
319 else if (channel->tx_ring)
320 int_id = XGMAC_INT_DMA_CH_SR_TI;
321 else if (channel->rx_ring)
322 int_id = XGMAC_INT_DMA_CH_SR_RI;
323 else
324 return;
325
326 hw_if->disable_int(channel, int_id);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500327}
328
329static void xgbe_disable_rx_tx_ints(struct xgbe_prv_data *pdata)
330{
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500331 struct xgbe_channel *channel;
332 unsigned int i;
333
334 channel = pdata->channel;
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600335 for (i = 0; i < pdata->channel_count; i++, channel++)
336 xgbe_disable_rx_tx_int(pdata, channel);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500337}
338
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600339static bool xgbe_ecc_sec(struct xgbe_prv_data *pdata, unsigned long *period,
340 unsigned int *count, const char *area)
341{
342 if (time_before(jiffies, *period)) {
343 (*count)++;
344 } else {
345 *period = jiffies + (ecc_sec_period * HZ);
346 *count = 1;
347 }
348
349 if (*count > ecc_sec_info_threshold)
350 dev_warn_once(pdata->dev,
351 "%s ECC corrected errors exceed informational threshold\n",
352 area);
353
354 if (*count > ecc_sec_warn_threshold) {
355 dev_warn_once(pdata->dev,
356 "%s ECC corrected errors exceed warning threshold\n",
357 area);
358 return true;
359 }
360
361 return false;
362}
363
364static bool xgbe_ecc_ded(struct xgbe_prv_data *pdata, unsigned long *period,
365 unsigned int *count, const char *area)
366{
367 if (time_before(jiffies, *period)) {
368 (*count)++;
369 } else {
370 *period = jiffies + (ecc_ded_period * HZ);
371 *count = 1;
372 }
373
374 if (*count > ecc_ded_threshold) {
375 netdev_alert(pdata->netdev,
376 "%s ECC detected errors exceed threshold\n",
377 area);
378 return true;
379 }
380
381 return false;
382}
383
384static irqreturn_t xgbe_ecc_isr(int irq, void *data)
385{
386 struct xgbe_prv_data *pdata = data;
387 unsigned int ecc_isr;
388 bool stop = false;
389
390 /* Mask status with only the interrupts we care about */
391 ecc_isr = XP_IOREAD(pdata, XP_ECC_ISR);
392 ecc_isr &= XP_IOREAD(pdata, XP_ECC_IER);
393 netif_dbg(pdata, intr, pdata->netdev, "ECC_ISR=%#010x\n", ecc_isr);
394
395 if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, TX_DED)) {
396 stop |= xgbe_ecc_ded(pdata, &pdata->tx_ded_period,
397 &pdata->tx_ded_count, "TX fifo");
398 }
399
400 if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, RX_DED)) {
401 stop |= xgbe_ecc_ded(pdata, &pdata->rx_ded_period,
402 &pdata->rx_ded_count, "RX fifo");
403 }
404
405 if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, DESC_DED)) {
406 stop |= xgbe_ecc_ded(pdata, &pdata->desc_ded_period,
407 &pdata->desc_ded_count,
408 "descriptor cache");
409 }
410
411 if (stop) {
412 pdata->hw_if.disable_ecc_ded(pdata);
413 schedule_work(&pdata->stopdev_work);
414 goto out;
415 }
416
417 if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, TX_SEC)) {
418 if (xgbe_ecc_sec(pdata, &pdata->tx_sec_period,
419 &pdata->tx_sec_count, "TX fifo"))
420 pdata->hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_TX);
421 }
422
423 if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, RX_SEC))
424 if (xgbe_ecc_sec(pdata, &pdata->rx_sec_period,
425 &pdata->rx_sec_count, "RX fifo"))
426 pdata->hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_RX);
427
428 if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, DESC_SEC))
429 if (xgbe_ecc_sec(pdata, &pdata->desc_sec_period,
430 &pdata->desc_sec_count, "descriptor cache"))
431 pdata->hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_DESC);
432
433out:
434 /* Clear all ECC interrupts */
435 XP_IOWRITE(pdata, XP_ECC_ISR, ecc_isr);
436
437 return IRQ_HANDLED;
438}
439
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500440static irqreturn_t xgbe_isr(int irq, void *data)
441{
442 struct xgbe_prv_data *pdata = data;
443 struct xgbe_hw_if *hw_if = &pdata->hw_if;
444 struct xgbe_channel *channel;
445 unsigned int dma_isr, dma_ch_isr;
Lendacky, Thomas732f2ab2016-11-10 17:11:14 -0600446 unsigned int mac_isr, mac_tssr, mac_mdioisr;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500447 unsigned int i;
448
449 /* The DMA interrupt status register also reports MAC and MTL
450 * interrupts. So for polling mode, we just need to check for
451 * this register to be non-zero
452 */
453 dma_isr = XGMAC_IOREAD(pdata, DMA_ISR);
454 if (!dma_isr)
455 goto isr_done;
456
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -0500457 netif_dbg(pdata, intr, pdata->netdev, "DMA_ISR=%#010x\n", dma_isr);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500458
459 for (i = 0; i < pdata->channel_count; i++) {
460 if (!(dma_isr & (1 << i)))
461 continue;
462
463 channel = pdata->channel + i;
464
465 dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -0500466 netif_dbg(pdata, intr, pdata->netdev, "DMA_CH%u_ISR=%#010x\n",
467 i, dma_ch_isr);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500468
Lendacky, Thomasfd972b72015-02-05 19:17:14 -0600469 /* The TI or RI interrupt bits may still be set even if using
470 * per channel DMA interrupts. Check to be sure those are not
471 * enabled before using the private data napi structure.
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600472 */
Lendacky, Thomasfd972b72015-02-05 19:17:14 -0600473 if (!pdata->per_channel_irq &&
474 (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||
475 XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) {
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500476 if (napi_schedule_prep(&pdata->napi)) {
477 /* Disable Tx and Rx interrupts */
478 xgbe_disable_rx_tx_ints(pdata);
479
480 /* Turn on polling */
Lendacky, Thomas79349422016-02-17 11:48:29 -0600481 __napi_schedule_irqoff(&pdata->napi);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500482 }
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600483 } else {
484 /* Don't clear Rx/Tx status if doing per channel DMA
485 * interrupts, these will be cleared by the ISR for
486 * per channel DMA interrupts.
487 */
488 XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, TI, 0);
489 XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, RI, 0);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500490 }
491
Lendacky, Thomas72c9ac42015-09-30 08:53:10 -0500492 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RBU))
493 pdata->ext_stats.rx_buffer_unavailable++;
494
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500495 /* Restart the device on a Fatal Bus Error */
496 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE))
Lendacky, Thomas96aec912015-10-14 12:37:32 -0500497 schedule_work(&pdata->restart_work);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500498
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600499 /* Clear interrupt signals */
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500500 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);
501 }
502
503 if (XGMAC_GET_BITS(dma_isr, DMA_ISR, MACIS)) {
504 mac_isr = XGMAC_IOREAD(pdata, MAC_ISR);
505
Lendacky, Thomas732f2ab2016-11-10 17:11:14 -0600506 netif_dbg(pdata, intr, pdata->netdev, "MAC_ISR=%#010x\n",
507 mac_isr);
508
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500509 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCTXIS))
510 hw_if->tx_mmc_int(pdata);
511
512 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCRXIS))
513 hw_if->rx_mmc_int(pdata);
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -0500514
515 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, TSIS)) {
516 mac_tssr = XGMAC_IOREAD(pdata, MAC_TSSR);
517
Lendacky, Thomas732f2ab2016-11-10 17:11:14 -0600518 netif_dbg(pdata, intr, pdata->netdev,
519 "MAC_TSSR=%#010x\n", mac_tssr);
520
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -0500521 if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) {
522 /* Read Tx Timestamp to clear interrupt */
523 pdata->tx_tstamp =
524 hw_if->get_tx_tstamp(pdata);
Lendacky, Thomasafb43e82015-09-30 08:53:16 -0500525 queue_work(pdata->dev_workqueue,
526 &pdata->tx_tstamp_work);
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -0500527 }
528 }
Lendacky, Thomas732f2ab2016-11-10 17:11:14 -0600529
530 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, SMI)) {
531 mac_mdioisr = XGMAC_IOREAD(pdata, MAC_MDIOISR);
532
533 netif_dbg(pdata, intr, pdata->netdev,
534 "MAC_MDIOISR=%#010x\n", mac_mdioisr);
535
536 if (XGMAC_GET_BITS(mac_mdioisr, MAC_MDIOISR,
537 SNGLCOMPINT))
538 complete(&pdata->mdio_complete);
539 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500540 }
541
Lendacky, Thomas47f164d2016-11-10 17:09:55 -0600542 /* If there is not a separate AN irq, handle it here */
543 if (pdata->dev_irq == pdata->an_irq)
544 pdata->phy_if.an_isr(irq, pdata);
545
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600546 /* If there is not a separate ECC irq, handle it here */
547 if (pdata->vdata->ecc_support && (pdata->dev_irq == pdata->ecc_irq))
548 xgbe_ecc_isr(irq, pdata);
549
Lendacky, Thomas5ab1dcd2016-11-10 17:10:36 -0600550 /* If there is not a separate I2C irq, handle it here */
551 if (pdata->vdata->i2c_support && (pdata->dev_irq == pdata->i2c_irq))
552 pdata->i2c_if.i2c_isr(irq, pdata);
553
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500554isr_done:
555 return IRQ_HANDLED;
556}
557
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600558static irqreturn_t xgbe_dma_isr(int irq, void *data)
559{
560 struct xgbe_channel *channel = data;
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600561 struct xgbe_prv_data *pdata = channel->pdata;
562 unsigned int dma_status;
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600563
564 /* Per channel DMA interrupts are enabled, so we use the per
565 * channel napi structure and not the private data napi structure
566 */
567 if (napi_schedule_prep(&channel->napi)) {
568 /* Disable Tx and Rx interrupts */
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600569 if (pdata->channel_irq_mode)
570 xgbe_disable_rx_tx_int(pdata, channel);
571 else
572 disable_irq_nosync(channel->dma_irq);
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600573
574 /* Turn on polling */
Lendacky, Thomas79349422016-02-17 11:48:29 -0600575 __napi_schedule_irqoff(&channel->napi);
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600576 }
577
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600578 /* Clear Tx/Rx signals */
579 dma_status = 0;
580 XGMAC_SET_BITS(dma_status, DMA_CH_SR, TI, 1);
581 XGMAC_SET_BITS(dma_status, DMA_CH_SR, RI, 1);
582 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_status);
583
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600584 return IRQ_HANDLED;
585}
586
Lendacky, Thomasc635eaa2015-03-20 11:50:28 -0500587static void xgbe_tx_timer(unsigned long data)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500588{
Lendacky, Thomasc635eaa2015-03-20 11:50:28 -0500589 struct xgbe_channel *channel = (struct xgbe_channel *)data;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500590 struct xgbe_prv_data *pdata = channel->pdata;
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600591 struct napi_struct *napi;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500592
593 DBGPR("-->xgbe_tx_timer\n");
594
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600595 napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
596
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600597 if (napi_schedule_prep(napi)) {
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500598 /* Disable Tx and Rx interrupts */
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600599 if (pdata->per_channel_irq)
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -0600600 if (pdata->channel_irq_mode)
601 xgbe_disable_rx_tx_int(pdata, channel);
602 else
603 disable_irq_nosync(channel->dma_irq);
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600604 else
605 xgbe_disable_rx_tx_ints(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500606
607 /* Turn on polling */
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600608 __napi_schedule(napi);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500609 }
610
611 channel->tx_timer_active = 0;
612
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500613 DBGPR("<--xgbe_tx_timer\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500614}
615
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -0500616static void xgbe_service(struct work_struct *work)
617{
618 struct xgbe_prv_data *pdata = container_of(work,
619 struct xgbe_prv_data,
620 service_work);
621
622 pdata->phy_if.phy_status(pdata);
623}
624
625static void xgbe_service_timer(unsigned long data)
626{
627 struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;
628
Lendacky, Thomasafb43e82015-09-30 08:53:16 -0500629 queue_work(pdata->dev_workqueue, &pdata->service_work);
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -0500630
631 mod_timer(&pdata->service_timer, jiffies + HZ);
632}
633
634static void xgbe_init_timers(struct xgbe_prv_data *pdata)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500635{
636 struct xgbe_channel *channel;
637 unsigned int i;
638
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -0500639 setup_timer(&pdata->service_timer, xgbe_service_timer,
640 (unsigned long)pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500641
642 channel = pdata->channel;
643 for (i = 0; i < pdata->channel_count; i++, channel++) {
644 if (!channel->tx_ring)
645 break;
646
Lendacky, Thomasc635eaa2015-03-20 11:50:28 -0500647 setup_timer(&channel->tx_timer, xgbe_tx_timer,
648 (unsigned long)channel);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500649 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500650}
651
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -0500652static void xgbe_start_timers(struct xgbe_prv_data *pdata)
653{
654 mod_timer(&pdata->service_timer, jiffies + HZ);
655}
656
657static void xgbe_stop_timers(struct xgbe_prv_data *pdata)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500658{
659 struct xgbe_channel *channel;
660 unsigned int i;
661
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -0500662 del_timer_sync(&pdata->service_timer);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500663
664 channel = pdata->channel;
665 for (i = 0; i < pdata->channel_count; i++, channel++) {
666 if (!channel->tx_ring)
667 break;
668
Lendacky, Thomasc635eaa2015-03-20 11:50:28 -0500669 del_timer_sync(&channel->tx_timer);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500670 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500671}
672
673void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)
674{
675 unsigned int mac_hfr0, mac_hfr1, mac_hfr2;
676 struct xgbe_hw_features *hw_feat = &pdata->hw_feat;
677
678 DBGPR("-->xgbe_get_all_hw_features\n");
679
680 mac_hfr0 = XGMAC_IOREAD(pdata, MAC_HWF0R);
681 mac_hfr1 = XGMAC_IOREAD(pdata, MAC_HWF1R);
682 mac_hfr2 = XGMAC_IOREAD(pdata, MAC_HWF2R);
683
684 memset(hw_feat, 0, sizeof(*hw_feat));
685
Lendacky, Thomasa9a4a2d2014-08-29 13:16:50 -0500686 hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR);
687
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500688 /* Hardware feature register 0 */
689 hw_feat->gmii = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL);
690 hw_feat->vlhash = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH);
691 hw_feat->sma = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SMASEL);
692 hw_feat->rwk = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RWKSEL);
693 hw_feat->mgk = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MGKSEL);
694 hw_feat->mmc = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MMCSEL);
695 hw_feat->aoe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, ARPOFFSEL);
696 hw_feat->ts = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSEL);
697 hw_feat->eee = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, EEESEL);
698 hw_feat->tx_coe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TXCOESEL);
699 hw_feat->rx_coe = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RXCOESEL);
700 hw_feat->addn_mac = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R,
701 ADDMACADRSEL);
702 hw_feat->ts_src = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSTSSEL);
703 hw_feat->sa_vlan_ins = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SAVLANINS);
704
705 /* Hardware feature register 1 */
706 hw_feat->rx_fifo_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
707 RXFIFOSIZE);
708 hw_feat->tx_fifo_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
709 TXFIFOSIZE);
Lendacky, Thomas73c259162015-05-22 16:32:09 -0500710 hw_feat->adv_ts_hi = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, ADVTHWORD);
Lendacky, Thomas386d3252015-03-20 11:50:22 -0500711 hw_feat->dma_width = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, ADDR64);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500712 hw_feat->dcb = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DCBEN);
713 hw_feat->sph = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, SPHEN);
714 hw_feat->tso = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, TSOEN);
715 hw_feat->dma_debug = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DBGMEMA);
Lendacky, Thomascf180b82015-02-03 14:14:32 -0600716 hw_feat->rss = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, RSSEN);
Lendacky, Thomasfca2d992014-07-29 08:57:55 -0500717 hw_feat->tc_cnt = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, NUMTC);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500718 hw_feat->hash_table_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
719 HASHTBLSZ);
720 hw_feat->l3l4_filter_num = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
721 L3L4FNUM);
722
723 /* Hardware feature register 2 */
724 hw_feat->rx_q_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXQCNT);
725 hw_feat->tx_q_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXQCNT);
726 hw_feat->rx_ch_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXCHCNT);
727 hw_feat->tx_ch_cnt = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXCHCNT);
728 hw_feat->pps_out_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM);
729 hw_feat->aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM);
730
Lendacky, Thomasb85e4d82014-06-24 16:19:29 -0500731 /* Translate the Hash Table size into actual number */
732 switch (hw_feat->hash_table_size) {
733 case 0:
734 break;
735 case 1:
736 hw_feat->hash_table_size = 64;
737 break;
738 case 2:
739 hw_feat->hash_table_size = 128;
740 break;
741 case 3:
742 hw_feat->hash_table_size = 256;
743 break;
744 }
745
Lendacky, Thomas386d3252015-03-20 11:50:22 -0500746 /* Translate the address width setting into actual number */
747 switch (hw_feat->dma_width) {
748 case 0:
749 hw_feat->dma_width = 32;
750 break;
751 case 1:
752 hw_feat->dma_width = 40;
753 break;
754 case 2:
755 hw_feat->dma_width = 48;
756 break;
757 default:
758 hw_feat->dma_width = 32;
759 }
760
Lendacky, Thomas211fcf62015-02-03 12:49:55 -0600761 /* The Queue, Channel and TC counts are zero based so increment them
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500762 * to get the actual number
763 */
764 hw_feat->rx_q_cnt++;
765 hw_feat->tx_q_cnt++;
766 hw_feat->rx_ch_cnt++;
767 hw_feat->tx_ch_cnt++;
Lendacky, Thomas211fcf62015-02-03 12:49:55 -0600768 hw_feat->tc_cnt++;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500769
Lendacky, Thomasbd8255d2016-11-03 13:19:27 -0500770 /* Translate the fifo sizes into actual numbers */
771 hw_feat->rx_fifo_size = 1 << (hw_feat->rx_fifo_size + 7);
772 hw_feat->tx_fifo_size = 1 << (hw_feat->tx_fifo_size + 7);
773
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500774 DBGPR("<--xgbe_get_all_hw_features\n");
775}
776
777static void xgbe_napi_enable(struct xgbe_prv_data *pdata, unsigned int add)
778{
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600779 struct xgbe_channel *channel;
780 unsigned int i;
781
782 if (pdata->per_channel_irq) {
783 channel = pdata->channel;
784 for (i = 0; i < pdata->channel_count; i++, channel++) {
785 if (add)
786 netif_napi_add(pdata->netdev, &channel->napi,
787 xgbe_one_poll, NAPI_POLL_WEIGHT);
788
789 napi_enable(&channel->napi);
790 }
791 } else {
792 if (add)
793 netif_napi_add(pdata->netdev, &pdata->napi,
794 xgbe_all_poll, NAPI_POLL_WEIGHT);
795
796 napi_enable(&pdata->napi);
797 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500798}
799
Lendacky, Thomasff426062014-07-02 13:04:40 -0500800static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500801{
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600802 struct xgbe_channel *channel;
803 unsigned int i;
Lendacky, Thomasff426062014-07-02 13:04:40 -0500804
Lendacky, Thomas9227dc52014-11-04 16:06:56 -0600805 if (pdata->per_channel_irq) {
806 channel = pdata->channel;
807 for (i = 0; i < pdata->channel_count; i++, channel++) {
808 napi_disable(&channel->napi);
809
810 if (del)
811 netif_napi_del(&channel->napi);
812 }
813 } else {
814 napi_disable(&pdata->napi);
815
816 if (del)
817 netif_napi_del(&pdata->napi);
818 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500819}
820
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -0600821static int xgbe_request_irqs(struct xgbe_prv_data *pdata)
822{
823 struct xgbe_channel *channel;
824 struct net_device *netdev = pdata->netdev;
825 unsigned int i;
826 int ret;
827
828 ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0,
829 netdev->name, pdata);
830 if (ret) {
831 netdev_alert(netdev, "error requesting irq %d\n",
832 pdata->dev_irq);
833 return ret;
834 }
835
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600836 if (pdata->vdata->ecc_support && (pdata->dev_irq != pdata->ecc_irq)) {
837 ret = devm_request_irq(pdata->dev, pdata->ecc_irq, xgbe_ecc_isr,
838 0, pdata->ecc_name, pdata);
839 if (ret) {
840 netdev_alert(netdev, "error requesting ecc irq %d\n",
841 pdata->ecc_irq);
842 goto err_dev_irq;
843 }
844 }
845
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -0600846 if (!pdata->per_channel_irq)
847 return 0;
848
849 channel = pdata->channel;
850 for (i = 0; i < pdata->channel_count; i++, channel++) {
851 snprintf(channel->dma_irq_name,
852 sizeof(channel->dma_irq_name) - 1,
853 "%s-TxRx-%u", netdev_name(netdev),
854 channel->queue_index);
855
856 ret = devm_request_irq(pdata->dev, channel->dma_irq,
857 xgbe_dma_isr, 0,
858 channel->dma_irq_name, channel);
859 if (ret) {
860 netdev_alert(netdev, "error requesting irq %d\n",
861 channel->dma_irq);
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600862 goto err_dma_irq;
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -0600863 }
864 }
865
866 return 0;
867
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600868err_dma_irq:
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -0600869 /* Using an unsigned int, 'i' will go to UINT_MAX and exit */
870 for (i--, channel--; i < pdata->channel_count; i--, channel--)
871 devm_free_irq(pdata->dev, channel->dma_irq, channel);
872
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600873 if (pdata->vdata->ecc_support && (pdata->dev_irq != pdata->ecc_irq))
874 devm_free_irq(pdata->dev, pdata->ecc_irq, pdata);
875
876err_dev_irq:
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -0600877 devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
878
879 return ret;
880}
881
882static void xgbe_free_irqs(struct xgbe_prv_data *pdata)
883{
884 struct xgbe_channel *channel;
885 unsigned int i;
886
887 devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
888
Lendacky, Thomase78332b2016-11-10 17:10:26 -0600889 if (pdata->vdata->ecc_support && (pdata->dev_irq != pdata->ecc_irq))
890 devm_free_irq(pdata->dev, pdata->ecc_irq, pdata);
891
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -0600892 if (!pdata->per_channel_irq)
893 return;
894
895 channel = pdata->channel;
896 for (i = 0; i < pdata->channel_count; i++, channel++)
897 devm_free_irq(pdata->dev, channel->dma_irq, channel);
898}
899
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500900void xgbe_init_tx_coalesce(struct xgbe_prv_data *pdata)
901{
902 struct xgbe_hw_if *hw_if = &pdata->hw_if;
903
904 DBGPR("-->xgbe_init_tx_coalesce\n");
905
906 pdata->tx_usecs = XGMAC_INIT_DMA_TX_USECS;
907 pdata->tx_frames = XGMAC_INIT_DMA_TX_FRAMES;
908
909 hw_if->config_tx_coalesce(pdata);
910
911 DBGPR("<--xgbe_init_tx_coalesce\n");
912}
913
914void xgbe_init_rx_coalesce(struct xgbe_prv_data *pdata)
915{
916 struct xgbe_hw_if *hw_if = &pdata->hw_if;
917
918 DBGPR("-->xgbe_init_rx_coalesce\n");
919
920 pdata->rx_riwt = hw_if->usec_to_riwt(pdata, XGMAC_INIT_DMA_RX_USECS);
Lendacky, Thomas4a57ebc2015-03-20 11:50:34 -0500921 pdata->rx_usecs = XGMAC_INIT_DMA_RX_USECS;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500922 pdata->rx_frames = XGMAC_INIT_DMA_RX_FRAMES;
923
924 hw_if->config_rx_coalesce(pdata);
925
926 DBGPR("<--xgbe_init_rx_coalesce\n");
927}
928
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600929static void xgbe_free_tx_data(struct xgbe_prv_data *pdata)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500930{
931 struct xgbe_desc_if *desc_if = &pdata->desc_if;
932 struct xgbe_channel *channel;
933 struct xgbe_ring *ring;
934 struct xgbe_ring_data *rdata;
935 unsigned int i, j;
936
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600937 DBGPR("-->xgbe_free_tx_data\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500938
939 channel = pdata->channel;
940 for (i = 0; i < pdata->channel_count; i++, channel++) {
941 ring = channel->tx_ring;
942 if (!ring)
943 break;
944
945 for (j = 0; j < ring->rdesc_count; j++) {
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -0500946 rdata = XGBE_GET_DESC_DATA(ring, j);
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600947 desc_if->unmap_rdata(pdata, rdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500948 }
949 }
950
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600951 DBGPR("<--xgbe_free_tx_data\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500952}
953
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600954static void xgbe_free_rx_data(struct xgbe_prv_data *pdata)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500955{
956 struct xgbe_desc_if *desc_if = &pdata->desc_if;
957 struct xgbe_channel *channel;
958 struct xgbe_ring *ring;
959 struct xgbe_ring_data *rdata;
960 unsigned int i, j;
961
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600962 DBGPR("-->xgbe_free_rx_data\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500963
964 channel = pdata->channel;
965 for (i = 0; i < pdata->channel_count; i++, channel++) {
966 ring = channel->rx_ring;
967 if (!ring)
968 break;
969
970 for (j = 0; j < ring->rdesc_count; j++) {
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -0500971 rdata = XGBE_GET_DESC_DATA(ring, j);
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600972 desc_if->unmap_rdata(pdata, rdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500973 }
974 }
975
Lendacky, Thomas08dcc472014-11-04 16:06:44 -0600976 DBGPR("<--xgbe_free_rx_data\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500977}
978
Lendacky, Thomase57f7a32016-11-03 13:18:27 -0500979static int xgbe_phy_reset(struct xgbe_prv_data *pdata)
Lendacky, Thomas88131a82014-08-05 13:30:44 -0500980{
Lendacky, Thomas88131a82014-08-05 13:30:44 -0500981 pdata->phy_link = -1;
982 pdata->phy_speed = SPEED_UNKNOWN;
Lendacky, Thomas88131a82014-08-05 13:30:44 -0500983
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -0500984 return pdata->phy_if.phy_reset(pdata);
Lendacky, Thomas88131a82014-08-05 13:30:44 -0500985}
986
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -0500987int xgbe_powerdown(struct net_device *netdev, unsigned int caller)
988{
989 struct xgbe_prv_data *pdata = netdev_priv(netdev);
990 struct xgbe_hw_if *hw_if = &pdata->hw_if;
991 unsigned long flags;
992
993 DBGPR("-->xgbe_powerdown\n");
994
995 if (!netif_running(netdev) ||
996 (caller == XGMAC_IOCTL_CONTEXT && pdata->power_down)) {
997 netdev_alert(netdev, "Device is already powered down\n");
998 DBGPR("<--xgbe_powerdown\n");
999 return -EINVAL;
1000 }
1001
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001002 spin_lock_irqsave(&pdata->lock, flags);
1003
1004 if (caller == XGMAC_DRIVER_CONTEXT)
1005 netif_device_detach(netdev);
1006
1007 netif_tx_stop_all_queues(netdev);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001008
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001009 xgbe_stop_timers(pdata);
1010 flush_workqueue(pdata->dev_workqueue);
1011
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001012 hw_if->powerdown_tx(pdata);
1013 hw_if->powerdown_rx(pdata);
1014
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001015 xgbe_napi_disable(pdata, 0);
1016
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001017 pdata->power_down = 1;
1018
1019 spin_unlock_irqrestore(&pdata->lock, flags);
1020
1021 DBGPR("<--xgbe_powerdown\n");
1022
1023 return 0;
1024}
1025
1026int xgbe_powerup(struct net_device *netdev, unsigned int caller)
1027{
1028 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1029 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1030 unsigned long flags;
1031
1032 DBGPR("-->xgbe_powerup\n");
1033
1034 if (!netif_running(netdev) ||
1035 (caller == XGMAC_IOCTL_CONTEXT && !pdata->power_down)) {
1036 netdev_alert(netdev, "Device is already powered up\n");
1037 DBGPR("<--xgbe_powerup\n");
1038 return -EINVAL;
1039 }
1040
1041 spin_lock_irqsave(&pdata->lock, flags);
1042
1043 pdata->power_down = 0;
1044
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001045 xgbe_napi_enable(pdata, 0);
1046
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001047 hw_if->powerup_tx(pdata);
1048 hw_if->powerup_rx(pdata);
1049
1050 if (caller == XGMAC_DRIVER_CONTEXT)
1051 netif_device_attach(netdev);
1052
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001053 netif_tx_start_all_queues(netdev);
1054
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001055 xgbe_start_timers(pdata);
1056
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001057 spin_unlock_irqrestore(&pdata->lock, flags);
1058
1059 DBGPR("<--xgbe_powerup\n");
1060
1061 return 0;
1062}
1063
1064static int xgbe_start(struct xgbe_prv_data *pdata)
1065{
1066 struct xgbe_hw_if *hw_if = &pdata->hw_if;
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001067 struct xgbe_phy_if *phy_if = &pdata->phy_if;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001068 struct net_device *netdev = pdata->netdev;
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001069 int ret;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001070
1071 DBGPR("-->xgbe_start\n");
1072
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001073 hw_if->init(pdata);
1074
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001075 xgbe_napi_enable(pdata, 1);
1076
1077 ret = xgbe_request_irqs(pdata);
1078 if (ret)
1079 goto err_napi;
1080
Lendacky, Thomas47f164d2016-11-10 17:09:55 -06001081 ret = phy_if->phy_start(pdata);
1082 if (ret)
1083 goto err_irqs;
1084
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001085 hw_if->enable_tx(pdata);
1086 hw_if->enable_rx(pdata);
1087
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001088 netif_tx_start_all_queues(netdev);
1089
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001090 xgbe_start_timers(pdata);
Lendacky, Thomasafb43e82015-09-30 08:53:16 -05001091 queue_work(pdata->dev_workqueue, &pdata->service_work);
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001092
Lendacky, Thomase78332b2016-11-10 17:10:26 -06001093 clear_bit(XGBE_STOPPED, &pdata->dev_state);
1094
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001095 DBGPR("<--xgbe_start\n");
1096
1097 return 0;
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001098
Lendacky, Thomas47f164d2016-11-10 17:09:55 -06001099err_irqs:
1100 xgbe_free_irqs(pdata);
1101
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001102err_napi:
1103 xgbe_napi_disable(pdata, 1);
1104
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001105 hw_if->exit(pdata);
1106
1107 return ret;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001108}
1109
1110static void xgbe_stop(struct xgbe_prv_data *pdata)
1111{
1112 struct xgbe_hw_if *hw_if = &pdata->hw_if;
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001113 struct xgbe_phy_if *phy_if = &pdata->phy_if;
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06001114 struct xgbe_channel *channel;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001115 struct net_device *netdev = pdata->netdev;
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06001116 struct netdev_queue *txq;
1117 unsigned int i;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001118
1119 DBGPR("-->xgbe_stop\n");
1120
Lendacky, Thomase78332b2016-11-10 17:10:26 -06001121 if (test_bit(XGBE_STOPPED, &pdata->dev_state))
1122 return;
1123
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001124 netif_tx_stop_all_queues(netdev);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001125
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001126 xgbe_stop_timers(pdata);
1127 flush_workqueue(pdata->dev_workqueue);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001128
1129 hw_if->disable_tx(pdata);
1130 hw_if->disable_rx(pdata);
1131
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001132 xgbe_free_irqs(pdata);
1133
1134 xgbe_napi_disable(pdata, 1);
1135
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001136 phy_if->phy_stop(pdata);
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001137
1138 hw_if->exit(pdata);
1139
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06001140 channel = pdata->channel;
1141 for (i = 0; i < pdata->channel_count; i++, channel++) {
1142 if (!channel->tx_ring)
1143 continue;
1144
1145 txq = netdev_get_tx_queue(netdev, channel->queue_index);
1146 netdev_tx_reset_queue(txq);
1147 }
1148
Lendacky, Thomase78332b2016-11-10 17:10:26 -06001149 set_bit(XGBE_STOPPED, &pdata->dev_state);
1150
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001151 DBGPR("<--xgbe_stop\n");
1152}
1153
Lendacky, Thomase78332b2016-11-10 17:10:26 -06001154static void xgbe_stopdev(struct work_struct *work)
1155{
1156 struct xgbe_prv_data *pdata = container_of(work,
1157 struct xgbe_prv_data,
1158 stopdev_work);
1159
1160 rtnl_lock();
1161
1162 xgbe_stop(pdata);
1163
1164 xgbe_free_tx_data(pdata);
1165 xgbe_free_rx_data(pdata);
1166
1167 rtnl_unlock();
1168
1169 netdev_alert(pdata->netdev, "device stopped\n");
1170}
1171
Lendacky, Thomas916102c2015-01-16 12:46:45 -06001172static void xgbe_restart_dev(struct xgbe_prv_data *pdata)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001173{
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001174 DBGPR("-->xgbe_restart_dev\n");
1175
1176 /* If not running, "restart" will happen on open */
1177 if (!netif_running(pdata->netdev))
1178 return;
1179
1180 xgbe_stop(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001181
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06001182 xgbe_free_tx_data(pdata);
1183 xgbe_free_rx_data(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001184
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001185 xgbe_start(pdata);
1186
1187 DBGPR("<--xgbe_restart_dev\n");
1188}
1189
1190static void xgbe_restart(struct work_struct *work)
1191{
1192 struct xgbe_prv_data *pdata = container_of(work,
1193 struct xgbe_prv_data,
1194 restart_work);
1195
1196 rtnl_lock();
1197
Lendacky, Thomas916102c2015-01-16 12:46:45 -06001198 xgbe_restart_dev(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001199
1200 rtnl_unlock();
1201}
1202
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001203static void xgbe_tx_tstamp(struct work_struct *work)
1204{
1205 struct xgbe_prv_data *pdata = container_of(work,
1206 struct xgbe_prv_data,
1207 tx_tstamp_work);
1208 struct skb_shared_hwtstamps hwtstamps;
1209 u64 nsec;
1210 unsigned long flags;
1211
1212 if (pdata->tx_tstamp) {
1213 nsec = timecounter_cyc2time(&pdata->tstamp_tc,
1214 pdata->tx_tstamp);
1215
1216 memset(&hwtstamps, 0, sizeof(hwtstamps));
1217 hwtstamps.hwtstamp = ns_to_ktime(nsec);
1218 skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps);
1219 }
1220
1221 dev_kfree_skb_any(pdata->tx_tstamp_skb);
1222
1223 spin_lock_irqsave(&pdata->tstamp_lock, flags);
1224 pdata->tx_tstamp_skb = NULL;
1225 spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
1226}
1227
1228static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata,
1229 struct ifreq *ifreq)
1230{
1231 if (copy_to_user(ifreq->ifr_data, &pdata->tstamp_config,
1232 sizeof(pdata->tstamp_config)))
1233 return -EFAULT;
1234
1235 return 0;
1236}
1237
1238static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata,
1239 struct ifreq *ifreq)
1240{
1241 struct hwtstamp_config config;
1242 unsigned int mac_tscr;
1243
1244 if (copy_from_user(&config, ifreq->ifr_data, sizeof(config)))
1245 return -EFAULT;
1246
1247 if (config.flags)
1248 return -EINVAL;
1249
1250 mac_tscr = 0;
1251
1252 switch (config.tx_type) {
1253 case HWTSTAMP_TX_OFF:
1254 break;
1255
1256 case HWTSTAMP_TX_ON:
1257 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1258 break;
1259
1260 default:
1261 return -ERANGE;
1262 }
1263
1264 switch (config.rx_filter) {
1265 case HWTSTAMP_FILTER_NONE:
1266 break;
1267
1268 case HWTSTAMP_FILTER_ALL:
1269 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);
1270 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1271 break;
1272
1273 /* PTP v2, UDP, any kind of event packet */
1274 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1275 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1276 /* PTP v1, UDP, any kind of event packet */
1277 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1278 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1279 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1280 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1281 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1282 break;
1283
1284 /* PTP v2, UDP, Sync packet */
1285 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1286 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1287 /* PTP v1, UDP, Sync packet */
1288 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1289 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1290 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1291 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1292 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1293 break;
1294
1295 /* PTP v2, UDP, Delay_req packet */
1296 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1297 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1298 /* PTP v1, UDP, Delay_req packet */
1299 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1300 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1301 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1302 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1303 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1304 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1305 break;
1306
1307 /* 802.AS1, Ethernet, any kind of event packet */
1308 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1309 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1310 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1311 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1312 break;
1313
1314 /* 802.AS1, Ethernet, Sync packet */
1315 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1316 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1317 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1318 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1319 break;
1320
1321 /* 802.AS1, Ethernet, Delay_req packet */
1322 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1323 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1324 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1325 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1326 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1327 break;
1328
1329 /* PTP v2/802.AS1, any layer, any kind of event packet */
1330 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1331 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1332 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1333 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1334 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1335 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1336 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1337 break;
1338
1339 /* PTP v2/802.AS1, any layer, Sync packet */
1340 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1341 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1342 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1343 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1344 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1345 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1346 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1347 break;
1348
1349 /* PTP v2/802.AS1, any layer, Delay_req packet */
1350 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1351 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1352 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1353 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1354 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1355 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1356 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1357 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1358 break;
1359
1360 default:
1361 return -ERANGE;
1362 }
1363
1364 pdata->hw_if.config_tstamp(pdata, mac_tscr);
1365
1366 memcpy(&pdata->tstamp_config, &config, sizeof(config));
1367
1368 return 0;
1369}
1370
1371static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,
1372 struct sk_buff *skb,
1373 struct xgbe_packet_data *packet)
1374{
1375 unsigned long flags;
1376
1377 if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) {
1378 spin_lock_irqsave(&pdata->tstamp_lock, flags);
1379 if (pdata->tx_tstamp_skb) {
1380 /* Another timestamp in progress, ignore this one */
1381 XGMAC_SET_BITS(packet->attributes,
1382 TX_PACKET_ATTRIBUTES, PTP, 0);
1383 } else {
1384 pdata->tx_tstamp_skb = skb_get(skb);
1385 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1386 }
1387 spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
1388 }
1389
1390 if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP))
1391 skb_tx_timestamp(skb);
1392}
1393
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001394static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet)
1395{
Jiri Pirkodf8a39d2015-01-13 17:13:44 +01001396 if (skb_vlan_tag_present(skb))
1397 packet->vlan_ctag = skb_vlan_tag_get(skb);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001398}
1399
1400static int xgbe_prep_tso(struct sk_buff *skb, struct xgbe_packet_data *packet)
1401{
1402 int ret;
1403
1404 if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1405 TSO_ENABLE))
1406 return 0;
1407
1408 ret = skb_cow_head(skb, 0);
1409 if (ret)
1410 return ret;
1411
1412 packet->header_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1413 packet->tcp_header_len = tcp_hdrlen(skb);
1414 packet->tcp_payload_len = skb->len - packet->header_len;
1415 packet->mss = skb_shinfo(skb)->gso_size;
1416 DBGPR(" packet->header_len=%u\n", packet->header_len);
1417 DBGPR(" packet->tcp_header_len=%u, packet->tcp_payload_len=%u\n",
1418 packet->tcp_header_len, packet->tcp_payload_len);
1419 DBGPR(" packet->mss=%u\n", packet->mss);
1420
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06001421 /* Update the number of packets that will ultimately be transmitted
1422 * along with the extra bytes for each extra packet
1423 */
1424 packet->tx_packets = skb_shinfo(skb)->gso_segs;
1425 packet->tx_bytes += (packet->tx_packets - 1) * packet->header_len;
1426
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001427 return 0;
1428}
1429
1430static int xgbe_is_tso(struct sk_buff *skb)
1431{
1432 if (skb->ip_summed != CHECKSUM_PARTIAL)
1433 return 0;
1434
1435 if (!skb_is_gso(skb))
1436 return 0;
1437
1438 DBGPR(" TSO packet to be processed\n");
1439
1440 return 1;
1441}
1442
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001443static void xgbe_packet_info(struct xgbe_prv_data *pdata,
1444 struct xgbe_ring *ring, struct sk_buff *skb,
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001445 struct xgbe_packet_data *packet)
1446{
1447 struct skb_frag_struct *frag;
1448 unsigned int context_desc;
1449 unsigned int len;
1450 unsigned int i;
1451
Lendacky, Thomas16958a22014-11-20 11:04:08 -06001452 packet->skb = skb;
1453
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001454 context_desc = 0;
1455 packet->rdesc_count = 0;
1456
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06001457 packet->tx_packets = 1;
1458 packet->tx_bytes = skb->len;
1459
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001460 if (xgbe_is_tso(skb)) {
Lendacky, Thomasa7beaf22014-11-04 16:07:29 -06001461 /* TSO requires an extra descriptor if mss is different */
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001462 if (skb_shinfo(skb)->gso_size != ring->tx.cur_mss) {
1463 context_desc = 1;
1464 packet->rdesc_count++;
1465 }
1466
Lendacky, Thomasa7beaf22014-11-04 16:07:29 -06001467 /* TSO requires an extra descriptor for TSO header */
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001468 packet->rdesc_count++;
1469
1470 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1471 TSO_ENABLE, 1);
1472 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1473 CSUM_ENABLE, 1);
1474 } else if (skb->ip_summed == CHECKSUM_PARTIAL)
1475 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1476 CSUM_ENABLE, 1);
1477
Jiri Pirkodf8a39d2015-01-13 17:13:44 +01001478 if (skb_vlan_tag_present(skb)) {
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001479 /* VLAN requires an extra descriptor if tag is different */
Jiri Pirkodf8a39d2015-01-13 17:13:44 +01001480 if (skb_vlan_tag_get(skb) != ring->tx.cur_vlan_ctag)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001481 /* We can share with the TSO context descriptor */
1482 if (!context_desc) {
1483 context_desc = 1;
1484 packet->rdesc_count++;
1485 }
1486
1487 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1488 VLAN_CTAG, 1);
1489 }
1490
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001491 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
1492 (pdata->tstamp_config.tx_type == HWTSTAMP_TX_ON))
1493 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1494 PTP, 1);
1495
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001496 for (len = skb_headlen(skb); len;) {
1497 packet->rdesc_count++;
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -05001498 len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001499 }
1500
1501 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1502 frag = &skb_shinfo(skb)->frags[i];
1503 for (len = skb_frag_size(frag); len; ) {
1504 packet->rdesc_count++;
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -05001505 len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001506 }
1507 }
1508}
1509
1510static int xgbe_open(struct net_device *netdev)
1511{
1512 struct xgbe_prv_data *pdata = netdev_priv(netdev);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001513 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1514 int ret;
1515
1516 DBGPR("-->xgbe_open\n");
1517
Lendacky, Thomase57f7a32016-11-03 13:18:27 -05001518 /* Reset the phy settings */
1519 ret = xgbe_phy_reset(pdata);
Lendacky, Thomas88131a82014-08-05 13:30:44 -05001520 if (ret)
1521 return ret;
1522
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001523 /* Enable the clocks */
1524 ret = clk_prepare_enable(pdata->sysclk);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001525 if (ret) {
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001526 netdev_alert(netdev, "dma clk_prepare_enable failed\n");
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001527 return ret;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001528 }
1529
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001530 ret = clk_prepare_enable(pdata->ptpclk);
1531 if (ret) {
1532 netdev_alert(netdev, "ptp clk_prepare_enable failed\n");
1533 goto err_sysclk;
1534 }
1535
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001536 /* Calculate the Rx buffer size before allocating rings */
1537 ret = xgbe_calc_rx_buf_size(netdev, netdev->mtu);
1538 if (ret < 0)
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001539 goto err_ptpclk;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001540 pdata->rx_buf_size = ret;
1541
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -06001542 /* Allocate the channel and ring structures */
1543 ret = xgbe_alloc_channels(pdata);
1544 if (ret)
1545 goto err_ptpclk;
1546
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001547 /* Allocate the ring descriptors and buffers */
1548 ret = desc_if->alloc_ring_resources(pdata);
1549 if (ret)
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -06001550 goto err_channels;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001551
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001552 INIT_WORK(&pdata->service_work, xgbe_service);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001553 INIT_WORK(&pdata->restart_work, xgbe_restart);
Lendacky, Thomase78332b2016-11-10 17:10:26 -06001554 INIT_WORK(&pdata->stopdev_work, xgbe_stopdev);
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001555 INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp);
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001556 xgbe_init_timers(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001557
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001558 ret = xgbe_start(pdata);
1559 if (ret)
Lendacky, Thomasc30e76a2015-02-25 13:50:12 -06001560 goto err_rings;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001561
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001562 clear_bit(XGBE_DOWN, &pdata->dev_state);
1563
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001564 DBGPR("<--xgbe_open\n");
1565
1566 return 0;
1567
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -06001568err_rings:
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001569 desc_if->free_ring_resources(pdata);
1570
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -06001571err_channels:
1572 xgbe_free_channels(pdata);
1573
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001574err_ptpclk:
1575 clk_disable_unprepare(pdata->ptpclk);
1576
1577err_sysclk:
1578 clk_disable_unprepare(pdata->sysclk);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001579
1580 return ret;
1581}
1582
1583static int xgbe_close(struct net_device *netdev)
1584{
1585 struct xgbe_prv_data *pdata = netdev_priv(netdev);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001586 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1587
1588 DBGPR("-->xgbe_close\n");
1589
1590 /* Stop the device */
1591 xgbe_stop(pdata);
1592
Lendacky, Thomas4780b7c2014-11-04 16:06:26 -06001593 /* Free the ring descriptors and buffers */
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001594 desc_if->free_ring_resources(pdata);
1595
Lendacky, Thomase98c72c2014-11-06 17:02:13 -06001596 /* Free the channel and ring structures */
1597 xgbe_free_channels(pdata);
1598
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001599 /* Disable the clocks */
1600 clk_disable_unprepare(pdata->ptpclk);
1601 clk_disable_unprepare(pdata->sysclk);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001602
Lendacky, Thomas7c12aa02015-05-14 11:44:15 -05001603 set_bit(XGBE_DOWN, &pdata->dev_state);
Lendacky, Thomas88131a82014-08-05 13:30:44 -05001604
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001605 DBGPR("<--xgbe_close\n");
1606
1607 return 0;
1608}
1609
1610static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)
1611{
1612 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1613 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1614 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1615 struct xgbe_channel *channel;
1616 struct xgbe_ring *ring;
1617 struct xgbe_packet_data *packet;
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06001618 struct netdev_queue *txq;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001619 int ret;
1620
1621 DBGPR("-->xgbe_xmit: skb->len = %d\n", skb->len);
1622
1623 channel = pdata->channel + skb->queue_mapping;
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06001624 txq = netdev_get_tx_queue(netdev, channel->queue_index);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001625 ring = channel->tx_ring;
1626 packet = &ring->packet_data;
1627
1628 ret = NETDEV_TX_OK;
1629
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001630 if (skb->len == 0) {
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05001631 netif_err(pdata, tx_err, netdev,
1632 "empty skb received from stack\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001633 dev_kfree_skb_any(skb);
1634 goto tx_netdev_return;
1635 }
1636
1637 /* Calculate preliminary packet info */
1638 memset(packet, 0, sizeof(*packet));
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001639 xgbe_packet_info(pdata, ring, skb, packet);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001640
1641 /* Check that there are enough descriptors available */
Lendacky, Thomas16958a22014-11-20 11:04:08 -06001642 ret = xgbe_maybe_stop_tx_queue(channel, ring, packet->rdesc_count);
1643 if (ret)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001644 goto tx_netdev_return;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001645
1646 ret = xgbe_prep_tso(skb, packet);
1647 if (ret) {
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05001648 netif_err(pdata, tx_err, netdev,
1649 "error processing TSO packet\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001650 dev_kfree_skb_any(skb);
1651 goto tx_netdev_return;
1652 }
1653 xgbe_prep_vlan(skb, packet);
1654
1655 if (!desc_if->map_tx_skb(channel, skb)) {
1656 dev_kfree_skb_any(skb);
1657 goto tx_netdev_return;
1658 }
1659
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001660 xgbe_prep_tx_tstamp(pdata, skb, packet);
1661
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06001662 /* Report on the actual number of bytes (to be) sent */
1663 netdev_tx_sent_queue(txq, packet->tx_bytes);
1664
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001665 /* Configure required descriptor fields for transmission */
Lendacky, Thomasa9d41982014-11-04 16:06:32 -06001666 hw_if->dev_xmit(channel);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001667
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05001668 if (netif_msg_pktdata(pdata))
1669 xgbe_print_pkt(netdev, skb, true);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001670
Lendacky, Thomas16958a22014-11-20 11:04:08 -06001671 /* Stop the queue in advance if there may not be enough descriptors */
1672 xgbe_maybe_stop_tx_queue(channel, ring, XGBE_TX_MAX_DESCS);
1673
1674 ret = NETDEV_TX_OK;
1675
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001676tx_netdev_return:
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001677 return ret;
1678}
1679
1680static void xgbe_set_rx_mode(struct net_device *netdev)
1681{
1682 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1683 struct xgbe_hw_if *hw_if = &pdata->hw_if;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001684
1685 DBGPR("-->xgbe_set_rx_mode\n");
1686
Lendacky, Thomasb8763822015-04-09 12:11:57 -05001687 hw_if->config_rx_mode(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001688
1689 DBGPR("<--xgbe_set_rx_mode\n");
1690}
1691
1692static int xgbe_set_mac_address(struct net_device *netdev, void *addr)
1693{
1694 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1695 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1696 struct sockaddr *saddr = addr;
1697
1698 DBGPR("-->xgbe_set_mac_address\n");
1699
1700 if (!is_valid_ether_addr(saddr->sa_data))
1701 return -EADDRNOTAVAIL;
1702
1703 memcpy(netdev->dev_addr, saddr->sa_data, netdev->addr_len);
1704
1705 hw_if->set_mac_address(pdata, netdev->dev_addr);
1706
1707 DBGPR("<--xgbe_set_mac_address\n");
1708
1709 return 0;
1710}
1711
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001712static int xgbe_ioctl(struct net_device *netdev, struct ifreq *ifreq, int cmd)
1713{
1714 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1715 int ret;
1716
1717 switch (cmd) {
1718 case SIOCGHWTSTAMP:
1719 ret = xgbe_get_hwtstamp_settings(pdata, ifreq);
1720 break;
1721
1722 case SIOCSHWTSTAMP:
1723 ret = xgbe_set_hwtstamp_settings(pdata, ifreq);
1724 break;
1725
1726 default:
1727 ret = -EOPNOTSUPP;
1728 }
1729
1730 return ret;
1731}
1732
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001733static int xgbe_change_mtu(struct net_device *netdev, int mtu)
1734{
1735 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1736 int ret;
1737
1738 DBGPR("-->xgbe_change_mtu\n");
1739
1740 ret = xgbe_calc_rx_buf_size(netdev, mtu);
1741 if (ret < 0)
1742 return ret;
1743
1744 pdata->rx_buf_size = ret;
1745 netdev->mtu = mtu;
1746
Lendacky, Thomas916102c2015-01-16 12:46:45 -06001747 xgbe_restart_dev(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001748
1749 DBGPR("<--xgbe_change_mtu\n");
1750
1751 return 0;
1752}
1753
Lendacky, Thomasa8373f12015-04-09 12:12:03 -05001754static void xgbe_tx_timeout(struct net_device *netdev)
1755{
1756 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1757
1758 netdev_warn(netdev, "tx timeout, device restarting\n");
Lendacky, Thomas96aec912015-10-14 12:37:32 -05001759 schedule_work(&pdata->restart_work);
Lendacky, Thomasa8373f12015-04-09 12:12:03 -05001760}
1761
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001762static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev,
1763 struct rtnl_link_stats64 *s)
1764{
1765 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1766 struct xgbe_mmc_stats *pstats = &pdata->mmc_stats;
1767
1768 DBGPR("-->%s\n", __func__);
1769
1770 pdata->hw_if.read_mmc_stats(pdata);
1771
1772 s->rx_packets = pstats->rxframecount_gb;
1773 s->rx_bytes = pstats->rxoctetcount_gb;
1774 s->rx_errors = pstats->rxframecount_gb -
1775 pstats->rxbroadcastframes_g -
1776 pstats->rxmulticastframes_g -
1777 pstats->rxunicastframes_g;
1778 s->multicast = pstats->rxmulticastframes_g;
1779 s->rx_length_errors = pstats->rxlengtherror;
1780 s->rx_crc_errors = pstats->rxcrcerror;
1781 s->rx_fifo_errors = pstats->rxfifooverflow;
1782
1783 s->tx_packets = pstats->txframecount_gb;
1784 s->tx_bytes = pstats->txoctetcount_gb;
1785 s->tx_errors = pstats->txframecount_gb - pstats->txframecount_g;
1786 s->tx_dropped = netdev->stats.tx_dropped;
1787
1788 DBGPR("<--%s\n", __func__);
1789
1790 return s;
1791}
1792
Lendacky, Thomas801c62d2014-06-24 16:19:24 -05001793static int xgbe_vlan_rx_add_vid(struct net_device *netdev, __be16 proto,
1794 u16 vid)
1795{
1796 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1797 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1798
1799 DBGPR("-->%s\n", __func__);
1800
1801 set_bit(vid, pdata->active_vlans);
1802 hw_if->update_vlan_hash_table(pdata);
1803
1804 DBGPR("<--%s\n", __func__);
1805
1806 return 0;
1807}
1808
1809static int xgbe_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto,
1810 u16 vid)
1811{
1812 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1813 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1814
1815 DBGPR("-->%s\n", __func__);
1816
1817 clear_bit(vid, pdata->active_vlans);
1818 hw_if->update_vlan_hash_table(pdata);
1819
1820 DBGPR("<--%s\n", __func__);
1821
1822 return 0;
1823}
1824
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001825#ifdef CONFIG_NET_POLL_CONTROLLER
1826static void xgbe_poll_controller(struct net_device *netdev)
1827{
1828 struct xgbe_prv_data *pdata = netdev_priv(netdev);
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06001829 struct xgbe_channel *channel;
1830 unsigned int i;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001831
1832 DBGPR("-->xgbe_poll_controller\n");
1833
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06001834 if (pdata->per_channel_irq) {
1835 channel = pdata->channel;
1836 for (i = 0; i < pdata->channel_count; i++, channel++)
1837 xgbe_dma_isr(channel->dma_irq, channel);
1838 } else {
1839 disable_irq(pdata->dev_irq);
1840 xgbe_isr(pdata->dev_irq, pdata);
1841 enable_irq(pdata->dev_irq);
1842 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001843
1844 DBGPR("<--xgbe_poll_controller\n");
1845}
1846#endif /* End CONFIG_NET_POLL_CONTROLLER */
1847
John Fastabend16e5cc62016-02-16 21:16:43 -08001848static int xgbe_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
1849 struct tc_to_netdev *tc_to_netdev)
Lendacky, Thomasfca2d992014-07-29 08:57:55 -05001850{
1851 struct xgbe_prv_data *pdata = netdev_priv(netdev);
Lendacky, Thomasb3b71592016-02-17 11:49:08 -06001852 u8 tc;
Lendacky, Thomasfca2d992014-07-29 08:57:55 -05001853
John Fastabend5eb4dce2016-02-29 11:26:13 -08001854 if (tc_to_netdev->type != TC_SETUP_MQPRIO)
John Fastabende4c67342016-02-16 21:16:15 -08001855 return -EINVAL;
1856
John Fastabend16e5cc62016-02-16 21:16:43 -08001857 tc = tc_to_netdev->tc;
1858
Lendacky, Thomasb3b71592016-02-17 11:49:08 -06001859 if (tc > pdata->hw_feat.tc_cnt)
Lendacky, Thomasfca2d992014-07-29 08:57:55 -05001860 return -EINVAL;
1861
Lendacky, Thomasb3b71592016-02-17 11:49:08 -06001862 pdata->num_tcs = tc;
1863 pdata->hw_if.config_tc(pdata);
Lendacky, Thomasfca2d992014-07-29 08:57:55 -05001864
1865 return 0;
1866}
1867
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001868static int xgbe_set_features(struct net_device *netdev,
1869 netdev_features_t features)
1870{
1871 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1872 struct xgbe_hw_if *hw_if = &pdata->hw_if;
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -06001873 netdev_features_t rxhash, rxcsum, rxvlan, rxvlan_filter;
1874 int ret = 0;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001875
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -06001876 rxhash = pdata->netdev_features & NETIF_F_RXHASH;
Lendacky, Thomas801c62d2014-06-24 16:19:24 -05001877 rxcsum = pdata->netdev_features & NETIF_F_RXCSUM;
1878 rxvlan = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_RX;
1879 rxvlan_filter = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_FILTER;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001880
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -06001881 if ((features & NETIF_F_RXHASH) && !rxhash)
1882 ret = hw_if->enable_rss(pdata);
1883 else if (!(features & NETIF_F_RXHASH) && rxhash)
1884 ret = hw_if->disable_rss(pdata);
1885 if (ret)
1886 return ret;
1887
Lendacky, Thomas801c62d2014-06-24 16:19:24 -05001888 if ((features & NETIF_F_RXCSUM) && !rxcsum)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001889 hw_if->enable_rx_csum(pdata);
Lendacky, Thomas801c62d2014-06-24 16:19:24 -05001890 else if (!(features & NETIF_F_RXCSUM) && rxcsum)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001891 hw_if->disable_rx_csum(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001892
Lendacky, Thomas801c62d2014-06-24 16:19:24 -05001893 if ((features & NETIF_F_HW_VLAN_CTAG_RX) && !rxvlan)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001894 hw_if->enable_rx_vlan_stripping(pdata);
Lendacky, Thomas801c62d2014-06-24 16:19:24 -05001895 else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) && rxvlan)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001896 hw_if->disable_rx_vlan_stripping(pdata);
Lendacky, Thomas801c62d2014-06-24 16:19:24 -05001897
1898 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && !rxvlan_filter)
1899 hw_if->enable_rx_vlan_filtering(pdata);
1900 else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && rxvlan_filter)
1901 hw_if->disable_rx_vlan_filtering(pdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001902
1903 pdata->netdev_features = features;
1904
1905 DBGPR("<--xgbe_set_features\n");
1906
1907 return 0;
1908}
1909
1910static const struct net_device_ops xgbe_netdev_ops = {
1911 .ndo_open = xgbe_open,
1912 .ndo_stop = xgbe_close,
1913 .ndo_start_xmit = xgbe_xmit,
1914 .ndo_set_rx_mode = xgbe_set_rx_mode,
1915 .ndo_set_mac_address = xgbe_set_mac_address,
1916 .ndo_validate_addr = eth_validate_addr,
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05001917 .ndo_do_ioctl = xgbe_ioctl,
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001918 .ndo_change_mtu = xgbe_change_mtu,
Lendacky, Thomasa8373f12015-04-09 12:12:03 -05001919 .ndo_tx_timeout = xgbe_tx_timeout,
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001920 .ndo_get_stats64 = xgbe_get_stats64,
Lendacky, Thomas801c62d2014-06-24 16:19:24 -05001921 .ndo_vlan_rx_add_vid = xgbe_vlan_rx_add_vid,
1922 .ndo_vlan_rx_kill_vid = xgbe_vlan_rx_kill_vid,
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001923#ifdef CONFIG_NET_POLL_CONTROLLER
1924 .ndo_poll_controller = xgbe_poll_controller,
1925#endif
Lendacky, Thomasfca2d992014-07-29 08:57:55 -05001926 .ndo_setup_tc = xgbe_setup_tc,
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001927 .ndo_set_features = xgbe_set_features,
1928};
1929
stephen hemmingerce0b15d2016-08-31 08:57:36 -07001930const struct net_device_ops *xgbe_get_netdev_ops(void)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001931{
stephen hemmingerce0b15d2016-08-31 08:57:36 -07001932 return &xgbe_netdev_ops;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05001933}
1934
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -05001935static void xgbe_rx_refresh(struct xgbe_channel *channel)
1936{
1937 struct xgbe_prv_data *pdata = channel->pdata;
Lendacky, Thomas270894e2015-01-16 12:46:50 -06001938 struct xgbe_hw_if *hw_if = &pdata->hw_if;
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -05001939 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1940 struct xgbe_ring *ring = channel->rx_ring;
1941 struct xgbe_ring_data *rdata;
1942
Lendacky, Thomas270894e2015-01-16 12:46:50 -06001943 while (ring->dirty != ring->cur) {
1944 rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
1945
1946 /* Reset rdata values */
1947 desc_if->unmap_rdata(pdata, rdata);
1948
1949 if (desc_if->map_rx_buffer(pdata, ring, rdata))
1950 break;
1951
Lendacky, Thomas8dee19e2015-04-09 12:11:51 -05001952 hw_if->rx_desc_reset(pdata, rdata, ring->dirty);
Lendacky, Thomas270894e2015-01-16 12:46:50 -06001953
1954 ring->dirty++;
1955 }
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -05001956
Lendacky, Thomasceb8f6b2015-03-20 11:50:16 -05001957 /* Make sure everything is written before the register write */
1958 wmb();
1959
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -05001960 /* Update the Rx Tail Pointer Register with address of
1961 * the last cleaned entry */
Lendacky, Thomas270894e2015-01-16 12:46:50 -06001962 rdata = XGBE_GET_DESC_DATA(ring, ring->dirty - 1);
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -05001963 XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO,
1964 lower_32_bits(rdata->rdesc_dma));
1965}
1966
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05001967static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata,
1968 struct napi_struct *napi,
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06001969 struct xgbe_ring_data *rdata,
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05001970 unsigned int len)
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06001971{
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06001972 struct sk_buff *skb;
1973 u8 *packet;
1974 unsigned int copy_len;
1975
Lendacky, Thomas385565a2015-03-20 11:50:41 -05001976 skb = napi_alloc_skb(napi, rdata->rx.hdr.dma_len);
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06001977 if (!skb)
1978 return NULL;
1979
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05001980 /* Start with the header buffer which may contain just the header
1981 * or the header plus data
1982 */
Lendacky, Thomascfbfd862015-07-06 11:57:37 -05001983 dma_sync_single_range_for_cpu(pdata->dev, rdata->rx.hdr.dma_base,
1984 rdata->rx.hdr.dma_off,
1985 rdata->rx.hdr.dma_len, DMA_FROM_DEVICE);
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05001986
Lendacky, Thomasc9f140e2014-11-20 11:03:44 -06001987 packet = page_address(rdata->rx.hdr.pa.pages) +
1988 rdata->rx.hdr.pa.pages_offset;
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05001989 copy_len = (rdata->rx.hdr_len) ? rdata->rx.hdr_len : len;
Lendacky, Thomasc9f140e2014-11-20 11:03:44 -06001990 copy_len = min(rdata->rx.hdr.dma_len, copy_len);
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06001991 skb_copy_to_linear_data(skb, packet, copy_len);
1992 skb_put(skb, copy_len);
1993
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05001994 len -= copy_len;
1995 if (len) {
1996 /* Add the remaining data as a frag */
Lendacky, Thomascfbfd862015-07-06 11:57:37 -05001997 dma_sync_single_range_for_cpu(pdata->dev,
1998 rdata->rx.buf.dma_base,
1999 rdata->rx.buf.dma_off,
2000 rdata->rx.buf.dma_len,
2001 DMA_FROM_DEVICE);
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05002002
2003 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
2004 rdata->rx.buf.pa.pages,
2005 rdata->rx.buf.pa.pages_offset,
2006 len, rdata->rx.buf.dma_len);
2007 rdata->rx.buf.pa.pages = NULL;
2008 }
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06002009
2010 return skb;
2011}
2012
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002013static int xgbe_tx_poll(struct xgbe_channel *channel)
2014{
2015 struct xgbe_prv_data *pdata = channel->pdata;
2016 struct xgbe_hw_if *hw_if = &pdata->hw_if;
2017 struct xgbe_desc_if *desc_if = &pdata->desc_if;
2018 struct xgbe_ring *ring = channel->tx_ring;
2019 struct xgbe_ring_data *rdata;
2020 struct xgbe_ring_desc *rdesc;
2021 struct net_device *netdev = pdata->netdev;
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06002022 struct netdev_queue *txq;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002023 int processed = 0;
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06002024 unsigned int tx_packets = 0, tx_bytes = 0;
Lendacky, Thomas20a41fb2015-10-21 15:37:05 -05002025 unsigned int cur;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002026
2027 DBGPR("-->xgbe_tx_poll\n");
2028
2029 /* Nothing to do if there isn't a Tx ring for this channel */
2030 if (!ring)
2031 return 0;
2032
Lendacky, Thomas20a41fb2015-10-21 15:37:05 -05002033 cur = ring->cur;
Lendacky, Thomas20986ed2015-10-26 17:13:54 -05002034
2035 /* Be sure we get ring->cur before accessing descriptor data */
2036 smp_rmb();
2037
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06002038 txq = netdev_get_tx_queue(netdev, channel->queue_index);
2039
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -05002040 while ((processed < XGBE_TX_DESC_MAX_PROC) &&
Lendacky, Thomas20a41fb2015-10-21 15:37:05 -05002041 (ring->dirty != cur)) {
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -05002042 rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002043 rdesc = rdata->rdesc;
2044
2045 if (!hw_if->tx_complete(rdesc))
2046 break;
2047
Lendacky, Thomas5449e272014-11-20 11:03:26 -06002048 /* Make sure descriptor fields are read after reading the OWN
2049 * bit */
Lendacky, Thomasceb8f6b2015-03-20 11:50:16 -05002050 dma_rmb();
Lendacky, Thomas5449e272014-11-20 11:03:26 -06002051
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002052 if (netif_msg_tx_done(pdata))
2053 xgbe_dump_tx_desc(pdata, ring, ring->dirty, 1, 0);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002054
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06002055 if (hw_if->is_last_desc(rdesc)) {
2056 tx_packets += rdata->tx.packets;
2057 tx_bytes += rdata->tx.bytes;
2058 }
2059
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002060 /* Free the SKB and reset the descriptor for re-use */
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06002061 desc_if->unmap_rdata(pdata, rdata);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002062 hw_if->tx_desc_reset(rdata);
2063
2064 processed++;
2065 ring->dirty++;
2066 }
2067
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06002068 if (!processed)
Lendacky, Thomasa83ef422015-01-16 12:46:55 -06002069 return 0;
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06002070
2071 netdev_tx_completed_queue(txq, tx_packets, tx_bytes);
2072
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002073 if ((ring->tx.queue_stopped == 1) &&
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -05002074 (xgbe_tx_avail_desc(ring) > XGBE_TX_DESC_MIN_FREE)) {
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002075 ring->tx.queue_stopped = 0;
Lendacky, Thomas5fb4b862014-11-20 11:03:50 -06002076 netif_tx_wake_queue(txq);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002077 }
2078
2079 DBGPR("<--xgbe_tx_poll: processed=%d\n", processed);
2080
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002081 return processed;
2082}
2083
2084static int xgbe_rx_poll(struct xgbe_channel *channel, int budget)
2085{
2086 struct xgbe_prv_data *pdata = channel->pdata;
2087 struct xgbe_hw_if *hw_if = &pdata->hw_if;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002088 struct xgbe_ring *ring = channel->rx_ring;
2089 struct xgbe_ring_data *rdata;
2090 struct xgbe_packet_data *packet;
2091 struct net_device *netdev = pdata->netdev;
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002092 struct napi_struct *napi;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002093 struct sk_buff *skb;
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002094 struct skb_shared_hwtstamps *hwtstamps;
2095 unsigned int incomplete, error, context_next, context;
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05002096 unsigned int len, rdesc_len, max_len;
Lendacky, Thomas55ca6bc2014-10-22 11:26:17 -05002097 unsigned int received = 0;
2098 int packet_count = 0;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002099
2100 DBGPR("-->xgbe_rx_poll: budget=%d\n", budget);
2101
2102 /* Nothing to do if there isn't a Rx ring for this channel */
2103 if (!ring)
2104 return 0;
2105
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05002106 incomplete = 0;
2107 context_next = 0;
2108
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002109 napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
2110
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002111 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002112 packet = &ring->packet_data;
Lendacky, Thomas55ca6bc2014-10-22 11:26:17 -05002113 while (packet_count < budget) {
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002114 DBGPR(" cur = %d\n", ring->cur);
2115
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002116 /* First time in loop see if we need to restore state */
2117 if (!received && rdata->state_saved) {
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002118 skb = rdata->state.skb;
2119 error = rdata->state.error;
2120 len = rdata->state.len;
2121 } else {
2122 memset(packet, 0, sizeof(*packet));
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002123 skb = NULL;
2124 error = 0;
2125 len = 0;
2126 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002127
2128read_again:
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002129 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
2130
Lendacky, Thomas270894e2015-01-16 12:46:50 -06002131 if (xgbe_rx_dirty_desc(ring) > (XGBE_RX_DESC_CNT >> 3))
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -05002132 xgbe_rx_refresh(channel);
2133
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002134 if (hw_if->dev_read(channel))
2135 break;
2136
2137 received++;
2138 ring->cur++;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002139
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002140 incomplete = XGMAC_GET_BITS(packet->attributes,
2141 RX_PACKET_ATTRIBUTES,
2142 INCOMPLETE);
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002143 context_next = XGMAC_GET_BITS(packet->attributes,
2144 RX_PACKET_ATTRIBUTES,
2145 CONTEXT_NEXT);
2146 context = XGMAC_GET_BITS(packet->attributes,
2147 RX_PACKET_ATTRIBUTES,
2148 CONTEXT);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002149
2150 /* Earlier error, just drain the remaining data */
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002151 if ((incomplete || context_next) && error)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002152 goto read_again;
2153
2154 if (error || packet->errors) {
2155 if (packet->errors)
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002156 netif_err(pdata, rx_err, netdev,
2157 "error in received packet\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002158 dev_kfree_skb(skb);
Lendacky, Thomas55ca6bc2014-10-22 11:26:17 -05002159 goto next_packet;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002160 }
2161
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002162 if (!context) {
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05002163 /* Length is cumulative, get this descriptor's length */
2164 rdesc_len = rdata->rx.len - len;
2165 len += rdesc_len;
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06002166
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05002167 if (rdesc_len && !skb) {
2168 skb = xgbe_create_skb(pdata, napi, rdata,
2169 rdesc_len);
2170 if (!skb)
Lendacky, Thomas08dcc472014-11-04 16:06:44 -06002171 error = 1;
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05002172 } else if (rdesc_len) {
Lendacky, Thomascfbfd862015-07-06 11:57:37 -05002173 dma_sync_single_range_for_cpu(pdata->dev,
2174 rdata->rx.buf.dma_base,
2175 rdata->rx.buf.dma_off,
Lendacky, Thomasc9f140e2014-11-20 11:03:44 -06002176 rdata->rx.buf.dma_len,
Lendacky, Thomas174fd252014-11-04 16:06:50 -06002177 DMA_FROM_DEVICE);
2178
2179 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
Lendacky, Thomasc9f140e2014-11-20 11:03:44 -06002180 rdata->rx.buf.pa.pages,
2181 rdata->rx.buf.pa.pages_offset,
Lendacky, Thomas7d9ca342015-05-14 11:44:09 -05002182 rdesc_len,
2183 rdata->rx.buf.dma_len);
Lendacky, Thomasc9f140e2014-11-20 11:03:44 -06002184 rdata->rx.buf.pa.pages = NULL;
Lendacky, Thomas174fd252014-11-04 16:06:50 -06002185 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002186 }
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002187
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002188 if (incomplete || context_next)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002189 goto read_again;
2190
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002191 if (!skb)
Lendacky, Thomas55ca6bc2014-10-22 11:26:17 -05002192 goto next_packet;
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002193
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002194 /* Be sure we don't exceed the configured MTU */
2195 max_len = netdev->mtu + ETH_HLEN;
2196 if (!(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
2197 (skb->protocol == htons(ETH_P_8021Q)))
2198 max_len += VLAN_HLEN;
2199
2200 if (skb->len > max_len) {
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002201 netif_err(pdata, rx_err, netdev,
2202 "packet length exceeds configured MTU\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002203 dev_kfree_skb(skb);
Lendacky, Thomas55ca6bc2014-10-22 11:26:17 -05002204 goto next_packet;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002205 }
2206
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002207 if (netif_msg_pktdata(pdata))
2208 xgbe_print_pkt(netdev, skb, false);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002209
2210 skb_checksum_none_assert(skb);
2211 if (XGMAC_GET_BITS(packet->attributes,
2212 RX_PACKET_ATTRIBUTES, CSUM_DONE))
2213 skb->ip_summed = CHECKSUM_UNNECESSARY;
2214
2215 if (XGMAC_GET_BITS(packet->attributes,
2216 RX_PACKET_ATTRIBUTES, VLAN_CTAG))
2217 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2218 packet->vlan_ctag);
2219
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002220 if (XGMAC_GET_BITS(packet->attributes,
2221 RX_PACKET_ATTRIBUTES, RX_TSTAMP)) {
2222 u64 nsec;
2223
2224 nsec = timecounter_cyc2time(&pdata->tstamp_tc,
2225 packet->rx_tstamp);
2226 hwtstamps = skb_hwtstamps(skb);
2227 hwtstamps->hwtstamp = ns_to_ktime(nsec);
2228 }
2229
Lendacky, Thomas5b9dfe22014-11-04 16:07:02 -06002230 if (XGMAC_GET_BITS(packet->attributes,
2231 RX_PACKET_ATTRIBUTES, RSS_HASH))
2232 skb_set_hash(skb, packet->rss_hash,
2233 packet->rss_hash_type);
2234
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002235 skb->dev = netdev;
2236 skb->protocol = eth_type_trans(skb, netdev);
2237 skb_record_rx_queue(skb, channel->queue_index);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002238
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002239 napi_gro_receive(napi, skb);
Lendacky, Thomas55ca6bc2014-10-22 11:26:17 -05002240
2241next_packet:
2242 packet_count++;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002243 }
2244
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002245 /* Check if we need to save state before leaving */
2246 if (received && (incomplete || context_next)) {
2247 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
2248 rdata->state_saved = 1;
Lendacky, Thomas23e4eef2014-07-29 08:57:19 -05002249 rdata->state.skb = skb;
2250 rdata->state.len = len;
2251 rdata->state.error = error;
2252 }
2253
Lendacky, Thomas55ca6bc2014-10-22 11:26:17 -05002254 DBGPR("<--xgbe_rx_poll: packet_count = %d\n", packet_count);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002255
Lendacky, Thomas55ca6bc2014-10-22 11:26:17 -05002256 return packet_count;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002257}
2258
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002259static int xgbe_one_poll(struct napi_struct *napi, int budget)
2260{
2261 struct xgbe_channel *channel = container_of(napi, struct xgbe_channel,
2262 napi);
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -06002263 struct xgbe_prv_data *pdata = channel->pdata;
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002264 int processed = 0;
2265
2266 DBGPR("-->xgbe_one_poll: budget=%d\n", budget);
2267
2268 /* Cleanup Tx ring first */
2269 xgbe_tx_poll(channel);
2270
2271 /* Process Rx ring next */
2272 processed = xgbe_rx_poll(channel, budget);
2273
2274 /* If we processed everything, we are done */
2275 if (processed < budget) {
2276 /* Turn off polling */
Lendacky, Thomas491aefb2016-02-17 11:48:19 -06002277 napi_complete_done(napi, processed);
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002278
2279 /* Enable Tx and Rx interrupts */
Lendacky, Thomas4c70dd82016-11-10 17:10:17 -06002280 if (pdata->channel_irq_mode)
2281 xgbe_enable_rx_tx_int(pdata, channel);
2282 else
2283 enable_irq(channel->dma_irq);
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002284 }
2285
2286 DBGPR("<--xgbe_one_poll: received = %d\n", processed);
2287
2288 return processed;
2289}
2290
2291static int xgbe_all_poll(struct napi_struct *napi, int budget)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002292{
2293 struct xgbe_prv_data *pdata = container_of(napi, struct xgbe_prv_data,
2294 napi);
2295 struct xgbe_channel *channel;
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -05002296 int ring_budget;
2297 int processed, last_processed;
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002298 unsigned int i;
2299
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002300 DBGPR("-->xgbe_all_poll: budget=%d\n", budget);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002301
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002302 processed = 0;
Lendacky, Thomas9867e8f2014-07-02 13:04:46 -05002303 ring_budget = budget / pdata->rx_ring_count;
2304 do {
2305 last_processed = processed;
2306
2307 channel = pdata->channel;
2308 for (i = 0; i < pdata->channel_count; i++, channel++) {
2309 /* Cleanup Tx ring first */
2310 xgbe_tx_poll(channel);
2311
2312 /* Process Rx ring next */
2313 if (ring_budget > (budget - processed))
2314 ring_budget = budget - processed;
2315 processed += xgbe_rx_poll(channel, ring_budget);
2316 }
2317 } while ((processed < budget) && (processed != last_processed));
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002318
2319 /* If we processed everything, we are done */
2320 if (processed < budget) {
2321 /* Turn off polling */
Lendacky, Thomas491aefb2016-02-17 11:48:19 -06002322 napi_complete_done(napi, processed);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002323
2324 /* Enable Tx and Rx interrupts */
2325 xgbe_enable_rx_tx_ints(pdata);
2326 }
2327
Lendacky, Thomas9227dc52014-11-04 16:06:56 -06002328 DBGPR("<--xgbe_all_poll: received = %d\n", processed);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002329
2330 return processed;
2331}
2332
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002333void xgbe_dump_tx_desc(struct xgbe_prv_data *pdata, struct xgbe_ring *ring,
2334 unsigned int idx, unsigned int count, unsigned int flag)
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002335{
2336 struct xgbe_ring_data *rdata;
2337 struct xgbe_ring_desc *rdesc;
2338
2339 while (count--) {
Lendacky, Thomasd0a8ba62014-06-24 16:19:06 -05002340 rdata = XGBE_GET_DESC_DATA(ring, idx);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002341 rdesc = rdata->rdesc;
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002342 netdev_dbg(pdata->netdev,
2343 "TX_NORMAL_DESC[%d %s] = %08x:%08x:%08x:%08x\n", idx,
2344 (flag == 1) ? "QUEUED FOR TX" : "TX BY DEVICE",
2345 le32_to_cpu(rdesc->desc0),
2346 le32_to_cpu(rdesc->desc1),
2347 le32_to_cpu(rdesc->desc2),
2348 le32_to_cpu(rdesc->desc3));
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002349 idx++;
2350 }
2351}
2352
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002353void xgbe_dump_rx_desc(struct xgbe_prv_data *pdata, struct xgbe_ring *ring,
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002354 unsigned int idx)
2355{
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002356 struct xgbe_ring_data *rdata;
2357 struct xgbe_ring_desc *rdesc;
2358
2359 rdata = XGBE_GET_DESC_DATA(ring, idx);
2360 rdesc = rdata->rdesc;
2361 netdev_dbg(pdata->netdev,
2362 "RX_NORMAL_DESC[%d RX BY DEVICE] = %08x:%08x:%08x:%08x\n",
2363 idx, le32_to_cpu(rdesc->desc0), le32_to_cpu(rdesc->desc1),
2364 le32_to_cpu(rdesc->desc2), le32_to_cpu(rdesc->desc3));
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002365}
2366
2367void xgbe_print_pkt(struct net_device *netdev, struct sk_buff *skb, bool tx_rx)
2368{
2369 struct ethhdr *eth = (struct ethhdr *)skb->data;
2370 unsigned char *buf = skb->data;
2371 unsigned char buffer[128];
2372 unsigned int i, j;
2373
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002374 netdev_dbg(netdev, "\n************** SKB dump ****************\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002375
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002376 netdev_dbg(netdev, "%s packet of %d bytes\n",
2377 (tx_rx ? "TX" : "RX"), skb->len);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002378
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002379 netdev_dbg(netdev, "Dst MAC addr: %pM\n", eth->h_dest);
2380 netdev_dbg(netdev, "Src MAC addr: %pM\n", eth->h_source);
2381 netdev_dbg(netdev, "Protocol: %#06hx\n", ntohs(eth->h_proto));
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002382
2383 for (i = 0, j = 0; i < skb->len;) {
2384 j += snprintf(buffer + j, sizeof(buffer) - j, "%02hhx",
2385 buf[i++]);
2386
2387 if ((i % 32) == 0) {
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002388 netdev_dbg(netdev, " %#06x: %s\n", i - 32, buffer);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002389 j = 0;
2390 } else if ((i % 16) == 0) {
2391 buffer[j++] = ' ';
2392 buffer[j++] = ' ';
2393 } else if ((i % 4) == 0) {
2394 buffer[j++] = ' ';
2395 }
2396 }
2397 if (i % 32)
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002398 netdev_dbg(netdev, " %#06x: %s\n", i - (i % 32), buffer);
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002399
Lendacky, Thomas34bf65d2015-05-14 11:44:03 -05002400 netdev_dbg(netdev, "\n************** SKB dump ****************\n");
Lendacky, Thomasc5aa9e32014-06-05 09:15:06 -05002401}