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Alexander Shishkine443b332012-05-11 17:25:46 +03001/*
2 * bits.h - register bits of the ChipIdea USB IP core
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_BITS_H
14#define __DRIVERS_USB_CHIPIDEA_BITS_H
15
Alexander Shishkin758fc982012-05-11 17:25:53 +030016#include <linux/usb/ehci_def.h>
17
Alexander Shishkine443b332012-05-11 17:25:46 +030018/* HCCPARAMS */
19#define HCCPARAMS_LEN BIT(17)
20
21/* DCCPARAMS */
22#define DCCPARAMS_DEN (0x1F << 0)
23#define DCCPARAMS_DC BIT(7)
24
25/* TESTMODE */
26#define TESTMODE_FORCE BIT(0)
27
28/* USBCMD */
29#define USBCMD_RS BIT(0)
30#define USBCMD_RST BIT(1)
31#define USBCMD_SUTW BIT(13)
32#define USBCMD_ATDTW BIT(14)
33
34/* USBSTS & USBINTR */
35#define USBi_UI BIT(0)
36#define USBi_UEI BIT(1)
37#define USBi_PCI BIT(2)
38#define USBi_URI BIT(6)
39#define USBi_SLI BIT(8)
40
41/* DEVICEADDR */
42#define DEVICEADDR_USBADRA BIT(24)
43#define DEVICEADDR_USBADR (0x7FUL << 25)
44
45/* PORTSC */
46#define PORTSC_FPR BIT(6)
47#define PORTSC_SUSP BIT(7)
48#define PORTSC_HSP BIT(9)
49#define PORTSC_PTC (0x0FUL << 16)
50
51/* DEVLC */
52#define DEVLC_PSPD (0x03UL << 25)
53#define DEVLC_PSPD_HS (0x02UL << 25)
54
Alexander Shishkin5f36e232012-05-11 17:25:47 +030055/* OTGSC */
56#define OTGSC_IDPU BIT(5)
57#define OTGSC_ID BIT(8)
58#define OTGSC_AVV BIT(9)
59#define OTGSC_ASV BIT(10)
60#define OTGSC_BSV BIT(11)
61#define OTGSC_BSE BIT(12)
62#define OTGSC_IDIS BIT(16)
63#define OTGSC_AVVIS BIT(17)
64#define OTGSC_ASVIS BIT(18)
65#define OTGSC_BSVIS BIT(19)
66#define OTGSC_BSEIS BIT(20)
67#define OTGSC_IDIE BIT(24)
68#define OTGSC_AVVIE BIT(25)
69#define OTGSC_ASVIE BIT(26)
70#define OTGSC_BSVIE BIT(27)
71#define OTGSC_BSEIE BIT(28)
72
Alexander Shishkine443b332012-05-11 17:25:46 +030073/* USBMODE */
74#define USBMODE_CM (0x03UL << 0)
Alexander Shishkin758fc982012-05-11 17:25:53 +030075#define USBMODE_CM_DC (0x02UL << 0)
Alexander Shishkine443b332012-05-11 17:25:46 +030076#define USBMODE_SLOM BIT(3)
Alexander Shishkin758fc982012-05-11 17:25:53 +030077#define USBMODE_CI_SDIS BIT(4)
Alexander Shishkine443b332012-05-11 17:25:46 +030078
79/* ENDPTCTRL */
80#define ENDPTCTRL_RXS BIT(0)
81#define ENDPTCTRL_RXT (0x03UL << 2)
82#define ENDPTCTRL_RXR BIT(6) /* reserved for port 0 */
83#define ENDPTCTRL_RXE BIT(7)
84#define ENDPTCTRL_TXS BIT(16)
85#define ENDPTCTRL_TXT (0x03UL << 18)
86#define ENDPTCTRL_TXR BIT(22) /* reserved for port 0 */
87#define ENDPTCTRL_TXE BIT(23)
88
89#endif /* __DRIVERS_USB_CHIPIDEA_BITS_H */