Russell King | e616c59 | 2009-09-27 20:55:43 +0100 | [diff] [blame] | 1 | /* |
| 2 | * ARM specific SMP header, this contains our implementation |
| 3 | * details. |
| 4 | */ |
| 5 | #ifndef __ASMARM_SMP_PLAT_H |
| 6 | #define __ASMARM_SMP_PLAT_H |
| 7 | |
Lorenzo Pieralisi | 7f124aa | 2011-11-17 17:36:24 +0000 | [diff] [blame] | 8 | #include <linux/cpumask.h> |
| 9 | #include <linux/err.h> |
| 10 | |
Russell King | e616c59 | 2009-09-27 20:55:43 +0100 | [diff] [blame] | 11 | #include <asm/cputype.h> |
| 12 | |
Russell King | f00ec48 | 2010-09-04 10:47:48 +0100 | [diff] [blame] | 13 | /* |
| 14 | * Return true if we are running on a SMP platform |
| 15 | */ |
| 16 | static inline bool is_smp(void) |
| 17 | { |
| 18 | #ifndef CONFIG_SMP |
| 19 | return false; |
| 20 | #elif defined(CONFIG_SMP_ON_UP) |
| 21 | extern unsigned int smp_on_up; |
| 22 | return !!smp_on_up; |
| 23 | #else |
| 24 | return true; |
| 25 | #endif |
| 26 | } |
| 27 | |
Russell King | e616c59 | 2009-09-27 20:55:43 +0100 | [diff] [blame] | 28 | /* all SMP configurations have the extended CPUID registers */ |
Will Deacon | 5c709e6 | 2012-02-28 12:56:06 +0000 | [diff] [blame] | 29 | #ifndef CONFIG_MMU |
| 30 | #define tlb_ops_need_broadcast() 0 |
| 31 | #else |
Russell King | e616c59 | 2009-09-27 20:55:43 +0100 | [diff] [blame] | 32 | static inline int tlb_ops_need_broadcast(void) |
| 33 | { |
Tony Lindgren | 7511db9 | 2010-10-05 16:40:13 +0100 | [diff] [blame] | 34 | if (!is_smp()) |
| 35 | return 0; |
| 36 | |
Russell King | e616c59 | 2009-09-27 20:55:43 +0100 | [diff] [blame] | 37 | return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; |
| 38 | } |
Will Deacon | 5c709e6 | 2012-02-28 12:56:06 +0000 | [diff] [blame] | 39 | #endif |
Russell King | e616c59 | 2009-09-27 20:55:43 +0100 | [diff] [blame] | 40 | |
Catalin Marinas | 85848dd | 2010-09-13 15:58:37 +0100 | [diff] [blame] | 41 | #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 |
| 42 | #define cache_ops_need_broadcast() 0 |
| 43 | #else |
Russell King | 2ef7f3d | 2009-11-05 13:29:36 +0000 | [diff] [blame] | 44 | static inline int cache_ops_need_broadcast(void) |
| 45 | { |
Tony Lindgren | 7511db9 | 2010-10-05 16:40:13 +0100 | [diff] [blame] | 46 | if (!is_smp()) |
| 47 | return 0; |
| 48 | |
Russell King | 2ef7f3d | 2009-11-05 13:29:36 +0000 | [diff] [blame] | 49 | return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; |
| 50 | } |
Catalin Marinas | 85848dd | 2010-09-13 15:58:37 +0100 | [diff] [blame] | 51 | #endif |
Russell King | 2ef7f3d | 2009-11-05 13:29:36 +0000 | [diff] [blame] | 52 | |
Will Deacon | eb50439 | 2012-01-20 12:01:12 +0100 | [diff] [blame] | 53 | /* |
| 54 | * Logical CPU mapping. |
| 55 | */ |
| 56 | extern int __cpu_logical_map[]; |
| 57 | #define cpu_logical_map(cpu) __cpu_logical_map[cpu] |
Lorenzo Pieralisi | 7f124aa | 2011-11-17 17:36:24 +0000 | [diff] [blame] | 58 | /* |
| 59 | * Retrieve logical cpu index corresponding to a given MPIDR[23:0] |
| 60 | * - mpidr: MPIDR[23:0] to be used for the look-up |
| 61 | * |
| 62 | * Returns the cpu logical index or -EINVAL on look-up error |
| 63 | */ |
| 64 | static inline int get_logical_index(u32 mpidr) |
| 65 | { |
| 66 | int cpu; |
| 67 | for (cpu = 0; cpu < nr_cpu_ids; cpu++) |
| 68 | if (cpu_logical_map(cpu) == mpidr) |
| 69 | return cpu; |
| 70 | return -EINVAL; |
| 71 | } |
Will Deacon | eb50439 | 2012-01-20 12:01:12 +0100 | [diff] [blame] | 72 | |
Lorenzo Pieralisi | 8cf7217 | 2013-05-16 10:32:09 +0100 | [diff] [blame^] | 73 | struct mpidr_hash { |
| 74 | u32 mask; |
| 75 | u32 shift_aff[3]; |
| 76 | u32 bits; |
| 77 | }; |
| 78 | |
| 79 | extern struct mpidr_hash mpidr_hash; |
| 80 | |
| 81 | static inline u32 mpidr_hash_size(void) |
| 82 | { |
| 83 | return 1 << mpidr_hash.bits; |
| 84 | } |
Russell King | e616c59 | 2009-09-27 20:55:43 +0100 | [diff] [blame] | 85 | #endif |