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gerrit-public.fairphone.software / kernel / msm-5.4 / d2c3ac7e7e39ec6d37e4114ae7444948561e59af / . / drivers / irqchip / Kconfig
blob: 8a7d7807b5965c9df12ba5104241df9ec013bff7 [file] [log] [blame]
Thomas Petazzonif6e916b2012-11-20 23:00:52 +0100[diff] [blame]1config IRQCHIP
2 def_bool y
3 depends on OF_IRQ
4
Rob Herring81243e42012-11-20 21:21:40 -0600[diff] [blame]5config ARM_GIC
6 bool
7 select IRQ_DOMAIN
Yingjoe Chen9a1091e2014-11-25 16:04:19 +0800[diff] [blame]8 select IRQ_DOMAIN_HIERARCHY
Rob Herring81243e42012-11-20 21:21:40 -0600[diff] [blame]9 select MULTI_IRQ_HANDLER
10
Suravee Suthikulpanit853a33c2014-11-25 18:47:22 +0000[diff] [blame]11config ARM_GIC_V2M
12 bool
13 depends on ARM_GIC
14 depends on PCI && PCI_MSI
15 select PCI_MSI_IRQ_DOMAIN
16
Rob Herring81243e42012-11-20 21:21:40 -0600[diff] [blame]17config GIC_NON_BANKED
18 bool
19
Marc Zyngier021f6532014-06-30 16:01:31 +0100[diff] [blame]20config ARM_GIC_V3
21 bool
22 select IRQ_DOMAIN
23 select MULTI_IRQ_HANDLER
Marc Zyngier443acc42014-11-24 14:35:09 +0000[diff] [blame]24 select IRQ_DOMAIN_HIERARCHY
Marc Zyngier021f6532014-06-30 16:01:31 +0100[diff] [blame]25
Marc Zyngier19812722014-11-24 14:35:19 +0000[diff] [blame]26config ARM_GIC_V3_ITS
27 bool
28 select PCI_MSI_IRQ_DOMAIN
Uwe Kleine-König292ec082013-06-26 09:18:48 +0200[diff] [blame]29
Rob Herring44430ec2012-10-27 17:25:26 -0500[diff] [blame]30config ARM_NVIC
31 bool
32 select IRQ_DOMAIN
Stefan Agner2d9f59f2015-05-16 11:44:16 +0200[diff] [blame]33 select IRQ_DOMAIN_HIERARCHY
Rob Herring44430ec2012-10-27 17:25:26 -0500[diff] [blame]34 select GENERIC_IRQ_CHIP
35
36config ARM_VIC
37 bool
38 select IRQ_DOMAIN
39 select MULTI_IRQ_HANDLER
40
41config ARM_VIC_NR
42 int
43 default 4 if ARCH_S5PV210
Rob Herring44430ec2012-10-27 17:25:26 -0500[diff] [blame]44 default 2
45 depends on ARM_VIC
46 help
47 The maximum number of VICs available in the system, for
48 power management.
49
Boris BREZILLONb1479eb2014-07-10 19:14:18 +0200[diff] [blame]50config ATMEL_AIC_IRQ
51 bool
52 select GENERIC_IRQ_CHIP
53 select IRQ_DOMAIN
54 select MULTI_IRQ_HANDLER
55 select SPARSE_IRQ
56
57config ATMEL_AIC5_IRQ
58 bool
59 select GENERIC_IRQ_CHIP
60 select IRQ_DOMAIN
61 select MULTI_IRQ_HANDLER
62 select SPARSE_IRQ
63
Kevin Cernekee5f7f0312014-12-25 09:49:06 -0800[diff] [blame]64config BCM7038_L1_IRQ
65 bool
66 select GENERIC_IRQ_CHIP
67 select IRQ_DOMAIN
68
Kevin Cernekeea4fcbb82014-11-06 22:44:27 -0800[diff] [blame]69config BCM7120_L2_IRQ
70 bool
71 select GENERIC_IRQ_CHIP
72 select IRQ_DOMAIN
73
Florian Fainelli7f646e92014-05-23 17:40:53 -0700[diff] [blame]74config BRCMSTB_L2_IRQ
75 bool
Florian Fainelli7f646e92014-05-23 17:40:53 -0700[diff] [blame]76 select GENERIC_IRQ_CHIP
77 select IRQ_DOMAIN
78
Sebastian Hesselbarth350d71b92013-09-09 14:01:20 +0200[diff] [blame]79config DW_APB_ICTL
80 bool
Jisheng Zhange1588492014-10-22 20:59:10 +0800[diff] [blame]81 select GENERIC_IRQ_CHIP
Sebastian Hesselbarth350d71b92013-09-09 14:01:20 +0200[diff] [blame]82 select IRQ_DOMAIN
83
James Hoganb6ef9162013-04-22 15:43:50 +0100[diff] [blame]84config IMGPDC_IRQ
85 bool
86 select GENERIC_IRQ_CHIP
87 select IRQ_DOMAIN
88
Alexander Shiyanafc98d92014-02-02 12:07:46 +0400[diff] [blame]89config CLPS711X_IRQCHIP
90 bool
91 depends on ARCH_CLPS711X
92 select IRQ_DOMAIN
93 select MULTI_IRQ_HANDLER
94 select SPARSE_IRQ
95 default y
96
Stefan Kristiansson4db8e6d2014-05-26 23:31:42 +0300[diff] [blame]97config OR1K_PIC
98 bool
99 select IRQ_DOMAIN
100
Felipe Balbi85980662014-09-15 16:15:02 -0500[diff] [blame]101config OMAP_IRQCHIP
102 bool
103 select GENERIC_IRQ_CHIP
104 select IRQ_DOMAIN
105
Sebastian Hesselbarth9dbd90f2013-06-06 18:27:09 +0200[diff] [blame]106config ORION_IRQCHIP
107 bool
108 select IRQ_DOMAIN
109 select MULTI_IRQ_HANDLER
110
Magnus Damm44358042013-02-18 23:28:34 +0900[diff] [blame]111config RENESAS_INTC_IRQPIN
112 bool
113 select IRQ_DOMAIN
114
Magnus Dammfbc83b72013-02-27 17:15:01 +0900[diff] [blame]115config RENESAS_IRQC
116 bool
117 select IRQ_DOMAIN
118
Lee Jones07088482015-02-18 15:13:58 +0000[diff] [blame]119config ST_IRQCHIP
120 bool
121 select REGMAP
122 select MFD_SYSCON
123 help
124 Enables SysCfg Controlled IRQs on STi based platforms.
125
Christian Ruppertb06eb012013-06-25 18:29:57 +0200[diff] [blame]126config TB10X_IRQC
127 bool
128 select IRQ_DOMAIN
129 select GENERIC_IRQ_CHIP
130
Linus Walleij2389d502012-10-31 22:04:31 +0100[diff] [blame]131config VERSATILE_FPGA_IRQ
132 bool
133 select IRQ_DOMAIN
134
135config VERSATILE_FPGA_IRQ_NR
136 int
137 default 4
138 depends on VERSATILE_FPGA_IRQ
Max Filippov26a8e962013-12-01 12:04:57 +0400[diff] [blame]139
140config XTENSA_MX
141 bool
142 select IRQ_DOMAIN
Sricharan R96ca8482013-12-03 15:57:23 +0530[diff] [blame]143
144config IRQ_CROSSBAR
145 bool
146 help
Masanari Iidaf54619f2014-09-18 12:09:42 +0900[diff] [blame]147 Support for a CROSSBAR ip that precedes the main interrupt controller.
Sricharan R96ca8482013-12-03 15:57:23 +0530[diff] [blame]148 The primary irqchip invokes the crossbar's callback which inturn allocates
149 a free irq and configures the IP. Thus the peripheral interrupts are
150 routed to one of the free irqchip interrupt lines.
Grygorii Strashko89323f82014-07-23 17:40:30 +0300[diff] [blame]151
152config KEYSTONE_IRQ
153 tristate "Keystone 2 IRQ controller IP"
154 depends on ARCH_KEYSTONE
155 help
156 Support for Texas Instruments Keystone 2 IRQ controller IP which
157 is part of the Keystone 2 IPC mechanism
Andrew Bresticker8a19b8f2014-09-18 14:47:19 -0700[diff] [blame]158
159config MIPS_GIC
160 bool
161 select MIPS_CM
Yoshinori Sato8a764482015-05-10 02:30:47 +0900[diff] [blame]162
163config RENESAS_H8300H_INTC
164 bool
165 select IRQ_DOMAIN
166
167config RENESAS_H8S_INTC
168 bool
169 select IRQ_DOMAIN