Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2007 David Airlie |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * David Airlie |
| 25 | */ |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/slab.h> |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 28 | |
| 29 | #include <drm/drmP.h> |
| 30 | #include <drm/drm_crtc.h> |
| 31 | #include <drm/drm_crtc_helper.h> |
| 32 | #include <drm/amdgpu_drm.h> |
| 33 | #include "amdgpu.h" |
Marek Olšák | fbd76d5 | 2015-05-14 23:48:26 +0200 | [diff] [blame] | 34 | #include "cikd.h" |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 35 | |
| 36 | #include <drm/drm_fb_helper.h> |
| 37 | |
| 38 | #include <linux/vga_switcheroo.h> |
| 39 | |
| 40 | /* object hierarchy - |
| 41 | this contains a helper + a amdgpu fb |
| 42 | the helper contains a pointer to amdgpu framebuffer baseclass. |
| 43 | */ |
| 44 | struct amdgpu_fbdev { |
| 45 | struct drm_fb_helper helper; |
| 46 | struct amdgpu_framebuffer rfb; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 47 | struct amdgpu_device *adev; |
| 48 | }; |
| 49 | |
| 50 | static struct fb_ops amdgpufb_ops = { |
| 51 | .owner = THIS_MODULE, |
| 52 | .fb_check_var = drm_fb_helper_check_var, |
| 53 | .fb_set_par = drm_fb_helper_set_par, |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 54 | .fb_fillrect = drm_fb_helper_cfb_fillrect, |
| 55 | .fb_copyarea = drm_fb_helper_cfb_copyarea, |
| 56 | .fb_imageblit = drm_fb_helper_cfb_imageblit, |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 57 | .fb_pan_display = drm_fb_helper_pan_display, |
| 58 | .fb_blank = drm_fb_helper_blank, |
| 59 | .fb_setcmap = drm_fb_helper_setcmap, |
| 60 | .fb_debug_enter = drm_fb_helper_debug_enter, |
| 61 | .fb_debug_leave = drm_fb_helper_debug_leave, |
| 62 | }; |
| 63 | |
| 64 | |
| 65 | int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool tiled) |
| 66 | { |
| 67 | int aligned = width; |
| 68 | int pitch_mask = 0; |
| 69 | |
| 70 | switch (bpp / 8) { |
| 71 | case 1: |
| 72 | pitch_mask = 255; |
| 73 | break; |
| 74 | case 2: |
| 75 | pitch_mask = 127; |
| 76 | break; |
| 77 | case 3: |
| 78 | case 4: |
| 79 | pitch_mask = 63; |
| 80 | break; |
| 81 | } |
| 82 | |
| 83 | aligned += pitch_mask; |
| 84 | aligned &= ~pitch_mask; |
| 85 | return aligned; |
| 86 | } |
| 87 | |
| 88 | static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj) |
| 89 | { |
| 90 | struct amdgpu_bo *rbo = gem_to_amdgpu_bo(gobj); |
| 91 | int ret; |
| 92 | |
| 93 | ret = amdgpu_bo_reserve(rbo, false); |
| 94 | if (likely(ret == 0)) { |
| 95 | amdgpu_bo_kunmap(rbo); |
| 96 | amdgpu_bo_unpin(rbo); |
| 97 | amdgpu_bo_unreserve(rbo); |
| 98 | } |
| 99 | drm_gem_object_unreference_unlocked(gobj); |
| 100 | } |
| 101 | |
| 102 | static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev, |
| 103 | struct drm_mode_fb_cmd2 *mode_cmd, |
| 104 | struct drm_gem_object **gobj_p) |
| 105 | { |
| 106 | struct amdgpu_device *adev = rfbdev->adev; |
| 107 | struct drm_gem_object *gobj = NULL; |
| 108 | struct amdgpu_bo *rbo = NULL; |
| 109 | bool fb_tiled = false; /* useful for testing */ |
| 110 | u32 tiling_flags = 0; |
| 111 | int ret; |
| 112 | int aligned_size, size; |
| 113 | int height = mode_cmd->height; |
| 114 | u32 bpp, depth; |
| 115 | |
| 116 | drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp); |
| 117 | |
| 118 | /* need to align pitch with crtc limits */ |
| 119 | mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, bpp, |
| 120 | fb_tiled) * ((bpp + 1) / 8); |
| 121 | |
| 122 | height = ALIGN(mode_cmd->height, 8); |
| 123 | size = mode_cmd->pitches[0] * height; |
| 124 | aligned_size = ALIGN(size, PAGE_SIZE); |
| 125 | ret = amdgpu_gem_object_create(adev, aligned_size, 0, |
| 126 | AMDGPU_GEM_DOMAIN_VRAM, |
Alex Deucher | 857d913 | 2015-08-27 00:14:16 -0400 | [diff] [blame] | 127 | AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED, |
| 128 | true, &gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 129 | if (ret) { |
| 130 | printk(KERN_ERR "failed to allocate framebuffer (%d)\n", |
| 131 | aligned_size); |
| 132 | return -ENOMEM; |
| 133 | } |
| 134 | rbo = gem_to_amdgpu_bo(gobj); |
| 135 | |
| 136 | if (fb_tiled) |
Marek Olšák | fbd76d5 | 2015-05-14 23:48:26 +0200 | [diff] [blame] | 137 | tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 138 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 139 | ret = amdgpu_bo_reserve(rbo, false); |
| 140 | if (unlikely(ret != 0)) |
| 141 | goto out_unref; |
| 142 | |
| 143 | if (tiling_flags) { |
| 144 | ret = amdgpu_bo_set_tiling_flags(rbo, |
Marek Olšák | 63ab1c2 | 2015-05-14 23:03:57 +0200 | [diff] [blame] | 145 | tiling_flags); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 146 | if (ret) |
| 147 | dev_err(adev->dev, "FB failed to set tiling flags\n"); |
| 148 | } |
| 149 | |
| 150 | |
Chunming Zhou | 7e5a547 | 2015-04-24 17:37:30 +0800 | [diff] [blame] | 151 | ret = amdgpu_bo_pin_restricted(rbo, AMDGPU_GEM_DOMAIN_VRAM, 0, 0, NULL); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 152 | if (ret) { |
| 153 | amdgpu_bo_unreserve(rbo); |
| 154 | goto out_unref; |
| 155 | } |
| 156 | ret = amdgpu_bo_kmap(rbo, NULL); |
| 157 | amdgpu_bo_unreserve(rbo); |
| 158 | if (ret) { |
| 159 | goto out_unref; |
| 160 | } |
| 161 | |
| 162 | *gobj_p = gobj; |
| 163 | return 0; |
| 164 | out_unref: |
| 165 | amdgpufb_destroy_pinned_object(gobj); |
| 166 | *gobj_p = NULL; |
| 167 | return ret; |
| 168 | } |
| 169 | |
| 170 | static int amdgpufb_create(struct drm_fb_helper *helper, |
| 171 | struct drm_fb_helper_surface_size *sizes) |
| 172 | { |
| 173 | struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper; |
| 174 | struct amdgpu_device *adev = rfbdev->adev; |
| 175 | struct fb_info *info; |
| 176 | struct drm_framebuffer *fb = NULL; |
| 177 | struct drm_mode_fb_cmd2 mode_cmd; |
| 178 | struct drm_gem_object *gobj = NULL; |
| 179 | struct amdgpu_bo *rbo = NULL; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 180 | int ret; |
| 181 | unsigned long tmp; |
| 182 | |
| 183 | mode_cmd.width = sizes->surface_width; |
| 184 | mode_cmd.height = sizes->surface_height; |
| 185 | |
| 186 | if (sizes->surface_bpp == 24) |
| 187 | sizes->surface_bpp = 32; |
| 188 | |
| 189 | mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, |
| 190 | sizes->surface_depth); |
| 191 | |
| 192 | ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj); |
| 193 | if (ret) { |
| 194 | DRM_ERROR("failed to create fbcon object %d\n", ret); |
| 195 | return ret; |
| 196 | } |
| 197 | |
| 198 | rbo = gem_to_amdgpu_bo(gobj); |
| 199 | |
| 200 | /* okay we have an object now allocate the framebuffer */ |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 201 | info = drm_fb_helper_alloc_fbi(helper); |
| 202 | if (IS_ERR(info)) { |
| 203 | ret = PTR_ERR(info); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 204 | goto out_unref; |
| 205 | } |
| 206 | |
| 207 | info->par = rfbdev; |
Alex Deucher | df7989f | 2015-11-02 10:52:32 -0500 | [diff] [blame] | 208 | info->skip_vt_switch = true; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 209 | |
| 210 | ret = amdgpu_framebuffer_init(adev->ddev, &rfbdev->rfb, &mode_cmd, gobj); |
| 211 | if (ret) { |
| 212 | DRM_ERROR("failed to initialize framebuffer %d\n", ret); |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 213 | goto out_destroy_fbi; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 214 | } |
| 215 | |
| 216 | fb = &rfbdev->rfb.base; |
| 217 | |
| 218 | /* setup helper */ |
| 219 | rfbdev->helper.fb = fb; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 220 | |
| 221 | memset_io(rbo->kptr, 0x0, amdgpu_bo_size(rbo)); |
| 222 | |
| 223 | strcpy(info->fix.id, "amdgpudrmfb"); |
| 224 | |
| 225 | drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth); |
| 226 | |
| 227 | info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; |
| 228 | info->fbops = &amdgpufb_ops; |
| 229 | |
| 230 | tmp = amdgpu_bo_gpu_offset(rbo) - adev->mc.vram_start; |
| 231 | info->fix.smem_start = adev->mc.aper_base + tmp; |
| 232 | info->fix.smem_len = amdgpu_bo_size(rbo); |
| 233 | info->screen_base = rbo->kptr; |
| 234 | info->screen_size = amdgpu_bo_size(rbo); |
| 235 | |
| 236 | drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); |
| 237 | |
| 238 | /* setup aperture base/size for vesafb takeover */ |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 239 | info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base; |
| 240 | info->apertures->ranges[0].size = adev->mc.aper_size; |
| 241 | |
| 242 | /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ |
| 243 | |
| 244 | if (info->screen_base == NULL) { |
| 245 | ret = -ENOSPC; |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 246 | goto out_destroy_fbi; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 247 | } |
| 248 | |
| 249 | DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); |
| 250 | DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->mc.aper_base); |
| 251 | DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(rbo)); |
| 252 | DRM_INFO("fb depth is %d\n", fb->depth); |
| 253 | DRM_INFO(" pitch is %d\n", fb->pitches[0]); |
| 254 | |
| 255 | vga_switcheroo_client_fb_set(adev->ddev->pdev, info); |
| 256 | return 0; |
| 257 | |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 258 | out_destroy_fbi: |
| 259 | drm_fb_helper_release_fbi(helper); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 260 | out_unref: |
| 261 | if (rbo) { |
| 262 | |
| 263 | } |
| 264 | if (fb && ret) { |
Daniel Vetter | a9906fd | 2015-11-23 10:32:37 +0100 | [diff] [blame] | 265 | drm_gem_object_unreference_unlocked(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 266 | drm_framebuffer_unregister_private(fb); |
| 267 | drm_framebuffer_cleanup(fb); |
| 268 | kfree(fb); |
| 269 | } |
| 270 | return ret; |
| 271 | } |
| 272 | |
| 273 | void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev) |
| 274 | { |
| 275 | if (adev->mode_info.rfbdev) |
| 276 | drm_fb_helper_hotplug_event(&adev->mode_info.rfbdev->helper); |
| 277 | } |
| 278 | |
| 279 | static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev) |
| 280 | { |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 281 | struct amdgpu_framebuffer *rfb = &rfbdev->rfb; |
| 282 | |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 283 | drm_fb_helper_unregister_fbi(&rfbdev->helper); |
| 284 | drm_fb_helper_release_fbi(&rfbdev->helper); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 285 | |
| 286 | if (rfb->obj) { |
| 287 | amdgpufb_destroy_pinned_object(rfb->obj); |
| 288 | rfb->obj = NULL; |
| 289 | } |
| 290 | drm_fb_helper_fini(&rfbdev->helper); |
| 291 | drm_framebuffer_unregister_private(&rfb->base); |
| 292 | drm_framebuffer_cleanup(&rfb->base); |
| 293 | |
| 294 | return 0; |
| 295 | } |
| 296 | |
| 297 | /** Sets the color ramps on behalf of fbcon */ |
| 298 | static void amdgpu_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
| 299 | u16 blue, int regno) |
| 300 | { |
| 301 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); |
| 302 | |
| 303 | amdgpu_crtc->lut_r[regno] = red >> 6; |
| 304 | amdgpu_crtc->lut_g[regno] = green >> 6; |
| 305 | amdgpu_crtc->lut_b[regno] = blue >> 6; |
| 306 | } |
| 307 | |
| 308 | /** Gets the color ramps on behalf of fbcon */ |
| 309 | static void amdgpu_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
| 310 | u16 *blue, int regno) |
| 311 | { |
| 312 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); |
| 313 | |
| 314 | *red = amdgpu_crtc->lut_r[regno] << 6; |
| 315 | *green = amdgpu_crtc->lut_g[regno] << 6; |
| 316 | *blue = amdgpu_crtc->lut_b[regno] << 6; |
| 317 | } |
| 318 | |
| 319 | static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = { |
| 320 | .gamma_set = amdgpu_crtc_fb_gamma_set, |
| 321 | .gamma_get = amdgpu_crtc_fb_gamma_get, |
| 322 | .fb_probe = amdgpufb_create, |
| 323 | }; |
| 324 | |
| 325 | int amdgpu_fbdev_init(struct amdgpu_device *adev) |
| 326 | { |
| 327 | struct amdgpu_fbdev *rfbdev; |
| 328 | int bpp_sel = 32; |
| 329 | int ret; |
| 330 | |
| 331 | /* don't init fbdev on hw without DCE */ |
| 332 | if (!adev->mode_info.mode_config_initialized) |
| 333 | return 0; |
| 334 | |
Alex Deucher | f49d45c | 2016-01-26 00:30:33 -0500 | [diff] [blame] | 335 | /* don't init fbdev if there are no connectors */ |
| 336 | if (list_empty(&adev->ddev->mode_config.connector_list)) |
| 337 | return 0; |
| 338 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 339 | /* select 8 bpp console on low vram cards */ |
| 340 | if (adev->mc.real_vram_size <= (32*1024*1024)) |
| 341 | bpp_sel = 8; |
| 342 | |
| 343 | rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL); |
| 344 | if (!rfbdev) |
| 345 | return -ENOMEM; |
| 346 | |
| 347 | rfbdev->adev = adev; |
| 348 | adev->mode_info.rfbdev = rfbdev; |
| 349 | |
| 350 | drm_fb_helper_prepare(adev->ddev, &rfbdev->helper, |
| 351 | &amdgpu_fb_helper_funcs); |
| 352 | |
| 353 | ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper, |
| 354 | adev->mode_info.num_crtc, |
| 355 | AMDGPUFB_CONN_LIMIT); |
| 356 | if (ret) { |
| 357 | kfree(rfbdev); |
| 358 | return ret; |
| 359 | } |
| 360 | |
| 361 | drm_fb_helper_single_add_all_connectors(&rfbdev->helper); |
| 362 | |
| 363 | /* disable all the possible outputs/crtcs before entering KMS mode */ |
| 364 | drm_helper_disable_unused_functions(adev->ddev); |
| 365 | |
| 366 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); |
| 367 | return 0; |
| 368 | } |
| 369 | |
| 370 | void amdgpu_fbdev_fini(struct amdgpu_device *adev) |
| 371 | { |
| 372 | if (!adev->mode_info.rfbdev) |
| 373 | return; |
| 374 | |
| 375 | amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev); |
| 376 | kfree(adev->mode_info.rfbdev); |
| 377 | adev->mode_info.rfbdev = NULL; |
| 378 | } |
| 379 | |
| 380 | void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state) |
| 381 | { |
| 382 | if (adev->mode_info.rfbdev) |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 383 | drm_fb_helper_set_suspend(&adev->mode_info.rfbdev->helper, |
| 384 | state); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 385 | } |
| 386 | |
| 387 | int amdgpu_fbdev_total_size(struct amdgpu_device *adev) |
| 388 | { |
| 389 | struct amdgpu_bo *robj; |
| 390 | int size = 0; |
| 391 | |
| 392 | if (!adev->mode_info.rfbdev) |
| 393 | return 0; |
| 394 | |
| 395 | robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj); |
| 396 | size += amdgpu_bo_size(robj); |
| 397 | return size; |
| 398 | } |
| 399 | |
| 400 | bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj) |
| 401 | { |
| 402 | if (!adev->mode_info.rfbdev) |
| 403 | return false; |
| 404 | if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj)) |
| 405 | return true; |
| 406 | return false; |
| 407 | } |
Alex Deucher | 8b7530b | 2015-10-02 16:59:34 -0400 | [diff] [blame] | 408 | |
| 409 | void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev) |
| 410 | { |
| 411 | struct amdgpu_fbdev *afbdev = adev->mode_info.rfbdev; |
| 412 | struct drm_fb_helper *fb_helper; |
| 413 | int ret; |
| 414 | |
| 415 | if (!afbdev) |
| 416 | return; |
| 417 | |
| 418 | fb_helper = &afbdev->helper; |
| 419 | |
| 420 | ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper); |
| 421 | if (ret) |
| 422 | DRM_DEBUG("failed to restore crtc mode\n"); |
| 423 | } |