blob: a06acab48086cee26baa8d3f88218b8fa77a355e [file] [log] [blame]
Mintz, Yuvalcdda9262017-01-01 13:57:01 +02001/* QLogic qede NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/netdevice.h>
33#include <linux/etherdevice.h>
34#include <linux/skbuff.h>
35#include <net/udp_tunnel.h>
36#include <linux/ip.h>
37#include <net/ipv6.h>
38#include <net/tcp.h>
39#include <linux/if_ether.h>
40#include <linux/if_vlan.h>
41#include <net/ip6_checksum.h>
42
43#include <linux/qed/qed_if.h>
44#include "qede.h"
45/*********************************
46 * Content also used by slowpath *
47 *********************************/
48
Mintz, Yuvale3eef7e2017-01-01 13:57:04 +020049int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy)
Mintz, Yuvalcdda9262017-01-01 13:57:01 +020050{
51 struct sw_rx_data *sw_rx_data;
52 struct eth_rx_bd *rx_bd;
53 dma_addr_t mapping;
54 struct page *data;
55
Mintz, Yuvale3eef7e2017-01-01 13:57:04 +020056 /* In case lazy-allocation is allowed, postpone allocation until the
57 * end of the NAPI run. We'd still need to make sure the Rx ring has
58 * sufficient buffers to guarantee an additional Rx interrupt.
59 */
60 if (allow_lazy && likely(rxq->filled_buffers > 12)) {
61 rxq->filled_buffers--;
62 return 0;
63 }
64
Mintz, Yuvalcdda9262017-01-01 13:57:01 +020065 data = alloc_pages(GFP_ATOMIC, 0);
66 if (unlikely(!data))
67 return -ENOMEM;
68
69 /* Map the entire page as it would be used
70 * for multiple RX buffer segment size mapping.
71 */
72 mapping = dma_map_page(rxq->dev, data, 0,
73 PAGE_SIZE, rxq->data_direction);
74 if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
75 __free_page(data);
76 return -ENOMEM;
77 }
78
79 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
80 sw_rx_data->page_offset = 0;
81 sw_rx_data->data = data;
82 sw_rx_data->mapping = mapping;
83
84 /* Advance PROD and get BD pointer */
85 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
86 WARN_ON(!rx_bd);
87 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
88 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
89
90 rxq->sw_rx_prod++;
Mintz, Yuvale3eef7e2017-01-01 13:57:04 +020091 rxq->filled_buffers++;
Mintz, Yuvalcdda9262017-01-01 13:57:01 +020092
93 return 0;
94}
95
96/* Unmap the data and free skb */
97int qede_free_tx_pkt(struct qede_dev *edev, struct qede_tx_queue *txq, int *len)
98{
99 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
100 struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
101 struct eth_tx_1st_bd *first_bd;
102 struct eth_tx_bd *tx_data_bd;
103 int bds_consumed = 0;
104 int nbds;
105 bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
106 int i, split_bd_len = 0;
107
108 if (unlikely(!skb)) {
109 DP_ERR(edev,
110 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
111 idx, txq->sw_tx_cons, txq->sw_tx_prod);
112 return -1;
113 }
114
115 *len = skb->len;
116
117 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
118
119 bds_consumed++;
120
121 nbds = first_bd->data.nbds;
122
123 if (data_split) {
124 struct eth_tx_bd *split = (struct eth_tx_bd *)
125 qed_chain_consume(&txq->tx_pbl);
126 split_bd_len = BD_UNMAP_LEN(split);
127 bds_consumed++;
128 }
129 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
130 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
131
132 /* Unmap the data of the skb frags */
133 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
134 tx_data_bd = (struct eth_tx_bd *)
135 qed_chain_consume(&txq->tx_pbl);
136 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
137 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
138 }
139
140 while (bds_consumed++ < nbds)
141 qed_chain_consume(&txq->tx_pbl);
142
143 /* Free skb */
144 dev_kfree_skb_any(skb);
145 txq->sw_tx_ring.skbs[idx].skb = NULL;
146 txq->sw_tx_ring.skbs[idx].flags = 0;
147
148 return 0;
149}
150
151/* Unmap the data and free skb when mapping failed during start_xmit */
152static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
153 struct eth_tx_1st_bd *first_bd,
154 int nbd, bool data_split)
155{
156 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
157 struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
158 struct eth_tx_bd *tx_data_bd;
159 int i, split_bd_len = 0;
160
161 /* Return prod to its position before this skb was handled */
162 qed_chain_set_prod(&txq->tx_pbl,
163 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
164
165 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
166
167 if (data_split) {
168 struct eth_tx_bd *split = (struct eth_tx_bd *)
169 qed_chain_produce(&txq->tx_pbl);
170 split_bd_len = BD_UNMAP_LEN(split);
171 nbd--;
172 }
173
174 dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
175 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
176
177 /* Unmap the data of the skb frags */
178 for (i = 0; i < nbd; i++) {
179 tx_data_bd = (struct eth_tx_bd *)
180 qed_chain_produce(&txq->tx_pbl);
181 if (tx_data_bd->nbytes)
182 dma_unmap_page(txq->dev,
183 BD_UNMAP_ADDR(tx_data_bd),
184 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
185 }
186
187 /* Return again prod to its position before this skb was handled */
188 qed_chain_set_prod(&txq->tx_pbl,
189 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
190
191 /* Free skb */
192 dev_kfree_skb_any(skb);
193 txq->sw_tx_ring.skbs[idx].skb = NULL;
194 txq->sw_tx_ring.skbs[idx].flags = 0;
195}
196
197static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
198{
199 u32 rc = XMIT_L4_CSUM;
200 __be16 l3_proto;
201
202 if (skb->ip_summed != CHECKSUM_PARTIAL)
203 return XMIT_PLAIN;
204
205 l3_proto = vlan_get_protocol(skb);
206 if (l3_proto == htons(ETH_P_IPV6) &&
207 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
208 *ipv6_ext = 1;
209
210 if (skb->encapsulation) {
211 rc |= XMIT_ENC;
212 if (skb_is_gso(skb)) {
213 unsigned short gso_type = skb_shinfo(skb)->gso_type;
214
215 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
216 (gso_type & SKB_GSO_GRE_CSUM))
217 rc |= XMIT_ENC_GSO_L4_CSUM;
218
219 rc |= XMIT_LSO;
220 return rc;
221 }
222 }
223
224 if (skb_is_gso(skb))
225 rc |= XMIT_LSO;
226
227 return rc;
228}
229
230static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
231 struct eth_tx_2nd_bd *second_bd,
232 struct eth_tx_3rd_bd *third_bd)
233{
234 u8 l4_proto;
235 u16 bd2_bits1 = 0, bd2_bits2 = 0;
236
237 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
238
239 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
240 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
241 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
242
243 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
244 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
245
246 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
247 l4_proto = ipv6_hdr(skb)->nexthdr;
248 else
249 l4_proto = ip_hdr(skb)->protocol;
250
251 if (l4_proto == IPPROTO_UDP)
252 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
253
254 if (third_bd)
255 third_bd->data.bitfields |=
256 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
257 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
258 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
259
260 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
261 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
262}
263
264static int map_frag_to_bd(struct qede_tx_queue *txq,
265 skb_frag_t *frag, struct eth_tx_bd *bd)
266{
267 dma_addr_t mapping;
268
269 /* Map skb non-linear frag data for DMA */
270 mapping = skb_frag_dma_map(txq->dev, frag, 0,
271 skb_frag_size(frag), DMA_TO_DEVICE);
272 if (unlikely(dma_mapping_error(txq->dev, mapping)))
273 return -ENOMEM;
274
275 /* Setup the data pointer of the frag data */
276 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
277
278 return 0;
279}
280
281static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
282{
283 if (is_encap_pkt)
284 return (skb_inner_transport_header(skb) +
285 inner_tcp_hdrlen(skb) - skb->data);
286 else
287 return (skb_transport_header(skb) +
288 tcp_hdrlen(skb) - skb->data);
289}
290
291/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
292#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
293static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
294{
295 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
296
297 if (xmit_type & XMIT_LSO) {
298 int hlen;
299
300 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
301
302 /* linear payload would require its own BD */
303 if (skb_headlen(skb) > hlen)
304 allowed_frags--;
305 }
306
307 return (skb_shinfo(skb)->nr_frags > allowed_frags);
308}
309#endif
310
311static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
312{
313 /* wmb makes sure that the BDs data is updated before updating the
314 * producer, otherwise FW may read old data from the BDs.
315 */
316 wmb();
317 barrier();
318 writel(txq->tx_db.raw, txq->doorbell_addr);
319
320 /* mmiowb is needed to synchronize doorbell writes from more than one
321 * processor. It guarantees that the write arrives to the device before
322 * the queue lock is released and another start_xmit is called (possibly
323 * on another CPU). Without this barrier, the next doorbell can bypass
324 * this doorbell. This is applicable to IA64/Altix systems.
325 */
326 mmiowb();
327}
328
329static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
330 struct sw_rx_data *metadata, u16 padding, u16 length)
331{
332 struct qede_tx_queue *txq = fp->xdp_tx;
333 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
334 struct eth_tx_1st_bd *first_bd;
335
336 if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
337 txq->stopped_cnt++;
338 return -ENOMEM;
339 }
340
341 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
342
343 memset(first_bd, 0, sizeof(*first_bd));
344 first_bd->data.bd_flags.bitfields =
345 BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
346 first_bd->data.bitfields |=
347 (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
348 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
349 first_bd->data.nbds = 1;
350
351 /* We can safely ignore the offset, as it's 0 for XDP */
352 BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
353
354 /* Synchronize the buffer back to device, as program [probably]
355 * has changed it.
356 */
357 dma_sync_single_for_device(&edev->pdev->dev,
358 metadata->mapping + padding,
359 length, PCI_DMA_TODEVICE);
360
361 txq->sw_tx_ring.pages[idx] = metadata->data;
362 txq->sw_tx_prod++;
363
364 /* Mark the fastpath for future XDP doorbell */
365 fp->xdp_xmit = 1;
366
367 return 0;
368}
369
370int qede_txq_has_work(struct qede_tx_queue *txq)
371{
372 u16 hw_bd_cons;
373
374 /* Tell compiler that consumer and producer can change */
375 barrier();
376 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
377 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
378 return 0;
379
380 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
381}
382
383static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
384{
385 struct eth_tx_1st_bd *bd;
386 u16 hw_bd_cons;
387
388 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
389 barrier();
390
391 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
392 bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
393
394 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(bd),
395 PAGE_SIZE, DMA_BIDIRECTIONAL);
396 __free_page(txq->sw_tx_ring.pages[txq->sw_tx_cons &
397 NUM_TX_BDS_MAX]);
398
399 txq->sw_tx_cons++;
400 txq->xmit_pkts++;
401 }
402}
403
404static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
405{
406 struct netdev_queue *netdev_txq;
407 u16 hw_bd_cons;
408 unsigned int pkts_compl = 0, bytes_compl = 0;
409 int rc;
410
411 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
412
413 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
414 barrier();
415
416 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
417 int len = 0;
418
419 rc = qede_free_tx_pkt(edev, txq, &len);
420 if (rc) {
421 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
422 hw_bd_cons,
423 qed_chain_get_cons_idx(&txq->tx_pbl));
424 break;
425 }
426
427 bytes_compl += len;
428 pkts_compl++;
429 txq->sw_tx_cons++;
430 txq->xmit_pkts++;
431 }
432
433 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
434
435 /* Need to make the tx_bd_cons update visible to start_xmit()
436 * before checking for netif_tx_queue_stopped(). Without the
437 * memory barrier, there is a small possibility that
438 * start_xmit() will miss it and cause the queue to be stopped
439 * forever.
440 * On the other hand we need an rmb() here to ensure the proper
441 * ordering of bit testing in the following
442 * netif_tx_queue_stopped(txq) call.
443 */
444 smp_mb();
445
446 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
447 /* Taking tx_lock is needed to prevent reenabling the queue
448 * while it's empty. This could have happen if rx_action() gets
449 * suspended in qede_tx_int() after the condition before
450 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
451 *
452 * stops the queue->sees fresh tx_bd_cons->releases the queue->
453 * sends some packets consuming the whole queue again->
454 * stops the queue
455 */
456
457 __netif_tx_lock(netdev_txq, smp_processor_id());
458
459 if ((netif_tx_queue_stopped(netdev_txq)) &&
460 (edev->state == QEDE_STATE_OPEN) &&
461 (qed_chain_get_elem_left(&txq->tx_pbl)
462 >= (MAX_SKB_FRAGS + 1))) {
463 netif_tx_wake_queue(netdev_txq);
464 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
465 "Wake queue was called\n");
466 }
467
468 __netif_tx_unlock(netdev_txq);
469 }
470
471 return 0;
472}
473
474bool qede_has_rx_work(struct qede_rx_queue *rxq)
475{
476 u16 hw_comp_cons, sw_comp_cons;
477
478 /* Tell compiler that status block fields can change */
479 barrier();
480
481 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
482 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
483
484 return hw_comp_cons != sw_comp_cons;
485}
486
487static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
488{
489 qed_chain_consume(&rxq->rx_bd_ring);
490 rxq->sw_rx_cons++;
491}
492
493/* This function reuses the buffer(from an offset) from
494 * consumer index to producer index in the bd ring
495 */
496static inline void qede_reuse_page(struct qede_rx_queue *rxq,
497 struct sw_rx_data *curr_cons)
498{
499 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
500 struct sw_rx_data *curr_prod;
501 dma_addr_t new_mapping;
502
503 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
504 *curr_prod = *curr_cons;
505
506 new_mapping = curr_prod->mapping + curr_prod->page_offset;
507
508 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
509 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
510
511 rxq->sw_rx_prod++;
512 curr_cons->data = NULL;
513}
514
515/* In case of allocation failures reuse buffers
516 * from consumer index to produce buffers for firmware
517 */
518void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
519{
520 struct sw_rx_data *curr_cons;
521
522 for (; count > 0; count--) {
523 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
524 qede_reuse_page(rxq, curr_cons);
525 qede_rx_bd_ring_consume(rxq);
526 }
527}
528
529static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
530 struct sw_rx_data *curr_cons)
531{
532 /* Move to the next segment in the page */
533 curr_cons->page_offset += rxq->rx_buf_seg_size;
534
535 if (curr_cons->page_offset == PAGE_SIZE) {
Mintz, Yuvale3eef7e2017-01-01 13:57:04 +0200536 if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
Mintz, Yuvalcdda9262017-01-01 13:57:01 +0200537 /* Since we failed to allocate new buffer
538 * current buffer can be used again.
539 */
540 curr_cons->page_offset -= rxq->rx_buf_seg_size;
541
542 return -ENOMEM;
543 }
544
545 dma_unmap_page(rxq->dev, curr_cons->mapping,
546 PAGE_SIZE, rxq->data_direction);
547 } else {
548 /* Increment refcount of the page as we don't want
549 * network stack to take the ownership of the page
550 * which can be recycled multiple times by the driver.
551 */
552 page_ref_inc(curr_cons->data);
553 qede_reuse_page(rxq, curr_cons);
554 }
555
556 return 0;
557}
558
559void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
560{
561 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
562 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
563 struct eth_rx_prod_data rx_prods = {0};
564
565 /* Update producers */
566 rx_prods.bd_prod = cpu_to_le16(bd_prod);
567 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
568
569 /* Make sure that the BD and SGE data is updated before updating the
570 * producers since FW might read the BD/SGE right after the producer
571 * is updated.
572 */
573 wmb();
574
575 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
576 (u32 *)&rx_prods);
577
578 /* mmiowb is needed to synchronize doorbell writes from more than one
579 * processor. It guarantees that the write arrives to the device before
580 * the napi lock is released and another qede_poll is called (possibly
581 * on another CPU). Without this barrier, the next doorbell can bypass
582 * this doorbell. This is applicable to IA64/Altix systems.
583 */
584 mmiowb();
585}
586
587static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
588{
589 enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
590 enum rss_hash_type htype;
591 u32 hash = 0;
592
593 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
594 if (htype) {
595 hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
596 (htype == RSS_HASH_TYPE_IPV6)) ?
597 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
598 hash = le32_to_cpu(rss_hash);
599 }
600 skb_set_hash(skb, hash, hash_type);
601}
602
603static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
604{
605 skb_checksum_none_assert(skb);
606
607 if (csum_flag & QEDE_CSUM_UNNECESSARY)
608 skb->ip_summed = CHECKSUM_UNNECESSARY;
609
610 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
611 skb->csum_level = 1;
612}
613
614static inline void qede_skb_receive(struct qede_dev *edev,
615 struct qede_fastpath *fp,
616 struct qede_rx_queue *rxq,
617 struct sk_buff *skb, u16 vlan_tag)
618{
619 if (vlan_tag)
620 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
621
622 napi_gro_receive(&fp->napi, skb);
623 fp->rxq->rcv_pkts++;
624}
625
626static void qede_set_gro_params(struct qede_dev *edev,
627 struct sk_buff *skb,
628 struct eth_fast_path_rx_tpa_start_cqe *cqe)
629{
630 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
631
632 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
633 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
634 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
635 else
636 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
637
638 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
639 cqe->header_len;
640}
641
642static int qede_fill_frag_skb(struct qede_dev *edev,
643 struct qede_rx_queue *rxq,
644 u8 tpa_agg_index, u16 len_on_bd)
645{
646 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
647 NUM_RX_BDS_MAX];
648 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
649 struct sk_buff *skb = tpa_info->skb;
650
651 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
652 goto out;
653
654 /* Add one frag and update the appropriate fields in the skb */
655 skb_fill_page_desc(skb, tpa_info->frag_id++,
656 current_bd->data, current_bd->page_offset,
657 len_on_bd);
658
659 if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
660 /* Incr page ref count to reuse on allocation failure
661 * so that it doesn't get freed while freeing SKB.
662 */
663 page_ref_inc(current_bd->data);
664 goto out;
665 }
666
667 qed_chain_consume(&rxq->rx_bd_ring);
668 rxq->sw_rx_cons++;
669
670 skb->data_len += len_on_bd;
671 skb->truesize += rxq->rx_buf_seg_size;
672 skb->len += len_on_bd;
673
674 return 0;
675
676out:
677 tpa_info->state = QEDE_AGG_STATE_ERROR;
678 qede_recycle_rx_bd_ring(rxq, 1);
679
680 return -ENOMEM;
681}
682
683static bool qede_tunn_exist(u16 flag)
684{
685 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
686 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
687}
688
689static u8 qede_check_tunn_csum(u16 flag)
690{
691 u16 csum_flag = 0;
692 u8 tcsum = 0;
693
694 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
695 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
696 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
697 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
698
699 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
700 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
701 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
702 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
703 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
704 }
705
706 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
707 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
708 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
709 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
710
711 if (csum_flag & flag)
712 return QEDE_CSUM_ERROR;
713
714 return QEDE_CSUM_UNNECESSARY | tcsum;
715}
716
717static void qede_tpa_start(struct qede_dev *edev,
718 struct qede_rx_queue *rxq,
719 struct eth_fast_path_rx_tpa_start_cqe *cqe)
720{
721 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
722 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
723 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
724 struct sw_rx_data *replace_buf = &tpa_info->buffer;
725 dma_addr_t mapping = tpa_info->buffer_mapping;
726 struct sw_rx_data *sw_rx_data_cons;
727 struct sw_rx_data *sw_rx_data_prod;
728
729 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
730 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
731
732 /* Use pre-allocated replacement buffer - we can't release the agg.
733 * start until its over and we don't want to risk allocation failing
734 * here, so re-allocate when aggregation will be over.
735 */
736 sw_rx_data_prod->mapping = replace_buf->mapping;
737
738 sw_rx_data_prod->data = replace_buf->data;
739 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
740 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
741 sw_rx_data_prod->page_offset = replace_buf->page_offset;
742
743 rxq->sw_rx_prod++;
744
745 /* move partial skb from cons to pool (don't unmap yet)
746 * save mapping, incase we drop the packet later on.
747 */
748 tpa_info->buffer = *sw_rx_data_cons;
749 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
750 le32_to_cpu(rx_bd_cons->addr.lo));
751
752 tpa_info->buffer_mapping = mapping;
753 rxq->sw_rx_cons++;
754
755 /* set tpa state to start only if we are able to allocate skb
756 * for this aggregation, otherwise mark as error and aggregation will
757 * be dropped
758 */
759 tpa_info->skb = netdev_alloc_skb(edev->ndev,
760 le16_to_cpu(cqe->len_on_first_bd));
761 if (unlikely(!tpa_info->skb)) {
762 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
763 tpa_info->state = QEDE_AGG_STATE_ERROR;
764 goto cons_buf;
765 }
766
767 /* Start filling in the aggregation info */
768 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
769 tpa_info->frag_id = 0;
770 tpa_info->state = QEDE_AGG_STATE_START;
771
772 /* Store some information from first CQE */
773 tpa_info->start_cqe_placement_offset = cqe->placement_offset;
774 tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
775 if ((le16_to_cpu(cqe->pars_flags.flags) >>
776 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
777 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
778 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
779 else
780 tpa_info->vlan_tag = 0;
781
782 qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
783
784 /* This is needed in order to enable forwarding support */
785 qede_set_gro_params(edev, tpa_info->skb, cqe);
786
787cons_buf: /* We still need to handle bd_len_list to consume buffers */
788 if (likely(cqe->ext_bd_len_list[0]))
789 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
790 le16_to_cpu(cqe->ext_bd_len_list[0]));
791
792 if (unlikely(cqe->ext_bd_len_list[1])) {
793 DP_ERR(edev,
794 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
795 tpa_info->state = QEDE_AGG_STATE_ERROR;
796 }
797}
798
799#ifdef CONFIG_INET
800static void qede_gro_ip_csum(struct sk_buff *skb)
801{
802 const struct iphdr *iph = ip_hdr(skb);
803 struct tcphdr *th;
804
805 skb_set_transport_header(skb, sizeof(struct iphdr));
806 th = tcp_hdr(skb);
807
808 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
809 iph->saddr, iph->daddr, 0);
810
811 tcp_gro_complete(skb);
812}
813
814static void qede_gro_ipv6_csum(struct sk_buff *skb)
815{
816 struct ipv6hdr *iph = ipv6_hdr(skb);
817 struct tcphdr *th;
818
819 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
820 th = tcp_hdr(skb);
821
822 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
823 &iph->saddr, &iph->daddr, 0);
824 tcp_gro_complete(skb);
825}
826#endif
827
828static void qede_gro_receive(struct qede_dev *edev,
829 struct qede_fastpath *fp,
830 struct sk_buff *skb,
831 u16 vlan_tag)
832{
833 /* FW can send a single MTU sized packet from gro flow
834 * due to aggregation timeout/last segment etc. which
835 * is not expected to be a gro packet. If a skb has zero
836 * frags then simply push it in the stack as non gso skb.
837 */
838 if (unlikely(!skb->data_len)) {
839 skb_shinfo(skb)->gso_type = 0;
840 skb_shinfo(skb)->gso_size = 0;
841 goto send_skb;
842 }
843
844#ifdef CONFIG_INET
845 if (skb_shinfo(skb)->gso_size) {
846 skb_reset_network_header(skb);
847
848 switch (skb->protocol) {
849 case htons(ETH_P_IP):
850 qede_gro_ip_csum(skb);
851 break;
852 case htons(ETH_P_IPV6):
853 qede_gro_ipv6_csum(skb);
854 break;
855 default:
856 DP_ERR(edev,
857 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
858 ntohs(skb->protocol));
859 }
860 }
861#endif
862
863send_skb:
864 skb_record_rx_queue(skb, fp->rxq->rxq_id);
865 qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
866}
867
868static inline void qede_tpa_cont(struct qede_dev *edev,
869 struct qede_rx_queue *rxq,
870 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
871{
872 int i;
873
874 for (i = 0; cqe->len_list[i]; i++)
875 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
876 le16_to_cpu(cqe->len_list[i]));
877
878 if (unlikely(i > 1))
879 DP_ERR(edev,
880 "Strange - TPA cont with more than a single len_list entry\n");
881}
882
883static void qede_tpa_end(struct qede_dev *edev,
884 struct qede_fastpath *fp,
885 struct eth_fast_path_rx_tpa_end_cqe *cqe)
886{
887 struct qede_rx_queue *rxq = fp->rxq;
888 struct qede_agg_info *tpa_info;
889 struct sk_buff *skb;
890 int i;
891
892 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
893 skb = tpa_info->skb;
894
895 for (i = 0; cqe->len_list[i]; i++)
896 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
897 le16_to_cpu(cqe->len_list[i]));
898 if (unlikely(i > 1))
899 DP_ERR(edev,
900 "Strange - TPA emd with more than a single len_list entry\n");
901
902 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
903 goto err;
904
905 /* Sanity */
906 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
907 DP_ERR(edev,
908 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
909 cqe->num_of_bds, tpa_info->frag_id);
910 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
911 DP_ERR(edev,
912 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
913 le16_to_cpu(cqe->total_packet_len), skb->len);
914
915 memcpy(skb->data,
916 page_address(tpa_info->buffer.data) +
917 tpa_info->start_cqe_placement_offset +
918 tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
919
920 /* Finalize the SKB */
921 skb->protocol = eth_type_trans(skb, edev->ndev);
922 skb->ip_summed = CHECKSUM_UNNECESSARY;
923
924 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
925 * to skb_shinfo(skb)->gso_segs
926 */
927 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
928
929 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
930
931 tpa_info->state = QEDE_AGG_STATE_NONE;
932
933 return;
934err:
935 tpa_info->state = QEDE_AGG_STATE_NONE;
936 dev_kfree_skb_any(tpa_info->skb);
937 tpa_info->skb = NULL;
938}
939
940static u8 qede_check_notunn_csum(u16 flag)
941{
942 u16 csum_flag = 0;
943 u8 csum = 0;
944
945 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
946 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
947 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
948 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
949 csum = QEDE_CSUM_UNNECESSARY;
950 }
951
952 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
953 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
954
955 if (csum_flag & flag)
956 return QEDE_CSUM_ERROR;
957
958 return csum;
959}
960
961static u8 qede_check_csum(u16 flag)
962{
963 if (!qede_tunn_exist(flag))
964 return qede_check_notunn_csum(flag);
965 else
966 return qede_check_tunn_csum(flag);
967}
968
969static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
970 u16 flag)
971{
972 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
973
974 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
975 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
976 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
977 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
978 return true;
979
980 return false;
981}
982
983/* Return true iff packet is to be passed to stack */
984static bool qede_rx_xdp(struct qede_dev *edev,
985 struct qede_fastpath *fp,
986 struct qede_rx_queue *rxq,
987 struct bpf_prog *prog,
988 struct sw_rx_data *bd,
989 struct eth_fast_path_rx_reg_cqe *cqe)
990{
991 u16 len = le16_to_cpu(cqe->len_on_first_bd);
992 struct xdp_buff xdp;
993 enum xdp_action act;
994
995 xdp.data = page_address(bd->data) + cqe->placement_offset;
996 xdp.data_end = xdp.data + len;
997
998 /* Queues always have a full reset currently, so for the time
999 * being until there's atomic program replace just mark read
1000 * side for map helpers.
1001 */
1002 rcu_read_lock();
1003 act = bpf_prog_run_xdp(prog, &xdp);
1004 rcu_read_unlock();
1005
1006 if (act == XDP_PASS)
1007 return true;
1008
1009 /* Count number of packets not to be passed to stack */
1010 rxq->xdp_no_pass++;
1011
1012 switch (act) {
1013 case XDP_TX:
1014 /* We need the replacement buffer before transmit. */
Mintz, Yuvale3eef7e2017-01-01 13:57:04 +02001015 if (qede_alloc_rx_buffer(rxq, true)) {
Mintz, Yuvalcdda9262017-01-01 13:57:01 +02001016 qede_recycle_rx_bd_ring(rxq, 1);
1017 return false;
1018 }
1019
1020 /* Now if there's a transmission problem, we'd still have to
1021 * throw current buffer, as replacement was already allocated.
1022 */
1023 if (qede_xdp_xmit(edev, fp, bd, cqe->placement_offset, len)) {
1024 dma_unmap_page(rxq->dev, bd->mapping,
1025 PAGE_SIZE, DMA_BIDIRECTIONAL);
1026 __free_page(bd->data);
1027 }
1028
1029 /* Regardless, we've consumed an Rx BD */
1030 qede_rx_bd_ring_consume(rxq);
1031 return false;
1032
1033 default:
1034 bpf_warn_invalid_xdp_action(act);
1035 case XDP_ABORTED:
1036 case XDP_DROP:
1037 qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
1038 }
1039
1040 return false;
1041}
1042
1043static struct sk_buff *qede_rx_allocate_skb(struct qede_dev *edev,
1044 struct qede_rx_queue *rxq,
1045 struct sw_rx_data *bd, u16 len,
1046 u16 pad)
1047{
1048 unsigned int offset = bd->page_offset;
1049 struct skb_frag_struct *frag;
1050 struct page *page = bd->data;
1051 unsigned int pull_len;
1052 struct sk_buff *skb;
1053 unsigned char *va;
1054
1055 /* Allocate a new SKB with a sufficient large header len */
1056 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1057 if (unlikely(!skb))
1058 return NULL;
1059
1060 /* Copy data into SKB - if it's small, we can simply copy it and
1061 * re-use the already allcoated & mapped memory.
1062 */
1063 if (len + pad <= edev->rx_copybreak) {
1064 memcpy(skb_put(skb, len),
1065 page_address(page) + pad + offset, len);
1066 qede_reuse_page(rxq, bd);
1067 goto out;
1068 }
1069
1070 frag = &skb_shinfo(skb)->frags[0];
1071
1072 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
1073 page, pad + offset, len, rxq->rx_buf_seg_size);
1074
1075 va = skb_frag_address(frag);
1076 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1077
1078 /* Align the pull_len to optimize memcpy */
1079 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1080
1081 /* Correct the skb & frag sizes offset after the pull */
1082 skb_frag_size_sub(frag, pull_len);
1083 frag->page_offset += pull_len;
1084 skb->data_len -= pull_len;
1085 skb->tail += pull_len;
1086
1087 if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
1088 /* Incr page ref count to reuse on allocation failure so
1089 * that it doesn't get freed while freeing SKB [as its
1090 * already mapped there].
1091 */
1092 page_ref_inc(page);
1093 dev_kfree_skb_any(skb);
1094 return NULL;
1095 }
1096
1097out:
1098 /* We've consumed the first BD and prepared an SKB */
1099 qede_rx_bd_ring_consume(rxq);
1100 return skb;
1101}
1102
1103static int qede_rx_build_jumbo(struct qede_dev *edev,
1104 struct qede_rx_queue *rxq,
1105 struct sk_buff *skb,
1106 struct eth_fast_path_rx_reg_cqe *cqe,
1107 u16 first_bd_len)
1108{
1109 u16 pkt_len = le16_to_cpu(cqe->pkt_len);
1110 struct sw_rx_data *bd;
1111 u16 bd_cons_idx;
1112 u8 num_frags;
1113
1114 pkt_len -= first_bd_len;
1115
1116 /* We've already used one BD for the SKB. Now take care of the rest */
1117 for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
1118 u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
1119 pkt_len;
1120
1121 if (unlikely(!cur_size)) {
1122 DP_ERR(edev,
1123 "Still got %d BDs for mapping jumbo, but length became 0\n",
1124 num_frags);
1125 goto out;
1126 }
1127
1128 /* We need a replacement buffer for each BD */
Mintz, Yuvale3eef7e2017-01-01 13:57:04 +02001129 if (unlikely(qede_alloc_rx_buffer(rxq, true)))
Mintz, Yuvalcdda9262017-01-01 13:57:01 +02001130 goto out;
1131
1132 /* Now that we've allocated the replacement buffer,
1133 * we can safely consume the next BD and map it to the SKB.
1134 */
1135 bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1136 bd = &rxq->sw_rx_ring[bd_cons_idx];
1137 qede_rx_bd_ring_consume(rxq);
1138
1139 dma_unmap_page(rxq->dev, bd->mapping,
1140 PAGE_SIZE, DMA_FROM_DEVICE);
1141
1142 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
1143 bd->data, 0, cur_size);
1144
1145 skb->truesize += PAGE_SIZE;
1146 skb->data_len += cur_size;
1147 skb->len += cur_size;
1148 pkt_len -= cur_size;
1149 }
1150
1151 if (unlikely(pkt_len))
1152 DP_ERR(edev,
1153 "Mapped all BDs of jumbo, but still have %d bytes\n",
1154 pkt_len);
1155
1156out:
1157 return num_frags;
1158}
1159
1160static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
1161 struct qede_fastpath *fp,
1162 struct qede_rx_queue *rxq,
1163 union eth_rx_cqe *cqe,
1164 enum eth_rx_cqe_type type)
1165{
1166 switch (type) {
1167 case ETH_RX_CQE_TYPE_TPA_START:
1168 qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
1169 return 0;
1170 case ETH_RX_CQE_TYPE_TPA_CONT:
1171 qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
1172 return 0;
1173 case ETH_RX_CQE_TYPE_TPA_END:
1174 qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
1175 return 1;
1176 default:
1177 return 0;
1178 }
1179}
1180
1181static int qede_rx_process_cqe(struct qede_dev *edev,
1182 struct qede_fastpath *fp,
1183 struct qede_rx_queue *rxq)
1184{
1185 struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
1186 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1187 u16 len, pad, bd_cons_idx, parse_flag;
1188 enum eth_rx_cqe_type cqe_type;
1189 union eth_rx_cqe *cqe;
1190 struct sw_rx_data *bd;
1191 struct sk_buff *skb;
1192 __le16 flags;
1193 u8 csum_flag;
1194
1195 /* Get the CQE from the completion ring */
1196 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1197 cqe_type = cqe->fast_path_regular.type;
1198
1199 /* Process an unlikely slowpath event */
1200 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1201 struct eth_slow_path_rx_cqe *sp_cqe;
1202
1203 sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
1204 edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
1205 return 0;
1206 }
1207
1208 /* Handle TPA cqes */
1209 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
1210 return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
1211
1212 /* Get the data from the SW ring; Consume it only after it's evident
1213 * we wouldn't recycle it.
1214 */
1215 bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1216 bd = &rxq->sw_rx_ring[bd_cons_idx];
1217
1218 fp_cqe = &cqe->fast_path_regular;
1219 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1220 pad = fp_cqe->placement_offset;
1221
1222 /* Run eBPF program if one is attached */
1223 if (xdp_prog)
1224 if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe))
1225 return 1;
1226
1227 /* If this is an error packet then drop it */
1228 flags = cqe->fast_path_regular.pars_flags.flags;
1229 parse_flag = le16_to_cpu(flags);
1230
1231 csum_flag = qede_check_csum(parse_flag);
1232 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1233 if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag)) {
1234 rxq->rx_ip_frags++;
1235 } else {
1236 DP_NOTICE(edev,
1237 "CQE has error, flags = %x, dropping incoming packet\n",
1238 parse_flag);
1239 rxq->rx_hw_errors++;
1240 qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
1241 return 0;
1242 }
1243 }
1244
1245 /* Basic validation passed; Need to prepare an SKB. This would also
1246 * guarantee to finally consume the first BD upon success.
1247 */
1248 skb = qede_rx_allocate_skb(edev, rxq, bd, len, pad);
1249 if (!skb) {
1250 rxq->rx_alloc_errors++;
1251 qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
1252 return 0;
1253 }
1254
1255 /* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
1256 * by a single cqe.
1257 */
1258 if (fp_cqe->bd_num > 1) {
1259 u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
1260 fp_cqe, len);
1261
1262 if (unlikely(unmapped_frags > 0)) {
1263 qede_recycle_rx_bd_ring(rxq, unmapped_frags);
1264 dev_kfree_skb_any(skb);
1265 return 0;
1266 }
1267 }
1268
1269 /* The SKB contains all the data. Now prepare meta-magic */
1270 skb->protocol = eth_type_trans(skb, edev->ndev);
1271 qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
1272 qede_set_skb_csum(skb, csum_flag);
1273 skb_record_rx_queue(skb, rxq->rxq_id);
1274
1275 /* SKB is prepared - pass it to stack */
1276 qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
1277
1278 return 1;
1279}
1280
1281static int qede_rx_int(struct qede_fastpath *fp, int budget)
1282{
1283 struct qede_rx_queue *rxq = fp->rxq;
1284 struct qede_dev *edev = fp->edev;
1285 u16 hw_comp_cons, sw_comp_cons;
1286 int work_done = 0;
1287
1288 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1289 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1290
1291 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1292 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1293 * read before it is written by FW, then FW writes CQE and SB, and then
1294 * the CPU reads the hw_comp_cons, it will use an old CQE.
1295 */
1296 rmb();
1297
1298 /* Loop to complete all indicated BDs */
1299 while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
1300 qede_rx_process_cqe(edev, fp, rxq);
1301 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1302 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1303 work_done++;
1304 }
1305
Mintz, Yuvale3eef7e2017-01-01 13:57:04 +02001306 /* Allocate replacement buffers */
1307 while (rxq->num_rx_buffers - rxq->filled_buffers)
1308 if (qede_alloc_rx_buffer(rxq, false))
1309 break;
1310
Mintz, Yuvalcdda9262017-01-01 13:57:01 +02001311 /* Update producers */
1312 qede_update_rx_prod(edev, rxq);
1313
1314 return work_done;
1315}
1316
1317static bool qede_poll_is_more_work(struct qede_fastpath *fp)
1318{
1319 qed_sb_update_sb_idx(fp->sb_info);
1320
1321 /* *_has_*_work() reads the status block, thus we need to ensure that
1322 * status block indices have been actually read (qed_sb_update_sb_idx)
1323 * prior to this check (*_has_*_work) so that we won't write the
1324 * "newer" value of the status block to HW (if there was a DMA right
1325 * after qede_has_rx_work and if there is no rmb, the memory reading
1326 * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
1327 * In this case there will never be another interrupt until there is
1328 * another update of the status block, while there is still unhandled
1329 * work.
1330 */
1331 rmb();
1332
1333 if (likely(fp->type & QEDE_FASTPATH_RX))
1334 if (qede_has_rx_work(fp->rxq))
1335 return true;
1336
1337 if (fp->type & QEDE_FASTPATH_XDP)
1338 if (qede_txq_has_work(fp->xdp_tx))
1339 return true;
1340
1341 if (likely(fp->type & QEDE_FASTPATH_TX))
1342 if (qede_txq_has_work(fp->txq))
1343 return true;
1344
1345 return false;
1346}
1347
1348/*********************
1349 * NDO & API related *
1350 *********************/
1351int qede_poll(struct napi_struct *napi, int budget)
1352{
1353 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1354 napi);
1355 struct qede_dev *edev = fp->edev;
1356 int rx_work_done = 0;
1357
1358 if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
1359 qede_tx_int(edev, fp->txq);
1360
1361 if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
1362 qede_xdp_tx_int(edev, fp->xdp_tx);
1363
1364 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1365 qede_has_rx_work(fp->rxq)) ?
1366 qede_rx_int(fp, budget) : 0;
1367 if (rx_work_done < budget) {
1368 if (!qede_poll_is_more_work(fp)) {
1369 napi_complete(napi);
1370
1371 /* Update and reenable interrupts */
1372 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
1373 } else {
1374 rx_work_done = budget;
1375 }
1376 }
1377
1378 if (fp->xdp_xmit) {
1379 u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
1380
1381 fp->xdp_xmit = 0;
1382 fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
1383 qede_update_tx_producer(fp->xdp_tx);
1384 }
1385
1386 return rx_work_done;
1387}
1388
1389irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1390{
1391 struct qede_fastpath *fp = fp_cookie;
1392
1393 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1394
1395 napi_schedule_irqoff(&fp->napi);
1396 return IRQ_HANDLED;
1397}
1398
1399/* Main transmit function */
1400netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1401{
1402 struct qede_dev *edev = netdev_priv(ndev);
1403 struct netdev_queue *netdev_txq;
1404 struct qede_tx_queue *txq;
1405 struct eth_tx_1st_bd *first_bd;
1406 struct eth_tx_2nd_bd *second_bd = NULL;
1407 struct eth_tx_3rd_bd *third_bd = NULL;
1408 struct eth_tx_bd *tx_data_bd = NULL;
1409 u16 txq_index;
1410 u8 nbd = 0;
1411 dma_addr_t mapping;
1412 int rc, frag_idx = 0, ipv6_ext = 0;
1413 u8 xmit_type;
1414 u16 idx;
1415 u16 hlen;
1416 bool data_split = false;
1417
1418 /* Get tx-queue context and netdev index */
1419 txq_index = skb_get_queue_mapping(skb);
1420 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
1421 txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
1422 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
1423
1424 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
1425
1426 xmit_type = qede_xmit_type(skb, &ipv6_ext);
1427
1428#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
1429 if (qede_pkt_req_lin(skb, xmit_type)) {
1430 if (skb_linearize(skb)) {
1431 DP_NOTICE(edev,
1432 "SKB linearization failed - silently dropping this SKB\n");
1433 dev_kfree_skb_any(skb);
1434 return NETDEV_TX_OK;
1435 }
1436 }
1437#endif
1438
1439 /* Fill the entry in the SW ring and the BDs in the FW ring */
1440 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
1441 txq->sw_tx_ring.skbs[idx].skb = skb;
1442 first_bd = (struct eth_tx_1st_bd *)
1443 qed_chain_produce(&txq->tx_pbl);
1444 memset(first_bd, 0, sizeof(*first_bd));
1445 first_bd->data.bd_flags.bitfields =
1446 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1447
1448 /* Map skb linear data for DMA and set in the first BD */
1449 mapping = dma_map_single(txq->dev, skb->data,
1450 skb_headlen(skb), DMA_TO_DEVICE);
1451 if (unlikely(dma_mapping_error(txq->dev, mapping))) {
1452 DP_NOTICE(edev, "SKB mapping failed\n");
1453 qede_free_failed_tx_pkt(txq, first_bd, 0, false);
1454 qede_update_tx_producer(txq);
1455 return NETDEV_TX_OK;
1456 }
1457 nbd++;
1458 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1459
1460 /* In case there is IPv6 with extension headers or LSO we need 2nd and
1461 * 3rd BDs.
1462 */
1463 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
1464 second_bd = (struct eth_tx_2nd_bd *)
1465 qed_chain_produce(&txq->tx_pbl);
1466 memset(second_bd, 0, sizeof(*second_bd));
1467
1468 nbd++;
1469 third_bd = (struct eth_tx_3rd_bd *)
1470 qed_chain_produce(&txq->tx_pbl);
1471 memset(third_bd, 0, sizeof(*third_bd));
1472
1473 nbd++;
1474 /* We need to fill in additional data in second_bd... */
1475 tx_data_bd = (struct eth_tx_bd *)second_bd;
1476 }
1477
1478 if (skb_vlan_tag_present(skb)) {
1479 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
1480 first_bd->data.bd_flags.bitfields |=
1481 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
1482 }
1483
1484 /* Fill the parsing flags & params according to the requested offload */
1485 if (xmit_type & XMIT_L4_CSUM) {
1486 /* We don't re-calculate IP checksum as it is already done by
1487 * the upper stack
1488 */
1489 first_bd->data.bd_flags.bitfields |=
1490 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
1491
1492 if (xmit_type & XMIT_ENC) {
1493 first_bd->data.bd_flags.bitfields |=
1494 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1495 first_bd->data.bitfields |=
1496 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
1497 }
1498
1499 /* Legacy FW had flipped behavior in regard to this bit -
1500 * I.e., needed to set to prevent FW from touching encapsulated
1501 * packets when it didn't need to.
1502 */
1503 if (unlikely(txq->is_legacy))
1504 first_bd->data.bitfields ^=
1505 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
1506
1507 /* If the packet is IPv6 with extension header, indicate that
1508 * to FW and pass few params, since the device cracker doesn't
1509 * support parsing IPv6 with extension header/s.
1510 */
1511 if (unlikely(ipv6_ext))
1512 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
1513 }
1514
1515 if (xmit_type & XMIT_LSO) {
1516 first_bd->data.bd_flags.bitfields |=
1517 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
1518 third_bd->data.lso_mss =
1519 cpu_to_le16(skb_shinfo(skb)->gso_size);
1520
1521 if (unlikely(xmit_type & XMIT_ENC)) {
1522 first_bd->data.bd_flags.bitfields |=
1523 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
1524
1525 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
1526 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
1527
1528 first_bd->data.bd_flags.bitfields |= 1 << tmp;
1529 }
1530 hlen = qede_get_skb_hlen(skb, true);
1531 } else {
1532 first_bd->data.bd_flags.bitfields |=
1533 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1534 hlen = qede_get_skb_hlen(skb, false);
1535 }
1536
1537 /* @@@TBD - if will not be removed need to check */
1538 third_bd->data.bitfields |=
1539 cpu_to_le16(1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
1540
1541 /* Make life easier for FW guys who can't deal with header and
1542 * data on same BD. If we need to split, use the second bd...
1543 */
1544 if (unlikely(skb_headlen(skb) > hlen)) {
1545 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1546 "TSO split header size is %d (%x:%x)\n",
1547 first_bd->nbytes, first_bd->addr.hi,
1548 first_bd->addr.lo);
1549
1550 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
1551 le32_to_cpu(first_bd->addr.lo)) +
1552 hlen;
1553
1554 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
1555 le16_to_cpu(first_bd->nbytes) -
1556 hlen);
1557
1558 /* this marks the BD as one that has no
1559 * individual mapping
1560 */
1561 txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
1562
1563 first_bd->nbytes = cpu_to_le16(hlen);
1564
1565 tx_data_bd = (struct eth_tx_bd *)third_bd;
1566 data_split = true;
1567 }
1568 } else {
1569 first_bd->data.bitfields |=
1570 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
1571 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1572 }
1573
1574 /* Handle fragmented skb */
1575 /* special handle for frags inside 2nd and 3rd bds.. */
1576 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
1577 rc = map_frag_to_bd(txq,
1578 &skb_shinfo(skb)->frags[frag_idx],
1579 tx_data_bd);
1580 if (rc) {
1581 qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
1582 qede_update_tx_producer(txq);
1583 return NETDEV_TX_OK;
1584 }
1585
1586 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
1587 tx_data_bd = (struct eth_tx_bd *)third_bd;
1588 else
1589 tx_data_bd = NULL;
1590
1591 frag_idx++;
1592 }
1593
1594 /* map last frags into 4th, 5th .... */
1595 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
1596 tx_data_bd = (struct eth_tx_bd *)
1597 qed_chain_produce(&txq->tx_pbl);
1598
1599 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
1600
1601 rc = map_frag_to_bd(txq,
1602 &skb_shinfo(skb)->frags[frag_idx],
1603 tx_data_bd);
1604 if (rc) {
1605 qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
1606 qede_update_tx_producer(txq);
1607 return NETDEV_TX_OK;
1608 }
1609 }
1610
1611 /* update the first BD with the actual num BDs */
1612 first_bd->data.nbds = nbd;
1613
1614 netdev_tx_sent_queue(netdev_txq, skb->len);
1615
1616 skb_tx_timestamp(skb);
1617
1618 /* Advance packet producer only before sending the packet since mapping
1619 * of pages may fail.
1620 */
1621 txq->sw_tx_prod++;
1622
1623 /* 'next page' entries are counted in the producer value */
1624 txq->tx_db.data.bd_prod =
1625 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
1626
1627 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
1628 qede_update_tx_producer(txq);
1629
1630 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
1631 < (MAX_SKB_FRAGS + 1))) {
1632 if (skb->xmit_more)
1633 qede_update_tx_producer(txq);
1634
1635 netif_tx_stop_queue(netdev_txq);
1636 txq->stopped_cnt++;
1637 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1638 "Stop queue was called\n");
1639 /* paired memory barrier is in qede_tx_int(), we have to keep
1640 * ordering of set_bit() in netif_tx_stop_queue() and read of
1641 * fp->bd_tx_cons
1642 */
1643 smp_mb();
1644
1645 if ((qed_chain_get_elem_left(&txq->tx_pbl) >=
1646 (MAX_SKB_FRAGS + 1)) &&
1647 (edev->state == QEDE_STATE_OPEN)) {
1648 netif_tx_wake_queue(netdev_txq);
1649 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
1650 "Wake queue was called\n");
1651 }
1652 }
1653
1654 return NETDEV_TX_OK;
1655}
1656
1657/* 8B udp header + 8B base tunnel header + 32B option length */
1658#define QEDE_MAX_TUN_HDR_LEN 48
1659
1660netdev_features_t qede_features_check(struct sk_buff *skb,
1661 struct net_device *dev,
1662 netdev_features_t features)
1663{
1664 if (skb->encapsulation) {
1665 u8 l4_proto = 0;
1666
1667 switch (vlan_get_protocol(skb)) {
1668 case htons(ETH_P_IP):
1669 l4_proto = ip_hdr(skb)->protocol;
1670 break;
1671 case htons(ETH_P_IPV6):
1672 l4_proto = ipv6_hdr(skb)->nexthdr;
1673 break;
1674 default:
1675 return features;
1676 }
1677
1678 /* Disable offloads for geneve tunnels, as HW can't parse
1679 * the geneve header which has option length greater than 32B.
1680 */
1681 if ((l4_proto == IPPROTO_UDP) &&
1682 ((skb_inner_mac_header(skb) -
1683 skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
1684 return features & ~(NETIF_F_CSUM_MASK |
1685 NETIF_F_GSO_MASK);
1686 }
1687
1688 return features;
1689}