Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Robert P. J. Day | 96532ba | 2008-02-03 15:06:26 +0200 | [diff] [blame] | 2 | #ifndef _LINUX_DMA_MAPPING_H |
| 3 | #define _LINUX_DMA_MAPPING_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 5 | #include <linux/sizes.h> |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 6 | #include <linux/string.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | #include <linux/device.h> |
| 8 | #include <linux/err.h> |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 9 | #include <linux/dma-debug.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 10 | #include <linux/dma-direction.h> |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 11 | #include <linux/scatterlist.h> |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 12 | #include <linux/bug.h> |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 13 | #include <linux/mem_encrypt.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 15 | /** |
| 16 | * List of possible attributes associated with a DMA mapping. The semantics |
| 17 | * of each attribute should be defined in Documentation/DMA-attributes.txt. |
| 18 | * |
| 19 | * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute |
| 20 | * forces all pending DMA writes to complete. |
| 21 | */ |
| 22 | #define DMA_ATTR_WRITE_BARRIER (1UL << 0) |
| 23 | /* |
| 24 | * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping |
| 25 | * may be weakly ordered, that is that reads and writes may pass each other. |
| 26 | */ |
| 27 | #define DMA_ATTR_WEAK_ORDERING (1UL << 1) |
| 28 | /* |
| 29 | * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be |
| 30 | * buffered to improve performance. |
| 31 | */ |
| 32 | #define DMA_ATTR_WRITE_COMBINE (1UL << 2) |
| 33 | /* |
| 34 | * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either |
| 35 | * consistent or non-consistent memory as it sees fit. |
| 36 | */ |
| 37 | #define DMA_ATTR_NON_CONSISTENT (1UL << 3) |
| 38 | /* |
| 39 | * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel |
| 40 | * virtual mapping for the allocated buffer. |
| 41 | */ |
| 42 | #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) |
| 43 | /* |
| 44 | * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of |
| 45 | * the CPU cache for the given buffer assuming that it has been already |
| 46 | * transferred to 'device' domain. |
| 47 | */ |
| 48 | #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) |
| 49 | /* |
| 50 | * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer |
| 51 | * in physical memory. |
| 52 | */ |
| 53 | #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) |
| 54 | /* |
| 55 | * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem |
| 56 | * that it's probably not worth the time to try to allocate memory to in a way |
| 57 | * that gives better TLB efficiency. |
| 58 | */ |
| 59 | #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) |
Mauricio Faria de Oliveira | a9a62c9 | 2016-10-11 13:54:14 -0700 | [diff] [blame] | 60 | /* |
| 61 | * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress |
| 62 | * allocation failure reports (similarly to __GFP_NOWARN). |
| 63 | */ |
| 64 | #define DMA_ATTR_NO_WARN (1UL << 8) |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 65 | |
Bjorn Helgaas | 77f2ea2 | 2014-04-30 11:20:53 -0600 | [diff] [blame] | 66 | /* |
Mitchel Humpherys | b2fb366 | 2017-01-06 18:58:11 +0530 | [diff] [blame] | 67 | * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully |
| 68 | * accessible at an elevated privilege level (and ideally inaccessible or |
| 69 | * at least read-only at lesser-privileged levels). |
| 70 | */ |
| 71 | #define DMA_ATTR_PRIVILEGED (1UL << 9) |
| 72 | |
| 73 | /* |
Bjorn Helgaas | 77f2ea2 | 2014-04-30 11:20:53 -0600 | [diff] [blame] | 74 | * A dma_addr_t can hold any valid DMA or bus address for the platform. |
| 75 | * It can be given to a device to use as a DMA source or target. A CPU cannot |
| 76 | * reference a dma_addr_t directly because there may be translation between |
| 77 | * its physical address space and the bus address space. |
| 78 | */ |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 79 | struct dma_map_ops { |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 80 | void* (*alloc)(struct device *dev, size_t size, |
| 81 | dma_addr_t *dma_handle, gfp_t gfp, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 82 | unsigned long attrs); |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 83 | void (*free)(struct device *dev, size_t size, |
| 84 | void *vaddr, dma_addr_t dma_handle, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 85 | unsigned long attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 86 | int (*mmap)(struct device *, struct vm_area_struct *, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 87 | void *, dma_addr_t, size_t, |
| 88 | unsigned long attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 89 | |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 90 | int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 91 | dma_addr_t, size_t, unsigned long attrs); |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 92 | |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 93 | dma_addr_t (*map_page)(struct device *dev, struct page *page, |
| 94 | unsigned long offset, size_t size, |
| 95 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 96 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 97 | void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, |
| 98 | size_t size, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 99 | unsigned long attrs); |
Ricardo Ribalda Delgado | 04abab6 | 2015-02-11 13:53:15 +0100 | [diff] [blame] | 100 | /* |
| 101 | * map_sg returns 0 on error and a value > 0 on success. |
| 102 | * It should never return a value < 0. |
| 103 | */ |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 104 | int (*map_sg)(struct device *dev, struct scatterlist *sg, |
| 105 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 106 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 107 | void (*unmap_sg)(struct device *dev, |
| 108 | struct scatterlist *sg, int nents, |
| 109 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 110 | unsigned long attrs); |
Niklas Söderlund | ba409b3 | 2016-08-10 13:22:14 +0200 | [diff] [blame] | 111 | dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, |
| 112 | size_t size, enum dma_data_direction dir, |
| 113 | unsigned long attrs); |
| 114 | void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, |
| 115 | size_t size, enum dma_data_direction dir, |
| 116 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 117 | void (*sync_single_for_cpu)(struct device *dev, |
| 118 | dma_addr_t dma_handle, size_t size, |
| 119 | enum dma_data_direction dir); |
| 120 | void (*sync_single_for_device)(struct device *dev, |
| 121 | dma_addr_t dma_handle, size_t size, |
| 122 | enum dma_data_direction dir); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 123 | void (*sync_sg_for_cpu)(struct device *dev, |
| 124 | struct scatterlist *sg, int nents, |
| 125 | enum dma_data_direction dir); |
| 126 | void (*sync_sg_for_device)(struct device *dev, |
| 127 | struct scatterlist *sg, int nents, |
| 128 | enum dma_data_direction dir); |
Christoph Hellwig | c9eb617 | 2017-08-27 10:37:15 +0200 | [diff] [blame] | 129 | void (*cache_sync)(struct device *dev, void *vaddr, size_t size, |
| 130 | enum dma_data_direction direction); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 131 | int (*dma_supported)(struct device *dev, u64 mask); |
Milton Miller | 3a8f755 | 2011-06-24 09:05:23 +0000 | [diff] [blame] | 132 | u64 (*get_required_mask)(struct device *dev); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 133 | }; |
| 134 | |
Christoph Hellwig | 42ee3ca | 2018-11-21 18:52:35 +0100 | [diff] [blame] | 135 | #define DMA_MAPPING_ERROR (~(dma_addr_t)0) |
| 136 | |
Bart Van Assche | 551199a | 2017-01-20 13:04:07 -0800 | [diff] [blame] | 137 | extern const struct dma_map_ops dma_virt_ops; |
Robin Murphy | 90ac706 | 2018-12-06 13:14:44 -0800 | [diff] [blame] | 138 | extern const struct dma_map_ops dma_dummy_ops; |
Christian Borntraeger | a8463d4 | 2016-02-02 21:46:32 -0800 | [diff] [blame] | 139 | |
Andrew Morton | 8f286c3 | 2007-10-18 03:05:07 -0700 | [diff] [blame] | 140 | #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) |
Borislav Petkov | 34c6538 | 2007-10-18 03:05:06 -0700 | [diff] [blame] | 141 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 142 | #define DMA_MASK_NONE 0x0ULL |
| 143 | |
Rolf Eike Beer | d6bd3a3 | 2006-09-29 01:59:48 -0700 | [diff] [blame] | 144 | static inline int valid_dma_direction(int dma_direction) |
| 145 | { |
| 146 | return ((dma_direction == DMA_BIDIRECTIONAL) || |
| 147 | (dma_direction == DMA_TO_DEVICE) || |
| 148 | (dma_direction == DMA_FROM_DEVICE)); |
| 149 | } |
| 150 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 151 | static inline int is_device_dma_capable(struct device *dev) |
| 152 | { |
| 153 | return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; |
| 154 | } |
| 155 | |
Christoph Hellwig | ff4c25f | 2019-02-03 20:12:02 +0100 | [diff] [blame] | 156 | #ifdef CONFIG_DMA_DECLARE_COHERENT |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 157 | /* |
| 158 | * These three functions are only for dma allocator. |
| 159 | * Don't use them in device drivers. |
| 160 | */ |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 161 | int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 162 | dma_addr_t *dma_handle, void **ret); |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 163 | int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 164 | |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 165 | int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 166 | void *cpu_addr, size_t size, int *ret); |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 167 | |
| 168 | void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle); |
| 169 | int dma_release_from_global_coherent(int order, void *vaddr); |
| 170 | int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, |
| 171 | size_t size, int *ret); |
| 172 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 173 | #else |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 174 | #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) |
| 175 | #define dma_release_from_dev_coherent(dev, order, vaddr) (0) |
| 176 | #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) |
| 177 | |
| 178 | static inline void *dma_alloc_from_global_coherent(ssize_t size, |
| 179 | dma_addr_t *dma_handle) |
| 180 | { |
| 181 | return NULL; |
| 182 | } |
| 183 | |
| 184 | static inline int dma_release_from_global_coherent(int order, void *vaddr) |
| 185 | { |
| 186 | return 0; |
| 187 | } |
| 188 | |
| 189 | static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, |
| 190 | void *cpu_addr, size_t size, |
| 191 | int *ret) |
| 192 | { |
| 193 | return 0; |
| 194 | } |
Christoph Hellwig | ff4c25f | 2019-02-03 20:12:02 +0100 | [diff] [blame] | 195 | #endif /* CONFIG_DMA_DECLARE_COHERENT */ |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 196 | |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 197 | static inline bool dma_is_direct(const struct dma_map_ops *ops) |
| 198 | { |
| 199 | return likely(!ops); |
| 200 | } |
| 201 | |
| 202 | /* |
| 203 | * All the dma_direct_* declarations are here just for the indirect call bypass, |
| 204 | * and must not be used directly drivers! |
| 205 | */ |
| 206 | dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, |
| 207 | unsigned long offset, size_t size, enum dma_data_direction dir, |
| 208 | unsigned long attrs); |
| 209 | int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, |
| 210 | enum dma_data_direction dir, unsigned long attrs); |
Christoph Hellwig | cfced78 | 2019-01-04 18:20:05 +0100 | [diff] [blame] | 211 | dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr, |
| 212 | size_t size, enum dma_data_direction dir, unsigned long attrs); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 213 | |
| 214 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ |
| 215 | defined(CONFIG_SWIOTLB) |
| 216 | void dma_direct_sync_single_for_device(struct device *dev, |
| 217 | dma_addr_t addr, size_t size, enum dma_data_direction dir); |
| 218 | void dma_direct_sync_sg_for_device(struct device *dev, |
| 219 | struct scatterlist *sgl, int nents, enum dma_data_direction dir); |
| 220 | #else |
| 221 | static inline void dma_direct_sync_single_for_device(struct device *dev, |
| 222 | dma_addr_t addr, size_t size, enum dma_data_direction dir) |
| 223 | { |
| 224 | } |
| 225 | static inline void dma_direct_sync_sg_for_device(struct device *dev, |
| 226 | struct scatterlist *sgl, int nents, enum dma_data_direction dir) |
| 227 | { |
| 228 | } |
| 229 | #endif |
| 230 | |
| 231 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ |
| 232 | defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \ |
| 233 | defined(CONFIG_SWIOTLB) |
| 234 | void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, |
| 235 | size_t size, enum dma_data_direction dir, unsigned long attrs); |
| 236 | void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl, |
| 237 | int nents, enum dma_data_direction dir, unsigned long attrs); |
| 238 | void dma_direct_sync_single_for_cpu(struct device *dev, |
| 239 | dma_addr_t addr, size_t size, enum dma_data_direction dir); |
| 240 | void dma_direct_sync_sg_for_cpu(struct device *dev, |
| 241 | struct scatterlist *sgl, int nents, enum dma_data_direction dir); |
| 242 | #else |
| 243 | static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, |
| 244 | size_t size, enum dma_data_direction dir, unsigned long attrs) |
| 245 | { |
| 246 | } |
| 247 | static inline void dma_direct_unmap_sg(struct device *dev, |
| 248 | struct scatterlist *sgl, int nents, enum dma_data_direction dir, |
| 249 | unsigned long attrs) |
| 250 | { |
| 251 | } |
| 252 | static inline void dma_direct_sync_single_for_cpu(struct device *dev, |
| 253 | dma_addr_t addr, size_t size, enum dma_data_direction dir) |
| 254 | { |
| 255 | } |
| 256 | static inline void dma_direct_sync_sg_for_cpu(struct device *dev, |
| 257 | struct scatterlist *sgl, int nents, enum dma_data_direction dir) |
| 258 | { |
| 259 | } |
| 260 | #endif |
| 261 | |
Christoph Hellwig | ed6ccf1 | 2018-12-26 07:52:13 +0100 | [diff] [blame] | 262 | #ifdef CONFIG_HAS_DMA |
| 263 | #include <asm/dma-mapping.h> |
| 264 | |
| 265 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
| 266 | { |
| 267 | if (dev && dev->dma_ops) |
| 268 | return dev->dma_ops; |
| 269 | return get_arch_dma_ops(dev ? dev->bus : NULL); |
| 270 | } |
| 271 | |
| 272 | static inline void set_dma_ops(struct device *dev, |
| 273 | const struct dma_map_ops *dma_ops) |
| 274 | { |
| 275 | dev->dma_ops = dma_ops; |
| 276 | } |
| 277 | |
Christoph Hellwig | 2e05ea5 | 2018-12-25 08:50:35 +0100 | [diff] [blame] | 278 | static inline dma_addr_t dma_map_page_attrs(struct device *dev, |
| 279 | struct page *page, size_t offset, size_t size, |
| 280 | enum dma_data_direction dir, unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 281 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 282 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 283 | dma_addr_t addr; |
| 284 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 285 | BUG_ON(!valid_dma_direction(dir)); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 286 | if (dma_is_direct(ops)) |
Christoph Hellwig | 2e05ea5 | 2018-12-25 08:50:35 +0100 | [diff] [blame] | 287 | addr = dma_direct_map_page(dev, page, offset, size, dir, attrs); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 288 | else |
Christoph Hellwig | 2e05ea5 | 2018-12-25 08:50:35 +0100 | [diff] [blame] | 289 | addr = ops->map_page(dev, page, offset, size, dir, attrs); |
| 290 | debug_dma_map_page(dev, page, offset, size, dir, addr); |
| 291 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 292 | return addr; |
| 293 | } |
| 294 | |
Christoph Hellwig | 2e05ea5 | 2018-12-25 08:50:35 +0100 | [diff] [blame] | 295 | static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, |
| 296 | size_t size, enum dma_data_direction dir, unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 297 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 298 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 299 | |
| 300 | BUG_ON(!valid_dma_direction(dir)); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 301 | if (dma_is_direct(ops)) |
| 302 | dma_direct_unmap_page(dev, addr, size, dir, attrs); |
| 303 | else if (ops->unmap_page) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 304 | ops->unmap_page(dev, addr, size, dir, attrs); |
Christoph Hellwig | 2e05ea5 | 2018-12-25 08:50:35 +0100 | [diff] [blame] | 305 | debug_dma_unmap_page(dev, addr, size, dir); |
Christoph Hellwig | 7f0fee2 | 2018-12-06 12:24:27 -0800 | [diff] [blame] | 306 | } |
| 307 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 308 | /* |
| 309 | * dma_maps_sg_attrs returns 0 on error and > 0 on success. |
| 310 | * It should never return a value < 0. |
| 311 | */ |
| 312 | static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 313 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 314 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 315 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 316 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Levin, Alexander (Sasha Levin) | 4950276 | 2017-11-15 17:35:51 -0800 | [diff] [blame] | 317 | int ents; |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 318 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 319 | BUG_ON(!valid_dma_direction(dir)); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 320 | if (dma_is_direct(ops)) |
| 321 | ents = dma_direct_map_sg(dev, sg, nents, dir, attrs); |
| 322 | else |
| 323 | ents = ops->map_sg(dev, sg, nents, dir, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 324 | BUG_ON(ents < 0); |
| 325 | debug_dma_map_sg(dev, sg, nents, ents, dir); |
| 326 | |
| 327 | return ents; |
| 328 | } |
| 329 | |
| 330 | static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 331 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 332 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 333 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 334 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 335 | |
| 336 | BUG_ON(!valid_dma_direction(dir)); |
| 337 | debug_dma_unmap_sg(dev, sg, nents, dir); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 338 | if (dma_is_direct(ops)) |
| 339 | dma_direct_unmap_sg(dev, sg, nents, dir, attrs); |
| 340 | else if (ops->unmap_sg) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 341 | ops->unmap_sg(dev, sg, nents, dir, attrs); |
| 342 | } |
| 343 | |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 344 | static inline dma_addr_t dma_map_resource(struct device *dev, |
| 345 | phys_addr_t phys_addr, |
| 346 | size_t size, |
| 347 | enum dma_data_direction dir, |
| 348 | unsigned long attrs) |
| 349 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 350 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | cfced78 | 2019-01-04 18:20:05 +0100 | [diff] [blame] | 351 | dma_addr_t addr = DMA_MAPPING_ERROR; |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 352 | |
| 353 | BUG_ON(!valid_dma_direction(dir)); |
| 354 | |
| 355 | /* Don't allow RAM to be mapped */ |
Christoph Hellwig | 645386d | 2019-01-04 17:17:53 +0100 | [diff] [blame] | 356 | if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr)))) |
| 357 | return DMA_MAPPING_ERROR; |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 358 | |
Christoph Hellwig | cfced78 | 2019-01-04 18:20:05 +0100 | [diff] [blame] | 359 | if (dma_is_direct(ops)) |
| 360 | addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs); |
| 361 | else if (ops->map_resource) |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 362 | addr = ops->map_resource(dev, phys_addr, size, dir, attrs); |
| 363 | |
| 364 | debug_dma_map_resource(dev, phys_addr, size, dir, addr); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 365 | return addr; |
| 366 | } |
| 367 | |
| 368 | static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, |
| 369 | size_t size, enum dma_data_direction dir, |
| 370 | unsigned long attrs) |
| 371 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 372 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 373 | |
| 374 | BUG_ON(!valid_dma_direction(dir)); |
Christoph Hellwig | cfced78 | 2019-01-04 18:20:05 +0100 | [diff] [blame] | 375 | if (!dma_is_direct(ops) && ops->unmap_resource) |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 376 | ops->unmap_resource(dev, addr, size, dir, attrs); |
| 377 | debug_dma_unmap_resource(dev, addr, size, dir); |
| 378 | } |
| 379 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 380 | static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, |
| 381 | size_t size, |
| 382 | enum dma_data_direction dir) |
| 383 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 384 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 385 | |
| 386 | BUG_ON(!valid_dma_direction(dir)); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 387 | if (dma_is_direct(ops)) |
| 388 | dma_direct_sync_single_for_cpu(dev, addr, size, dir); |
| 389 | else if (ops->sync_single_for_cpu) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 390 | ops->sync_single_for_cpu(dev, addr, size, dir); |
| 391 | debug_dma_sync_single_for_cpu(dev, addr, size, dir); |
| 392 | } |
| 393 | |
| 394 | static inline void dma_sync_single_for_device(struct device *dev, |
| 395 | dma_addr_t addr, size_t size, |
| 396 | enum dma_data_direction dir) |
| 397 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 398 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 399 | |
| 400 | BUG_ON(!valid_dma_direction(dir)); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 401 | if (dma_is_direct(ops)) |
| 402 | dma_direct_sync_single_for_device(dev, addr, size, dir); |
| 403 | else if (ops->sync_single_for_device) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 404 | ops->sync_single_for_device(dev, addr, size, dir); |
| 405 | debug_dma_sync_single_for_device(dev, addr, size, dir); |
| 406 | } |
| 407 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 408 | static inline void |
| 409 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
| 410 | int nelems, enum dma_data_direction dir) |
| 411 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 412 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 413 | |
| 414 | BUG_ON(!valid_dma_direction(dir)); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 415 | if (dma_is_direct(ops)) |
| 416 | dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir); |
| 417 | else if (ops->sync_sg_for_cpu) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 418 | ops->sync_sg_for_cpu(dev, sg, nelems, dir); |
| 419 | debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); |
| 420 | } |
| 421 | |
| 422 | static inline void |
| 423 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
| 424 | int nelems, enum dma_data_direction dir) |
| 425 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 426 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 427 | |
| 428 | BUG_ON(!valid_dma_direction(dir)); |
Christoph Hellwig | 356da6d | 2018-12-06 13:39:32 -0800 | [diff] [blame] | 429 | if (dma_is_direct(ops)) |
| 430 | dma_direct_sync_sg_for_device(dev, sg, nelems, dir); |
| 431 | else if (ops->sync_sg_for_device) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 432 | ops->sync_sg_for_device(dev, sg, nelems, dir); |
| 433 | debug_dma_sync_sg_for_device(dev, sg, nelems, dir); |
| 434 | |
| 435 | } |
| 436 | |
Christoph Hellwig | ed6ccf1 | 2018-12-26 07:52:13 +0100 | [diff] [blame] | 437 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
| 438 | { |
| 439 | debug_dma_mapping_error(dev, dma_addr); |
| 440 | |
| 441 | if (dma_addr == DMA_MAPPING_ERROR) |
| 442 | return -ENOMEM; |
| 443 | return 0; |
| 444 | } |
| 445 | |
| 446 | void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, |
| 447 | gfp_t flag, unsigned long attrs); |
| 448 | void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, |
| 449 | dma_addr_t dma_handle, unsigned long attrs); |
| 450 | void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, |
| 451 | gfp_t gfp, unsigned long attrs); |
| 452 | void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, |
| 453 | dma_addr_t dma_handle); |
| 454 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
| 455 | enum dma_data_direction dir); |
| 456 | int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, |
| 457 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 458 | unsigned long attrs); |
| 459 | int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, |
| 460 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 461 | unsigned long attrs); |
| 462 | int dma_supported(struct device *dev, u64 mask); |
| 463 | int dma_set_mask(struct device *dev, u64 mask); |
| 464 | int dma_set_coherent_mask(struct device *dev, u64 mask); |
| 465 | u64 dma_get_required_mask(struct device *dev); |
| 466 | #else /* CONFIG_HAS_DMA */ |
| 467 | static inline dma_addr_t dma_map_page_attrs(struct device *dev, |
| 468 | struct page *page, size_t offset, size_t size, |
| 469 | enum dma_data_direction dir, unsigned long attrs) |
| 470 | { |
| 471 | return DMA_MAPPING_ERROR; |
| 472 | } |
| 473 | static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, |
| 474 | size_t size, enum dma_data_direction dir, unsigned long attrs) |
| 475 | { |
| 476 | } |
| 477 | static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 478 | int nents, enum dma_data_direction dir, unsigned long attrs) |
| 479 | { |
| 480 | return 0; |
| 481 | } |
| 482 | static inline void dma_unmap_sg_attrs(struct device *dev, |
| 483 | struct scatterlist *sg, int nents, enum dma_data_direction dir, |
| 484 | unsigned long attrs) |
| 485 | { |
| 486 | } |
| 487 | static inline dma_addr_t dma_map_resource(struct device *dev, |
| 488 | phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, |
| 489 | unsigned long attrs) |
| 490 | { |
| 491 | return DMA_MAPPING_ERROR; |
| 492 | } |
| 493 | static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, |
| 494 | size_t size, enum dma_data_direction dir, unsigned long attrs) |
| 495 | { |
| 496 | } |
| 497 | static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, |
| 498 | size_t size, enum dma_data_direction dir) |
| 499 | { |
| 500 | } |
| 501 | static inline void dma_sync_single_for_device(struct device *dev, |
| 502 | dma_addr_t addr, size_t size, enum dma_data_direction dir) |
| 503 | { |
| 504 | } |
| 505 | static inline void dma_sync_sg_for_cpu(struct device *dev, |
| 506 | struct scatterlist *sg, int nelems, enum dma_data_direction dir) |
| 507 | { |
| 508 | } |
| 509 | static inline void dma_sync_sg_for_device(struct device *dev, |
| 510 | struct scatterlist *sg, int nelems, enum dma_data_direction dir) |
| 511 | { |
| 512 | } |
| 513 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
| 514 | { |
| 515 | return -ENOMEM; |
| 516 | } |
| 517 | static inline void *dma_alloc_attrs(struct device *dev, size_t size, |
| 518 | dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs) |
| 519 | { |
| 520 | return NULL; |
| 521 | } |
| 522 | static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, |
| 523 | dma_addr_t dma_handle, unsigned long attrs) |
| 524 | { |
| 525 | } |
| 526 | static inline void *dmam_alloc_attrs(struct device *dev, size_t size, |
| 527 | dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) |
| 528 | { |
| 529 | return NULL; |
| 530 | } |
| 531 | static inline void dmam_free_coherent(struct device *dev, size_t size, |
| 532 | void *vaddr, dma_addr_t dma_handle) |
| 533 | { |
| 534 | } |
| 535 | static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
| 536 | enum dma_data_direction dir) |
| 537 | { |
| 538 | } |
| 539 | static inline int dma_get_sgtable_attrs(struct device *dev, |
| 540 | struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, |
| 541 | size_t size, unsigned long attrs) |
| 542 | { |
| 543 | return -ENXIO; |
| 544 | } |
| 545 | static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, |
| 546 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 547 | unsigned long attrs) |
| 548 | { |
| 549 | return -ENXIO; |
| 550 | } |
| 551 | static inline int dma_supported(struct device *dev, u64 mask) |
| 552 | { |
| 553 | return 0; |
| 554 | } |
| 555 | static inline int dma_set_mask(struct device *dev, u64 mask) |
| 556 | { |
| 557 | return -EIO; |
| 558 | } |
| 559 | static inline int dma_set_coherent_mask(struct device *dev, u64 mask) |
| 560 | { |
| 561 | return -EIO; |
| 562 | } |
| 563 | static inline u64 dma_get_required_mask(struct device *dev) |
| 564 | { |
| 565 | return 0; |
| 566 | } |
| 567 | #endif /* CONFIG_HAS_DMA */ |
| 568 | |
Christoph Hellwig | 2e05ea5 | 2018-12-25 08:50:35 +0100 | [diff] [blame] | 569 | static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, |
| 570 | size_t size, enum dma_data_direction dir, unsigned long attrs) |
| 571 | { |
| 572 | debug_dma_map_single(dev, ptr, size); |
| 573 | return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), |
| 574 | size, dir, attrs); |
| 575 | } |
| 576 | |
| 577 | static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, |
| 578 | size_t size, enum dma_data_direction dir, unsigned long attrs) |
| 579 | { |
| 580 | return dma_unmap_page_attrs(dev, addr, size, dir, attrs); |
| 581 | } |
| 582 | |
Christoph Hellwig | ed6ccf1 | 2018-12-26 07:52:13 +0100 | [diff] [blame] | 583 | static inline void dma_sync_single_range_for_cpu(struct device *dev, |
| 584 | dma_addr_t addr, unsigned long offset, size_t size, |
| 585 | enum dma_data_direction dir) |
| 586 | { |
| 587 | return dma_sync_single_for_cpu(dev, addr + offset, size, dir); |
| 588 | } |
| 589 | |
| 590 | static inline void dma_sync_single_range_for_device(struct device *dev, |
| 591 | dma_addr_t addr, unsigned long offset, size_t size, |
| 592 | enum dma_data_direction dir) |
| 593 | { |
| 594 | return dma_sync_single_for_device(dev, addr + offset, size, dir); |
| 595 | } |
| 596 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 597 | #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) |
| 598 | #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) |
| 599 | #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) |
| 600 | #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 601 | #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) |
| 602 | #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) |
Christoph Hellwig | ed6ccf1 | 2018-12-26 07:52:13 +0100 | [diff] [blame] | 603 | #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) |
| 604 | #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) |
Christoph Hellwig | c9eb617 | 2017-08-27 10:37:15 +0200 | [diff] [blame] | 605 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 606 | extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, |
Christoph Hellwig | 58b0440 | 2018-09-11 08:55:28 +0200 | [diff] [blame] | 607 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 608 | unsigned long attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 609 | |
| 610 | void *dma_common_contiguous_remap(struct page *page, size_t size, |
| 611 | unsigned long vm_flags, |
| 612 | pgprot_t prot, const void *caller); |
| 613 | |
| 614 | void *dma_common_pages_remap(struct page **pages, size_t size, |
| 615 | unsigned long vm_flags, pgprot_t prot, |
| 616 | const void *caller); |
| 617 | void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags); |
| 618 | |
Christoph Hellwig | 0c3b317 | 2018-11-04 20:29:28 +0100 | [diff] [blame] | 619 | int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot); |
| 620 | bool dma_in_atomic_pool(void *start, size_t size); |
| 621 | void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags); |
| 622 | bool dma_free_from_pool(void *start, size_t size); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 623 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 624 | int |
Christoph Hellwig | 9406a49 | 2018-08-23 09:39:38 +0200 | [diff] [blame] | 625 | dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr, |
| 626 | dma_addr_t dma_addr, size_t size, unsigned long attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 627 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 628 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 629 | dma_addr_t *dma_handle, gfp_t gfp) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 630 | { |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 631 | |
| 632 | return dma_alloc_attrs(dev, size, dma_handle, gfp, |
| 633 | (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 634 | } |
| 635 | |
| 636 | static inline void dma_free_coherent(struct device *dev, size_t size, |
| 637 | void *cpu_addr, dma_addr_t dma_handle) |
| 638 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 639 | return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 640 | } |
| 641 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 643 | static inline u64 dma_get_mask(struct device *dev) |
| 644 | { |
FUJITA Tomonori | 07a2c01 | 2008-09-19 02:02:05 +0900 | [diff] [blame] | 645 | if (dev && dev->dma_mask && *dev->dma_mask) |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 646 | return *dev->dma_mask; |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 647 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 648 | } |
| 649 | |
Russell King | 4aa806b | 2013-06-26 13:49:44 +0100 | [diff] [blame] | 650 | /* |
| 651 | * Set both the DMA mask and the coherent DMA mask to the same thing. |
| 652 | * Note that we don't check the return value from dma_set_coherent_mask() |
| 653 | * as the DMA API guarantees that the coherent DMA mask can be set to |
| 654 | * the same or smaller than the streaming DMA mask. |
| 655 | */ |
| 656 | static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) |
| 657 | { |
| 658 | int rc = dma_set_mask(dev, mask); |
| 659 | if (rc == 0) |
| 660 | dma_set_coherent_mask(dev, mask); |
| 661 | return rc; |
| 662 | } |
| 663 | |
Russell King | fa6a8d6 | 2013-06-27 12:21:45 +0100 | [diff] [blame] | 664 | /* |
| 665 | * Similar to the above, except it deals with the case where the device |
| 666 | * does not have dev->dma_mask appropriately setup. |
| 667 | */ |
| 668 | static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) |
| 669 | { |
| 670 | dev->dma_mask = &dev->coherent_dma_mask; |
| 671 | return dma_set_mask_and_coherent(dev, mask); |
| 672 | } |
| 673 | |
Christoph Hellwig | 347cb6a | 2019-01-07 13:36:20 -0500 | [diff] [blame] | 674 | #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS |
| 675 | void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, |
| 676 | const struct iommu_ops *iommu, bool coherent); |
| 677 | #else |
Will Deacon | 97890ba | 2014-08-27 16:24:20 +0100 | [diff] [blame] | 678 | static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, |
Christoph Hellwig | 347cb6a | 2019-01-07 13:36:20 -0500 | [diff] [blame] | 679 | u64 size, const struct iommu_ops *iommu, bool coherent) |
| 680 | { |
| 681 | } |
| 682 | #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */ |
Will Deacon | 97890ba | 2014-08-27 16:24:20 +0100 | [diff] [blame] | 683 | |
Christoph Hellwig | dc2acde | 2018-12-21 22:14:44 +0100 | [diff] [blame] | 684 | #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS |
| 685 | void arch_teardown_dma_ops(struct device *dev); |
| 686 | #else |
| 687 | static inline void arch_teardown_dma_ops(struct device *dev) |
| 688 | { |
| 689 | } |
| 690 | #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */ |
Santosh Shilimkar | 591c1ee | 2014-04-24 11:30:04 -0400 | [diff] [blame] | 691 | |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 692 | static inline unsigned int dma_get_max_seg_size(struct device *dev) |
| 693 | { |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 694 | if (dev->dma_parms && dev->dma_parms->max_segment_size) |
| 695 | return dev->dma_parms->max_segment_size; |
| 696 | return SZ_64K; |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 697 | } |
| 698 | |
Niklas Söderlund | c9d76d0 | 2018-08-29 23:29:21 +0200 | [diff] [blame] | 699 | static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 700 | { |
| 701 | if (dev->dma_parms) { |
| 702 | dev->dma_parms->max_segment_size = size; |
| 703 | return 0; |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 704 | } |
| 705 | return -EIO; |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 706 | } |
| 707 | |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 708 | static inline unsigned long dma_get_seg_boundary(struct device *dev) |
| 709 | { |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 710 | if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) |
| 711 | return dev->dma_parms->segment_boundary_mask; |
| 712 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 713 | } |
| 714 | |
| 715 | static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) |
| 716 | { |
| 717 | if (dev->dma_parms) { |
| 718 | dev->dma_parms->segment_boundary_mask = mask; |
| 719 | return 0; |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 720 | } |
| 721 | return -EIO; |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 722 | } |
| 723 | |
Santosh Shilimkar | 00c8f16 | 2013-07-29 14:18:48 +0100 | [diff] [blame] | 724 | #ifndef dma_max_pfn |
| 725 | static inline unsigned long dma_max_pfn(struct device *dev) |
| 726 | { |
Christoph Hellwig | a41ef1e | 2017-11-30 07:32:51 -0800 | [diff] [blame] | 727 | return (*dev->dma_mask >> PAGE_SHIFT) + dev->dma_pfn_offset; |
Santosh Shilimkar | 00c8f16 | 2013-07-29 14:18:48 +0100 | [diff] [blame] | 728 | } |
| 729 | #endif |
| 730 | |
FUJITA Tomonori | 4565f01 | 2010-08-10 18:03:22 -0700 | [diff] [blame] | 731 | static inline int dma_get_cache_alignment(void) |
| 732 | { |
| 733 | #ifdef ARCH_DMA_MINALIGN |
| 734 | return ARCH_DMA_MINALIGN; |
| 735 | #endif |
| 736 | return 1; |
| 737 | } |
| 738 | |
Christoph Hellwig | ff4c25f | 2019-02-03 20:12:02 +0100 | [diff] [blame] | 739 | #ifdef CONFIG_DMA_DECLARE_COHERENT |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 740 | int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
Christoph Hellwig | 82c5de0 | 2018-12-25 13:29:54 +0100 | [diff] [blame^] | 741 | dma_addr_t device_addr, size_t size); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 742 | void dma_release_declared_memory(struct device *dev); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 743 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 744 | static inline int |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 745 | dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
Christoph Hellwig | 82c5de0 | 2018-12-25 13:29:54 +0100 | [diff] [blame^] | 746 | dma_addr_t device_addr, size_t size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | { |
Christoph Hellwig | 2436bdc | 2017-08-25 17:13:09 +0200 | [diff] [blame] | 748 | return -ENOSYS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | } |
| 750 | |
| 751 | static inline void |
| 752 | dma_release_declared_memory(struct device *dev) |
| 753 | { |
| 754 | } |
Christoph Hellwig | ff4c25f | 2019-02-03 20:12:02 +0100 | [diff] [blame] | 755 | #endif /* CONFIG_DMA_DECLARE_COHERENT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 756 | |
Christoph Hellwig | d7076f0 | 2018-12-25 17:44:19 +0100 | [diff] [blame] | 757 | static inline void *dmam_alloc_coherent(struct device *dev, size_t size, |
| 758 | dma_addr_t *dma_handle, gfp_t gfp) |
| 759 | { |
| 760 | return dmam_alloc_attrs(dev, size, dma_handle, gfp, |
| 761 | (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); |
| 762 | } |
| 763 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 764 | static inline void *dma_alloc_wc(struct device *dev, size_t size, |
| 765 | dma_addr_t *dma_addr, gfp_t gfp) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 766 | { |
Christoph Hellwig | 0cd60eb | 2018-12-22 09:21:08 +0100 | [diff] [blame] | 767 | unsigned long attrs = DMA_ATTR_WRITE_COMBINE; |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 768 | |
| 769 | if (gfp & __GFP_NOWARN) |
| 770 | attrs |= DMA_ATTR_NO_WARN; |
| 771 | |
| 772 | return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 773 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 774 | #ifndef dma_alloc_writecombine |
| 775 | #define dma_alloc_writecombine dma_alloc_wc |
| 776 | #endif |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 777 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 778 | static inline void dma_free_wc(struct device *dev, size_t size, |
| 779 | void *cpu_addr, dma_addr_t dma_addr) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 780 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 781 | return dma_free_attrs(dev, size, cpu_addr, dma_addr, |
| 782 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 783 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 784 | #ifndef dma_free_writecombine |
| 785 | #define dma_free_writecombine dma_free_wc |
| 786 | #endif |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 787 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 788 | static inline int dma_mmap_wc(struct device *dev, |
| 789 | struct vm_area_struct *vma, |
| 790 | void *cpu_addr, dma_addr_t dma_addr, |
| 791 | size_t size) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 792 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 793 | return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, |
| 794 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 795 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 796 | #ifndef dma_mmap_writecombine |
| 797 | #define dma_mmap_writecombine dma_mmap_wc |
| 798 | #endif |
Arthur Kepner | 74bc7ce | 2008-04-29 01:00:30 -0700 | [diff] [blame] | 799 | |
Christoph Hellwig | f616ab5 | 2018-05-09 06:53:49 +0200 | [diff] [blame] | 800 | #ifdef CONFIG_NEED_DMA_MAP_STATE |
FUJITA Tomonori | 0acedc1 | 2010-03-10 15:23:31 -0800 | [diff] [blame] | 801 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME |
| 802 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME |
| 803 | #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) |
| 804 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) |
| 805 | #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) |
| 806 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) |
| 807 | #else |
| 808 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) |
| 809 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) |
| 810 | #define dma_unmap_addr(PTR, ADDR_NAME) (0) |
| 811 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) |
| 812 | #define dma_unmap_len(PTR, LEN_NAME) (0) |
| 813 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
| 814 | #endif |
| 815 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 816 | #endif |