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Zhang Xiantao82470192007-12-17 13:59:56 +08001#ifndef __KVM_X86_LAPIC_H
2#define __KVM_X86_LAPIC_H
3
4#include "iodev.h"
Marcelo Tosattid3c7b772009-02-23 10:57:41 -03005#include "kvm_timer.h"
Zhang Xiantao82470192007-12-17 13:59:56 +08006
7#include <linux/kvm_host.h>
8
9struct kvm_lapic {
10 unsigned long base_address;
11 struct kvm_io_device dev;
Marcelo Tosattid3c7b772009-02-23 10:57:41 -030012 struct kvm_timer lapic_timer;
13 u32 divide_count;
Zhang Xiantao82470192007-12-17 13:59:56 +080014 struct kvm_vcpu *vcpu;
Gleb Natapov33e4c682009-06-11 11:06:51 +030015 bool irr_pending;
Michael S. Tsirkin5eadf912012-06-24 19:24:19 +030016 /**
17 * APIC register page. The layout matches the register layout seen by
18 * the guest 1:1, because it is accessed by the vmx microcode.
19 * Note: Only one register, the TPR, is used by the microcode.
20 */
Zhang Xiantao82470192007-12-17 13:59:56 +080021 void *regs;
Avi Kivityb93463a2007-10-25 16:52:32 +020022 gpa_t vapic_addr;
23 struct page *vapic_page;
Zhang Xiantao82470192007-12-17 13:59:56 +080024};
25int kvm_create_lapic(struct kvm_vcpu *vcpu);
26void kvm_free_lapic(struct kvm_vcpu *vcpu);
27
28int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
29int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
30int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
31void kvm_lapic_reset(struct kvm_vcpu *vcpu);
32u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
33void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
Kevin Tian58fbbf22011-08-30 13:56:17 +030034void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +080035void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
Harvey Harrison8b2cf732008-04-27 12:14:13 -070036u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
Gleb Natapovfc61b802009-07-05 17:39:35 +030037void kvm_apic_set_version(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +080038
39int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
40int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
Gleb Natapov58c2dde2009-03-05 16:35:04 +020041int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq);
Avi Kivity89342082011-11-10 14:57:21 +020042int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
Zhang Xiantao82470192007-12-17 13:59:56 +080043
44u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
45void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
46void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
47int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
Gleb Natapov343f94f2009-03-05 16:34:54 +020048bool kvm_apic_present(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +080049int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
Zhang Xiantao82470192007-12-17 13:59:56 +080050
Liu, Jinsonga3e06bb2011-09-22 16:55:52 +080051u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
52void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
53
Avi Kivityb93463a2007-10-25 16:52:32 +020054void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
55void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
56void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
57
Gleb Natapov0105d1a2009-07-05 17:39:36 +030058int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
59int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
Gleb Natapov10388a02010-01-17 15:51:23 +020060
61int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
62int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
63
64static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
65{
66 return vcpu->arch.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
67}
Zhang Xiantao82470192007-12-17 13:59:56 +080068#endif