Jeeja KP | e4e2d2f | 2015-10-07 11:31:52 +0100 | [diff] [blame] | 1 | /* |
| 2 | * skl-topology.c - Implements Platform component ALSA controls/widget |
| 3 | * handlers. |
| 4 | * |
| 5 | * Copyright (C) 2014-2015 Intel Corp |
| 6 | * Author: Jeeja KP <jeeja.kp@intel.com> |
| 7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as version 2, as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/types.h> |
| 21 | #include <linux/firmware.h> |
| 22 | #include <sound/soc.h> |
| 23 | #include <sound/soc-topology.h> |
| 24 | #include "skl-sst-dsp.h" |
| 25 | #include "skl-sst-ipc.h" |
| 26 | #include "skl-topology.h" |
| 27 | #include "skl.h" |
| 28 | #include "skl-tplg-interface.h" |
| 29 | |
Jeeja KP | f7590d4 | 2015-10-07 11:31:53 +0100 | [diff] [blame] | 30 | #define SKL_CH_FIXUP_MASK (1 << 0) |
| 31 | #define SKL_RATE_FIXUP_MASK (1 << 1) |
| 32 | #define SKL_FMT_FIXUP_MASK (1 << 2) |
| 33 | |
Jeeja KP | e4e2d2f | 2015-10-07 11:31:52 +0100 | [diff] [blame] | 34 | /* |
| 35 | * SKL DSP driver modelling uses only few DAPM widgets so for rest we will |
| 36 | * ignore. This helpers checks if the SKL driver handles this widget type |
| 37 | */ |
| 38 | static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w) |
| 39 | { |
| 40 | switch (w->id) { |
| 41 | case snd_soc_dapm_dai_link: |
| 42 | case snd_soc_dapm_dai_in: |
| 43 | case snd_soc_dapm_aif_in: |
| 44 | case snd_soc_dapm_aif_out: |
| 45 | case snd_soc_dapm_dai_out: |
| 46 | case snd_soc_dapm_switch: |
| 47 | return false; |
| 48 | default: |
| 49 | return true; |
| 50 | } |
| 51 | } |
| 52 | |
| 53 | /* |
| 54 | * Each pipelines needs memory to be allocated. Check if we have free memory |
| 55 | * from available pool. Then only add this to pool |
| 56 | * This is freed when pipe is deleted |
| 57 | * Note: DSP does actual memory management we only keep track for complete |
| 58 | * pool |
| 59 | */ |
| 60 | static bool skl_tplg_alloc_pipe_mem(struct skl *skl, |
| 61 | struct skl_module_cfg *mconfig) |
| 62 | { |
| 63 | struct skl_sst *ctx = skl->skl_sst; |
| 64 | |
| 65 | if (skl->resource.mem + mconfig->pipe->memory_pages > |
| 66 | skl->resource.max_mem) { |
| 67 | dev_err(ctx->dev, |
| 68 | "%s: module_id %d instance %d\n", __func__, |
| 69 | mconfig->id.module_id, |
| 70 | mconfig->id.instance_id); |
| 71 | dev_err(ctx->dev, |
| 72 | "exceeds ppl memory available %d mem %d\n", |
| 73 | skl->resource.max_mem, skl->resource.mem); |
| 74 | return false; |
| 75 | } |
| 76 | |
| 77 | skl->resource.mem += mconfig->pipe->memory_pages; |
| 78 | return true; |
| 79 | } |
| 80 | |
| 81 | /* |
| 82 | * Pipeline needs needs DSP CPU resources for computation, this is |
| 83 | * quantified in MCPS (Million Clocks Per Second) required for module/pipe |
| 84 | * |
| 85 | * Each pipelines needs mcps to be allocated. Check if we have mcps for this |
| 86 | * pipe. This adds the mcps to driver counter |
| 87 | * This is removed on pipeline delete |
| 88 | */ |
| 89 | static bool skl_tplg_alloc_pipe_mcps(struct skl *skl, |
| 90 | struct skl_module_cfg *mconfig) |
| 91 | { |
| 92 | struct skl_sst *ctx = skl->skl_sst; |
| 93 | |
| 94 | if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) { |
| 95 | dev_err(ctx->dev, |
| 96 | "%s: module_id %d instance %d\n", __func__, |
| 97 | mconfig->id.module_id, mconfig->id.instance_id); |
| 98 | dev_err(ctx->dev, |
| 99 | "exceeds ppl memory available %d > mem %d\n", |
| 100 | skl->resource.max_mcps, skl->resource.mcps); |
| 101 | return false; |
| 102 | } |
| 103 | |
| 104 | skl->resource.mcps += mconfig->mcps; |
| 105 | return true; |
| 106 | } |
| 107 | |
| 108 | /* |
| 109 | * Free the mcps when tearing down |
| 110 | */ |
| 111 | static void |
| 112 | skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig) |
| 113 | { |
| 114 | skl->resource.mcps -= mconfig->mcps; |
| 115 | } |
| 116 | |
| 117 | /* |
| 118 | * Free the memory when tearing down |
| 119 | */ |
| 120 | static void |
| 121 | skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig) |
| 122 | { |
| 123 | skl->resource.mem -= mconfig->pipe->memory_pages; |
| 124 | } |
| 125 | |
Jeeja KP | f7590d4 | 2015-10-07 11:31:53 +0100 | [diff] [blame] | 126 | |
| 127 | static void skl_dump_mconfig(struct skl_sst *ctx, |
| 128 | struct skl_module_cfg *mcfg) |
| 129 | { |
| 130 | dev_dbg(ctx->dev, "Dumping config\n"); |
| 131 | dev_dbg(ctx->dev, "Input Format:\n"); |
| 132 | dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt.channels); |
| 133 | dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt.s_freq); |
| 134 | dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt.ch_cfg); |
| 135 | dev_dbg(ctx->dev, "valid bit depth = %d\n", |
| 136 | mcfg->in_fmt.valid_bit_depth); |
| 137 | dev_dbg(ctx->dev, "Output Format:\n"); |
| 138 | dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt.channels); |
| 139 | dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt.s_freq); |
| 140 | dev_dbg(ctx->dev, "valid bit depth = %d\n", |
| 141 | mcfg->out_fmt.valid_bit_depth); |
| 142 | dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt.ch_cfg); |
| 143 | } |
| 144 | |
| 145 | static void skl_tplg_update_params(struct skl_module_fmt *fmt, |
| 146 | struct skl_pipe_params *params, int fixup) |
| 147 | { |
| 148 | if (fixup & SKL_RATE_FIXUP_MASK) |
| 149 | fmt->s_freq = params->s_freq; |
| 150 | if (fixup & SKL_CH_FIXUP_MASK) |
| 151 | fmt->channels = params->ch; |
| 152 | if (fixup & SKL_FMT_FIXUP_MASK) |
| 153 | fmt->valid_bit_depth = params->s_fmt; |
| 154 | } |
| 155 | |
| 156 | /* |
| 157 | * A pipeline may have modules which impact the pcm parameters, like SRC, |
| 158 | * channel converter, format converter. |
| 159 | * We need to calculate the output params by applying the 'fixup' |
| 160 | * Topology will tell driver which type of fixup is to be applied by |
| 161 | * supplying the fixup mask, so based on that we calculate the output |
| 162 | * |
| 163 | * Now In FE the pcm hw_params is source/target format. Same is applicable |
| 164 | * for BE with its hw_params invoked. |
| 165 | * here based on FE, BE pipeline and direction we calculate the input and |
| 166 | * outfix and then apply that for a module |
| 167 | */ |
| 168 | static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg, |
| 169 | struct skl_pipe_params *params, bool is_fe) |
| 170 | { |
| 171 | int in_fixup, out_fixup; |
| 172 | struct skl_module_fmt *in_fmt, *out_fmt; |
| 173 | |
| 174 | in_fmt = &m_cfg->in_fmt; |
| 175 | out_fmt = &m_cfg->out_fmt; |
| 176 | |
| 177 | if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 178 | if (is_fe) { |
| 179 | in_fixup = m_cfg->params_fixup; |
| 180 | out_fixup = (~m_cfg->converter) & |
| 181 | m_cfg->params_fixup; |
| 182 | } else { |
| 183 | out_fixup = m_cfg->params_fixup; |
| 184 | in_fixup = (~m_cfg->converter) & |
| 185 | m_cfg->params_fixup; |
| 186 | } |
| 187 | } else { |
| 188 | if (is_fe) { |
| 189 | out_fixup = m_cfg->params_fixup; |
| 190 | in_fixup = (~m_cfg->converter) & |
| 191 | m_cfg->params_fixup; |
| 192 | } else { |
| 193 | in_fixup = m_cfg->params_fixup; |
| 194 | out_fixup = (~m_cfg->converter) & |
| 195 | m_cfg->params_fixup; |
| 196 | } |
| 197 | } |
| 198 | |
| 199 | skl_tplg_update_params(in_fmt, params, in_fixup); |
| 200 | skl_tplg_update_params(out_fmt, params, out_fixup); |
| 201 | } |
| 202 | |
| 203 | /* |
| 204 | * A module needs input and output buffers, which are dependent upon pcm |
| 205 | * params, so once we have calculate params, we need buffer calculation as |
| 206 | * well. |
| 207 | */ |
| 208 | static void skl_tplg_update_buffer_size(struct skl_sst *ctx, |
| 209 | struct skl_module_cfg *mcfg) |
| 210 | { |
| 211 | int multiplier = 1; |
| 212 | |
| 213 | if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT) |
| 214 | multiplier = 5; |
| 215 | |
| 216 | mcfg->ibs = (mcfg->in_fmt.s_freq / 1000) * |
| 217 | (mcfg->in_fmt.channels) * |
| 218 | (mcfg->in_fmt.bit_depth >> 3) * |
| 219 | multiplier; |
| 220 | |
| 221 | mcfg->obs = (mcfg->out_fmt.s_freq / 1000) * |
| 222 | (mcfg->out_fmt.channels) * |
| 223 | (mcfg->out_fmt.bit_depth >> 3) * |
| 224 | multiplier; |
| 225 | } |
| 226 | |
| 227 | static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w, |
| 228 | struct skl_sst *ctx) |
| 229 | { |
| 230 | struct skl_module_cfg *m_cfg = w->priv; |
| 231 | struct skl_pipe_params *params = m_cfg->pipe->p_params; |
| 232 | int p_conn_type = m_cfg->pipe->conn_type; |
| 233 | bool is_fe; |
| 234 | |
| 235 | if (!m_cfg->params_fixup) |
| 236 | return; |
| 237 | |
| 238 | dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n", |
| 239 | w->name); |
| 240 | |
| 241 | skl_dump_mconfig(ctx, m_cfg); |
| 242 | |
| 243 | if (p_conn_type == SKL_PIPE_CONN_TYPE_FE) |
| 244 | is_fe = true; |
| 245 | else |
| 246 | is_fe = false; |
| 247 | |
| 248 | skl_tplg_update_params_fixup(m_cfg, params, is_fe); |
| 249 | skl_tplg_update_buffer_size(ctx, m_cfg); |
| 250 | |
| 251 | dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n", |
| 252 | w->name); |
| 253 | |
| 254 | skl_dump_mconfig(ctx, m_cfg); |
| 255 | } |
| 256 | |
Jeeja KP | e4e2d2f | 2015-10-07 11:31:52 +0100 | [diff] [blame] | 257 | /* |
| 258 | * A pipe can have multiple modules, each of them will be a DAPM widget as |
| 259 | * well. While managing a pipeline we need to get the list of all the |
| 260 | * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps |
| 261 | * to get the SKL type widgets in that pipeline |
| 262 | */ |
| 263 | static int skl_tplg_alloc_pipe_widget(struct device *dev, |
| 264 | struct snd_soc_dapm_widget *w, struct skl_pipe *pipe) |
| 265 | { |
| 266 | struct skl_module_cfg *src_module = NULL; |
| 267 | struct snd_soc_dapm_path *p = NULL; |
| 268 | struct skl_pipe_module *p_module = NULL; |
| 269 | |
| 270 | p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL); |
| 271 | if (!p_module) |
| 272 | return -ENOMEM; |
| 273 | |
| 274 | p_module->w = w; |
| 275 | list_add_tail(&p_module->node, &pipe->w_list); |
| 276 | |
| 277 | snd_soc_dapm_widget_for_each_sink_path(w, p) { |
| 278 | if ((p->sink->priv == NULL) |
| 279 | && (!is_skl_dsp_widget_type(w))) |
| 280 | continue; |
| 281 | |
| 282 | if ((p->sink->priv != NULL) && p->connect |
| 283 | && is_skl_dsp_widget_type(p->sink)) { |
| 284 | |
| 285 | src_module = p->sink->priv; |
| 286 | if (pipe->ppl_id == src_module->pipe->ppl_id) |
| 287 | skl_tplg_alloc_pipe_widget(dev, |
| 288 | p->sink, pipe); |
| 289 | } |
| 290 | } |
| 291 | return 0; |
| 292 | } |
| 293 | |
| 294 | /* |
| 295 | * Inside a pipe instance, we can have various modules. These modules need |
| 296 | * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by |
| 297 | * skl_init_module() routine, so invoke that for all modules in a pipeline |
| 298 | */ |
| 299 | static int |
| 300 | skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe) |
| 301 | { |
| 302 | struct skl_pipe_module *w_module; |
| 303 | struct snd_soc_dapm_widget *w; |
| 304 | struct skl_module_cfg *mconfig; |
| 305 | struct skl_sst *ctx = skl->skl_sst; |
| 306 | int ret = 0; |
| 307 | |
| 308 | list_for_each_entry(w_module, &pipe->w_list, node) { |
| 309 | w = w_module->w; |
| 310 | mconfig = w->priv; |
| 311 | |
| 312 | /* check resource available */ |
| 313 | if (!skl_tplg_alloc_pipe_mcps(skl, mconfig)) |
| 314 | return -ENOMEM; |
| 315 | |
Jeeja KP | f7590d4 | 2015-10-07 11:31:53 +0100 | [diff] [blame] | 316 | /* |
| 317 | * apply fix/conversion to module params based on |
| 318 | * FE/BE params |
| 319 | */ |
| 320 | skl_tplg_update_module_params(w, ctx); |
Jeeja KP | e4e2d2f | 2015-10-07 11:31:52 +0100 | [diff] [blame] | 321 | ret = skl_init_module(ctx, mconfig, NULL); |
| 322 | if (ret < 0) |
| 323 | return ret; |
| 324 | } |
| 325 | |
| 326 | return 0; |
| 327 | } |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 328 | |
| 329 | /* |
| 330 | * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we |
| 331 | * need create the pipeline. So we do following: |
| 332 | * - check the resources |
| 333 | * - Create the pipeline |
| 334 | * - Initialize the modules in pipeline |
| 335 | * - finally bind all modules together |
| 336 | */ |
| 337 | static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, |
| 338 | struct skl *skl) |
| 339 | { |
| 340 | int ret; |
| 341 | struct skl_module_cfg *mconfig = w->priv; |
| 342 | struct skl_pipe_module *w_module; |
| 343 | struct skl_pipe *s_pipe = mconfig->pipe; |
| 344 | struct skl_module_cfg *src_module = NULL, *dst_module; |
| 345 | struct skl_sst *ctx = skl->skl_sst; |
| 346 | |
| 347 | /* check resource available */ |
| 348 | if (!skl_tplg_alloc_pipe_mcps(skl, mconfig)) |
| 349 | return -EBUSY; |
| 350 | |
| 351 | if (!skl_tplg_alloc_pipe_mem(skl, mconfig)) |
| 352 | return -ENOMEM; |
| 353 | |
| 354 | /* |
| 355 | * Create a list of modules for pipe. |
| 356 | * This list contains modules from source to sink |
| 357 | */ |
| 358 | ret = skl_create_pipeline(ctx, mconfig->pipe); |
| 359 | if (ret < 0) |
| 360 | return ret; |
| 361 | |
| 362 | /* |
| 363 | * we create a w_list of all widgets in that pipe. This list is not |
| 364 | * freed on PMD event as widgets within a pipe are static. This |
| 365 | * saves us cycles to get widgets in pipe every time. |
| 366 | * |
| 367 | * So if we have already initialized all the widgets of a pipeline |
| 368 | * we skip, so check for list_empty and create the list if empty |
| 369 | */ |
| 370 | if (list_empty(&s_pipe->w_list)) { |
| 371 | ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe); |
| 372 | if (ret < 0) |
| 373 | return ret; |
| 374 | } |
| 375 | |
| 376 | /* Init all pipe modules from source to sink */ |
| 377 | ret = skl_tplg_init_pipe_modules(skl, s_pipe); |
| 378 | if (ret < 0) |
| 379 | return ret; |
| 380 | |
| 381 | /* Bind modules from source to sink */ |
| 382 | list_for_each_entry(w_module, &s_pipe->w_list, node) { |
| 383 | dst_module = w_module->w->priv; |
| 384 | |
| 385 | if (src_module == NULL) { |
| 386 | src_module = dst_module; |
| 387 | continue; |
| 388 | } |
| 389 | |
| 390 | ret = skl_bind_modules(ctx, src_module, dst_module); |
| 391 | if (ret < 0) |
| 392 | return ret; |
| 393 | |
| 394 | src_module = dst_module; |
| 395 | } |
| 396 | |
| 397 | return 0; |
| 398 | } |
| 399 | |
| 400 | /* |
| 401 | * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA |
| 402 | * we need to do following: |
| 403 | * - Bind to sink pipeline |
| 404 | * Since the sink pipes can be running and we don't get mixer event on |
| 405 | * connect for already running mixer, we need to find the sink pipes |
| 406 | * here and bind to them. This way dynamic connect works. |
| 407 | * - Start sink pipeline, if not running |
| 408 | * - Then run current pipe |
| 409 | */ |
| 410 | static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, |
| 411 | struct skl *skl) |
| 412 | { |
| 413 | struct snd_soc_dapm_path *p; |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 414 | struct snd_soc_dapm_widget *source, *sink; |
| 415 | struct skl_module_cfg *src_mconfig, *sink_mconfig; |
| 416 | struct skl_sst *ctx = skl->skl_sst; |
| 417 | int ret = 0; |
| 418 | |
| 419 | source = w; |
| 420 | src_mconfig = source->priv; |
| 421 | |
| 422 | /* |
| 423 | * find which sink it is connected to, bind with the sink, |
| 424 | * if sink is not started, start sink pipe first, then start |
| 425 | * this pipe |
| 426 | */ |
| 427 | snd_soc_dapm_widget_for_each_source_path(w, p) { |
| 428 | if (!p->connect) |
| 429 | continue; |
| 430 | |
| 431 | dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name); |
| 432 | dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name); |
| 433 | |
| 434 | /* |
| 435 | * here we will check widgets in sink pipelines, so that |
| 436 | * can be any widgets type and we are only interested if |
| 437 | * they are ones used for SKL so check that first |
| 438 | */ |
| 439 | if ((p->sink->priv != NULL) && |
| 440 | is_skl_dsp_widget_type(p->sink)) { |
| 441 | |
| 442 | sink = p->sink; |
| 443 | src_mconfig = source->priv; |
| 444 | sink_mconfig = sink->priv; |
| 445 | |
| 446 | /* Bind source to sink, mixin is always source */ |
| 447 | ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); |
| 448 | if (ret) |
| 449 | return ret; |
| 450 | |
| 451 | /* Start sinks pipe first */ |
| 452 | if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) { |
| 453 | ret = skl_run_pipe(ctx, sink_mconfig->pipe); |
| 454 | if (ret) |
| 455 | return ret; |
| 456 | } |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 457 | break; |
| 458 | } |
| 459 | } |
| 460 | |
| 461 | /* Start source pipe last after starting all sinks */ |
| 462 | ret = skl_run_pipe(ctx, src_mconfig->pipe); |
| 463 | if (ret) |
| 464 | return ret; |
| 465 | |
| 466 | return 0; |
| 467 | } |
| 468 | |
| 469 | /* |
| 470 | * in the Post-PMU event of mixer we need to do following: |
| 471 | * - Check if this pipe is running |
| 472 | * - if not, then |
| 473 | * - bind this pipeline to its source pipeline |
| 474 | * if source pipe is already running, this means it is a dynamic |
| 475 | * connection and we need to bind only to that pipe |
| 476 | * - start this pipeline |
| 477 | */ |
| 478 | static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w, |
| 479 | struct skl *skl) |
| 480 | { |
| 481 | int ret = 0; |
| 482 | struct snd_soc_dapm_path *p; |
| 483 | struct snd_soc_dapm_widget *source, *sink; |
| 484 | struct skl_module_cfg *src_mconfig, *sink_mconfig; |
| 485 | struct skl_sst *ctx = skl->skl_sst; |
| 486 | int src_pipe_started = 0; |
| 487 | |
| 488 | sink = w; |
| 489 | sink_mconfig = sink->priv; |
| 490 | |
| 491 | /* |
| 492 | * If source pipe is already started, that means source is driving |
| 493 | * one more sink before this sink got connected, Since source is |
| 494 | * started, bind this sink to source and start this pipe. |
| 495 | */ |
| 496 | snd_soc_dapm_widget_for_each_sink_path(w, p) { |
| 497 | if (!p->connect) |
| 498 | continue; |
| 499 | |
| 500 | dev_dbg(ctx->dev, "sink widget=%s\n", w->name); |
| 501 | dev_dbg(ctx->dev, "src widget=%s\n", p->source->name); |
| 502 | |
| 503 | /* |
| 504 | * here we will check widgets in sink pipelines, so that |
| 505 | * can be any widgets type and we are only interested if |
| 506 | * they are ones used for SKL so check that first |
| 507 | */ |
| 508 | if ((p->source->priv != NULL) && |
| 509 | is_skl_dsp_widget_type(p->source)) { |
| 510 | source = p->source; |
| 511 | src_mconfig = source->priv; |
| 512 | sink_mconfig = sink->priv; |
| 513 | src_pipe_started = 1; |
| 514 | |
| 515 | /* |
| 516 | * check pipe state, then no need to bind or start |
| 517 | * the pipe |
| 518 | */ |
| 519 | if (src_mconfig->pipe->state != SKL_PIPE_STARTED) |
| 520 | src_pipe_started = 0; |
| 521 | } |
| 522 | } |
| 523 | |
| 524 | if (src_pipe_started) { |
| 525 | ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); |
| 526 | if (ret) |
| 527 | return ret; |
| 528 | |
| 529 | ret = skl_run_pipe(ctx, sink_mconfig->pipe); |
| 530 | } |
| 531 | |
| 532 | return ret; |
| 533 | } |
| 534 | |
| 535 | /* |
| 536 | * in the Pre-PMD event of mixer we need to do following: |
| 537 | * - Stop the pipe |
| 538 | * - find the source connections and remove that from dapm_path_list |
| 539 | * - unbind with source pipelines if still connected |
| 540 | */ |
| 541 | static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w, |
| 542 | struct skl *skl) |
| 543 | { |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 544 | struct skl_module_cfg *src_mconfig, *sink_mconfig; |
Jeeja KP | ce1b555 | 2015-10-27 09:22:51 +0900 | [diff] [blame^] | 545 | int ret = 0, i; |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 546 | struct skl_sst *ctx = skl->skl_sst; |
| 547 | |
Jeeja KP | ce1b555 | 2015-10-27 09:22:51 +0900 | [diff] [blame^] | 548 | sink_mconfig = w->priv; |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 549 | |
| 550 | /* Stop the pipe */ |
| 551 | ret = skl_stop_pipe(ctx, sink_mconfig->pipe); |
| 552 | if (ret) |
| 553 | return ret; |
| 554 | |
Jeeja KP | ce1b555 | 2015-10-27 09:22:51 +0900 | [diff] [blame^] | 555 | for (i = 0; i < sink_mconfig->max_in_queue; i++) { |
| 556 | if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) { |
| 557 | src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg; |
| 558 | if (!src_mconfig) |
| 559 | continue; |
| 560 | /* |
| 561 | * If path_found == 1, that means pmd for source |
| 562 | * pipe has not occurred, source is connected to |
| 563 | * some other sink. so its responsibility of sink |
| 564 | * to unbind itself from source. |
| 565 | */ |
| 566 | ret = skl_stop_pipe(ctx, src_mconfig->pipe); |
| 567 | if (ret < 0) |
| 568 | return ret; |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 569 | |
Jeeja KP | ce1b555 | 2015-10-27 09:22:51 +0900 | [diff] [blame^] | 570 | ret = skl_unbind_modules(ctx, |
| 571 | src_mconfig, sink_mconfig); |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 572 | } |
| 573 | } |
| 574 | |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 575 | return ret; |
| 576 | } |
| 577 | |
| 578 | /* |
| 579 | * in the Post-PMD event of mixer we need to do following: |
| 580 | * - Free the mcps used |
| 581 | * - Free the mem used |
| 582 | * - Unbind the modules within the pipeline |
| 583 | * - Delete the pipeline (modules are not required to be explicitly |
| 584 | * deleted, pipeline delete is enough here |
| 585 | */ |
| 586 | static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w, |
| 587 | struct skl *skl) |
| 588 | { |
| 589 | struct skl_module_cfg *mconfig = w->priv; |
| 590 | struct skl_pipe_module *w_module; |
| 591 | struct skl_module_cfg *src_module = NULL, *dst_module; |
| 592 | struct skl_sst *ctx = skl->skl_sst; |
| 593 | struct skl_pipe *s_pipe = mconfig->pipe; |
| 594 | int ret = 0; |
| 595 | |
| 596 | skl_tplg_free_pipe_mcps(skl, mconfig); |
| 597 | |
| 598 | list_for_each_entry(w_module, &s_pipe->w_list, node) { |
| 599 | dst_module = w_module->w->priv; |
| 600 | |
| 601 | if (src_module == NULL) { |
| 602 | src_module = dst_module; |
| 603 | continue; |
| 604 | } |
| 605 | |
| 606 | ret = skl_unbind_modules(ctx, src_module, dst_module); |
| 607 | if (ret < 0) |
| 608 | return ret; |
| 609 | |
| 610 | src_module = dst_module; |
| 611 | } |
| 612 | |
| 613 | ret = skl_delete_pipe(ctx, mconfig->pipe); |
| 614 | skl_tplg_free_pipe_mem(skl, mconfig); |
| 615 | |
| 616 | return ret; |
| 617 | } |
| 618 | |
| 619 | /* |
| 620 | * in the Post-PMD event of PGA we need to do following: |
| 621 | * - Free the mcps used |
| 622 | * - Stop the pipeline |
| 623 | * - In source pipe is connected, unbind with source pipelines |
| 624 | */ |
| 625 | static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w, |
| 626 | struct skl *skl) |
| 627 | { |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 628 | struct skl_module_cfg *src_mconfig, *sink_mconfig; |
Jeeja KP | ce1b555 | 2015-10-27 09:22:51 +0900 | [diff] [blame^] | 629 | int ret = 0, i; |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 630 | struct skl_sst *ctx = skl->skl_sst; |
| 631 | |
Jeeja KP | ce1b555 | 2015-10-27 09:22:51 +0900 | [diff] [blame^] | 632 | src_mconfig = w->priv; |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 633 | |
| 634 | skl_tplg_free_pipe_mcps(skl, src_mconfig); |
| 635 | /* Stop the pipe since this is a mixin module */ |
| 636 | ret = skl_stop_pipe(ctx, src_mconfig->pipe); |
| 637 | if (ret) |
| 638 | return ret; |
| 639 | |
Jeeja KP | ce1b555 | 2015-10-27 09:22:51 +0900 | [diff] [blame^] | 640 | for (i = 0; i < src_mconfig->max_out_queue; i++) { |
| 641 | if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) { |
| 642 | sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg; |
| 643 | if (!sink_mconfig) |
| 644 | continue; |
| 645 | /* |
| 646 | * This is a connecter and if path is found that means |
| 647 | * unbind between source and sink has not happened yet |
| 648 | */ |
| 649 | ret = skl_stop_pipe(ctx, sink_mconfig->pipe); |
| 650 | if (ret < 0) |
| 651 | return ret; |
| 652 | ret = skl_unbind_modules(ctx, src_mconfig, |
| 653 | sink_mconfig); |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 654 | } |
| 655 | } |
| 656 | |
Vinod Koul | d93f8e5 | 2015-10-07 11:31:54 +0100 | [diff] [blame] | 657 | return ret; |
| 658 | } |
| 659 | |
| 660 | /* |
| 661 | * In modelling, we assume there will be ONLY one mixer in a pipeline. If |
| 662 | * mixer is not required then it is treated as static mixer aka vmixer with |
| 663 | * a hard path to source module |
| 664 | * So we don't need to check if source is started or not as hard path puts |
| 665 | * dependency on each other |
| 666 | */ |
| 667 | static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w, |
| 668 | struct snd_kcontrol *k, int event) |
| 669 | { |
| 670 | struct snd_soc_dapm_context *dapm = w->dapm; |
| 671 | struct skl *skl = get_skl_ctx(dapm->dev); |
| 672 | |
| 673 | switch (event) { |
| 674 | case SND_SOC_DAPM_PRE_PMU: |
| 675 | return skl_tplg_mixer_dapm_pre_pmu_event(w, skl); |
| 676 | |
| 677 | case SND_SOC_DAPM_POST_PMD: |
| 678 | return skl_tplg_mixer_dapm_post_pmd_event(w, skl); |
| 679 | } |
| 680 | |
| 681 | return 0; |
| 682 | } |
| 683 | |
| 684 | /* |
| 685 | * In modelling, we assume there will be ONLY one mixer in a pipeline. If a |
| 686 | * second one is required that is created as another pipe entity. |
| 687 | * The mixer is responsible for pipe management and represent a pipeline |
| 688 | * instance |
| 689 | */ |
| 690 | static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w, |
| 691 | struct snd_kcontrol *k, int event) |
| 692 | { |
| 693 | struct snd_soc_dapm_context *dapm = w->dapm; |
| 694 | struct skl *skl = get_skl_ctx(dapm->dev); |
| 695 | |
| 696 | switch (event) { |
| 697 | case SND_SOC_DAPM_PRE_PMU: |
| 698 | return skl_tplg_mixer_dapm_pre_pmu_event(w, skl); |
| 699 | |
| 700 | case SND_SOC_DAPM_POST_PMU: |
| 701 | return skl_tplg_mixer_dapm_post_pmu_event(w, skl); |
| 702 | |
| 703 | case SND_SOC_DAPM_PRE_PMD: |
| 704 | return skl_tplg_mixer_dapm_pre_pmd_event(w, skl); |
| 705 | |
| 706 | case SND_SOC_DAPM_POST_PMD: |
| 707 | return skl_tplg_mixer_dapm_post_pmd_event(w, skl); |
| 708 | } |
| 709 | |
| 710 | return 0; |
| 711 | } |
| 712 | |
| 713 | /* |
| 714 | * In modelling, we assumed rest of the modules in pipeline are PGA. But we |
| 715 | * are interested in last PGA (leaf PGA) in a pipeline to disconnect with |
| 716 | * the sink when it is running (two FE to one BE or one FE to two BE) |
| 717 | * scenarios |
| 718 | */ |
| 719 | static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w, |
| 720 | struct snd_kcontrol *k, int event) |
| 721 | |
| 722 | { |
| 723 | struct snd_soc_dapm_context *dapm = w->dapm; |
| 724 | struct skl *skl = get_skl_ctx(dapm->dev); |
| 725 | |
| 726 | switch (event) { |
| 727 | case SND_SOC_DAPM_PRE_PMU: |
| 728 | return skl_tplg_pga_dapm_pre_pmu_event(w, skl); |
| 729 | |
| 730 | case SND_SOC_DAPM_POST_PMD: |
| 731 | return skl_tplg_pga_dapm_post_pmd_event(w, skl); |
| 732 | } |
| 733 | |
| 734 | return 0; |
| 735 | } |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 736 | |
| 737 | /* |
| 738 | * The FE params are passed by hw_params of the DAI. |
| 739 | * On hw_params, the params are stored in Gateway module of the FE and we |
| 740 | * need to calculate the format in DSP module configuration, that |
| 741 | * conversion is done here |
| 742 | */ |
| 743 | int skl_tplg_update_pipe_params(struct device *dev, |
| 744 | struct skl_module_cfg *mconfig, |
| 745 | struct skl_pipe_params *params) |
| 746 | { |
| 747 | struct skl_pipe *pipe = mconfig->pipe; |
| 748 | struct skl_module_fmt *format = NULL; |
| 749 | |
| 750 | memcpy(pipe->p_params, params, sizeof(*params)); |
| 751 | |
| 752 | if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 753 | format = &mconfig->in_fmt; |
| 754 | else |
| 755 | format = &mconfig->out_fmt; |
| 756 | |
| 757 | /* set the hw_params */ |
| 758 | format->s_freq = params->s_freq; |
| 759 | format->channels = params->ch; |
| 760 | format->valid_bit_depth = skl_get_bit_depth(params->s_fmt); |
| 761 | |
| 762 | /* |
| 763 | * 16 bit is 16 bit container whereas 24 bit is in 32 bit |
| 764 | * container so update bit depth accordingly |
| 765 | */ |
| 766 | switch (format->valid_bit_depth) { |
| 767 | case SKL_DEPTH_16BIT: |
| 768 | format->bit_depth = format->valid_bit_depth; |
| 769 | break; |
| 770 | |
| 771 | case SKL_DEPTH_24BIT: |
Jeeja KP | 6654f39 | 2015-10-27 09:22:46 +0900 | [diff] [blame] | 772 | case SKL_DEPTH_32BIT: |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 773 | format->bit_depth = SKL_DEPTH_32BIT; |
| 774 | break; |
| 775 | |
| 776 | default: |
| 777 | dev_err(dev, "Invalid bit depth %x for pipe\n", |
| 778 | format->valid_bit_depth); |
| 779 | return -EINVAL; |
| 780 | } |
| 781 | |
| 782 | if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 783 | mconfig->ibs = (format->s_freq / 1000) * |
| 784 | (format->channels) * |
| 785 | (format->bit_depth >> 3); |
| 786 | } else { |
| 787 | mconfig->obs = (format->s_freq / 1000) * |
| 788 | (format->channels) * |
| 789 | (format->bit_depth >> 3); |
| 790 | } |
| 791 | |
| 792 | return 0; |
| 793 | } |
| 794 | |
| 795 | /* |
| 796 | * Query the module config for the FE DAI |
| 797 | * This is used to find the hw_params set for that DAI and apply to FE |
| 798 | * pipeline |
| 799 | */ |
| 800 | struct skl_module_cfg * |
| 801 | skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream) |
| 802 | { |
| 803 | struct snd_soc_dapm_widget *w; |
| 804 | struct snd_soc_dapm_path *p = NULL; |
| 805 | |
| 806 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 807 | w = dai->playback_widget; |
Subhransu S. Prusty | f0900eb | 2015-10-22 23:22:36 +0530 | [diff] [blame] | 808 | snd_soc_dapm_widget_for_each_sink_path(w, p) { |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 809 | if (p->connect && p->sink->power && |
Jeeja KP | a28f51d | 2015-10-27 09:22:44 +0900 | [diff] [blame] | 810 | !is_skl_dsp_widget_type(p->sink)) |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 811 | continue; |
| 812 | |
| 813 | if (p->sink->priv) { |
| 814 | dev_dbg(dai->dev, "set params for %s\n", |
| 815 | p->sink->name); |
| 816 | return p->sink->priv; |
| 817 | } |
| 818 | } |
| 819 | } else { |
| 820 | w = dai->capture_widget; |
Subhransu S. Prusty | f0900eb | 2015-10-22 23:22:36 +0530 | [diff] [blame] | 821 | snd_soc_dapm_widget_for_each_source_path(w, p) { |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 822 | if (p->connect && p->source->power && |
Jeeja KP | a28f51d | 2015-10-27 09:22:44 +0900 | [diff] [blame] | 823 | !is_skl_dsp_widget_type(p->source)) |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 824 | continue; |
| 825 | |
| 826 | if (p->source->priv) { |
| 827 | dev_dbg(dai->dev, "set params for %s\n", |
| 828 | p->source->name); |
| 829 | return p->source->priv; |
| 830 | } |
| 831 | } |
| 832 | } |
| 833 | |
| 834 | return NULL; |
| 835 | } |
| 836 | |
| 837 | static u8 skl_tplg_be_link_type(int dev_type) |
| 838 | { |
| 839 | int ret; |
| 840 | |
| 841 | switch (dev_type) { |
| 842 | case SKL_DEVICE_BT: |
| 843 | ret = NHLT_LINK_SSP; |
| 844 | break; |
| 845 | |
| 846 | case SKL_DEVICE_DMIC: |
| 847 | ret = NHLT_LINK_DMIC; |
| 848 | break; |
| 849 | |
| 850 | case SKL_DEVICE_I2S: |
| 851 | ret = NHLT_LINK_SSP; |
| 852 | break; |
| 853 | |
| 854 | case SKL_DEVICE_HDALINK: |
| 855 | ret = NHLT_LINK_HDA; |
| 856 | break; |
| 857 | |
| 858 | default: |
| 859 | ret = NHLT_LINK_INVALID; |
| 860 | break; |
| 861 | } |
| 862 | |
| 863 | return ret; |
| 864 | } |
| 865 | |
| 866 | /* |
| 867 | * Fill the BE gateway parameters |
| 868 | * The BE gateway expects a blob of parameters which are kept in the ACPI |
| 869 | * NHLT blob, so query the blob for interface type (i2s/pdm) and instance. |
| 870 | * The port can have multiple settings so pick based on the PCM |
| 871 | * parameters |
| 872 | */ |
| 873 | static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai, |
| 874 | struct skl_module_cfg *mconfig, |
| 875 | struct skl_pipe_params *params) |
| 876 | { |
| 877 | struct skl_pipe *pipe = mconfig->pipe; |
| 878 | struct nhlt_specific_cfg *cfg; |
| 879 | struct skl *skl = get_skl_ctx(dai->dev); |
| 880 | int link_type = skl_tplg_be_link_type(mconfig->dev_type); |
| 881 | |
| 882 | memcpy(pipe->p_params, params, sizeof(*params)); |
| 883 | |
Jeeja KP | b30c275 | 2015-10-27 09:22:48 +0900 | [diff] [blame] | 884 | if (link_type == NHLT_LINK_HDA) |
| 885 | return 0; |
| 886 | |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 887 | /* update the blob based on virtual bus_id*/ |
| 888 | cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type, |
| 889 | params->s_fmt, params->ch, |
| 890 | params->s_freq, params->stream); |
| 891 | if (cfg) { |
| 892 | mconfig->formats_config.caps_size = cfg->size; |
Jeeja KP | bc03281 | 2015-10-22 23:22:35 +0530 | [diff] [blame] | 893 | mconfig->formats_config.caps = (u32 *) &cfg->caps; |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 894 | } else { |
| 895 | dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n", |
| 896 | mconfig->vbus_id, link_type, |
| 897 | params->stream); |
| 898 | dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n", |
| 899 | params->ch, params->s_freq, params->s_fmt); |
| 900 | return -EINVAL; |
| 901 | } |
| 902 | |
| 903 | return 0; |
| 904 | } |
| 905 | |
| 906 | static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai, |
| 907 | struct snd_soc_dapm_widget *w, |
| 908 | struct skl_pipe_params *params) |
| 909 | { |
| 910 | struct snd_soc_dapm_path *p; |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 911 | int ret = -EIO; |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 912 | |
Subhransu S. Prusty | f0900eb | 2015-10-22 23:22:36 +0530 | [diff] [blame] | 913 | snd_soc_dapm_widget_for_each_source_path(w, p) { |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 914 | if (p->connect && is_skl_dsp_widget_type(p->source) && |
| 915 | p->source->priv) { |
| 916 | |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 917 | if (!p->source->power) { |
| 918 | ret = skl_tplg_be_fill_pipe_params( |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 919 | dai, p->source->priv, |
| 920 | params); |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 921 | if (ret < 0) |
| 922 | return ret; |
| 923 | } else { |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 924 | return -EBUSY; |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 925 | } |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 926 | } else { |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 927 | ret = skl_tplg_be_set_src_pipe_params( |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 928 | dai, p->source, params); |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 929 | if (ret < 0) |
| 930 | return ret; |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 931 | } |
| 932 | } |
| 933 | |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 934 | return ret; |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 935 | } |
| 936 | |
| 937 | static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai, |
| 938 | struct snd_soc_dapm_widget *w, struct skl_pipe_params *params) |
| 939 | { |
| 940 | struct snd_soc_dapm_path *p = NULL; |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 941 | int ret = -EIO; |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 942 | |
Subhransu S. Prusty | f0900eb | 2015-10-22 23:22:36 +0530 | [diff] [blame] | 943 | snd_soc_dapm_widget_for_each_sink_path(w, p) { |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 944 | if (p->connect && is_skl_dsp_widget_type(p->sink) && |
| 945 | p->sink->priv) { |
| 946 | |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 947 | if (!p->sink->power) { |
| 948 | ret = skl_tplg_be_fill_pipe_params( |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 949 | dai, p->sink->priv, params); |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 950 | if (ret < 0) |
| 951 | return ret; |
| 952 | } else { |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 953 | return -EBUSY; |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 954 | } |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 955 | |
| 956 | } else { |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 957 | ret = skl_tplg_be_set_sink_pipe_params( |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 958 | dai, p->sink, params); |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 959 | if (ret < 0) |
| 960 | return ret; |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 961 | } |
| 962 | } |
| 963 | |
Subhransu S. Prusty | 4d8adccb | 2015-10-22 23:22:37 +0530 | [diff] [blame] | 964 | return ret; |
Vinod Koul | cfb0a87 | 2015-10-07 11:31:55 +0100 | [diff] [blame] | 965 | } |
| 966 | |
| 967 | /* |
| 968 | * BE hw_params can be a source parameters (capture) or sink parameters |
| 969 | * (playback). Based on sink and source we need to either find the source |
| 970 | * list or the sink list and set the pipeline parameters |
| 971 | */ |
| 972 | int skl_tplg_be_update_params(struct snd_soc_dai *dai, |
| 973 | struct skl_pipe_params *params) |
| 974 | { |
| 975 | struct snd_soc_dapm_widget *w; |
| 976 | |
| 977 | if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 978 | w = dai->playback_widget; |
| 979 | |
| 980 | return skl_tplg_be_set_src_pipe_params(dai, w, params); |
| 981 | |
| 982 | } else { |
| 983 | w = dai->capture_widget; |
| 984 | |
| 985 | return skl_tplg_be_set_sink_pipe_params(dai, w, params); |
| 986 | } |
| 987 | |
| 988 | return 0; |
| 989 | } |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 990 | |
| 991 | static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = { |
| 992 | {SKL_MIXER_EVENT, skl_tplg_mixer_event}, |
| 993 | {SKL_VMIXER_EVENT, skl_tplg_vmixer_event}, |
| 994 | {SKL_PGA_EVENT, skl_tplg_pga_event}, |
| 995 | }; |
| 996 | |
| 997 | /* |
| 998 | * The topology binary passes the pin info for a module so initialize the pin |
| 999 | * info passed into module instance |
| 1000 | */ |
Jeeja KP | 6abca1d | 2015-10-22 23:22:42 +0530 | [diff] [blame] | 1001 | static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin, |
| 1002 | struct skl_module_pin *m_pin, |
| 1003 | bool is_dynamic, int max_pin) |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1004 | { |
| 1005 | int i; |
| 1006 | |
| 1007 | for (i = 0; i < max_pin; i++) { |
Jeeja KP | 6abca1d | 2015-10-22 23:22:42 +0530 | [diff] [blame] | 1008 | m_pin[i].id.module_id = dfw_pin[i].module_id; |
| 1009 | m_pin[i].id.instance_id = dfw_pin[i].instance_id; |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1010 | m_pin[i].in_use = false; |
Jeeja KP | 6abca1d | 2015-10-22 23:22:42 +0530 | [diff] [blame] | 1011 | m_pin[i].is_dynamic = is_dynamic; |
Jeeja KP | 4f74570 | 2015-10-27 09:22:49 +0900 | [diff] [blame] | 1012 | m_pin[i].pin_state = SKL_PIN_UNBIND; |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1013 | } |
| 1014 | } |
| 1015 | |
| 1016 | /* |
| 1017 | * Add pipeline from topology binary into driver pipeline list |
| 1018 | * |
| 1019 | * If already added we return that instance |
| 1020 | * Otherwise we create a new instance and add into driver list |
| 1021 | */ |
| 1022 | static struct skl_pipe *skl_tplg_add_pipe(struct device *dev, |
| 1023 | struct skl *skl, struct skl_dfw_pipe *dfw_pipe) |
| 1024 | { |
| 1025 | struct skl_pipeline *ppl; |
| 1026 | struct skl_pipe *pipe; |
| 1027 | struct skl_pipe_params *params; |
| 1028 | |
| 1029 | list_for_each_entry(ppl, &skl->ppl_list, node) { |
| 1030 | if (ppl->pipe->ppl_id == dfw_pipe->pipe_id) |
| 1031 | return ppl->pipe; |
| 1032 | } |
| 1033 | |
| 1034 | ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL); |
| 1035 | if (!ppl) |
| 1036 | return NULL; |
| 1037 | |
| 1038 | pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL); |
| 1039 | if (!pipe) |
| 1040 | return NULL; |
| 1041 | |
| 1042 | params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL); |
| 1043 | if (!params) |
| 1044 | return NULL; |
| 1045 | |
| 1046 | pipe->ppl_id = dfw_pipe->pipe_id; |
| 1047 | pipe->memory_pages = dfw_pipe->memory_pages; |
| 1048 | pipe->pipe_priority = dfw_pipe->pipe_priority; |
| 1049 | pipe->conn_type = dfw_pipe->conn_type; |
| 1050 | pipe->state = SKL_PIPE_INVALID; |
| 1051 | pipe->p_params = params; |
| 1052 | INIT_LIST_HEAD(&pipe->w_list); |
| 1053 | |
| 1054 | ppl->pipe = pipe; |
| 1055 | list_add(&ppl->node, &skl->ppl_list); |
| 1056 | |
| 1057 | return ppl->pipe; |
| 1058 | } |
| 1059 | |
| 1060 | /* |
| 1061 | * Topology core widget load callback |
| 1062 | * |
| 1063 | * This is used to save the private data for each widget which gives |
| 1064 | * information to the driver about module and pipeline parameters which DSP |
| 1065 | * FW expects like ids, resource values, formats etc |
| 1066 | */ |
| 1067 | static int skl_tplg_widget_load(struct snd_soc_component *cmpnt, |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1068 | struct snd_soc_dapm_widget *w, |
| 1069 | struct snd_soc_tplg_dapm_widget *tplg_w) |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1070 | { |
| 1071 | int ret; |
| 1072 | struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt); |
| 1073 | struct skl *skl = ebus_to_skl(ebus); |
| 1074 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
| 1075 | struct skl_module_cfg *mconfig; |
| 1076 | struct skl_pipe *pipe; |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1077 | struct skl_dfw_module *dfw_config = |
| 1078 | (struct skl_dfw_module *)tplg_w->priv.data; |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1079 | |
| 1080 | if (!tplg_w->priv.size) |
| 1081 | goto bind_event; |
| 1082 | |
| 1083 | mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL); |
| 1084 | |
| 1085 | if (!mconfig) |
| 1086 | return -ENOMEM; |
| 1087 | |
| 1088 | w->priv = mconfig; |
| 1089 | mconfig->id.module_id = dfw_config->module_id; |
| 1090 | mconfig->id.instance_id = dfw_config->instance_id; |
| 1091 | mconfig->mcps = dfw_config->max_mcps; |
| 1092 | mconfig->ibs = dfw_config->ibs; |
| 1093 | mconfig->obs = dfw_config->obs; |
| 1094 | mconfig->core_id = dfw_config->core_id; |
| 1095 | mconfig->max_in_queue = dfw_config->max_in_queue; |
| 1096 | mconfig->max_out_queue = dfw_config->max_out_queue; |
| 1097 | mconfig->is_loadable = dfw_config->is_loadable; |
| 1098 | mconfig->in_fmt.channels = dfw_config->in_fmt.channels; |
| 1099 | mconfig->in_fmt.s_freq = dfw_config->in_fmt.freq; |
| 1100 | mconfig->in_fmt.bit_depth = dfw_config->in_fmt.bit_depth; |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1101 | mconfig->in_fmt.valid_bit_depth = |
| 1102 | dfw_config->in_fmt.valid_bit_depth; |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1103 | mconfig->in_fmt.ch_cfg = dfw_config->in_fmt.ch_cfg; |
| 1104 | mconfig->out_fmt.channels = dfw_config->out_fmt.channels; |
| 1105 | mconfig->out_fmt.s_freq = dfw_config->out_fmt.freq; |
| 1106 | mconfig->out_fmt.bit_depth = dfw_config->out_fmt.bit_depth; |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1107 | mconfig->out_fmt.valid_bit_depth = |
| 1108 | dfw_config->out_fmt.valid_bit_depth; |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1109 | mconfig->out_fmt.ch_cfg = dfw_config->out_fmt.ch_cfg; |
| 1110 | mconfig->params_fixup = dfw_config->params_fixup; |
| 1111 | mconfig->converter = dfw_config->converter; |
| 1112 | mconfig->m_type = dfw_config->module_type; |
| 1113 | mconfig->vbus_id = dfw_config->vbus_id; |
| 1114 | |
| 1115 | pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe); |
| 1116 | if (pipe) |
| 1117 | mconfig->pipe = pipe; |
| 1118 | |
| 1119 | mconfig->dev_type = dfw_config->dev_type; |
| 1120 | mconfig->hw_conn_type = dfw_config->hw_conn_type; |
| 1121 | mconfig->time_slot = dfw_config->time_slot; |
| 1122 | mconfig->formats_config.caps_size = dfw_config->caps.caps_size; |
| 1123 | |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1124 | mconfig->m_in_pin = devm_kzalloc(bus->dev, |
| 1125 | (mconfig->max_in_queue) * |
| 1126 | sizeof(*mconfig->m_in_pin), |
| 1127 | GFP_KERNEL); |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1128 | if (!mconfig->m_in_pin) |
| 1129 | return -ENOMEM; |
| 1130 | |
Jeeja KP | 6abca1d | 2015-10-22 23:22:42 +0530 | [diff] [blame] | 1131 | mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) * |
| 1132 | sizeof(*mconfig->m_out_pin), |
| 1133 | GFP_KERNEL); |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1134 | if (!mconfig->m_out_pin) |
| 1135 | return -ENOMEM; |
| 1136 | |
Jeeja KP | 6abca1d | 2015-10-22 23:22:42 +0530 | [diff] [blame] | 1137 | skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin, |
| 1138 | dfw_config->is_dynamic_in_pin, |
| 1139 | mconfig->max_in_queue); |
| 1140 | |
| 1141 | skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin, |
| 1142 | dfw_config->is_dynamic_out_pin, |
| 1143 | mconfig->max_out_queue); |
| 1144 | |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1145 | |
| 1146 | if (mconfig->formats_config.caps_size == 0) |
| 1147 | goto bind_event; |
| 1148 | |
| 1149 | mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev, |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1150 | mconfig->formats_config.caps_size, GFP_KERNEL); |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1151 | |
| 1152 | if (mconfig->formats_config.caps == NULL) |
| 1153 | return -ENOMEM; |
| 1154 | |
| 1155 | memcpy(mconfig->formats_config.caps, dfw_config->caps.caps, |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1156 | dfw_config->caps.caps_size); |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1157 | |
| 1158 | bind_event: |
| 1159 | if (tplg_w->event_type == 0) { |
Vinod Koul | 3373f71 | 2015-10-07 16:39:38 +0100 | [diff] [blame] | 1160 | dev_dbg(bus->dev, "ASoC: No event handler required\n"); |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1161 | return 0; |
| 1162 | } |
| 1163 | |
| 1164 | ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops, |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1165 | ARRAY_SIZE(skl_tplg_widget_ops), |
| 1166 | tplg_w->event_type); |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1167 | |
| 1168 | if (ret) { |
| 1169 | dev_err(bus->dev, "%s: No matching event handlers found for %d\n", |
| 1170 | __func__, tplg_w->event_type); |
| 1171 | return -EINVAL; |
| 1172 | } |
| 1173 | |
| 1174 | return 0; |
| 1175 | } |
| 1176 | |
| 1177 | static struct snd_soc_tplg_ops skl_tplg_ops = { |
| 1178 | .widget_load = skl_tplg_widget_load, |
| 1179 | }; |
| 1180 | |
| 1181 | /* This will be read from topology manifest, currently defined here */ |
| 1182 | #define SKL_MAX_MCPS 30000000 |
| 1183 | #define SKL_FW_MAX_MEM 1000000 |
| 1184 | |
| 1185 | /* |
| 1186 | * SKL topology init routine |
| 1187 | */ |
| 1188 | int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus) |
| 1189 | { |
| 1190 | int ret; |
| 1191 | const struct firmware *fw; |
| 1192 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
| 1193 | struct skl *skl = ebus_to_skl(ebus); |
| 1194 | |
| 1195 | ret = request_firmware(&fw, "dfw_sst.bin", bus->dev); |
| 1196 | if (ret < 0) { |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1197 | dev_err(bus->dev, "tplg fw %s load failed with %d\n", |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1198 | "dfw_sst.bin", ret); |
| 1199 | return ret; |
| 1200 | } |
| 1201 | |
| 1202 | /* |
| 1203 | * The complete tplg for SKL is loaded as index 0, we don't use |
| 1204 | * any other index |
| 1205 | */ |
Jeeja KP | b663a8c | 2015-10-07 11:31:57 +0100 | [diff] [blame] | 1206 | ret = snd_soc_tplg_component_load(&platform->component, |
| 1207 | &skl_tplg_ops, fw, 0); |
Vinod Koul | 3af3670 | 2015-10-07 11:31:56 +0100 | [diff] [blame] | 1208 | if (ret < 0) { |
| 1209 | dev_err(bus->dev, "tplg component load failed%d\n", ret); |
| 1210 | return -EINVAL; |
| 1211 | } |
| 1212 | |
| 1213 | skl->resource.max_mcps = SKL_MAX_MCPS; |
| 1214 | skl->resource.max_mem = SKL_FW_MAX_MEM; |
| 1215 | |
| 1216 | return 0; |
| 1217 | } |