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gerrit-public.fairphone.software / kernel / msm-5.4 / 0b2e97518da185b87144992e1f0bdacd904dcbb9 / . / arch / powerpc / boot / dts / taishan.dts
blob: 0dec702c5261622e34d7fcde9c1d0107c74db05a [file] [log] [blame]
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100[diff] [blame]1/*
2 * Device Tree Source for IBM/AMCC Taishan
3 *
4 * Copyright 2007 IBM Corp.
5 * Hugh Blemings <hugh@au.ibm.com> based off code by
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without
10 * any warranty of any kind, whether express or implied.
11 */
12
13/ {
14 #address-cells = <2>;
15 #size-cells = <1>;
16 model = "amcc,taishan";
17 compatible = "amcc,taishan";
Josh Boyer72fda112007-12-06 13:20:05 -0600[diff] [blame]18 dcr-parent = <&/cpus/cpu@0>;
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100[diff] [blame]19
20 cpus {
21 #address-cells = <1>;
22 #size-cells = <0>;
23
Josh Boyer72fda112007-12-06 13:20:05 -0600[diff] [blame]24 cpu@0 {
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100[diff] [blame]25 device_type = "cpu";
Josh Boyer72fda112007-12-06 13:20:05 -0600[diff] [blame]26 model = "PowerPC,440GX";
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100[diff] [blame]27 reg = <0>;
28 clock-frequency = <2FAF0800>; // 800MHz
29 timebase-frequency = <0>; // Filled in by zImage
30 i-cache-line-size = <32>;
31 d-cache-line-size = <32>;
32 i-cache-size = <8000>; /* 32 kB */
33 d-cache-size = <8000>; /* 32 kB */
34 dcr-controller;
35 dcr-access-method = "native";
36 };
37 };
38
39 memory {
40 device_type = "memory";
41 reg = <0 0 0>; // Filled in by zImage
42 };
43
44
45 UICB0: interrupt-controller-base {
46 compatible = "ibm,uic-440gx", "ibm,uic";
47 interrupt-controller;
48 cell-index = <3>;
49 dcr-reg = <200 009>;
50 #address-cells = <0>;
51 #size-cells = <0>;
52 #interrupt-cells = <2>;
53 };
54
55
56 UIC0: interrupt-controller0 {
57 compatible = "ibm,uic-440gx", "ibm,uic";
58 interrupt-controller;
59 cell-index = <0>;
60 dcr-reg = <0c0 009>;
61 #address-cells = <0>;
62 #size-cells = <0>;
63 #interrupt-cells = <2>;
64 interrupts = <01 4 00 4>; /* cascade - first non-critical */
65 interrupt-parent = <&UICB0>;
66
67 };
68
69 UIC1: interrupt-controller1 {
70 compatible = "ibm,uic-440gx", "ibm,uic";
71 interrupt-controller;
72 cell-index = <1>;
73 dcr-reg = <0d0 009>;
74 #address-cells = <0>;
75 #size-cells = <0>;
76 #interrupt-cells = <2>;
77 interrupts = <03 4 02 4>; /* cascade */
78 interrupt-parent = <&UICB0>;
79 };
80
81 UIC2: interrupt-controller2 {
82 compatible = "ibm,uic-440gx", "ibm,uic";
83 interrupt-controller;
84 cell-index = <2>; /* was 1 */
85 dcr-reg = <210 009>;
86 #address-cells = <0>;
87 #size-cells = <0>;
88 #interrupt-cells = <2>;
89 interrupts = <05 4 04 4>; /* cascade */
90 interrupt-parent = <&UICB0>;
91 };
92
93
94 CPC0: cpc {
95 compatible = "ibm,cpc-440gp";
96 dcr-reg = <0b0 003 0e0 010>;
97 // FIXME: anything else?
98 };
99
100 plb {
101 compatible = "ibm,plb-440gx", "ibm,plb4";
102 #address-cells = <2>;
103 #size-cells = <1>;
104 ranges;
105 clock-frequency = <9896800>; // 160MHz
106
107 SDRAM0: memory-controller {
108 compatible = "ibm,sdram-440gp";
109 dcr-reg = <010 2>;
110 // FIXME: anything else?
111 };
112
113 SRAM0: sram {
114 compatible = "ibm,sram-440gp";
115 dcr-reg = <020 8 00a 1>;
116 };
117
118 DMA0: dma {
119 // FIXME: ???
120 compatible = "ibm,dma-440gp";
121 dcr-reg = <100 027>;
122 };
123
124 MAL0: mcmal {
125 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
126 dcr-reg = <180 62>;
127 num-tx-chans = <4>;
128 num-rx-chans = <4>;
129 interrupt-parent = <&MAL0>;
130 interrupts = <0 1 2 3 4>;
131 #interrupt-cells = <1>;
132 #address-cells = <0>;
133 #size-cells = <0>;
134 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
135 /*RXEOB*/ 1 &UIC0 b 4
136 /*SERR*/ 2 &UIC1 0 4
137 /*TXDE*/ 3 &UIC1 1 4
138 /*RXDE*/ 4 &UIC1 2 4>;
139 interrupt-map-mask = <ffffffff>;
140 };
141
142 POB0: opb {
143 compatible = "ibm,opb-440gx", "ibm,opb";
144 #address-cells = <1>;
145 #size-cells = <1>;
146 /* Wish there was a nicer way of specifying a full 32-bit
147 range */
148 ranges = <00000000 1 00000000 80000000
149 80000000 1 80000000 80000000>;
150 dcr-reg = <090 00b>;
151 interrupt-parent = <&UIC1>;
152 interrupts = <7 4>;
153 clock-frequency = <4C4B400>; // 80MHz
154
155
156 EBC0: ebc {
157 compatible = "ibm,ebc-440gx", "ibm,ebc";
158 dcr-reg = <012 2>;
159 #address-cells = <2>;
160 #size-cells = <1>;
161 clock-frequency = <4C4B400>; // 80MHz
162
163 /* ranges property is supplied by zImage
164 * based on firmware's configuration of the
165 * EBC bridge */
166
167 interrupts = <5 4>;
168 interrupt-parent = <&UIC1>;
169
170 /* TODO: Add other EBC devices */
171 };
172
173
174
175 UART0: serial@40000200 {
176 device_type = "serial";
177 compatible = "ns16550";
178 reg = <40000200 8>;
179 virtual-reg = <e0000200>;
180 clock-frequency = <A8C000>;
181 current-speed = <1C200>; /* 115200 */
182 interrupt-parent = <&UIC0>;
183 interrupts = <0 4>;
184 };
185
186 UART1: serial@40000300 {
187 device_type = "serial";
188 compatible = "ns16550";
189 reg = <40000300 8>;
190 virtual-reg = <e0000300>;
191 clock-frequency = <A8C000>;
192 current-speed = <1C200>; /* 115200 */
193 interrupt-parent = <&UIC0>;
194 interrupts = <1 4>;
195 };
196
197 IIC0: i2c@40000400 {
198 /* FIXME */
199 device_type = "i2c";
200 compatible = "ibm,iic-440gp", "ibm,iic";
201 reg = <40000400 14>;
202 interrupt-parent = <&UIC0>;
203 interrupts = <2 4>;
204 };
205 IIC1: i2c@40000500 {
206 /* FIXME */
207 device_type = "i2c";
208 compatible = "ibm,iic-440gp", "ibm,iic";
209 reg = <40000500 14>;
210 interrupt-parent = <&UIC0>;
211 interrupts = <3 4>;
212 };
213
214 GPIO0: gpio@40000700 {
215 /* FIXME */
216 compatible = "ibm,gpio-440gp";
217 reg = <40000700 20>;
218 };
219
220 ZMII0: emac-zmii@40000780 {
221 device_type = "zgmii-interface";
222 compatible = "ibm,zmii-440gx", "ibm,zmii";
223 reg = <40000780 c>;
224 };
225
226 RGMII0: emac-rgmii@40000790 {
227 device_type = "rgmii-interface";
228 compatible = "ibm,rgmii";
229 reg = <40000790 8>;
230 };
231
232
233 EMAC0: ethernet@40000800 {
234 unused = <1>;
235 linux,network-index = <2>;
236 device_type = "network";
237 compatible = "ibm,emac-440gx", "ibm,emac4";
238 interrupt-parent = <&UIC1>;
239 interrupts = <1c 4 1d 4>;
240 reg = <40000800 70>;
241 local-mac-address = [000000000000]; // Filled in by zImage
242 mal-device = <&MAL0>;
243 mal-tx-channel = <0>;
244 mal-rx-channel = <0>;
245 cell-index = <0>;
246 max-frame-size = <5dc>;
247 rx-fifo-size = <1000>;
248 tx-fifo-size = <800>;
249 phy-mode = "rmii";
250 phy-map = <00000001>;
251 zmii-device = <&ZMII0>;
252 zmii-channel = <0>;
253 };
254 EMAC1: ethernet@40000900 {
255 unused = <1>;
256 linux,network-index = <3>;
257 device_type = "network";
258 compatible = "ibm,emac-440gx", "ibm,emac4";
259 interrupt-parent = <&UIC1>;
260 interrupts = <1e 4 1f 4>;
261 reg = <40000900 70>;
262 local-mac-address = [000000000000]; // Filled in by zImage
263 mal-device = <&MAL0>;
264 mal-tx-channel = <1>;
265 mal-rx-channel = <1>;
266 cell-index = <1>;
267 max-frame-size = <5dc>;
268 rx-fifo-size = <1000>;
269 tx-fifo-size = <800>;
270 phy-mode = "rmii";
271 phy-map = <00000001>;
272 zmii-device = <&ZMII0>;
273 zmii-channel = <1>;
274 };
275
276 EMAC2: ethernet@40000c00 {
277 linux,network-index = <0>;
278 device_type = "network";
279 compatible = "ibm,emac-440gx", "ibm,emac4";
280 interrupt-parent = <&UIC2>;
281 interrupts = <0 4 1 4>;
282 reg = <40000c00 70>;
283 local-mac-address = [000000000000]; // Filled in by zImage
284 mal-device = <&MAL0>;
285 mal-tx-channel = <2>;
286 mal-rx-channel = <2>;
287 cell-index = <2>;
288 max-frame-size = <5dc>;
289 rx-fifo-size = <1000>;
290 tx-fifo-size = <800>;
291 phy-mode = "rgmii";
292 phy-map = <00000001>;
293 rgmii-device = <&RGMII0>;
294 rgmii-channel = <0>;
295 zmii-device = <&ZMII0>;
296 zmii-channel = <2>;
297 };
298
299 EMAC3: ethernet@40000e00 {
300 linux,network-index = <1>;
301 device_type = "network";
302 compatible = "ibm,emac-440gx", "ibm,emac4";
303 interrupt-parent = <&UIC2>;
304 interrupts = <2 4 3 4>;
305 reg = <40000e00 70>;
306 local-mac-address = [000000000000]; // Filled in by zImage
307 mal-device = <&MAL0>;
308 mal-tx-channel = <3>;
309 mal-rx-channel = <3>;
310 cell-index = <3>;
311 max-frame-size = <5dc>;
312 rx-fifo-size = <1000>;
313 tx-fifo-size = <800>;
314 phy-mode = "rgmii";
315 phy-map = <00000003>;
316 rgmii-device = <&RGMII0>;
317 rgmii-channel = <1>;
318 zmii-device = <&ZMII0>;
319 zmii-channel = <3>;
320 };
321
322
323 GPT0: gpt@40000a00 {
324 /* FIXME */
325 reg = <40000a00 d4>;
326 interrupt-parent = <&UIC0>;
327 interrupts = <12 4 13 4 14 4 15 4 16 4>;
328 };
329
330 };
331
332 PCIX0: pci@20ec00000 {
333 device_type = "pci";
334 #interrupt-cells = <1>;
335 #size-cells = <2>;
336 #address-cells = <3>;
337 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
338 primary;
339 large-inbound-windows;
340 enable-msi-hole;
341 reg = <2 0ec00000 8 /* Config space access */
342 0 0 0 /* no IACK cycles */
343 2 0ed00000 4 /* Special cycles */
344 2 0ec80000 100 /* Internal registers */
345 2 0ec80100 fc>; /* Internal messaging registers */
346
347 /* Outbound ranges, one memory and one IO,
348 * later cannot be changed
349 */
350 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
351 01000000 0 00000000 00000002 08000000 0 00010000>;
352
353 /* Inbound 2GB range starting at 0 */
354 dma-ranges = <42000000 0 0 0 0 0 80000000>;
355
356 interrupt-map-mask = <f800 0 0 7>;
357 interrupt-map = <
358 /* IDSEL 1 */
359 0800 0 0 1 &UIC0 17 8
360 0800 0 0 2 &UIC0 18 8
361 0800 0 0 3 &UIC0 19 8
362 0800 0 0 4 &UIC0 1a 8
363
364 /* IDSEL 2 */
365 1000 0 0 1 &UIC0 18 8
366 1000 0 0 2 &UIC0 19 8
367 1000 0 0 3 &UIC0 1a 8
368 1000 0 0 4 &UIC0 17 8
369 >;
370 };
371 };
372
373 chosen {
374 linux,stdout-path = "/plb/opb/serial@40000300";
375 };
376};