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Carlo Caionecfb61a42014-05-01 14:29:27 +02001/*
2 * Functions and registers to access AXP20X power management chip.
3 *
4 * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __LINUX_MFD_AXP20X_H
12#define __LINUX_MFD_AXP20X_H
13
Hans de Goede69fb4dc2015-08-01 10:39:38 +020014#include <linux/regmap.h>
15
Michal Suchanek15df6d92017-01-10 18:48:12 +010016enum axp20x_variants {
Michal Suchanekd8d79f82015-07-11 14:59:56 +020017 AXP152_ID = 0,
18 AXP202_ID,
Carlo Caionecfb61a42014-05-01 14:29:27 +020019 AXP209_ID,
Boris BREZILLONf05be582015-04-10 12:09:01 +080020 AXP221_ID,
Chen-Yu Tsai02071f02016-02-12 10:02:44 +080021 AXP223_ID,
Jacob Panaf7e9062014-10-06 21:17:14 -070022 AXP288_ID,
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +080023 AXP806_ID,
Chen-Yu Tsai20147f02016-03-29 17:22:26 +080024 AXP809_ID,
Jacob Panaf7e9062014-10-06 21:17:14 -070025 NR_AXP20X_VARIANTS,
Carlo Caionecfb61a42014-05-01 14:29:27 +020026};
27
28#define AXP20X_DATACACHE(m) (0x04 + (m))
29
30/* Power supply */
Michal Suchanekd8d79f82015-07-11 14:59:56 +020031#define AXP152_PWR_OP_MODE 0x01
32#define AXP152_LDO3456_DC1234_CTRL 0x12
33#define AXP152_ALDO_OP_MODE 0x13
34#define AXP152_LDO0_CTRL 0x15
35#define AXP152_DCDC2_V_OUT 0x23
36#define AXP152_DCDC2_V_SCAL 0x25
37#define AXP152_DCDC1_V_OUT 0x26
38#define AXP152_DCDC3_V_OUT 0x27
39#define AXP152_ALDO12_V_OUT 0x28
40#define AXP152_DLDO1_V_OUT 0x29
41#define AXP152_DLDO2_V_OUT 0x2a
42#define AXP152_DCDC4_V_OUT 0x2b
43#define AXP152_V_OFF 0x31
44#define AXP152_OFF_CTRL 0x32
45#define AXP152_PEK_KEY 0x36
46#define AXP152_DCDC_FREQ 0x37
47#define AXP152_DCDC_MODE 0x80
48
Carlo Caionecfb61a42014-05-01 14:29:27 +020049#define AXP20X_PWR_INPUT_STATUS 0x00
50#define AXP20X_PWR_OP_MODE 0x01
51#define AXP20X_USB_OTG_STATUS 0x02
52#define AXP20X_PWR_OUT_CTRL 0x12
53#define AXP20X_DCDC2_V_OUT 0x23
54#define AXP20X_DCDC2_LDO3_V_SCAL 0x25
55#define AXP20X_DCDC3_V_OUT 0x27
56#define AXP20X_LDO24_V_OUT 0x28
57#define AXP20X_LDO3_V_OUT 0x29
58#define AXP20X_VBUS_IPSOUT_MGMT 0x30
59#define AXP20X_V_OFF 0x31
60#define AXP20X_OFF_CTRL 0x32
61#define AXP20X_CHRG_CTRL1 0x33
62#define AXP20X_CHRG_CTRL2 0x34
63#define AXP20X_CHRG_BAK_CTRL 0x35
64#define AXP20X_PEK_KEY 0x36
65#define AXP20X_DCDC_FREQ 0x37
66#define AXP20X_V_LTF_CHRG 0x38
67#define AXP20X_V_HTF_CHRG 0x39
68#define AXP20X_APS_WARN_L1 0x3a
69#define AXP20X_APS_WARN_L2 0x3b
70#define AXP20X_V_LTF_DISCHRG 0x3c
71#define AXP20X_V_HTF_DISCHRG 0x3d
72
Boris BREZILLONf05be582015-04-10 12:09:01 +080073#define AXP22X_PWR_OUT_CTRL1 0x10
74#define AXP22X_PWR_OUT_CTRL2 0x12
75#define AXP22X_PWR_OUT_CTRL3 0x13
76#define AXP22X_DLDO1_V_OUT 0x15
77#define AXP22X_DLDO2_V_OUT 0x16
78#define AXP22X_DLDO3_V_OUT 0x17
79#define AXP22X_DLDO4_V_OUT 0x18
80#define AXP22X_ELDO1_V_OUT 0x19
81#define AXP22X_ELDO2_V_OUT 0x1a
82#define AXP22X_ELDO3_V_OUT 0x1b
83#define AXP22X_DC5LDO_V_OUT 0x1c
84#define AXP22X_DCDC1_V_OUT 0x21
85#define AXP22X_DCDC2_V_OUT 0x22
86#define AXP22X_DCDC3_V_OUT 0x23
87#define AXP22X_DCDC4_V_OUT 0x24
88#define AXP22X_DCDC5_V_OUT 0x25
89#define AXP22X_DCDC23_V_RAMP_CTRL 0x27
90#define AXP22X_ALDO1_V_OUT 0x28
91#define AXP22X_ALDO2_V_OUT 0x29
92#define AXP22X_ALDO3_V_OUT 0x2a
93#define AXP22X_CHRG_CTRL3 0x35
94
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +080095#define AXP806_STARTUP_SRC 0x00
96#define AXP806_CHIP_ID 0x03
97#define AXP806_PWR_OUT_CTRL1 0x10
98#define AXP806_PWR_OUT_CTRL2 0x11
99#define AXP806_DCDCA_V_CTRL 0x12
100#define AXP806_DCDCB_V_CTRL 0x13
101#define AXP806_DCDCC_V_CTRL 0x14
102#define AXP806_DCDCD_V_CTRL 0x15
103#define AXP806_DCDCE_V_CTRL 0x16
104#define AXP806_ALDO1_V_CTRL 0x17
105#define AXP806_ALDO2_V_CTRL 0x18
106#define AXP806_ALDO3_V_CTRL 0x19
107#define AXP806_DCDC_MODE_CTRL1 0x1a
108#define AXP806_DCDC_MODE_CTRL2 0x1b
109#define AXP806_DCDC_FREQ_CTRL 0x1c
110#define AXP806_BLDO1_V_CTRL 0x20
111#define AXP806_BLDO2_V_CTRL 0x21
112#define AXP806_BLDO3_V_CTRL 0x22
113#define AXP806_BLDO4_V_CTRL 0x23
114#define AXP806_CLDO1_V_CTRL 0x24
115#define AXP806_CLDO2_V_CTRL 0x25
116#define AXP806_CLDO3_V_CTRL 0x26
117#define AXP806_VREF_TEMP_WARN_L 0xf3
Chen-Yu Tsai34d90302016-11-11 11:29:52 +0800118#define AXP806_BUS_ADDR_EXT 0xfe
119#define AXP806_REG_ADDR_EXT 0xff
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800120
Carlo Caionecfb61a42014-05-01 14:29:27 +0200121/* Interrupt */
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200122#define AXP152_IRQ1_EN 0x40
123#define AXP152_IRQ2_EN 0x41
124#define AXP152_IRQ3_EN 0x42
125#define AXP152_IRQ1_STATE 0x48
126#define AXP152_IRQ2_STATE 0x49
127#define AXP152_IRQ3_STATE 0x4a
128
Carlo Caionecfb61a42014-05-01 14:29:27 +0200129#define AXP20X_IRQ1_EN 0x40
130#define AXP20X_IRQ2_EN 0x41
131#define AXP20X_IRQ3_EN 0x42
132#define AXP20X_IRQ4_EN 0x43
133#define AXP20X_IRQ5_EN 0x44
Jacob Panaf7e9062014-10-06 21:17:14 -0700134#define AXP20X_IRQ6_EN 0x45
Carlo Caionecfb61a42014-05-01 14:29:27 +0200135#define AXP20X_IRQ1_STATE 0x48
136#define AXP20X_IRQ2_STATE 0x49
137#define AXP20X_IRQ3_STATE 0x4a
138#define AXP20X_IRQ4_STATE 0x4b
139#define AXP20X_IRQ5_STATE 0x4c
Jacob Panaf7e9062014-10-06 21:17:14 -0700140#define AXP20X_IRQ6_STATE 0x4d
Carlo Caionecfb61a42014-05-01 14:29:27 +0200141
142/* ADC */
143#define AXP20X_ACIN_V_ADC_H 0x56
144#define AXP20X_ACIN_V_ADC_L 0x57
145#define AXP20X_ACIN_I_ADC_H 0x58
146#define AXP20X_ACIN_I_ADC_L 0x59
147#define AXP20X_VBUS_V_ADC_H 0x5a
148#define AXP20X_VBUS_V_ADC_L 0x5b
149#define AXP20X_VBUS_I_ADC_H 0x5c
150#define AXP20X_VBUS_I_ADC_L 0x5d
151#define AXP20X_TEMP_ADC_H 0x5e
152#define AXP20X_TEMP_ADC_L 0x5f
153#define AXP20X_TS_IN_H 0x62
154#define AXP20X_TS_IN_L 0x63
155#define AXP20X_GPIO0_V_ADC_H 0x64
156#define AXP20X_GPIO0_V_ADC_L 0x65
157#define AXP20X_GPIO1_V_ADC_H 0x66
158#define AXP20X_GPIO1_V_ADC_L 0x67
159#define AXP20X_PWR_BATT_H 0x70
160#define AXP20X_PWR_BATT_M 0x71
161#define AXP20X_PWR_BATT_L 0x72
162#define AXP20X_BATT_V_H 0x78
163#define AXP20X_BATT_V_L 0x79
164#define AXP20X_BATT_CHRG_I_H 0x7a
165#define AXP20X_BATT_CHRG_I_L 0x7b
166#define AXP20X_BATT_DISCHRG_I_H 0x7c
167#define AXP20X_BATT_DISCHRG_I_L 0x7d
168#define AXP20X_IPSOUT_V_HIGH_H 0x7e
169#define AXP20X_IPSOUT_V_HIGH_L 0x7f
170
171/* Power supply */
172#define AXP20X_DCDC_MODE 0x80
173#define AXP20X_ADC_EN1 0x82
174#define AXP20X_ADC_EN2 0x83
175#define AXP20X_ADC_RATE 0x84
176#define AXP20X_GPIO10_IN_RANGE 0x85
177#define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
178#define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
179#define AXP20X_TIMER_CTRL 0x8a
180#define AXP20X_VBUS_MON 0x8b
181#define AXP20X_OVER_TMP 0x8f
182
Boris BREZILLONf05be582015-04-10 12:09:01 +0800183#define AXP22X_PWREN_CTRL1 0x8c
184#define AXP22X_PWREN_CTRL2 0x8d
185
Carlo Caionecfb61a42014-05-01 14:29:27 +0200186/* GPIO */
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200187#define AXP152_GPIO0_CTRL 0x90
188#define AXP152_GPIO1_CTRL 0x91
189#define AXP152_GPIO2_CTRL 0x92
190#define AXP152_GPIO3_CTRL 0x93
191#define AXP152_LDOGPIO2_V_OUT 0x96
192#define AXP152_GPIO_INPUT 0x97
193#define AXP152_PWM0_FREQ_X 0x98
194#define AXP152_PWM0_FREQ_Y 0x99
195#define AXP152_PWM0_DUTY_CYCLE 0x9a
196#define AXP152_PWM1_FREQ_X 0x9b
197#define AXP152_PWM1_FREQ_Y 0x9c
198#define AXP152_PWM1_DUTY_CYCLE 0x9d
199
Carlo Caionecfb61a42014-05-01 14:29:27 +0200200#define AXP20X_GPIO0_CTRL 0x90
201#define AXP20X_LDO5_V_OUT 0x91
202#define AXP20X_GPIO1_CTRL 0x92
203#define AXP20X_GPIO2_CTRL 0x93
204#define AXP20X_GPIO20_SS 0x94
205#define AXP20X_GPIO3_CTRL 0x95
206
Boris BREZILLONf05be582015-04-10 12:09:01 +0800207#define AXP22X_LDO_IO0_V_OUT 0x91
208#define AXP22X_LDO_IO1_V_OUT 0x93
209#define AXP22X_GPIO_STATE 0x94
210#define AXP22X_GPIO_PULL_DOWN 0x95
211
Carlo Caionecfb61a42014-05-01 14:29:27 +0200212/* Battery */
213#define AXP20X_CHRG_CC_31_24 0xb0
214#define AXP20X_CHRG_CC_23_16 0xb1
215#define AXP20X_CHRG_CC_15_8 0xb2
216#define AXP20X_CHRG_CC_7_0 0xb3
217#define AXP20X_DISCHRG_CC_31_24 0xb4
218#define AXP20X_DISCHRG_CC_23_16 0xb5
219#define AXP20X_DISCHRG_CC_15_8 0xb6
220#define AXP20X_DISCHRG_CC_7_0 0xb7
221#define AXP20X_CC_CTRL 0xb8
222#define AXP20X_FG_RES 0xb9
223
Bruno Prémont553ed4b2015-08-08 17:58:40 +0200224/* OCV */
225#define AXP20X_RDC_H 0xba
226#define AXP20X_RDC_L 0xbb
227#define AXP20X_OCV(m) (0xc0 + (m))
228#define AXP20X_OCV_MAX 0xf
229
Boris BREZILLONf05be582015-04-10 12:09:01 +0800230/* AXP22X specific registers */
Icenowy Zheng3f895862016-07-01 17:29:23 +0800231#define AXP22X_PMIC_ADC_H 0x56
232#define AXP22X_PMIC_ADC_L 0x57
233#define AXP22X_TS_ADC_H 0x58
234#define AXP22X_TS_ADC_L 0x59
Boris BREZILLONf05be582015-04-10 12:09:01 +0800235#define AXP22X_BATLOW_THRES1 0xe6
236
Jacob Panaf7e9062014-10-06 21:17:14 -0700237/* AXP288 specific registers */
Hans de Goede178e8352016-12-16 21:09:05 +0100238#define AXP288_POWER_REASON 0x02
239#define AXP288_BC_GLOBAL 0x2c
240#define AXP288_BC_VBUS_CNTL 0x2d
241#define AXP288_BC_USB_STAT 0x2e
242#define AXP288_BC_DET_STAT 0x2f
Jacob Panaf7e9062014-10-06 21:17:14 -0700243#define AXP288_PMIC_ADC_H 0x56
244#define AXP288_PMIC_ADC_L 0x57
Hans de Goede178e8352016-12-16 21:09:05 +0100245#define AXP288_TS_ADC_H 0x58
246#define AXP288_TS_ADC_L 0x59
247#define AXP288_GP_ADC_H 0x5a
248#define AXP288_GP_ADC_L 0x5b
Jacob Panaf7e9062014-10-06 21:17:14 -0700249#define AXP288_ADC_TS_PIN_CTRL 0x84
Hans de Goede178e8352016-12-16 21:09:05 +0100250#define AXP288_RT_BATT_V_H 0xa0
251#define AXP288_RT_BATT_V_L 0xa1
Jacob Panaf7e9062014-10-06 21:17:14 -0700252
Todd E Brandt774e0b42015-01-07 13:25:52 -0800253/* Fuel Gauge */
254#define AXP288_FG_RDC1_REG 0xba
255#define AXP288_FG_RDC0_REG 0xbb
256#define AXP288_FG_OCVH_REG 0xbc
257#define AXP288_FG_OCVL_REG 0xbd
258#define AXP288_FG_OCV_CURVE_REG 0xc0
259#define AXP288_FG_DES_CAP1_REG 0xe0
260#define AXP288_FG_DES_CAP0_REG 0xe1
261#define AXP288_FG_CC_MTR1_REG 0xe2
262#define AXP288_FG_CC_MTR0_REG 0xe3
263#define AXP288_FG_OCV_CAP_REG 0xe4
264#define AXP288_FG_CC_CAP_REG 0xe5
265#define AXP288_FG_LOW_CAP_REG 0xe6
266#define AXP288_FG_TUNE0 0xe8
267#define AXP288_FG_TUNE1 0xe9
268#define AXP288_FG_TUNE2 0xea
269#define AXP288_FG_TUNE3 0xeb
270#define AXP288_FG_TUNE4 0xec
271#define AXP288_FG_TUNE5 0xed
Jacob Panaf7e9062014-10-06 21:17:14 -0700272
Carlo Caionecfb61a42014-05-01 14:29:27 +0200273/* Regulators IDs */
274enum {
275 AXP20X_LDO1 = 0,
276 AXP20X_LDO2,
277 AXP20X_LDO3,
278 AXP20X_LDO4,
279 AXP20X_LDO5,
280 AXP20X_DCDC2,
281 AXP20X_DCDC3,
282 AXP20X_REG_ID_MAX,
283};
284
Boris BREZILLONf05be582015-04-10 12:09:01 +0800285enum {
286 AXP22X_DCDC1 = 0,
287 AXP22X_DCDC2,
288 AXP22X_DCDC3,
289 AXP22X_DCDC4,
290 AXP22X_DCDC5,
291 AXP22X_DC1SW,
292 AXP22X_DC5LDO,
293 AXP22X_ALDO1,
294 AXP22X_ALDO2,
295 AXP22X_ALDO3,
296 AXP22X_ELDO1,
297 AXP22X_ELDO2,
298 AXP22X_ELDO3,
299 AXP22X_DLDO1,
300 AXP22X_DLDO2,
301 AXP22X_DLDO3,
302 AXP22X_DLDO4,
303 AXP22X_RTC_LDO,
304 AXP22X_LDO_IO0,
305 AXP22X_LDO_IO1,
306 AXP22X_REG_ID_MAX,
307};
308
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800309enum {
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800310 AXP806_DCDCA = 0,
311 AXP806_DCDCB,
312 AXP806_DCDCC,
313 AXP806_DCDCD,
314 AXP806_DCDCE,
315 AXP806_ALDO1,
316 AXP806_ALDO2,
317 AXP806_ALDO3,
318 AXP806_BLDO1,
319 AXP806_BLDO2,
320 AXP806_BLDO3,
321 AXP806_BLDO4,
322 AXP806_CLDO1,
323 AXP806_CLDO2,
324 AXP806_CLDO3,
325 AXP806_SW,
326 AXP806_REG_ID_MAX,
327};
328
329enum {
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800330 AXP809_DCDC1 = 0,
331 AXP809_DCDC2,
332 AXP809_DCDC3,
333 AXP809_DCDC4,
334 AXP809_DCDC5,
335 AXP809_DC1SW,
336 AXP809_DC5LDO,
337 AXP809_ALDO1,
338 AXP809_ALDO2,
339 AXP809_ALDO3,
340 AXP809_ELDO1,
341 AXP809_ELDO2,
342 AXP809_ELDO3,
343 AXP809_DLDO1,
344 AXP809_DLDO2,
345 AXP809_RTC_LDO,
346 AXP809_LDO_IO0,
347 AXP809_LDO_IO1,
348 AXP809_SW,
349 AXP809_REG_ID_MAX,
350};
351
Carlo Caionecfb61a42014-05-01 14:29:27 +0200352/* IRQs */
353enum {
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200354 AXP152_IRQ_LDO0IN_CONNECT = 1,
355 AXP152_IRQ_LDO0IN_REMOVAL,
356 AXP152_IRQ_ALDO0IN_CONNECT,
357 AXP152_IRQ_ALDO0IN_REMOVAL,
358 AXP152_IRQ_DCDC1_V_LOW,
359 AXP152_IRQ_DCDC2_V_LOW,
360 AXP152_IRQ_DCDC3_V_LOW,
361 AXP152_IRQ_DCDC4_V_LOW,
362 AXP152_IRQ_PEK_SHORT,
363 AXP152_IRQ_PEK_LONG,
364 AXP152_IRQ_TIMER,
365 AXP152_IRQ_PEK_RIS_EDGE,
366 AXP152_IRQ_PEK_FAL_EDGE,
367 AXP152_IRQ_GPIO3_INPUT,
368 AXP152_IRQ_GPIO2_INPUT,
369 AXP152_IRQ_GPIO1_INPUT,
370 AXP152_IRQ_GPIO0_INPUT,
371};
372
373enum {
Carlo Caionecfb61a42014-05-01 14:29:27 +0200374 AXP20X_IRQ_ACIN_OVER_V = 1,
375 AXP20X_IRQ_ACIN_PLUGIN,
376 AXP20X_IRQ_ACIN_REMOVAL,
377 AXP20X_IRQ_VBUS_OVER_V,
378 AXP20X_IRQ_VBUS_PLUGIN,
379 AXP20X_IRQ_VBUS_REMOVAL,
380 AXP20X_IRQ_VBUS_V_LOW,
381 AXP20X_IRQ_BATT_PLUGIN,
382 AXP20X_IRQ_BATT_REMOVAL,
383 AXP20X_IRQ_BATT_ENT_ACT_MODE,
384 AXP20X_IRQ_BATT_EXIT_ACT_MODE,
385 AXP20X_IRQ_CHARG,
386 AXP20X_IRQ_CHARG_DONE,
387 AXP20X_IRQ_BATT_TEMP_HIGH,
388 AXP20X_IRQ_BATT_TEMP_LOW,
389 AXP20X_IRQ_DIE_TEMP_HIGH,
390 AXP20X_IRQ_CHARG_I_LOW,
391 AXP20X_IRQ_DCDC1_V_LONG,
392 AXP20X_IRQ_DCDC2_V_LONG,
393 AXP20X_IRQ_DCDC3_V_LONG,
394 AXP20X_IRQ_PEK_SHORT = 22,
395 AXP20X_IRQ_PEK_LONG,
396 AXP20X_IRQ_N_OE_PWR_ON,
397 AXP20X_IRQ_N_OE_PWR_OFF,
398 AXP20X_IRQ_VBUS_VALID,
399 AXP20X_IRQ_VBUS_NOT_VALID,
400 AXP20X_IRQ_VBUS_SESS_VALID,
401 AXP20X_IRQ_VBUS_SESS_END,
402 AXP20X_IRQ_LOW_PWR_LVL1,
403 AXP20X_IRQ_LOW_PWR_LVL2,
404 AXP20X_IRQ_TIMER,
405 AXP20X_IRQ_PEK_RIS_EDGE,
406 AXP20X_IRQ_PEK_FAL_EDGE,
407 AXP20X_IRQ_GPIO3_INPUT,
408 AXP20X_IRQ_GPIO2_INPUT,
409 AXP20X_IRQ_GPIO1_INPUT,
410 AXP20X_IRQ_GPIO0_INPUT,
411};
412
Boris BREZILLONf05be582015-04-10 12:09:01 +0800413enum axp22x_irqs {
414 AXP22X_IRQ_ACIN_OVER_V = 1,
415 AXP22X_IRQ_ACIN_PLUGIN,
416 AXP22X_IRQ_ACIN_REMOVAL,
417 AXP22X_IRQ_VBUS_OVER_V,
418 AXP22X_IRQ_VBUS_PLUGIN,
419 AXP22X_IRQ_VBUS_REMOVAL,
420 AXP22X_IRQ_VBUS_V_LOW,
421 AXP22X_IRQ_BATT_PLUGIN,
422 AXP22X_IRQ_BATT_REMOVAL,
423 AXP22X_IRQ_BATT_ENT_ACT_MODE,
424 AXP22X_IRQ_BATT_EXIT_ACT_MODE,
425 AXP22X_IRQ_CHARG,
426 AXP22X_IRQ_CHARG_DONE,
427 AXP22X_IRQ_BATT_TEMP_HIGH,
428 AXP22X_IRQ_BATT_TEMP_LOW,
429 AXP22X_IRQ_DIE_TEMP_HIGH,
430 AXP22X_IRQ_PEK_SHORT,
431 AXP22X_IRQ_PEK_LONG,
432 AXP22X_IRQ_LOW_PWR_LVL1,
433 AXP22X_IRQ_LOW_PWR_LVL2,
434 AXP22X_IRQ_TIMER,
435 AXP22X_IRQ_PEK_RIS_EDGE,
436 AXP22X_IRQ_PEK_FAL_EDGE,
437 AXP22X_IRQ_GPIO1_INPUT,
438 AXP22X_IRQ_GPIO0_INPUT,
439};
440
Jacob Panaf7e9062014-10-06 21:17:14 -0700441enum axp288_irqs {
442 AXP288_IRQ_VBUS_FALL = 2,
443 AXP288_IRQ_VBUS_RISE,
444 AXP288_IRQ_OV,
445 AXP288_IRQ_FALLING_ALT,
446 AXP288_IRQ_RISING_ALT,
447 AXP288_IRQ_OV_ALT,
448 AXP288_IRQ_DONE = 10,
449 AXP288_IRQ_CHARGING,
450 AXP288_IRQ_SAFE_QUIT,
451 AXP288_IRQ_SAFE_ENTER,
452 AXP288_IRQ_ABSENT,
453 AXP288_IRQ_APPEND,
454 AXP288_IRQ_QWBTU,
455 AXP288_IRQ_WBTU,
456 AXP288_IRQ_QWBTO,
457 AXP288_IRQ_WBTO,
458 AXP288_IRQ_QCBTU,
459 AXP288_IRQ_CBTU,
460 AXP288_IRQ_QCBTO,
461 AXP288_IRQ_CBTO,
462 AXP288_IRQ_WL2,
463 AXP288_IRQ_WL1,
464 AXP288_IRQ_GPADC,
465 AXP288_IRQ_OT = 31,
466 AXP288_IRQ_GPIO0,
467 AXP288_IRQ_GPIO1,
468 AXP288_IRQ_POKO,
469 AXP288_IRQ_POKL,
470 AXP288_IRQ_POKS,
471 AXP288_IRQ_POKN,
472 AXP288_IRQ_POKP,
473 AXP288_IRQ_TIMER,
474 AXP288_IRQ_MV_CHNG,
475 AXP288_IRQ_BC_USB_CHNG,
476};
477
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800478enum axp806_irqs {
479 AXP806_IRQ_DIE_TEMP_HIGH_LV1,
480 AXP806_IRQ_DIE_TEMP_HIGH_LV2,
481 AXP806_IRQ_DCDCA_V_LOW,
482 AXP806_IRQ_DCDCB_V_LOW,
483 AXP806_IRQ_DCDCC_V_LOW,
484 AXP806_IRQ_DCDCD_V_LOW,
485 AXP806_IRQ_DCDCE_V_LOW,
486 AXP806_IRQ_PWROK_LONG,
487 AXP806_IRQ_PWROK_SHORT,
488 AXP806_IRQ_WAKEUP,
489 AXP806_IRQ_PWROK_FALL,
490 AXP806_IRQ_PWROK_RISE,
491};
492
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800493enum axp809_irqs {
494 AXP809_IRQ_ACIN_OVER_V = 1,
495 AXP809_IRQ_ACIN_PLUGIN,
496 AXP809_IRQ_ACIN_REMOVAL,
497 AXP809_IRQ_VBUS_OVER_V,
498 AXP809_IRQ_VBUS_PLUGIN,
499 AXP809_IRQ_VBUS_REMOVAL,
500 AXP809_IRQ_VBUS_V_LOW,
501 AXP809_IRQ_BATT_PLUGIN,
502 AXP809_IRQ_BATT_REMOVAL,
503 AXP809_IRQ_BATT_ENT_ACT_MODE,
504 AXP809_IRQ_BATT_EXIT_ACT_MODE,
505 AXP809_IRQ_CHARG,
506 AXP809_IRQ_CHARG_DONE,
507 AXP809_IRQ_BATT_CHG_TEMP_HIGH,
508 AXP809_IRQ_BATT_CHG_TEMP_HIGH_END,
509 AXP809_IRQ_BATT_CHG_TEMP_LOW,
510 AXP809_IRQ_BATT_CHG_TEMP_LOW_END,
511 AXP809_IRQ_BATT_ACT_TEMP_HIGH,
512 AXP809_IRQ_BATT_ACT_TEMP_HIGH_END,
513 AXP809_IRQ_BATT_ACT_TEMP_LOW,
514 AXP809_IRQ_BATT_ACT_TEMP_LOW_END,
515 AXP809_IRQ_DIE_TEMP_HIGH,
516 AXP809_IRQ_LOW_PWR_LVL1,
517 AXP809_IRQ_LOW_PWR_LVL2,
518 AXP809_IRQ_TIMER,
519 AXP809_IRQ_PEK_RIS_EDGE,
520 AXP809_IRQ_PEK_FAL_EDGE,
521 AXP809_IRQ_PEK_SHORT,
522 AXP809_IRQ_PEK_LONG,
523 AXP809_IRQ_PEK_OVER_OFF,
524 AXP809_IRQ_GPIO1_INPUT,
525 AXP809_IRQ_GPIO0_INPUT,
526};
527
Carlo Caionecfb61a42014-05-01 14:29:27 +0200528struct axp20x_dev {
529 struct device *dev;
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800530 int irq;
Hans de Goede0a5454c2016-12-14 14:52:05 +0100531 unsigned long irq_flags;
Carlo Caionecfb61a42014-05-01 14:29:27 +0200532 struct regmap *regmap;
533 struct regmap_irq_chip_data *regmap_irqc;
534 long variant;
Jacob Panaf7e9062014-10-06 21:17:14 -0700535 int nr_cells;
536 struct mfd_cell *cells;
537 const struct regmap_config *regmap_cfg;
538 const struct regmap_irq_chip *regmap_irq_chip;
Carlo Caionecfb61a42014-05-01 14:29:27 +0200539};
540
Ramakrishna Pallalaf0312372015-04-30 20:44:45 +0530541struct axp288_extcon_pdata {
542 /* GPIO pin control to switch D+/D- lines b/w PMIC and SOC */
543 struct gpio_desc *gpio_mux_cntl;
544};
545
Hans de Goede69fb4dc2015-08-01 10:39:38 +0200546/* generic helper function for reading 9-16 bit wide regs */
547static inline int axp20x_read_variable_width(struct regmap *regmap,
548 unsigned int reg, unsigned int width)
549{
550 unsigned int reg_val, result;
551 int err;
552
553 err = regmap_read(regmap, reg, &reg_val);
554 if (err)
555 return err;
556
557 result = reg_val << (width - 8);
558
559 err = regmap_read(regmap, reg + 1, &reg_val);
560 if (err)
561 return err;
562
563 result |= reg_val;
564
565 return result;
566}
567
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800568/**
569 * axp20x_match_device(): Setup axp20x variant related fields
570 *
571 * @axp20x: axp20x device to setup (.dev field must be set)
572 * @dev: device associated with this axp20x device
573 *
574 * This lets the axp20x core configure the mfd cells and register maps
575 * for later use.
576 */
577int axp20x_match_device(struct axp20x_dev *axp20x);
578
579/**
580 * axp20x_device_probe(): Probe a configured axp20x device
581 *
582 * @axp20x: axp20x device to probe (must be configured)
583 *
584 * This function lets the axp20x core register the axp20x mfd devices
585 * and irqchip. The axp20x device passed in must be fully configured
586 * with axp20x_match_device, its irq set, and regmap created.
587 */
588int axp20x_device_probe(struct axp20x_dev *axp20x);
589
590/**
Corentin Labbe34a23322016-12-05 13:15:28 +0100591 * axp20x_device_remove(): Remove a axp20x device
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800592 *
593 * @axp20x: axp20x device to remove
594 *
595 * This tells the axp20x core to remove the associated mfd devices
596 */
597int axp20x_device_remove(struct axp20x_dev *axp20x);
598
Carlo Caionecfb61a42014-05-01 14:29:27 +0200599#endif /* __LINUX_MFD_AXP20X_H */