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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Terje Bergstrom4231c6b2013-03-22 16:34:05 +020010#ifndef HOST1X_DRM_H
11#define HOST1X_DRM_H 1
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000012
Thierry Redinge1e90642013-09-24 13:59:01 +020013#include <uapi/drm/tegra_drm.h>
14#include <linux/host1x.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include <drm/drmP.h>
17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_fb_helper.h>
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000020#include <drm/drm_fixed.h>
21
Stephen Warrenca480802013-11-06 16:20:54 -070022struct reset_control;
23
Arto Merilainende2ba662013-03-22 16:34:08 +020024struct tegra_fb {
25 struct drm_framebuffer base;
26 struct tegra_bo **planes;
27 unsigned int num_planes;
28};
29
Thierry Reding60c2f702013-10-31 13:28:50 +010030#ifdef CONFIG_DRM_TEGRA_FBDEV
Arto Merilainende2ba662013-03-22 16:34:08 +020031struct tegra_fbdev {
32 struct drm_fb_helper base;
33 struct tegra_fb *fb;
34};
Thierry Reding60c2f702013-10-31 13:28:50 +010035#endif
Arto Merilainende2ba662013-03-22 16:34:08 +020036
Thierry Reding386a2a72013-09-24 13:22:17 +020037struct tegra_drm {
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000038 struct drm_device *drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000039
40 struct mutex clients_lock;
41 struct list_head clients;
42
Thierry Reding60c2f702013-10-31 13:28:50 +010043#ifdef CONFIG_DRM_TEGRA_FBDEV
Arto Merilainende2ba662013-03-22 16:34:08 +020044 struct tegra_fbdev *fbdev;
Thierry Reding60c2f702013-10-31 13:28:50 +010045#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000046};
47
Thierry Reding53fa7f72013-09-24 15:35:40 +020048struct tegra_drm_client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000049
Thierry Redingc88c3632013-09-26 16:08:22 +020050struct tegra_drm_context {
Thierry Reding53fa7f72013-09-24 15:35:40 +020051 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +020052 struct host1x_channel *channel;
53 struct list_head list;
54};
55
Thierry Reding53fa7f72013-09-24 15:35:40 +020056struct tegra_drm_client_ops {
57 int (*open_channel)(struct tegra_drm_client *client,
Thierry Redingc88c3632013-09-26 16:08:22 +020058 struct tegra_drm_context *context);
59 void (*close_channel)(struct tegra_drm_context *context);
Thierry Redingc40f0f12013-10-10 11:00:33 +020060 int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
Thierry Redingc88c3632013-09-26 16:08:22 +020061 int (*submit)(struct tegra_drm_context *context,
Terje Bergstromd43f81c2013-03-22 16:34:09 +020062 struct drm_tegra_submit *args, struct drm_device *drm,
63 struct drm_file *file);
64};
65
Thierry Redingc40f0f12013-10-10 11:00:33 +020066int tegra_drm_submit(struct tegra_drm_context *context,
67 struct drm_tegra_submit *args, struct drm_device *drm,
68 struct drm_file *file);
69
Thierry Reding53fa7f72013-09-24 15:35:40 +020070struct tegra_drm_client {
71 struct host1x_client base;
Thierry Reding776dc382013-10-14 14:43:22 +020072 struct list_head list;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000073
Thierry Reding53fa7f72013-09-24 15:35:40 +020074 const struct tegra_drm_client_ops *ops;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000075};
76
Thierry Reding53fa7f72013-09-24 15:35:40 +020077static inline struct tegra_drm_client *
Thierry Reding776dc382013-10-14 14:43:22 +020078host1x_to_drm_client(struct host1x_client *client)
Thierry Reding53fa7f72013-09-24 15:35:40 +020079{
80 return container_of(client, struct tegra_drm_client, base);
81}
82
Thierry Reding688c59a2014-04-16 09:54:21 +020083int tegra_drm_register_client(struct tegra_drm *tegra,
84 struct tegra_drm_client *client);
85int tegra_drm_unregister_client(struct tegra_drm *tegra,
86 struct tegra_drm_client *client);
Thierry Reding776dc382013-10-14 14:43:22 +020087
Thierry Reding688c59a2014-04-16 09:54:21 +020088int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
89int tegra_drm_exit(struct tegra_drm *tegra);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000090
Thierry Reding8620fc62013-12-12 11:03:59 +010091struct tegra_dc_soc_info;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000092struct tegra_output;
93
94struct tegra_dc {
Thierry Reding776dc382013-10-14 14:43:22 +020095 struct host1x_client client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000096 struct device *dev;
Thierry Redingd18d3032013-09-26 16:09:19 +020097 spinlock_t lock;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000098
99 struct drm_crtc base;
100 int pipe;
101
102 struct clk *clk;
Stephen Warrenca480802013-11-06 16:20:54 -0700103 struct reset_control *rst;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000104 void __iomem *regs;
105 int irq;
106
107 struct tegra_output *rgb;
108
109 struct list_head list;
110
111 struct drm_info_list *debugfs_files;
112 struct drm_minor *minor;
113 struct dentry *debugfs;
Thierry Reding3c03c462012-11-28 12:00:18 +0100114
115 /* page-flip handling */
116 struct drm_pending_vblank_event *event;
Thierry Reding8620fc62013-12-12 11:03:59 +0100117
118 const struct tegra_dc_soc_info *soc;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000119};
120
Thierry Reding53fa7f72013-09-24 15:35:40 +0200121static inline struct tegra_dc *
Thierry Reding776dc382013-10-14 14:43:22 +0200122host1x_client_to_dc(struct host1x_client *client)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000123{
124 return container_of(client, struct tegra_dc, client);
125}
126
127static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
128{
Thierry Reding37826512013-11-08 12:30:37 +0100129 return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000130}
131
132static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long value,
133 unsigned long reg)
134{
135 writel(value, dc->regs + (reg << 2));
136}
137
138static inline unsigned long tegra_dc_readl(struct tegra_dc *dc,
139 unsigned long reg)
140{
141 return readl(dc->regs + (reg << 2));
142}
143
Thierry Redingf34bc782012-11-04 21:47:13 +0100144struct tegra_dc_window {
145 struct {
146 unsigned int x;
147 unsigned int y;
148 unsigned int w;
149 unsigned int h;
150 } src;
151 struct {
152 unsigned int x;
153 unsigned int y;
154 unsigned int w;
155 unsigned int h;
156 } dst;
157 unsigned int bits_per_pixel;
158 unsigned int format;
Thierry Redingf9253902014-01-29 20:31:17 +0100159 unsigned int swap;
Thierry Redingf34bc782012-11-04 21:47:13 +0100160 unsigned int stride[2];
161 unsigned long base[3];
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200162 bool bottom_up;
Thierry Reding773af772013-10-04 22:34:01 +0200163 bool tiled;
Thierry Redingf34bc782012-11-04 21:47:13 +0100164};
165
166/* from dc.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200167void tegra_dc_enable_vblank(struct tegra_dc *dc);
168void tegra_dc_disable_vblank(struct tegra_dc *dc);
169void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
Thierry Redingf34bc782012-11-04 21:47:13 +0100170
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000171struct tegra_output_ops {
172 int (*enable)(struct tegra_output *output);
173 int (*disable)(struct tegra_output *output);
174 int (*setup_clock)(struct tegra_output *output, struct clk *clk,
175 unsigned long pclk);
176 int (*check_mode)(struct tegra_output *output,
177 struct drm_display_mode *mode,
178 enum drm_mode_status *status);
Thierry Reding6b6b6042013-11-15 16:06:05 +0100179 enum drm_connector_status (*detect)(struct tegra_output *output);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000180};
181
182enum tegra_output_type {
183 TEGRA_OUTPUT_RGB,
Thierry Redingedec4af2012-11-15 21:28:23 +0000184 TEGRA_OUTPUT_HDMI,
Thierry Redingdec72732013-09-03 08:45:46 +0200185 TEGRA_OUTPUT_DSI,
Thierry Reding6b6b6042013-11-15 16:06:05 +0100186 TEGRA_OUTPUT_EDP,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000187};
188
189struct tegra_output {
190 struct device_node *of_node;
191 struct device *dev;
192
193 const struct tegra_output_ops *ops;
194 enum tegra_output_type type;
195
Thierry Reding9be7d862013-08-30 15:22:36 +0200196 struct drm_panel *panel;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000197 struct i2c_adapter *ddc;
198 const struct edid *edid;
199 unsigned int hpd_irq;
200 int hpd_gpio;
201
202 struct drm_encoder encoder;
203 struct drm_connector connector;
204};
205
206static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
207{
208 return container_of(e, struct tegra_output, encoder);
209}
210
211static inline struct tegra_output *connector_to_output(struct drm_connector *c)
212{
213 return container_of(c, struct tegra_output, connector);
214}
215
216static inline int tegra_output_enable(struct tegra_output *output)
217{
218 if (output && output->ops && output->ops->enable)
219 return output->ops->enable(output);
220
221 return output ? -ENOSYS : -EINVAL;
222}
223
224static inline int tegra_output_disable(struct tegra_output *output)
225{
226 if (output && output->ops && output->ops->disable)
227 return output->ops->disable(output);
228
229 return output ? -ENOSYS : -EINVAL;
230}
231
232static inline int tegra_output_setup_clock(struct tegra_output *output,
233 struct clk *clk, unsigned long pclk)
234{
235 if (output && output->ops && output->ops->setup_clock)
236 return output->ops->setup_clock(output, clk, pclk);
237
238 return output ? -ENOSYS : -EINVAL;
239}
240
241static inline int tegra_output_check_mode(struct tegra_output *output,
242 struct drm_display_mode *mode,
243 enum drm_mode_status *status)
244{
245 if (output && output->ops && output->ops->check_mode)
246 return output->ops->check_mode(output, mode, status);
247
248 return output ? -ENOSYS : -EINVAL;
249}
250
Thierry Reding776dc382013-10-14 14:43:22 +0200251/* from bus.c */
252int drm_host1x_init(struct drm_driver *driver, struct host1x_device *device);
253void drm_host1x_exit(struct drm_driver *driver, struct host1x_device *device);
254
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000255/* from rgb.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200256int tegra_dc_rgb_probe(struct tegra_dc *dc);
257int tegra_dc_rgb_remove(struct tegra_dc *dc);
258int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
259int tegra_dc_rgb_exit(struct tegra_dc *dc);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000260
261/* from output.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200262int tegra_output_probe(struct tegra_output *output);
263int tegra_output_remove(struct tegra_output *output);
264int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
265int tegra_output_exit(struct tegra_output *output);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000266
Thierry Reding6b6b6042013-11-15 16:06:05 +0100267/* from dpaux.c */
Thierry Reding6b6b6042013-11-15 16:06:05 +0100268struct tegra_dpaux;
269struct drm_dp_link;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100270
271struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np);
272enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux);
273int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output);
274int tegra_dpaux_detach(struct tegra_dpaux *dpaux);
275int tegra_dpaux_enable(struct tegra_dpaux *dpaux);
276int tegra_dpaux_disable(struct tegra_dpaux *dpaux);
277int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding);
278int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,
279 u8 pattern);
280
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000281/* from fb.c */
Arto Merilainende2ba662013-03-22 16:34:08 +0200282struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
283 unsigned int index);
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200284bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
Thierry Reding773af772013-10-04 22:34:01 +0200285bool tegra_fb_is_tiled(struct drm_framebuffer *framebuffer);
Thierry Reding688c59a2014-04-16 09:54:21 +0200286int tegra_drm_fb_init(struct drm_device *drm);
287void tegra_drm_fb_exit(struct drm_device *drm);
Thierry Reding60c2f702013-10-31 13:28:50 +0100288#ifdef CONFIG_DRM_TEGRA_FBDEV
Thierry Reding688c59a2014-04-16 09:54:21 +0200289void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
Thierry Reding60c2f702013-10-31 13:28:50 +0100290#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000291
Thierry Reding776dc382013-10-14 14:43:22 +0200292extern struct platform_driver tegra_dc_driver;
Thierry Redingdec72732013-09-03 08:45:46 +0200293extern struct platform_driver tegra_dsi_driver;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100294extern struct platform_driver tegra_sor_driver;
Thierry Reding776dc382013-10-14 14:43:22 +0200295extern struct platform_driver tegra_hdmi_driver;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100296extern struct platform_driver tegra_dpaux_driver;
Thierry Reding776dc382013-10-14 14:43:22 +0200297extern struct platform_driver tegra_gr2d_driver;
Thierry Reding5f60ed02013-02-28 08:08:01 +0100298extern struct platform_driver tegra_gr3d_driver;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000299
Terje Bergstrom4231c6b2013-03-22 16:34:05 +0200300#endif /* HOST1X_DRM_H */