blob: cf71734a13d0ab051c90220d7fd5fe2ec05b37d7 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2008 Jerome Glisse.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Jerome Glisse <glisse@freedesktop.org>
26 */
David Howells760285e2012-10-02 18:01:07 +010027#include <drm/drmP.h>
28#include <drm/radeon_drm.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020029#include "radeon_reg.h"
30#include "radeon.h"
31
Lauri Kasanen1109ca02012-08-31 13:43:50 -040032static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020033{
34 struct drm_device *ddev = p->rdev->ddev;
35 struct radeon_cs_chunk *chunk;
36 unsigned i, j;
37 bool duplicate;
38
39 if (p->chunk_relocs_idx == -1) {
40 return 0;
41 }
42 chunk = &p->chunks[p->chunk_relocs_idx];
Alex Deuchercf4ccd02011-11-18 10:19:47 -050043 p->dma_reloc_idx = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020044 /* FIXME: we assume that each relocs use 4 dwords */
45 p->nrelocs = chunk->length_dw / 4;
46 p->relocs_ptr = kcalloc(p->nrelocs, sizeof(void *), GFP_KERNEL);
47 if (p->relocs_ptr == NULL) {
48 return -ENOMEM;
49 }
50 p->relocs = kcalloc(p->nrelocs, sizeof(struct radeon_cs_reloc), GFP_KERNEL);
51 if (p->relocs == NULL) {
52 return -ENOMEM;
53 }
54 for (i = 0; i < p->nrelocs; i++) {
55 struct drm_radeon_cs_reloc *r;
56
57 duplicate = false;
58 r = (struct drm_radeon_cs_reloc *)&chunk->kdata[i*4];
Christian König16557f12011-10-24 14:59:17 +020059 for (j = 0; j < i; j++) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +020060 if (r->handle == p->relocs[j].handle) {
61 p->relocs_ptr[i] = &p->relocs[j];
62 duplicate = true;
63 break;
64 }
65 }
Christian König4474f3a2013-04-08 12:41:28 +020066 if (duplicate) {
Christian König16557f12011-10-24 14:59:17 +020067 p->relocs[i].handle = 0;
Christian König4474f3a2013-04-08 12:41:28 +020068 continue;
69 }
70
71 p->relocs[i].gobj = drm_gem_object_lookup(ddev, p->filp,
72 r->handle);
73 if (p->relocs[i].gobj == NULL) {
74 DRM_ERROR("gem object lookup failed 0x%x\n",
75 r->handle);
76 return -ENOENT;
77 }
78 p->relocs_ptr[i] = &p->relocs[i];
79 p->relocs[i].robj = gem_to_radeon_bo(p->relocs[i].gobj);
80 p->relocs[i].lobj.bo = p->relocs[i].robj;
81 p->relocs[i].lobj.written = !!r->write_domain;
82
Christian Königf2ba57b2013-04-08 12:41:29 +020083 /* the first reloc of an UVD job is the
84 msg and that must be in VRAM */
85 if (p->ring == R600_RING_TYPE_UVD_INDEX && i == 0) {
86 /* TODO: is this still needed for NI+ ? */
87 p->relocs[i].lobj.domain =
88 RADEON_GEM_DOMAIN_VRAM;
89
90 p->relocs[i].lobj.alt_domain =
91 RADEON_GEM_DOMAIN_VRAM;
92
93 } else {
94 uint32_t domain = r->write_domain ?
95 r->write_domain : r->read_domains;
96
97 p->relocs[i].lobj.domain = domain;
98 if (domain == RADEON_GEM_DOMAIN_VRAM)
99 domain |= RADEON_GEM_DOMAIN_GTT;
100 p->relocs[i].lobj.alt_domain = domain;
101 }
Christian König4474f3a2013-04-08 12:41:28 +0200102
103 p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo;
104 p->relocs[i].handle = r->handle;
105
106 radeon_bo_list_add_object(&p->relocs[i].lobj,
107 &p->validated);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200108 }
Christian Königf2ba57b2013-04-08 12:41:29 +0200109 return radeon_bo_list_validate(&p->validated, p->ring);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200110}
111
Jerome Glisse721604a2012-01-05 22:11:05 -0500112static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority)
113{
114 p->priority = priority;
115
116 switch (ring) {
117 default:
118 DRM_ERROR("unknown ring id: %d\n", ring);
119 return -EINVAL;
120 case RADEON_CS_RING_GFX:
121 p->ring = RADEON_RING_TYPE_GFX_INDEX;
122 break;
123 case RADEON_CS_RING_COMPUTE:
Alex Deucher841cf442012-12-18 21:47:44 -0500124 if (p->rdev->family >= CHIP_BONAIRE)
125 p->ring = RADEON_RING_TYPE_GFX_INDEX;
126 else if (p->rdev->family >= CHIP_TAHITI) {
Alex Deucher8d5ef7b2012-03-20 17:18:24 -0400127 if (p->priority > 0)
128 p->ring = CAYMAN_RING_TYPE_CP1_INDEX;
129 else
130 p->ring = CAYMAN_RING_TYPE_CP2_INDEX;
131 } else
132 p->ring = RADEON_RING_TYPE_GFX_INDEX;
Jerome Glisse721604a2012-01-05 22:11:05 -0500133 break;
Alex Deucher278a3342012-12-13 12:27:28 -0500134 case RADEON_CS_RING_DMA:
135 if (p->rdev->family >= CHIP_CAYMAN) {
136 if (p->priority > 0)
137 p->ring = R600_RING_TYPE_DMA_INDEX;
138 else
139 p->ring = CAYMAN_RING_TYPE_DMA1_INDEX;
140 } else if (p->rdev->family >= CHIP_R600) {
141 p->ring = R600_RING_TYPE_DMA_INDEX;
142 } else {
143 return -EINVAL;
144 }
145 break;
Christian Königf2ba57b2013-04-08 12:41:29 +0200146 case RADEON_CS_RING_UVD:
147 p->ring = R600_RING_TYPE_UVD_INDEX;
148 break;
Jerome Glisse721604a2012-01-05 22:11:05 -0500149 }
150 return 0;
151}
152
Christian König220907d2012-05-10 16:46:43 +0200153static void radeon_cs_sync_rings(struct radeon_cs_parser *p)
Christian König93504fc2012-01-05 22:11:06 -0500154{
Christian König220907d2012-05-10 16:46:43 +0200155 int i;
Christian König93504fc2012-01-05 22:11:06 -0500156
Christian Königcdac5502012-02-23 15:18:42 +0100157 for (i = 0; i < p->nrelocs; i++) {
Christian Königf82cbdd2012-08-09 16:35:36 +0200158 if (!p->relocs[i].robj)
Christian Königcdac5502012-02-23 15:18:42 +0100159 continue;
160
Alex Deucher43f12142013-02-01 17:32:42 +0100161 radeon_ib_sync_to(&p->ib, p->relocs[i].robj->tbo.sync_obj);
Christian Königcdac5502012-02-23 15:18:42 +0100162 }
Christian König93504fc2012-01-05 22:11:06 -0500163}
164
Alex Deucher9b001472012-05-30 10:09:30 -0400165/* XXX: note that this is called from the legacy UMS CS ioctl as well */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200166int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
167{
168 struct drm_radeon_cs *cs = data;
169 uint64_t *chunk_array_ptr;
Jerome Glisse721604a2012-01-05 22:11:05 -0500170 unsigned size, i;
171 u32 ring = RADEON_CS_RING_GFX;
172 s32 priority = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200173
174 if (!cs->num_chunks) {
175 return 0;
176 }
177 /* get chunks */
178 INIT_LIST_HEAD(&p->validated);
179 p->idx = 0;
Jerome Glissef2e39222012-05-09 15:35:02 +0200180 p->ib.sa_bo = NULL;
181 p->ib.semaphore = NULL;
182 p->const_ib.sa_bo = NULL;
183 p->const_ib.semaphore = NULL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200184 p->chunk_ib_idx = -1;
185 p->chunk_relocs_idx = -1;
Jerome Glisse721604a2012-01-05 22:11:05 -0500186 p->chunk_flags_idx = -1;
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400187 p->chunk_const_ib_idx = -1;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200188 p->chunks_array = kcalloc(cs->num_chunks, sizeof(uint64_t), GFP_KERNEL);
189 if (p->chunks_array == NULL) {
190 return -ENOMEM;
191 }
192 chunk_array_ptr = (uint64_t *)(unsigned long)(cs->chunks);
193 if (DRM_COPY_FROM_USER(p->chunks_array, chunk_array_ptr,
194 sizeof(uint64_t)*cs->num_chunks)) {
195 return -EFAULT;
196 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500197 p->cs_flags = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200198 p->nchunks = cs->num_chunks;
199 p->chunks = kcalloc(p->nchunks, sizeof(struct radeon_cs_chunk), GFP_KERNEL);
200 if (p->chunks == NULL) {
201 return -ENOMEM;
202 }
203 for (i = 0; i < p->nchunks; i++) {
204 struct drm_radeon_cs_chunk __user **chunk_ptr = NULL;
205 struct drm_radeon_cs_chunk user_chunk;
206 uint32_t __user *cdata;
207
208 chunk_ptr = (void __user*)(unsigned long)p->chunks_array[i];
209 if (DRM_COPY_FROM_USER(&user_chunk, chunk_ptr,
210 sizeof(struct drm_radeon_cs_chunk))) {
211 return -EFAULT;
212 }
Dave Airlie5176fdc2009-06-30 11:47:14 +1000213 p->chunks[i].length_dw = user_chunk.length_dw;
214 p->chunks[i].kdata = NULL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200215 p->chunks[i].chunk_id = user_chunk.chunk_id;
Ilija Hadzic580f8392013-01-02 18:27:37 -0500216 p->chunks[i].user_ptr = (void __user *)(unsigned long)user_chunk.chunk_data;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200217 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) {
218 p->chunk_relocs_idx = i;
219 }
220 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) {
221 p->chunk_ib_idx = i;
Dave Airlie5176fdc2009-06-30 11:47:14 +1000222 /* zero length IB isn't useful */
223 if (p->chunks[i].length_dw == 0)
224 return -EINVAL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200225 }
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400226 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_CONST_IB) {
227 p->chunk_const_ib_idx = i;
228 /* zero length CONST IB isn't useful */
229 if (p->chunks[i].length_dw == 0)
230 return -EINVAL;
231 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500232 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
233 p->chunk_flags_idx = i;
234 /* zero length flags aren't useful */
235 if (p->chunks[i].length_dw == 0)
236 return -EINVAL;
Marek Olšáke70f2242011-10-25 01:38:45 +0200237 }
Dave Airlie5176fdc2009-06-30 11:47:14 +1000238
Dave Airlie513bcb42009-09-23 16:56:27 +1000239 cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data;
Jerome Glisse721604a2012-01-05 22:11:05 -0500240 if ((p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) ||
241 (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS)) {
Dave Airlie513bcb42009-09-23 16:56:27 +1000242 size = p->chunks[i].length_dw * sizeof(uint32_t);
243 p->chunks[i].kdata = kmalloc(size, GFP_KERNEL);
244 if (p->chunks[i].kdata == NULL) {
245 return -ENOMEM;
246 }
247 if (DRM_COPY_FROM_USER(p->chunks[i].kdata,
248 p->chunks[i].user_ptr, size)) {
249 return -EFAULT;
250 }
Marek Olšáke70f2242011-10-25 01:38:45 +0200251 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_FLAGS) {
Jerome Glisse721604a2012-01-05 22:11:05 -0500252 p->cs_flags = p->chunks[i].kdata[0];
253 if (p->chunks[i].length_dw > 1)
254 ring = p->chunks[i].kdata[1];
255 if (p->chunks[i].length_dw > 2)
256 priority = (s32)p->chunks[i].kdata[2];
Marek Olšáke70f2242011-10-25 01:38:45 +0200257 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200258 }
259 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500260
Alex Deucher9b001472012-05-30 10:09:30 -0400261 /* these are KMS only */
262 if (p->rdev) {
263 if ((p->cs_flags & RADEON_CS_USE_VM) &&
264 !p->rdev->vm_manager.enabled) {
265 DRM_ERROR("VM not active on asic!\n");
266 return -EINVAL;
267 }
268
Alex Deucher9b001472012-05-30 10:09:30 -0400269 if (radeon_cs_get_ring(p, ring, priority))
270 return -EINVAL;
Christian König57449042013-04-08 12:41:27 +0200271
272 /* we only support VM on some SI+ rings */
273 if ((p->rdev->asic->ring[p->ring].cs_parse == NULL) &&
274 ((p->cs_flags & RADEON_CS_USE_VM) == 0)) {
275 DRM_ERROR("Ring %d requires VM!\n", p->ring);
276 return -EINVAL;
277 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200278 }
Marek Olšáke70f2242011-10-25 01:38:45 +0200279
Jerome Glisse721604a2012-01-05 22:11:05 -0500280 /* deal with non-vm */
281 if ((p->chunk_ib_idx != -1) &&
282 ((p->cs_flags & RADEON_CS_USE_VM) == 0) &&
283 (p->chunks[p->chunk_ib_idx].chunk_id == RADEON_CHUNK_ID_IB)) {
284 if (p->chunks[p->chunk_ib_idx].length_dw > (16 * 1024)) {
285 DRM_ERROR("cs IB too big: %d\n",
286 p->chunks[p->chunk_ib_idx].length_dw);
287 return -EINVAL;
288 }
Ilija Hadzicff4bd082013-01-07 18:21:57 -0500289 if (p->rdev && (p->rdev->flags & RADEON_IS_AGP)) {
Dave Airlie6a7068b2012-04-03 16:23:41 +0100290 p->chunks[p->chunk_ib_idx].kpage[0] = kmalloc(PAGE_SIZE, GFP_KERNEL);
291 p->chunks[p->chunk_ib_idx].kpage[1] = kmalloc(PAGE_SIZE, GFP_KERNEL);
292 if (p->chunks[p->chunk_ib_idx].kpage[0] == NULL ||
293 p->chunks[p->chunk_ib_idx].kpage[1] == NULL) {
Ilija Hadzic25d89992013-01-07 18:21:59 -0500294 kfree(p->chunks[p->chunk_ib_idx].kpage[0]);
295 kfree(p->chunks[p->chunk_ib_idx].kpage[1]);
Ilija Hadzic1da80cf2013-01-23 13:59:05 -0500296 p->chunks[p->chunk_ib_idx].kpage[0] = NULL;
297 p->chunks[p->chunk_ib_idx].kpage[1] = NULL;
Dave Airlie6a7068b2012-04-03 16:23:41 +0100298 return -ENOMEM;
299 }
300 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500301 p->chunks[p->chunk_ib_idx].kpage_idx[0] = -1;
302 p->chunks[p->chunk_ib_idx].kpage_idx[1] = -1;
303 p->chunks[p->chunk_ib_idx].last_copied_page = -1;
304 p->chunks[p->chunk_ib_idx].last_page_index =
305 ((p->chunks[p->chunk_ib_idx].length_dw * 4) - 1) / PAGE_SIZE;
306 }
307
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200308 return 0;
309}
310
311/**
312 * cs_parser_fini() - clean parser states
313 * @parser: parser structure holding parsing context.
314 * @error: error number
315 *
316 * If error is set than unvalidate buffer, otherwise just free memory
317 * used by parsing context.
318 **/
319static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
320{
321 unsigned i;
322
Jerome Glissee43b5ec2012-08-06 12:32:21 -0400323 if (!error) {
Thomas Hellstrom147666f2010-11-17 12:38:32 +0000324 ttm_eu_fence_buffer_objects(&parser->validated,
Jerome Glissef2e39222012-05-09 15:35:02 +0200325 parser->ib.fence);
Jerome Glissee43b5ec2012-08-06 12:32:21 -0400326 } else {
Thomas Hellstrom147666f2010-11-17 12:38:32 +0000327 ttm_eu_backoff_reservation(&parser->validated);
Jerome Glissee43b5ec2012-08-06 12:32:21 -0400328 }
Thomas Hellstrom147666f2010-11-17 12:38:32 +0000329
Pauli Nieminenfcbc4512010-03-19 07:44:33 +0000330 if (parser->relocs != NULL) {
331 for (i = 0; i < parser->nrelocs; i++) {
332 if (parser->relocs[i].gobj)
333 drm_gem_object_unreference_unlocked(parser->relocs[i].gobj);
334 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200335 }
Michel Dänzer48e113e2009-09-15 17:09:32 +0200336 kfree(parser->track);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200337 kfree(parser->relocs);
338 kfree(parser->relocs_ptr);
339 for (i = 0; i < parser->nchunks; i++) {
340 kfree(parser->chunks[i].kdata);
Dave Airlie6a7068b2012-04-03 16:23:41 +0100341 if ((parser->rdev->flags & RADEON_IS_AGP)) {
342 kfree(parser->chunks[i].kpage[0]);
343 kfree(parser->chunks[i].kpage[1]);
344 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200345 }
346 kfree(parser->chunks);
347 kfree(parser->chunks_array);
348 radeon_ib_free(parser->rdev, &parser->ib);
Jerome Glissef2e39222012-05-09 15:35:02 +0200349 radeon_ib_free(parser->rdev, &parser->const_ib);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200350}
351
Jerome Glisse721604a2012-01-05 22:11:05 -0500352static int radeon_cs_ib_chunk(struct radeon_device *rdev,
353 struct radeon_cs_parser *parser)
354{
355 struct radeon_cs_chunk *ib_chunk;
356 int r;
357
358 if (parser->chunk_ib_idx == -1)
359 return 0;
360
361 if (parser->cs_flags & RADEON_CS_USE_VM)
362 return 0;
363
364 ib_chunk = &parser->chunks[parser->chunk_ib_idx];
365 /* Copy the packet into the IB, the parser will read from the
366 * input memory (cached) and write to the IB (which can be
367 * uncached).
368 */
369 r = radeon_ib_get(rdev, parser->ring, &parser->ib,
Christian König4bf3dd92012-08-06 18:57:44 +0200370 NULL, ib_chunk->length_dw * 4);
Jerome Glisse721604a2012-01-05 22:11:05 -0500371 if (r) {
372 DRM_ERROR("Failed to get ib !\n");
373 return r;
374 }
Jerome Glissef2e39222012-05-09 15:35:02 +0200375 parser->ib.length_dw = ib_chunk->length_dw;
Christian Königeb0c19c2012-02-23 15:18:44 +0100376 r = radeon_cs_parse(rdev, parser->ring, parser);
Jerome Glisse721604a2012-01-05 22:11:05 -0500377 if (r || parser->parser_error) {
378 DRM_ERROR("Invalid command stream !\n");
379 return r;
380 }
381 r = radeon_cs_finish_pages(parser);
382 if (r) {
383 DRM_ERROR("Invalid command stream !\n");
384 return r;
385 }
Christian König220907d2012-05-10 16:46:43 +0200386 radeon_cs_sync_rings(parser);
Christian König4ef72562012-07-13 13:06:00 +0200387 r = radeon_ib_schedule(rdev, &parser->ib, NULL);
Jerome Glisse721604a2012-01-05 22:11:05 -0500388 if (r) {
389 DRM_ERROR("Failed to schedule IB !\n");
390 }
Christian König93bf8882012-07-03 14:05:41 +0200391 return r;
Jerome Glisse721604a2012-01-05 22:11:05 -0500392}
393
394static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser,
395 struct radeon_vm *vm)
396{
Jerome Glisse3e8970f2012-08-13 12:07:33 -0400397 struct radeon_device *rdev = parser->rdev;
Jerome Glisse721604a2012-01-05 22:11:05 -0500398 struct radeon_bo_list *lobj;
399 struct radeon_bo *bo;
400 int r;
401
Jerome Glisse3e8970f2012-08-13 12:07:33 -0400402 r = radeon_vm_bo_update_pte(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem);
403 if (r) {
404 return r;
405 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500406 list_for_each_entry(lobj, &parser->validated, tv.head) {
407 bo = lobj->bo;
408 r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem);
409 if (r) {
410 return r;
411 }
412 }
413 return 0;
414}
415
416static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
417 struct radeon_cs_parser *parser)
418{
419 struct radeon_cs_chunk *ib_chunk;
420 struct radeon_fpriv *fpriv = parser->filp->driver_priv;
421 struct radeon_vm *vm = &fpriv->vm;
422 int r;
423
424 if (parser->chunk_ib_idx == -1)
425 return 0;
Jerome Glisse721604a2012-01-05 22:11:05 -0500426 if ((parser->cs_flags & RADEON_CS_USE_VM) == 0)
427 return 0;
428
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400429 if ((rdev->family >= CHIP_TAHITI) &&
430 (parser->chunk_const_ib_idx != -1)) {
431 ib_chunk = &parser->chunks[parser->chunk_const_ib_idx];
432 if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
433 DRM_ERROR("cs IB CONST too big: %d\n", ib_chunk->length_dw);
434 return -EINVAL;
435 }
436 r = radeon_ib_get(rdev, parser->ring, &parser->const_ib,
Christian König4bf3dd92012-08-06 18:57:44 +0200437 vm, ib_chunk->length_dw * 4);
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400438 if (r) {
439 DRM_ERROR("Failed to get const ib !\n");
440 return r;
441 }
Jerome Glissef2e39222012-05-09 15:35:02 +0200442 parser->const_ib.is_const_ib = true;
443 parser->const_ib.length_dw = ib_chunk->length_dw;
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400444 /* Copy the packet into the IB */
Jerome Glissef2e39222012-05-09 15:35:02 +0200445 if (DRM_COPY_FROM_USER(parser->const_ib.ptr, ib_chunk->user_ptr,
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400446 ib_chunk->length_dw * 4)) {
447 return -EFAULT;
448 }
Jerome Glissef2e39222012-05-09 15:35:02 +0200449 r = radeon_ring_ib_parse(rdev, parser->ring, &parser->const_ib);
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400450 if (r) {
451 return r;
452 }
453 }
454
Jerome Glisse721604a2012-01-05 22:11:05 -0500455 ib_chunk = &parser->chunks[parser->chunk_ib_idx];
456 if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) {
457 DRM_ERROR("cs IB too big: %d\n", ib_chunk->length_dw);
458 return -EINVAL;
459 }
460 r = radeon_ib_get(rdev, parser->ring, &parser->ib,
Christian König4bf3dd92012-08-06 18:57:44 +0200461 vm, ib_chunk->length_dw * 4);
Jerome Glisse721604a2012-01-05 22:11:05 -0500462 if (r) {
463 DRM_ERROR("Failed to get ib !\n");
464 return r;
465 }
Jerome Glissef2e39222012-05-09 15:35:02 +0200466 parser->ib.length_dw = ib_chunk->length_dw;
Jerome Glisse721604a2012-01-05 22:11:05 -0500467 /* Copy the packet into the IB */
Jerome Glissef2e39222012-05-09 15:35:02 +0200468 if (DRM_COPY_FROM_USER(parser->ib.ptr, ib_chunk->user_ptr,
Jerome Glisse721604a2012-01-05 22:11:05 -0500469 ib_chunk->length_dw * 4)) {
470 return -EFAULT;
471 }
Jerome Glissef2e39222012-05-09 15:35:02 +0200472 r = radeon_ring_ib_parse(rdev, parser->ring, &parser->ib);
Jerome Glisse721604a2012-01-05 22:11:05 -0500473 if (r) {
474 return r;
475 }
476
Christian König36ff39c2012-05-09 10:07:08 +0200477 mutex_lock(&rdev->vm_manager.lock);
Jerome Glisse721604a2012-01-05 22:11:05 -0500478 mutex_lock(&vm->mutex);
Christian Königddf03f52012-08-09 20:02:28 +0200479 r = radeon_vm_alloc_pt(rdev, vm);
Jerome Glisse721604a2012-01-05 22:11:05 -0500480 if (r) {
481 goto out;
482 }
483 r = radeon_bo_vm_update_pte(parser, vm);
484 if (r) {
485 goto out;
486 }
Christian König220907d2012-05-10 16:46:43 +0200487 radeon_cs_sync_rings(parser);
Alex Deucher43f12142013-02-01 17:32:42 +0100488 radeon_ib_sync_to(&parser->ib, vm->fence);
489 radeon_ib_sync_to(&parser->ib, radeon_vm_grab_id(
490 rdev, vm, parser->ring));
Christian König4ef72562012-07-13 13:06:00 +0200491
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400492 if ((rdev->family >= CHIP_TAHITI) &&
493 (parser->chunk_const_ib_idx != -1)) {
Christian König4ef72562012-07-13 13:06:00 +0200494 r = radeon_ib_schedule(rdev, &parser->ib, &parser->const_ib);
495 } else {
496 r = radeon_ib_schedule(rdev, &parser->ib, NULL);
Alex Deucherdfcf5f32012-03-20 17:18:14 -0400497 }
498
Jerome Glisse721604a2012-01-05 22:11:05 -0500499 if (!r) {
Christian Königee60e292012-08-09 16:21:08 +0200500 radeon_vm_fence(rdev, vm, parser->ib.fence);
Jerome Glisse721604a2012-01-05 22:11:05 -0500501 }
Christian Königee60e292012-08-09 16:21:08 +0200502
503out:
Christian König13e55c32012-10-09 13:31:19 +0200504 radeon_vm_add_to_lru(rdev, vm);
Christian König36ff39c2012-05-09 10:07:08 +0200505 mutex_unlock(&vm->mutex);
506 mutex_unlock(&rdev->vm_manager.lock);
Jerome Glisse721604a2012-01-05 22:11:05 -0500507 return r;
508}
509
Christian König6c6f4782012-05-02 15:11:19 +0200510static int radeon_cs_handle_lockup(struct radeon_device *rdev, int r)
511{
512 if (r == -EDEADLK) {
513 r = radeon_gpu_reset(rdev);
514 if (!r)
515 r = -EAGAIN;
516 }
517 return r;
518}
519
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200520int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
521{
522 struct radeon_device *rdev = dev->dev_private;
523 struct radeon_cs_parser parser;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200524 int r;
525
Jerome Glissedee53e72012-07-02 12:45:19 -0400526 down_read(&rdev->exclusive_lock);
Jerome Glisse6b7746e2012-02-20 17:57:20 -0500527 if (!rdev->accel_working) {
Jerome Glissedee53e72012-07-02 12:45:19 -0400528 up_read(&rdev->exclusive_lock);
Jerome Glisse6b7746e2012-02-20 17:57:20 -0500529 return -EBUSY;
530 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200531 /* initialize parser */
532 memset(&parser, 0, sizeof(struct radeon_cs_parser));
533 parser.filp = filp;
534 parser.rdev = rdev;
Jerome Glissec8c15ff2010-01-18 13:01:36 +0100535 parser.dev = rdev->dev;
Dave Airlie428c6e32011-06-08 19:58:29 +1000536 parser.family = rdev->family;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200537 r = radeon_cs_parser_init(&parser, data);
538 if (r) {
539 DRM_ERROR("Failed to initialize parser !\n");
540 radeon_cs_parser_fini(&parser, r);
Jerome Glissedee53e72012-07-02 12:45:19 -0400541 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200542 r = radeon_cs_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200543 return r;
544 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200545 r = radeon_cs_parser_relocs(&parser);
546 if (r) {
Dave Airlie97f23b32010-03-19 10:33:44 +1000547 if (r != -ERESTARTSYS)
548 DRM_ERROR("Failed to parse relocation %d!\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200549 radeon_cs_parser_fini(&parser, r);
Jerome Glissedee53e72012-07-02 12:45:19 -0400550 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200551 r = radeon_cs_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200552 return r;
553 }
Christian König55b51c82013-04-18 15:25:59 +0200554
555 if (parser.ring == R600_RING_TYPE_UVD_INDEX)
556 radeon_uvd_note_usage(rdev);
557
Jerome Glisse721604a2012-01-05 22:11:05 -0500558 r = radeon_cs_ib_chunk(rdev, &parser);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200559 if (r) {
Jerome Glisse721604a2012-01-05 22:11:05 -0500560 goto out;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200561 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500562 r = radeon_cs_ib_vm_chunk(rdev, &parser);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200563 if (r) {
Jerome Glisse721604a2012-01-05 22:11:05 -0500564 goto out;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200565 }
Jerome Glisse721604a2012-01-05 22:11:05 -0500566out:
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200567 radeon_cs_parser_fini(&parser, r);
Jerome Glissedee53e72012-07-02 12:45:19 -0400568 up_read(&rdev->exclusive_lock);
Christian König6c6f4782012-05-02 15:11:19 +0200569 r = radeon_cs_handle_lockup(rdev, r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200570 return r;
571}
Dave Airlie513bcb42009-09-23 16:56:27 +1000572
573int radeon_cs_finish_pages(struct radeon_cs_parser *p)
574{
575 struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
576 int i;
577 int size = PAGE_SIZE;
578
579 for (i = ibc->last_copied_page + 1; i <= ibc->last_page_index; i++) {
580 if (i == ibc->last_page_index) {
581 size = (ibc->length_dw * 4) % PAGE_SIZE;
582 if (size == 0)
583 size = PAGE_SIZE;
584 }
585
Jerome Glissef2e39222012-05-09 15:35:02 +0200586 if (DRM_COPY_FROM_USER(p->ib.ptr + (i * (PAGE_SIZE/4)),
Dave Airlie513bcb42009-09-23 16:56:27 +1000587 ibc->user_ptr + (i * PAGE_SIZE),
588 size))
589 return -EFAULT;
590 }
591 return 0;
592}
593
Dave Airliec4c7f312012-05-26 17:34:24 +0100594static int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
Dave Airlie513bcb42009-09-23 16:56:27 +1000595{
596 int new_page;
Dave Airlie513bcb42009-09-23 16:56:27 +1000597 struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
598 int i;
599 int size = PAGE_SIZE;
Ilija Hadzicff4bd082013-01-07 18:21:57 -0500600 bool copy1 = (p->rdev && (p->rdev->flags & RADEON_IS_AGP)) ?
601 false : true;
Dave Airlie513bcb42009-09-23 16:56:27 +1000602
Dave Airliec5e617e2009-09-26 09:03:39 +1000603 for (i = ibc->last_copied_page + 1; i < pg_idx; i++) {
Jerome Glissef2e39222012-05-09 15:35:02 +0200604 if (DRM_COPY_FROM_USER(p->ib.ptr + (i * (PAGE_SIZE/4)),
Dave Airlie513bcb42009-09-23 16:56:27 +1000605 ibc->user_ptr + (i * PAGE_SIZE),
606 PAGE_SIZE)) {
607 p->parser_error = -EFAULT;
608 return 0;
609 }
610 }
611
Dave Airlie513bcb42009-09-23 16:56:27 +1000612 if (pg_idx == ibc->last_page_index) {
613 size = (ibc->length_dw * 4) % PAGE_SIZE;
Dave Airlie6a7068b2012-04-03 16:23:41 +0100614 if (size == 0)
615 size = PAGE_SIZE;
Dave Airlie513bcb42009-09-23 16:56:27 +1000616 }
617
Dave Airlie6a7068b2012-04-03 16:23:41 +0100618 new_page = ibc->kpage_idx[0] < ibc->kpage_idx[1] ? 0 : 1;
619 if (copy1)
Jerome Glissef2e39222012-05-09 15:35:02 +0200620 ibc->kpage[new_page] = p->ib.ptr + (pg_idx * (PAGE_SIZE / 4));
Dave Airlie6a7068b2012-04-03 16:23:41 +0100621
Dave Airlie513bcb42009-09-23 16:56:27 +1000622 if (DRM_COPY_FROM_USER(ibc->kpage[new_page],
623 ibc->user_ptr + (pg_idx * PAGE_SIZE),
624 size)) {
625 p->parser_error = -EFAULT;
626 return 0;
627 }
628
Dave Airlie6a7068b2012-04-03 16:23:41 +0100629 /* copy to IB for non single case */
630 if (!copy1)
Jerome Glissef2e39222012-05-09 15:35:02 +0200631 memcpy((void *)(p->ib.ptr+(pg_idx*(PAGE_SIZE/4))), ibc->kpage[new_page], size);
Dave Airlie513bcb42009-09-23 16:56:27 +1000632
633 ibc->last_copied_page = pg_idx;
634 ibc->kpage_idx[new_page] = pg_idx;
635
636 return new_page;
637}
Dave Airliec4c7f312012-05-26 17:34:24 +0100638
639u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx)
640{
641 struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
642 u32 pg_idx, pg_offset;
643 u32 idx_value = 0;
644 int new_page;
645
646 pg_idx = (idx * 4) / PAGE_SIZE;
647 pg_offset = (idx * 4) % PAGE_SIZE;
648
649 if (ibc->kpage_idx[0] == pg_idx)
650 return ibc->kpage[0][pg_offset/4];
651 if (ibc->kpage_idx[1] == pg_idx)
652 return ibc->kpage[1][pg_offset/4];
653
654 new_page = radeon_cs_update_pages(p, pg_idx);
655 if (new_page < 0) {
656 p->parser_error = new_page;
657 return 0;
658 }
659
660 idx_value = ibc->kpage[new_page][pg_offset/4];
661 return idx_value;
662}
Ilija Hadzic4db01312013-01-02 18:27:40 -0500663
664/**
665 * radeon_cs_packet_parse() - parse cp packet and point ib index to next packet
666 * @parser: parser structure holding parsing context.
667 * @pkt: where to store packet information
668 *
669 * Assume that chunk_ib_index is properly set. Will return -EINVAL
670 * if packet is bigger than remaining ib size. or if packets is unknown.
671 **/
672int radeon_cs_packet_parse(struct radeon_cs_parser *p,
673 struct radeon_cs_packet *pkt,
674 unsigned idx)
675{
676 struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
677 struct radeon_device *rdev = p->rdev;
678 uint32_t header;
679
680 if (idx >= ib_chunk->length_dw) {
681 DRM_ERROR("Can not parse packet at %d after CS end %d !\n",
682 idx, ib_chunk->length_dw);
683 return -EINVAL;
684 }
685 header = radeon_get_ib_value(p, idx);
686 pkt->idx = idx;
687 pkt->type = RADEON_CP_PACKET_GET_TYPE(header);
688 pkt->count = RADEON_CP_PACKET_GET_COUNT(header);
689 pkt->one_reg_wr = 0;
690 switch (pkt->type) {
691 case RADEON_PACKET_TYPE0:
692 if (rdev->family < CHIP_R600) {
693 pkt->reg = R100_CP_PACKET0_GET_REG(header);
694 pkt->one_reg_wr =
695 RADEON_CP_PACKET0_GET_ONE_REG_WR(header);
696 } else
697 pkt->reg = R600_CP_PACKET0_GET_REG(header);
698 break;
699 case RADEON_PACKET_TYPE3:
700 pkt->opcode = RADEON_CP_PACKET3_GET_OPCODE(header);
701 break;
702 case RADEON_PACKET_TYPE2:
703 pkt->count = -1;
704 break;
705 default:
706 DRM_ERROR("Unknown packet type %d at %d !\n", pkt->type, idx);
707 return -EINVAL;
708 }
709 if ((pkt->count + 1 + pkt->idx) >= ib_chunk->length_dw) {
710 DRM_ERROR("Packet (%d:%d:%d) end after CS buffer (%d) !\n",
711 pkt->idx, pkt->type, pkt->count, ib_chunk->length_dw);
712 return -EINVAL;
713 }
714 return 0;
715}
Ilija Hadzic9ffb7a62013-01-02 18:27:42 -0500716
717/**
718 * radeon_cs_packet_next_is_pkt3_nop() - test if the next packet is P3 NOP
719 * @p: structure holding the parser context.
720 *
721 * Check if the next packet is NOP relocation packet3.
722 **/
723bool radeon_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p)
724{
725 struct radeon_cs_packet p3reloc;
726 int r;
727
728 r = radeon_cs_packet_parse(p, &p3reloc, p->idx);
729 if (r)
730 return false;
731 if (p3reloc.type != RADEON_PACKET_TYPE3)
732 return false;
733 if (p3reloc.opcode != RADEON_PACKET3_NOP)
734 return false;
735 return true;
736}
Ilija Hadzicc3ad63a2013-01-02 18:27:45 -0500737
738/**
739 * radeon_cs_dump_packet() - dump raw packet context
740 * @p: structure holding the parser context.
741 * @pkt: structure holding the packet.
742 *
743 * Used mostly for debugging and error reporting.
744 **/
745void radeon_cs_dump_packet(struct radeon_cs_parser *p,
746 struct radeon_cs_packet *pkt)
747{
748 volatile uint32_t *ib;
749 unsigned i;
750 unsigned idx;
751
752 ib = p->ib.ptr;
753 idx = pkt->idx;
754 for (i = 0; i <= (pkt->count + 1); i++, idx++)
755 DRM_INFO("ib[%d]=0x%08X\n", idx, ib[idx]);
756}
757
Ilija Hadzice9716992013-01-02 18:27:46 -0500758/**
759 * radeon_cs_packet_next_reloc() - parse next (should be reloc) packet
760 * @parser: parser structure holding parsing context.
761 * @data: pointer to relocation data
762 * @offset_start: starting offset
763 * @offset_mask: offset mask (to align start offset on)
764 * @reloc: reloc informations
765 *
766 * Check if next packet is relocation packet3, do bo validation and compute
767 * GPU offset using the provided start.
768 **/
769int radeon_cs_packet_next_reloc(struct radeon_cs_parser *p,
770 struct radeon_cs_reloc **cs_reloc,
771 int nomm)
772{
773 struct radeon_cs_chunk *relocs_chunk;
774 struct radeon_cs_packet p3reloc;
775 unsigned idx;
776 int r;
777
778 if (p->chunk_relocs_idx == -1) {
779 DRM_ERROR("No relocation chunk !\n");
780 return -EINVAL;
781 }
782 *cs_reloc = NULL;
783 relocs_chunk = &p->chunks[p->chunk_relocs_idx];
784 r = radeon_cs_packet_parse(p, &p3reloc, p->idx);
785 if (r)
786 return r;
787 p->idx += p3reloc.count + 2;
788 if (p3reloc.type != RADEON_PACKET_TYPE3 ||
789 p3reloc.opcode != RADEON_PACKET3_NOP) {
790 DRM_ERROR("No packet3 for relocation for packet at %d.\n",
791 p3reloc.idx);
792 radeon_cs_dump_packet(p, &p3reloc);
793 return -EINVAL;
794 }
795 idx = radeon_get_ib_value(p, p3reloc.idx + 1);
796 if (idx >= relocs_chunk->length_dw) {
797 DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
798 idx, relocs_chunk->length_dw);
799 radeon_cs_dump_packet(p, &p3reloc);
800 return -EINVAL;
801 }
802 /* FIXME: we assume reloc size is 4 dwords */
803 if (nomm) {
804 *cs_reloc = p->relocs;
805 (*cs_reloc)->lobj.gpu_offset =
806 (u64)relocs_chunk->kdata[idx + 3] << 32;
807 (*cs_reloc)->lobj.gpu_offset |= relocs_chunk->kdata[idx + 0];
808 } else
809 *cs_reloc = p->relocs_ptr[(idx / 4)];
810 return 0;
811}