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Ishizaki Kouc347b792007-02-02 16:47:17 +09001/*
2 * Celleb setup code
3 *
4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION
5 *
6 * This code is based on arch/powerpc/platforms/cell/setup.c:
7 * Copyright (C) 1995 Linus Torvalds
8 * Adapted from 'alpha' version by Gary Thomas
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * Modified by PPC64 Team, IBM Corp
11 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
26 */
27
28#undef DEBUG
29
30#include <linux/cpu.h>
31#include <linux/sched.h>
32#include <linux/kernel.h>
33#include <linux/mm.h>
34#include <linux/stddef.h>
35#include <linux/unistd.h>
36#include <linux/reboot.h>
37#include <linux/init.h>
38#include <linux/delay.h>
39#include <linux/irq.h>
40#include <linux/seq_file.h>
41#include <linux/root_dev.h>
42#include <linux/console.h>
43
44#include <asm/mmu.h>
45#include <asm/processor.h>
46#include <asm/io.h>
47#include <asm/kexec.h>
48#include <asm/prom.h>
49#include <asm/machdep.h>
50#include <asm/cputable.h>
51#include <asm/irq.h>
Tony Breedse7bda182007-10-30 14:55:04 +110052#include <asm/time.h>
Ishizaki Kouc347b792007-02-02 16:47:17 +090053#include <asm/spu_priv1.h>
54#include <asm/firmware.h>
55#include <asm/of_platform.h>
56
57#include "interrupt.h"
58#include "beat_wrapper.h"
59#include "beat.h"
60#include "pci.h"
61
62static char celleb_machine_type[128] = "Celleb";
63
64static void celleb_show_cpuinfo(struct seq_file *m)
65{
66 struct device_node *root;
67 const char *model = "";
68
69 root = of_find_node_by_path("/");
70 if (root)
Stephen Rothwelle2eb6392007-04-03 22:26:41 +100071 model = of_get_property(root, "model", NULL);
Ishizaki Kouc347b792007-02-02 16:47:17 +090072 /* using "CHRP" is to trick anaconda into installing FCx into Celleb */
73 seq_printf(m, "machine\t\t: %s %s\n", celleb_machine_type, model);
74 of_node_put(root);
75}
76
Ishizaki Koua4ebd012007-07-26 20:02:27 +100077static int __init celleb_machine_type_hack(char *ptr)
Ishizaki Kouc347b792007-02-02 16:47:17 +090078{
79 strncpy(celleb_machine_type, ptr, sizeof(celleb_machine_type));
80 celleb_machine_type[sizeof(celleb_machine_type)-1] = 0;
81 return 0;
82}
83
Ishizaki Koub4f8b102007-05-09 17:38:03 +100084__setup("celleb_machine_type_hack=", celleb_machine_type_hack);
Ishizaki Kouc347b792007-02-02 16:47:17 +090085
86static void celleb_progress(char *s, unsigned short hex)
87{
88 printk("*** %04x : %s\n", hex, s ? s : "");
89}
90
91static void __init celleb_setup_arch(void)
92{
93#ifdef CONFIG_SPU_BASE
94 spu_priv1_ops = &spu_priv1_beat_ops;
95 spu_management_ops = &spu_management_of_ops;
96#endif
97
98#ifdef CONFIG_SMP
99 smp_init_celleb();
100#endif
101
102 /* init to some ~sane value until calibrate_delay() runs */
103 loops_per_jiffy = 50000000;
104
Ishizaki Kouc347b792007-02-02 16:47:17 +0900105#ifdef CONFIG_DUMMY_CONSOLE
106 conswitchp = &dummy_con;
107#endif
108}
109
Ishizaki Kouc347b792007-02-02 16:47:17 +0900110static int __init celleb_probe(void)
111{
112 unsigned long root = of_get_flat_dt_root();
113
114 if (!of_flat_dt_is_compatible(root, "Beat"))
115 return 0;
116
117 powerpc_firmware_features |= FW_FEATURE_CELLEB_POSSIBLE;
Ishizaki Kou7f2c8572007-10-02 18:23:46 +1000118 hpte_init_beat_v3();
Ishizaki Kouc347b792007-02-02 16:47:17 +0900119 return 1;
120}
121
Ishizaki Koua4ebd012007-07-26 20:02:27 +1000122static struct of_device_id celleb_bus_ids[] __initdata = {
Ishizaki Kouc347b792007-02-02 16:47:17 +0900123 { .type = "scc", },
124 { .type = "ioif", }, /* old style */
125 {},
126};
127
128static int __init celleb_publish_devices(void)
129{
130 if (!machine_is(celleb))
131 return 0;
132
133 /* Publish OF platform devices for southbridge IOs */
134 of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
135
Ishizaki Kouda0bd342007-10-02 18:26:53 +1000136 celleb_pci_workaround_init();
137
Ishizaki Kouc347b792007-02-02 16:47:17 +0900138 return 0;
139}
140device_initcall(celleb_publish_devices);
141
142define_machine(celleb) {
143 .name = "Cell Reference Set",
144 .probe = celleb_probe,
145 .setup_arch = celleb_setup_arch,
146 .show_cpuinfo = celleb_show_cpuinfo,
147 .restart = beat_restart,
148 .power_off = beat_power_off,
149 .halt = beat_halt,
150 .get_rtc_time = beat_get_rtc_time,
151 .set_rtc_time = beat_set_rtc_time,
152 .calibrate_decr = generic_calibrate_decr,
Ishizaki Kouc347b792007-02-02 16:47:17 +0900153 .progress = celleb_progress,
154 .power_save = beat_power_save,
155 .nvram_size = beat_nvram_get_size,
156 .nvram_read = beat_nvram_read,
157 .nvram_write = beat_nvram_write,
158 .set_dabr = beat_set_xdabr,
159 .init_IRQ = beatic_init_IRQ,
160 .get_irq = beatic_get_irq,
161 .pci_probe_mode = celleb_pci_probe_mode,
162 .pci_setup_phb = celleb_setup_phb,
163#ifdef CONFIG_KEXEC
Ishizaki Kou80755b42007-10-02 18:18:46 +1000164 .kexec_cpu_down = beat_kexec_cpu_down,
Ishizaki Kouc347b792007-02-02 16:47:17 +0900165 .machine_kexec = default_machine_kexec,
166 .machine_kexec_prepare = default_machine_kexec_prepare,
167 .machine_crash_shutdown = default_machine_crash_shutdown,
168#endif
169};