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Alexander Shishkin39f40342015-09-22 15:47:14 +03001/*
2 * Intel(R) Trace Hub data structures
3 *
4 * Copyright (C) 2014-2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#ifndef __INTEL_TH_H__
17#define __INTEL_TH_H__
18
19/* intel_th_device device types */
20enum {
21 /* Devices that generate trace data */
22 INTEL_TH_SOURCE = 0,
23 /* Output ports (MSC, PTI) */
24 INTEL_TH_OUTPUT,
25 /* Switch, the Global Trace Hub (GTH) */
26 INTEL_TH_SWITCH,
27};
28
29/**
30 * struct intel_th_output - descriptor INTEL_TH_OUTPUT type devices
31 * @port: output port number, assigned by the switch
32 * @type: GTH_{MSU,CTP,PTI}
Alexander Shishkin4d02cef2016-02-15 19:11:55 +020033 * @scratchpad: scratchpad bits to flag when this output is enabled
Alexander Shishkin39f40342015-09-22 15:47:14 +030034 * @multiblock: true for multiblock output configuration
35 * @active: true when this output is enabled
36 *
37 * Output port descriptor, used by switch driver to tell which output
38 * port this output device corresponds to. Filled in at output device's
39 * probe time by switch::assign(). Passed from output device driver to
40 * switch related code to enable/disable its port.
41 */
42struct intel_th_output {
43 int port;
44 unsigned int type;
Alexander Shishkin4d02cef2016-02-15 19:11:55 +020045 unsigned int scratchpad;
Alexander Shishkin39f40342015-09-22 15:47:14 +030046 bool multiblock;
47 bool active;
48};
49
50/**
51 * struct intel_th_device - device on the intel_th bus
52 * @dev: device
53 * @resource: array of resources available to this device
54 * @num_resources: number of resources in @resource array
55 * @type: INTEL_TH_{SOURCE,OUTPUT,SWITCH}
56 * @id: device instance or -1
Alexander Shishkinc49a7592016-09-19 17:07:47 +030057 * @host_mode: Intel TH is controlled by an external debug host
Alexander Shishkin39f40342015-09-22 15:47:14 +030058 * @output: output descriptor for INTEL_TH_OUTPUT devices
59 * @name: device name to match the driver
60 */
61struct intel_th_device {
62 struct device dev;
63 struct resource *resource;
64 unsigned int num_resources;
65 unsigned int type;
66 int id;
67
Alexander Shishkinc49a7592016-09-19 17:07:47 +030068 /* INTEL_TH_SWITCH specific */
69 bool host_mode;
70
Alexander Shishkin39f40342015-09-22 15:47:14 +030071 /* INTEL_TH_OUTPUT specific */
72 struct intel_th_output output;
73
74 char name[];
75};
76
77#define to_intel_th_device(_d) \
78 container_of((_d), struct intel_th_device, dev)
79
80/**
81 * intel_th_device_get_resource() - obtain @num'th resource of type @type
82 * @thdev: the device to search the resource for
83 * @type: resource type
84 * @num: number of the resource
85 */
86static inline struct resource *
87intel_th_device_get_resource(struct intel_th_device *thdev, unsigned int type,
88 unsigned int num)
89{
90 int i;
91
92 for (i = 0; i < thdev->num_resources; i++)
93 if (resource_type(&thdev->resource[i]) == type && !num--)
94 return &thdev->resource[i];
95
96 return NULL;
97}
98
Alexander Shishkin5376be62016-11-18 14:51:05 +020099/*
100 * GTH, output ports configuration
101 */
102enum {
103 GTH_NONE = 0,
104 GTH_MSU, /* memory/usb */
105 GTH_CTP, /* Common Trace Port */
106 GTH_PTI = 4, /* MIPI-PTI */
107};
108
Alexander Shishkin39f40342015-09-22 15:47:14 +0300109/**
110 * intel_th_output_assigned() - if an output device is assigned to a switch port
111 * @thdev: the output device
112 *
113 * Return: true if the device is INTEL_TH_OUTPUT *and* is assigned a port
114 */
115static inline bool
116intel_th_output_assigned(struct intel_th_device *thdev)
117{
118 return thdev->type == INTEL_TH_OUTPUT &&
Alexander Shishkin5376be62016-11-18 14:51:05 +0200119 (thdev->output.port >= 0 ||
120 thdev->output.type == GTH_NONE);
Alexander Shishkin39f40342015-09-22 15:47:14 +0300121}
122
123/**
124 * struct intel_th_driver - driver for an intel_th_device device
125 * @driver: generic driver
126 * @probe: probe method
127 * @remove: remove method
128 * @assign: match a given output type device against available outputs
129 * @unassign: deassociate an output type device from an output port
130 * @enable: enable tracing for a given output device
131 * @disable: disable tracing for a given output device
Alexander Shishkinbd581f22016-06-29 19:35:22 +0300132 * @irq: interrupt callback
133 * @activate: enable tracing on the output's side
134 * @deactivate: disable tracing on the output's side
Alexander Shishkin39f40342015-09-22 15:47:14 +0300135 * @fops: file operations for device nodes
Alexander Shishkinb5edbf12016-03-04 19:42:48 +0200136 * @attr_group: attributes provided by the driver
Alexander Shishkin39f40342015-09-22 15:47:14 +0300137 *
138 * Callbacks @probe and @remove are required for all device types.
139 * Switch device driver needs to fill in @assign, @enable and @disable
140 * callbacks.
141 */
142struct intel_th_driver {
143 struct device_driver driver;
144 int (*probe)(struct intel_th_device *thdev);
145 void (*remove)(struct intel_th_device *thdev);
146 /* switch (GTH) ops */
147 int (*assign)(struct intel_th_device *thdev,
148 struct intel_th_device *othdev);
149 void (*unassign)(struct intel_th_device *thdev,
150 struct intel_th_device *othdev);
151 void (*enable)(struct intel_th_device *thdev,
152 struct intel_th_output *output);
153 void (*disable)(struct intel_th_device *thdev,
154 struct intel_th_output *output);
155 /* output ops */
156 void (*irq)(struct intel_th_device *thdev);
157 int (*activate)(struct intel_th_device *thdev);
158 void (*deactivate)(struct intel_th_device *thdev);
159 /* file_operations for those who want a device node */
160 const struct file_operations *fops;
Alexander Shishkinb5edbf12016-03-04 19:42:48 +0200161 /* optional attributes */
162 struct attribute_group *attr_group;
Alexander Shishkin39f40342015-09-22 15:47:14 +0300163
164 /* source ops */
165 int (*set_output)(struct intel_th_device *thdev,
166 unsigned int master);
167};
168
169#define to_intel_th_driver(_d) \
170 container_of((_d), struct intel_th_driver, driver)
171
Alexander Shishkinf18a9532016-03-07 17:04:45 +0200172#define to_intel_th_driver_or_null(_d) \
173 ((_d) ? to_intel_th_driver(_d) : NULL)
174
Alexander Shishkin8edc5142016-11-18 15:36:39 +0200175/*
176 * Subdevice tree structure is as follows:
177 * + struct intel_th device (pci; dev_{get,set}_drvdata()
178 * + struct intel_th_device INTEL_TH_SWITCH (GTH)
179 * + struct intel_th_device INTEL_TH_OUTPUT (MSU, PTI)
180 * + struct intel_th_device INTEL_TH_SOURCE (STH)
181 *
182 * In other words, INTEL_TH_OUTPUT devices are children of INTEL_TH_SWITCH;
183 * INTEL_TH_SWITCH and INTEL_TH_SOURCE are children of the intel_th device.
184 */
Alexander Shishkin39f40342015-09-22 15:47:14 +0300185static inline struct intel_th_device *
Alexander Shishkin5e067232016-11-18 15:05:01 +0200186to_intel_th_parent(struct intel_th_device *thdev)
Alexander Shishkin39f40342015-09-22 15:47:14 +0300187{
188 struct device *parent = thdev->dev.parent;
189
190 if (!parent)
191 return NULL;
192
193 return to_intel_th_device(parent);
194}
195
Alexander Shishkin5e067232016-11-18 15:05:01 +0200196static inline struct intel_th *to_intel_th(struct intel_th_device *thdev)
197{
Alexander Shishkin8edc5142016-11-18 15:36:39 +0200198 if (thdev->type == INTEL_TH_OUTPUT)
199 thdev = to_intel_th_parent(thdev);
Alexander Shishkin5e067232016-11-18 15:05:01 +0200200
Alexander Shishkin8edc5142016-11-18 15:36:39 +0200201 if (WARN_ON_ONCE(!thdev || thdev->type == INTEL_TH_OUTPUT))
Alexander Shishkin5e067232016-11-18 15:05:01 +0200202 return NULL;
203
204 return dev_get_drvdata(thdev->dev.parent);
205}
206
Alexander Shishkin39f40342015-09-22 15:47:14 +0300207struct intel_th *
208intel_th_alloc(struct device *dev, struct resource *devres,
209 unsigned int ndevres, int irq);
210void intel_th_free(struct intel_th *th);
211
212int intel_th_driver_register(struct intel_th_driver *thdrv);
213void intel_th_driver_unregister(struct intel_th_driver *thdrv);
214
215int intel_th_trace_enable(struct intel_th_device *thdev);
216int intel_th_trace_disable(struct intel_th_device *thdev);
217int intel_th_set_output(struct intel_th_device *thdev,
218 unsigned int master);
219
220enum {
221 TH_MMIO_CONFIG = 0,
222 TH_MMIO_SW = 2,
223 TH_MMIO_END,
224};
225
226#define TH_SUBDEVICE_MAX 6
227#define TH_POSSIBLE_OUTPUTS 8
228#define TH_CONFIGURABLE_MASTERS 256
229#define TH_MSC_MAX 2
230
231/**
232 * struct intel_th - Intel TH controller
233 * @dev: driver core's device
234 * @thdev: subdevices
235 * @hub: "switch" subdevice (GTH)
236 * @id: this Intel TH controller's device ID in the system
237 * @major: device node major for output devices
238 */
239struct intel_th {
240 struct device *dev;
241
242 struct intel_th_device *thdev[TH_SUBDEVICE_MAX];
243 struct intel_th_device *hub;
244
245 int id;
246 int major;
Alexander Shishkina36aa802016-06-30 11:51:44 +0300247#ifdef CONFIG_MODULES
248 struct work_struct request_module_work;
249#endif /* CONFIG_MODULES */
Alexander Shishkin39f40342015-09-22 15:47:14 +0300250#ifdef CONFIG_INTEL_TH_DEBUG
251 struct dentry *dbg;
252#endif
253};
254
Alexander Shishkin8edc5142016-11-18 15:36:39 +0200255static inline struct intel_th_device *
256to_intel_th_hub(struct intel_th_device *thdev)
257{
258 if (thdev->type == INTEL_TH_SWITCH)
259 return thdev;
260 else if (thdev->type == INTEL_TH_OUTPUT)
261 return to_intel_th_parent(thdev);
262
263 return to_intel_th(thdev)->hub;
264}
265
Alexander Shishkin39f40342015-09-22 15:47:14 +0300266/*
267 * Register windows
268 */
269enum {
270 /* Global Trace Hub (GTH) */
271 REG_GTH_OFFSET = 0x0000,
272 REG_GTH_LENGTH = 0x2000,
273
274 /* Software Trace Hub (STH) [0x4000..0x4fff] */
275 REG_STH_OFFSET = 0x4000,
276 REG_STH_LENGTH = 0x2000,
277
278 /* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */
279 REG_MSU_OFFSET = 0xa0000,
280 REG_MSU_LENGTH = 0x02000,
281
282 /* Internal MSU trace buffer [0x80000..0x9ffff] */
283 BUF_MSU_OFFSET = 0x80000,
284 BUF_MSU_LENGTH = 0x20000,
285
286 /* PTI output == same window as GTH */
287 REG_PTI_OFFSET = REG_GTH_OFFSET,
288 REG_PTI_LENGTH = REG_GTH_LENGTH,
289
290 /* DCI Handler (DCIH) == some window as MSU */
291 REG_DCIH_OFFSET = REG_MSU_OFFSET,
292 REG_DCIH_LENGTH = REG_MSU_LENGTH,
293};
294
295/*
Alexander Shishkin4d02cef2016-02-15 19:11:55 +0200296 * Scratchpad bits: tell firmware and external debuggers
297 * what we are up to.
298 */
299enum {
300 /* Memory is the primary destination */
301 SCRPD_MEM_IS_PRIM_DEST = BIT(0),
302 /* XHCI DbC is the primary destination */
303 SCRPD_DBC_IS_PRIM_DEST = BIT(1),
304 /* PTI is the primary destination */
305 SCRPD_PTI_IS_PRIM_DEST = BIT(2),
306 /* BSSB is the primary destination */
307 SCRPD_BSSB_IS_PRIM_DEST = BIT(3),
308 /* PTI is the alternate destination */
309 SCRPD_PTI_IS_ALT_DEST = BIT(4),
310 /* BSSB is the alternate destination */
311 SCRPD_BSSB_IS_ALT_DEST = BIT(5),
312 /* DeepSx exit occurred */
313 SCRPD_DEEPSX_EXIT = BIT(6),
314 /* S4 exit occurred */
315 SCRPD_S4_EXIT = BIT(7),
316 /* S5 exit occurred */
317 SCRPD_S5_EXIT = BIT(8),
318 /* MSU controller 0/1 is enabled */
319 SCRPD_MSC0_IS_ENABLED = BIT(9),
320 SCRPD_MSC1_IS_ENABLED = BIT(10),
321 /* Sx exit occurred */
322 SCRPD_SX_EXIT = BIT(11),
323 /* Trigger Unit is enabled */
324 SCRPD_TRIGGER_IS_ENABLED = BIT(12),
325 SCRPD_ODLA_IS_ENABLED = BIT(13),
326 SCRPD_SOCHAP_IS_ENABLED = BIT(14),
327 SCRPD_STH_IS_ENABLED = BIT(15),
328 SCRPD_DCIH_IS_ENABLED = BIT(16),
329 SCRPD_VER_IS_ENABLED = BIT(17),
330 /* External debugger is using Intel TH */
331 SCRPD_DEBUGGER_IN_USE = BIT(24),
332};
333
Alexander Shishkin39f40342015-09-22 15:47:14 +0300334#endif