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gerrit-public.fairphone.software / kernel / msm-5.4 / a7bc115fffb69a55cf2c332567ea6908d9026f22 / . / drivers / gpu / drm / radeon / ObjectID.h
blob: f1f18a48cf69d8073c11e5f3751a4322da41abc6 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]1/*
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]2* Copyright 2006-2007 Advanced Micro Devices, Inc.
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]3*
4* Permission is hereby granted, free of charge, to any person obtaining a
5* copy of this software and associated documentation files (the "Software"),
6* to deal in the Software without restriction, including without limitation
7* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8* and/or sell copies of the Software, and to permit persons to whom the
9* Software is furnished to do so, subject to the following conditions:
10*
11* The above copyright notice and this permission notice shall be included in
12* all copies or substantial portions of the Software.
13*
14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20* OTHER DEALINGS IN THE SOFTWARE.
21*/
22/* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
23
24#ifndef _OBJECTID_H
25#define _OBJECTID_H
26
27#if defined(_X86_)
28#pragma pack(1)
29#endif
30
31/****************************************************/
32/* Graphics Object Type Definition */
33/****************************************************/
34#define GRAPH_OBJECT_TYPE_NONE 0x0
35#define GRAPH_OBJECT_TYPE_GPU 0x1
36#define GRAPH_OBJECT_TYPE_ENCODER 0x2
37#define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
38#define GRAPH_OBJECT_TYPE_ROUTER 0x4
39/* deleted */
40
41/****************************************************/
42/* Encoder Object ID Definition */
43/****************************************************/
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]44#define ENCODER_OBJECT_ID_NONE 0x00
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]45
46/* Radeon Class Display Hardware */
47#define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
48#define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
49#define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
50#define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]51#define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]52#define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
53#define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
54
55/* External Third Party Encoders */
56#define ENCODER_OBJECT_ID_SI170B 0x08
57#define ENCODER_OBJECT_ID_CH7303 0x09
58#define ENCODER_OBJECT_ID_CH7301 0x0A
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]59#define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]60#define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
61#define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
62#define ENCODER_OBJECT_ID_TITFP513 0x0E
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]63#define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]64#define ENCODER_OBJECT_ID_VT1623 0x10
65#define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
66#define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
67/* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
68#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
69#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
70#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]71#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */
72#define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */
73#define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]74#define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
75#define ENCODER_OBJECT_ID_VT1625 0x1A
76#define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
77#define ENCODER_OBJECT_ID_DP_AN9801 0x1C
78#define ENCODER_OBJECT_ID_DP_DP501 0x1D
79#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E
80#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F
81#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 0x20
82#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 0x21
83
84#define ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO 0xFF
85
86/****************************************************/
87/* Connector Object ID Definition */
88/****************************************************/
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]89#define CONNECTOR_OBJECT_ID_NONE 0x00
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]90#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
91#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
92#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
93#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
94#define CONNECTOR_OBJECT_ID_VGA 0x05
95#define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
96#define CONNECTOR_OBJECT_ID_SVIDEO 0x07
97#define CONNECTOR_OBJECT_ID_YPbPr 0x08
98#define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]99#define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]100#define CONNECTOR_OBJECT_ID_SCART 0x0B
101#define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
102#define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
103#define CONNECTOR_OBJECT_ID_LVDS 0x0E
104#define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
105#define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
106#define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
107#define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
108#define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
109
110/* deleted */
111
112/****************************************************/
113/* Router Object ID Definition */
114/****************************************************/
115#define ROUTER_OBJECT_ID_NONE 0x00
116#define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
117
118/****************************************************/
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]119// Graphics Object ENUM ID Definition */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]120/****************************************************/
121#define GRAPH_OBJECT_ENUM_ID1 0x01
122#define GRAPH_OBJECT_ENUM_ID2 0x02
123#define GRAPH_OBJECT_ENUM_ID3 0x03
124#define GRAPH_OBJECT_ENUM_ID4 0x04
125#define GRAPH_OBJECT_ENUM_ID5 0x05
126#define GRAPH_OBJECT_ENUM_ID6 0x06
127
128/****************************************************/
129/* Graphics Object ID Bit definition */
130/****************************************************/
131#define OBJECT_ID_MASK 0x00FF
132#define ENUM_ID_MASK 0x0700
133#define RESERVED1_ID_MASK 0x0800
134#define OBJECT_TYPE_MASK 0x7000
135#define RESERVED2_ID_MASK 0x8000
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]136
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]137#define OBJECT_ID_SHIFT 0x00
138#define ENUM_ID_SHIFT 0x08
139#define OBJECT_TYPE_SHIFT 0x0C
140
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]141
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]142/****************************************************/
143/* Graphics Object family definition */
144/****************************************************/
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]145#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
146 GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]147/****************************************************/
148/* GPU Object ID definition - Shared with BIOS */
149/****************************************************/
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]150#define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
151 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]152
153/****************************************************/
154/* Encoder Object ID definition - Shared with BIOS */
155/****************************************************/
156/*
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]157#define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]158#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
159#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
160#define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
161#define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
162#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
163#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]164#define ENCODER_SIL170B_ENUM_ID1 0x2108
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]165#define ENCODER_CH7303_ENUM_ID1 0x2109
166#define ENCODER_CH7301_ENUM_ID1 0x210A
167#define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
168#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
169#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
170#define ENCODER_TITFP513_ENUM_ID1 0x210E
171#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
172#define ENCODER_VT1623_ENUM_ID1 0x2110
173#define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
174#define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
175#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
176#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
177#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]178#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
179#define ENCODER_SI178_ENUM_ID1 0x2117
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]180#define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
181#define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
182#define ENCODER_VT1625_ENUM_ID1 0x211A
183#define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B
184#define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C
185#define ENCODER_DP_DP501_ENUM_ID1 0x211D
186#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
187*/
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]188#define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
189 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
190 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]191
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]192#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
193 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
194 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]195
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]196#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
197 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
198 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]199
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]200#define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
201 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
202 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]203
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]204#define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
205 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
206 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]207
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]208#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
209 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
210 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]211
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]212#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
213 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
214 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]215
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]216#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
217 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
218 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]219
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]220#define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
221 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
222 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]223
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]224#define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
225 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
226 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]227
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]228#define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
229 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
230 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]231
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]232#define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
233 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
234 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]235
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]236#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
237 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
238 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]239
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]240#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
241 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
242 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]243
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]244
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]245#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
246 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
247 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]248
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]249
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]250#define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
251 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
252 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]253
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]254#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
255 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
256 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]257
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]258#define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
259 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
260 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]261
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]262#define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
263 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
264 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]265
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]266#define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
267 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
268 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]269
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]270#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
271 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
272 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]273
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]274
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]275#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
276 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
277 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]278
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]279
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]280#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
281 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
282 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]283
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]284#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
285 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
286 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]287
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]288#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
289 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
290 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]291
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]292#define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
293 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
294 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]295
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]296#define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
297 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
298 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]299
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]300#define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
301 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
302 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]303
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]304#define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
305 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
306 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]307
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]308#define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
309 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
310 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]311
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]312#define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
313 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
314 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]315
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]316#define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
317 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
318 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]319
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]320#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
321 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
322 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]323
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]324#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
325 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
326 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]327
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]328#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
329 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
330 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]331
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]332#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
333 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
334 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
335
336#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
337 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
338 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
339
340#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
341 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
342 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
343
344#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
345 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
346 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
347
348#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
349 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
350 ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]351
352/****************************************************/
353/* Connector Object ID definition - Shared with BIOS */
354/****************************************************/
355/*
356#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101
357#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102
358#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103
359#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104
360#define CONNECTOR_VGA_ENUM_ID1 0x3105
361#define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106
362#define CONNECTOR_SVIDEO_ENUM_ID1 0x3107
363#define CONNECTOR_YPbPr_ENUM_ID1 0x3108
364#define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109
365#define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A
366#define CONNECTOR_SCART_ENUM_ID1 0x310B
367#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C
368#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D
369#define CONNECTOR_LVDS_ENUM_ID1 0x310E
370#define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
371#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
372*/
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]373#define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
374 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
375 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]376
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]377#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
378 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
379 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]380
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]381#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
382 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
383 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]384
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]385#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
386 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
387 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]388
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]389#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
390 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
391 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]392
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]393#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
394 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
395 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]396
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]397#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
398 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
399 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]400
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]401#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
402 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
403 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]404
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]405#define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
406 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
407 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]408
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]409#define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
410 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
411 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]412
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]413#define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
414 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
415 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]416
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]417#define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
418 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
419 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]420
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]421#define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
422 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
423 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]424
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]425#define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
426 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
427 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]428
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]429#define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
430 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
431 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]432
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]433#define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
434 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
435 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]436
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]437#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
438 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
439 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]440
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]441#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
442 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
443 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]444
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]445#define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
446 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
447 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]448
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]449#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
450 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
451 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]452
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]453#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
454 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
455 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]456
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]457#define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
458 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
459 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]460
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]461#define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
462 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
463 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]464
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]465
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]466#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
467 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
468 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]469
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]470#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
471 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
472 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]473
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]474#define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
475 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
476 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]477
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]478#define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
479 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
480 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]481
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]482#define CONNECTOR_DISPLAYPORT_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
483 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
484 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
485
486#define CONNECTOR_DISPLAYPORT_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
487 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
488 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]489
490/****************************************************/
491/* Router Object ID definition - Shared with BIOS */
492/****************************************************/
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]493#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
494 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
495 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]496
497/* deleted */
498
499/****************************************************/
500/* Object Cap definition - Shared with BIOS */
501/****************************************************/
502#define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
503#define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
504
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]505
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200[diff] [blame]506#define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
507#define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
508#define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
509
510#if defined(_X86_)
511#pragma pack()
512#endif
513
Alex Deuchera7bc1152010-01-07 11:35:48 -0500[diff] [blame^]514#endif /*GRAPHICTYPE */
515
516
517
518