blob: f847a3a579139d96010b83e8f3882c9399867967 [file] [log] [blame]
Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
203 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
204 MLX5_CMD_OP_QUERY_RQ = 0x90b,
205 MLX5_CMD_OP_CREATE_RMP = 0x90c,
206 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
207 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
208 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300209 MLX5_CMD_OP_CREATE_TIS = 0x912,
210 MLX5_CMD_OP_MODIFY_TIS = 0x913,
211 MLX5_CMD_OP_DESTROY_TIS = 0x914,
212 MLX5_CMD_OP_QUERY_TIS = 0x915,
213 MLX5_CMD_OP_CREATE_RQT = 0x916,
214 MLX5_CMD_OP_MODIFY_RQT = 0x917,
215 MLX5_CMD_OP_DESTROY_RQT = 0x918,
216 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200217 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300218 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
219 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
220 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
221 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
222 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
223 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
224 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
225 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200226 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000227 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
228 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
229 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300230 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300231 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
232 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200233 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
234 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300235 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
236 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
237 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
238 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
239 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300240 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300241};
242
243struct mlx5_ifc_flow_table_fields_supported_bits {
244 u8 outer_dmac[0x1];
245 u8 outer_smac[0x1];
246 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300247 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300248 u8 outer_first_prio[0x1];
249 u8 outer_first_cfi[0x1];
250 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300251 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300252 u8 outer_second_prio[0x1];
253 u8 outer_second_cfi[0x1];
254 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200255 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300256 u8 outer_sip[0x1];
257 u8 outer_dip[0x1];
258 u8 outer_frag[0x1];
259 u8 outer_ip_protocol[0x1];
260 u8 outer_ip_ecn[0x1];
261 u8 outer_ip_dscp[0x1];
262 u8 outer_udp_sport[0x1];
263 u8 outer_udp_dport[0x1];
264 u8 outer_tcp_sport[0x1];
265 u8 outer_tcp_dport[0x1];
266 u8 outer_tcp_flags[0x1];
267 u8 outer_gre_protocol[0x1];
268 u8 outer_gre_key[0x1];
269 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200270 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300271 u8 source_eswitch_port[0x1];
272
273 u8 inner_dmac[0x1];
274 u8 inner_smac[0x1];
275 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300276 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300277 u8 inner_first_prio[0x1];
278 u8 inner_first_cfi[0x1];
279 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200280 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300281 u8 inner_second_prio[0x1];
282 u8 inner_second_cfi[0x1];
283 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200284 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300285 u8 inner_sip[0x1];
286 u8 inner_dip[0x1];
287 u8 inner_frag[0x1];
288 u8 inner_ip_protocol[0x1];
289 u8 inner_ip_ecn[0x1];
290 u8 inner_ip_dscp[0x1];
291 u8 inner_udp_sport[0x1];
292 u8 inner_udp_dport[0x1];
293 u8 inner_tcp_sport[0x1];
294 u8 inner_tcp_dport[0x1];
295 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200296 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300297
Matan Barakb4ff3a32016-02-09 14:57:42 +0200298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300299};
300
301struct mlx5_ifc_flow_table_prop_layout_bits {
302 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000303 u8 reserved_at_1[0x1];
304 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200305 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200306 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200307 u8 identified_miss_table_mode[0x1];
308 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300309 u8 encap[0x1];
310 u8 decap[0x1];
311 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Matan Barakb4ff3a32016-02-09 14:57:42 +0200313 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300314 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200315 u8 log_max_modify_header_context[0x8];
316 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 max_ft_level[0x8];
318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320
Matan Barakb4ff3a32016-02-09 14:57:42 +0200321 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200322 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_destination[0x8];
326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328 u8 log_max_flow[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331
332 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
333
334 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
335};
336
337struct mlx5_ifc_odp_per_transport_service_cap_bits {
338 u8 send[0x1];
339 u8 receive[0x1];
340 u8 write[0x1];
341 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200342 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300343 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200344 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300345};
346
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200347struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200349
350 u8 ipv4[0x20];
351};
352
353struct mlx5_ifc_ipv6_layout_bits {
354 u8 ipv6[16][0x8];
355};
356
357union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
358 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
359 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200360 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200361};
362
Saeed Mahameede2816822015-05-28 22:28:40 +0300363struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
364 u8 smac_47_16[0x20];
365
366 u8 smac_15_0[0x10];
367 u8 ethertype[0x10];
368
369 u8 dmac_47_16[0x20];
370
371 u8 dmac_15_0[0x10];
372 u8 first_prio[0x3];
373 u8 first_cfi[0x1];
374 u8 first_vid[0xc];
375
376 u8 ip_protocol[0x8];
377 u8 ip_dscp[0x6];
378 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300379 u8 cvlan_tag[0x1];
380 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300381 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300382 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300383 u8 tcp_flags[0x9];
384
385 u8 tcp_sport[0x10];
386 u8 tcp_dport[0x10];
387
Or Gerlitza8ade552017-06-07 17:49:56 +0300388 u8 reserved_at_c0[0x18];
389 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300390
391 u8 udp_sport[0x10];
392 u8 udp_dport[0x10];
393
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200394 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300395
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200396 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300397};
398
399struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300400 u8 reserved_at_0[0x8];
401 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300402
Matan Barakb4ff3a32016-02-09 14:57:42 +0200403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300404 u8 source_port[0x10];
405
406 u8 outer_second_prio[0x3];
407 u8 outer_second_cfi[0x1];
408 u8 outer_second_vid[0xc];
409 u8 inner_second_prio[0x3];
410 u8 inner_second_cfi[0x1];
411 u8 inner_second_vid[0xc];
412
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300413 u8 outer_second_cvlan_tag[0x1];
414 u8 inner_second_cvlan_tag[0x1];
415 u8 outer_second_svlan_tag[0x1];
416 u8 inner_second_svlan_tag[0x1];
417 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300418 u8 gre_protocol[0x10];
419
420 u8 gre_key_h[0x18];
421 u8 gre_key_l[0x8];
422
423 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200424 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425
Matan Barakb4ff3a32016-02-09 14:57:42 +0200426 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300427
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429 u8 outer_ipv6_flow_label[0x14];
430
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432 u8 inner_ipv6_flow_label[0x14];
433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435};
436
437struct mlx5_ifc_cmd_pas_bits {
438 u8 pa_h[0x20];
439
440 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442};
443
444struct mlx5_ifc_uint64_bits {
445 u8 hi[0x20];
446
447 u8 lo[0x20];
448};
449
450enum {
451 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
452 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
453 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
454 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
455 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
456 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
457 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
458 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
459 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
460 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
461};
462
463struct mlx5_ifc_ads_bits {
464 u8 fl[0x1];
465 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 pkey_index[0x10];
468
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 grh[0x1];
471 u8 mlid[0x7];
472 u8 rlid[0x10];
473
474 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200477 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300478 u8 stat_rate[0x4];
479 u8 hop_limit[0x8];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 tclass[0x8];
483 u8 flow_label[0x14];
484
485 u8 rgid_rip[16][0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 f_dscp[0x1];
489 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200490 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300491 u8 f_eth_prio[0x1];
492 u8 ecn[0x2];
493 u8 dscp[0x6];
494 u8 udp_sport[0x10];
495
496 u8 dei_cfi[0x1];
497 u8 eth_prio[0x3];
498 u8 sl[0x4];
499 u8 port[0x8];
500 u8 rmac_47_32[0x10];
501
502 u8 rmac_31_0[0x20];
503};
504
505struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200506 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300507 u8 nic_rx_multi_path_tirs_fts[0x1];
508 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
509 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510
511 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
512
Matan Barakb4ff3a32016-02-09 14:57:42 +0200513 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514
515 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524};
525
Saeed Mahameed495716b2015-12-01 18:03:19 +0200526struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200527 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536};
537
Saeed Mahameedd6666752015-12-01 18:03:22 +0200538struct mlx5_ifc_e_switch_cap_bits {
539 u8 vport_svlan_strip[0x1];
540 u8 vport_cvlan_strip[0x1];
541 u8 vport_svlan_insert[0x1];
542 u8 vport_cvlan_insert_if_not_exist[0x1];
543 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300544 u8 reserved_at_5[0x19];
545 u8 nic_vport_node_guid_modify[0x1];
546 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200547
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300548 u8 vxlan_encap_decap[0x1];
549 u8 nvgre_encap_decap[0x1];
550 u8 reserved_at_22[0x9];
551 u8 log_max_encap_headers[0x5];
552 u8 reserved_2b[0x6];
553 u8 max_encap_header_size[0xa];
554
555 u8 reserved_40[0x7c0];
556
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557};
558
Saeed Mahameed74862162016-06-09 15:11:34 +0300559struct mlx5_ifc_qos_cap_bits {
560 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300561 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200562 u8 esw_bw_share[0x1];
563 u8 esw_rate_limit[0x1];
564 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300565
566 u8 reserved_at_20[0x20];
567
Saeed Mahameed74862162016-06-09 15:11:34 +0300568 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300569
Saeed Mahameed74862162016-06-09 15:11:34 +0300570 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300573 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300574
575 u8 esw_element_type[0x10];
576 u8 esw_tsar_type[0x10];
577
578 u8 reserved_at_c0[0x10];
579 u8 max_qos_para_vport[0x10];
580
581 u8 max_tsar_bw_share[0x20];
582
583 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300584};
585
Saeed Mahameede2816822015-05-28 22:28:40 +0300586struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
587 u8 csum_cap[0x1];
588 u8 vlan_cap[0x1];
589 u8 lro_cap[0x1];
590 u8 lro_psh_flag[0x1];
591 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200592 u8 reserved_at_5[0x2];
593 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200594 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200595 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300596 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200597 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300598 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300599 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300600 u8 reg_umr_sq[0x1];
601 u8 scatter_fcs[0x1];
602 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300603 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 tunnel_statless_gre[0x1];
606 u8 tunnel_stateless_vxlan[0x1];
607
Ilan Tayari547eede2017-04-18 16:04:28 +0300608 u8 swp[0x1];
609 u8 swp_csum[0x1];
610 u8 swp_lso[0x1];
611 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612
Matan Barakb4ff3a32016-02-09 14:57:42 +0200613 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614 u8 lro_min_mss_size[0x10];
615
Matan Barakb4ff3a32016-02-09 14:57:42 +0200616 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617
618 u8 lro_timer_supported_periods[4][0x20];
619
Matan Barakb4ff3a32016-02-09 14:57:42 +0200620 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300621};
622
623struct mlx5_ifc_roce_cap_bits {
624 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626
Matan Barakb4ff3a32016-02-09 14:57:42 +0200627 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300628
Matan Barakb4ff3a32016-02-09 14:57:42 +0200629 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300630 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632 u8 roce_version[0x8];
633
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635 u8 r_roce_dest_udp_port[0x10];
636
637 u8 r_roce_max_src_udp_port[0x10];
638 u8 r_roce_min_src_udp_port[0x10];
639
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641 u8 roce_address_table_size[0x10];
642
Matan Barakb4ff3a32016-02-09 14:57:42 +0200643 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644};
645
646enum {
647 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
656};
657
658enum {
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
668};
669
670struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200671 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300672
Or Gerlitzbd108382017-05-28 15:24:17 +0300673 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200674 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300675 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300676
Matan Barakb4ff3a32016-02-09 14:57:42 +0200677 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300678
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Matan Barakb4ff3a32016-02-09 14:57:42 +0200681 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200682 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683
Matan Barakb4ff3a32016-02-09 14:57:42 +0200684 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200685 u8 atomic_size_qp[0x10];
686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688 u8 atomic_size_dc[0x10];
689
Matan Barakb4ff3a32016-02-09 14:57:42 +0200690 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691};
692
693struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200694 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300695
696 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200697 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700
701 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
702
703 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
704
705 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708};
709
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200710struct mlx5_ifc_calc_op {
711 u8 reserved_at_0[0x10];
712 u8 reserved_at_10[0x9];
713 u8 op_swap_endianness[0x1];
714 u8 op_min[0x1];
715 u8 op_xor[0x1];
716 u8 op_or[0x1];
717 u8 op_and[0x1];
718 u8 op_max[0x1];
719 u8 op_add[0x1];
720};
721
722struct mlx5_ifc_vector_calc_cap_bits {
723 u8 calc_matrix[0x1];
724 u8 reserved_at_1[0x1f];
725 u8 reserved_at_20[0x8];
726 u8 max_vec_count[0x8];
727 u8 reserved_at_30[0xd];
728 u8 max_chunk_size[0x3];
729 struct mlx5_ifc_calc_op calc0;
730 struct mlx5_ifc_calc_op calc1;
731 struct mlx5_ifc_calc_op calc2;
732 struct mlx5_ifc_calc_op calc3;
733
734 u8 reserved_at_e0[0x720];
735};
736
Saeed Mahameede2816822015-05-28 22:28:40 +0300737enum {
738 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
739 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300740 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300741};
742
743enum {
744 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
745 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
746};
747
748enum {
749 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
750 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
751 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
752 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
753 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
754};
755
756enum {
757 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
758 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
759 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
760 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
761 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
762 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
763};
764
765enum {
766 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
767 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
768};
769
770enum {
771 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
772 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
773 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
774};
775
776enum {
777 MLX5_CAP_PORT_TYPE_IB = 0x0,
778 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300779};
780
Max Gurtovoy1410a902017-05-28 10:53:10 +0300781enum {
782 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
783 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
784 MLX5_CAP_UMR_FENCE_NONE = 0x2,
785};
786
Eli Cohenb7755162014-10-02 12:19:44 +0300787struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200788 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300789
790 u8 log_max_srq_sz[0x8];
791 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200792 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300793 u8 log_max_qp[0x5];
794
Matan Barakb4ff3a32016-02-09 14:57:42 +0200795 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300796 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300798
Matan Barakb4ff3a32016-02-09 14:57:42 +0200799 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300800 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_cq[0x5];
803
804 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200805 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300806 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200807 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300808 u8 log_max_eq[0x4];
809
810 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200811 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200813 u8 force_teardown[0x1];
814 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200816 u8 umr_extended_translation_offset[0x1];
817 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_klm_list_size[0x6];
819
Matan Barakb4ff3a32016-02-09 14:57:42 +0200820 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200822 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_ra_res_dc[0x6];
824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300826 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 log_max_ra_res_qp[0x6];
829
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200830 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 cc_query_allowed[0x1];
832 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200833 u8 start_pad[0x1];
834 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300835 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300836 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300837
Saeed Mahameede2816822015-05-28 22:28:40 +0300838 u8 out_of_seq_cnt[0x1];
839 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300840 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300841 u8 reserved_at_183[0x1];
842 u8 modify_rq_counter_set_id[0x1];
843 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300844 u8 max_qp_cnt[0xa];
845 u8 pkey_table_size[0x10];
846
Saeed Mahameede2816822015-05-28 22:28:40 +0300847 u8 vport_group_manager[0x1];
848 u8 vhca_group_manager[0x1];
849 u8 ib_virt[0x1];
850 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200851 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300852 u8 ets[0x1];
853 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200854 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300855 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200856 u8 mcam_reg[0x1];
857 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200859 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200860 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300861 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200862 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300863 u8 disable_link_up[0x1];
864 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300865 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300866 u8 num_ports[0x8];
867
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300868 u8 reserved_at_1c0[0x1];
869 u8 pps[0x1];
870 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300872 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200873 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300874 u8 reserved_at_1d0[0x1];
875 u8 dcbx[0x1];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200876 u8 reserved_at_1d2[0x3];
877 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200878 u8 rol_s[0x1];
879 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300880 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200881 u8 wol_s[0x1];
882 u8 wol_g[0x1];
883 u8 wol_a[0x1];
884 u8 wol_b[0x1];
885 u8 wol_m[0x1];
886 u8 wol_u[0x1];
887 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300888
889 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300890 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300891 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300892
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300894 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300895 u8 reserved_at_202[0x1];
896 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200897 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300898 u8 reserved_at_205[0x5];
899 u8 umr_fence[0x2];
900 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300901 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300902 u8 cmdif_checksum[0x2];
903 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300904 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300905 u8 wq_signature[0x1];
906 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300907 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300908 u8 sho[0x1];
909 u8 tph[0x1];
910 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300911 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300912 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300913 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300914 u8 roce[0x1];
915 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300916 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300917
918 u8 cq_oi[0x1];
919 u8 cq_resize[0x1];
920 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300921 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300922 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300923 u8 pg[0x1];
924 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300925 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300926 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300927 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300928 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300929 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200931 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300932 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200933 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300934 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300935 u8 qkv[0x1];
936 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200937 u8 set_deth_sqpn[0x1];
938 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300939 u8 xrc[0x1];
940 u8 ud[0x1];
941 u8 uc[0x1];
942 u8 rc[0x1];
943
Eli Cohena6d51b62017-01-03 23:55:23 +0200944 u8 uar_4k[0x1];
945 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300947 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 log_pg_sz[0x8];
949
950 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200951 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300952 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300955
956 u8 reserved_at_270[0xb];
957 u8 lag_master[0x1];
958 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300959
Tariq Toukane1c9c622016-04-11 23:10:21 +0300960 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300961 u8 max_wqe_sz_sq[0x10];
962
Tariq Toukane1c9c622016-04-11 23:10:21 +0300963 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 max_wqe_sz_rq[0x10];
965
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 max_wqe_sz_sq_dc[0x10];
968
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300970 u8 max_qp_mcg[0x19];
971
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 log_max_mcg[0x8];
974
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300976 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_max_xrcd[0x5];
981
Amir Vadaia351a1b02016-07-14 10:32:38 +0300982 u8 reserved_at_340[0x8];
983 u8 log_max_flow_counter_bulk[0x8];
984 u8 max_flow_counter[0x10];
985
Eli Cohenb7755162014-10-02 12:19:44 +0300986
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300988 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_tis[0x5];
995
Saeed Mahameede2816822015-05-28 22:28:40 +0300996 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300998 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001000 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001004 u8 log_max_tis_per_sq[0x5];
1005
Tariq Toukane1c9c622016-04-11 23:10:21 +03001006 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001007 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001011 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001014
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001016 u8 log_max_wq_sz[0x5];
1017
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001018 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001020 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001022 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001024 u8 log_max_current_uc_list[0x5];
1025
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001027
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001029 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001031 u8 log_uar_page_sz[0x10];
1032
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001034 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001035 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036
Eli Cohena6d51b62017-01-03 23:55:23 +02001037 u8 reserved_at_500[0x20];
1038 u8 num_of_uars_per_page[0x20];
1039 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040
1041 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001042 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001043
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001044 u8 cqe_compression_timeout[0x10];
1045 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001046
Saeed Mahameed74862162016-06-09 15:11:34 +03001047 u8 reserved_at_5e0[0x10];
1048 u8 tag_matching[0x1];
1049 u8 rndv_offload_rc[0x1];
1050 u8 rndv_offload_dc[0x1];
1051 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001052 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001053 u8 log_max_xrq[0x5];
1054
Max Gurtovoy7b135582017-01-02 11:37:38 +02001055 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001056};
1057
Saeed Mahameed81848732015-12-01 18:03:20 +02001058enum mlx5_flow_destination_type {
1059 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1060 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1061 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001062
1063 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001064};
1065
1066struct mlx5_ifc_dest_format_struct_bits {
1067 u8 destination_type[0x8];
1068 u8 destination_id[0x18];
1069
Matan Barakb4ff3a32016-02-09 14:57:42 +02001070 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001071};
1072
Amir Vadai9dc0b282016-05-13 12:55:39 +00001073struct mlx5_ifc_flow_counter_list_bits {
Rabie Loulou61690e02017-07-10 14:35:10 +03001074 u8 reserved_at_0[0x10];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001075 u8 flow_counter_id[0x10];
1076
1077 u8 reserved_at_20[0x20];
1078};
1079
1080union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1081 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1082 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1083 u8 reserved_at_0[0x40];
1084};
1085
Saeed Mahameede2816822015-05-28 22:28:40 +03001086struct mlx5_ifc_fte_match_param_bits {
1087 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1088
1089 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1090
1091 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1092
Matan Barakb4ff3a32016-02-09 14:57:42 +02001093 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001094};
1095
1096enum {
1097 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1098 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1099 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1100 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1101 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1102};
1103
1104struct mlx5_ifc_rx_hash_field_select_bits {
1105 u8 l3_prot_type[0x1];
1106 u8 l4_prot_type[0x1];
1107 u8 selected_fields[0x1e];
1108};
1109
1110enum {
1111 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1112 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1113};
1114
1115enum {
1116 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1117 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1118};
1119
1120struct mlx5_ifc_wq_bits {
1121 u8 wq_type[0x4];
1122 u8 wq_signature[0x1];
1123 u8 end_padding_mode[0x2];
1124 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001125 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001126
1127 u8 hds_skip_first_sge[0x1];
1128 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001129 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001130 u8 page_offset[0x5];
1131 u8 lwm[0x10];
1132
Matan Barakb4ff3a32016-02-09 14:57:42 +02001133 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001134 u8 pd[0x18];
1135
Matan Barakb4ff3a32016-02-09 14:57:42 +02001136 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001137 u8 uar_page[0x18];
1138
1139 u8 dbr_addr[0x40];
1140
1141 u8 hw_counter[0x20];
1142
1143 u8 sw_counter[0x20];
1144
Matan Barakb4ff3a32016-02-09 14:57:42 +02001145 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001146 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001147 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001148 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001149 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001150 u8 log_wq_sz[0x5];
1151
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001152 u8 reserved_at_120[0x15];
1153 u8 log_wqe_num_of_strides[0x3];
1154 u8 two_byte_shift_en[0x1];
1155 u8 reserved_at_139[0x4];
1156 u8 log_wqe_stride_size[0x3];
1157
1158 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001159
1160 struct mlx5_ifc_cmd_pas_bits pas[0];
1161};
1162
1163struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001164 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001165 u8 rq_num[0x18];
1166};
1167
1168struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001169 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001170 u8 mac_addr_47_32[0x10];
1171
1172 u8 mac_addr_31_0[0x20];
1173};
1174
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001175struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001176 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001177 u8 vlan[0x0c];
1178
Matan Barakb4ff3a32016-02-09 14:57:42 +02001179 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001180};
1181
Saeed Mahameede2816822015-05-28 22:28:40 +03001182struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001183 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001184
1185 u8 min_time_between_cnps[0x20];
1186
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001188 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001189 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001190 u8 cnp_802p_prio[0x3];
1191
Matan Barakb4ff3a32016-02-09 14:57:42 +02001192 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001193};
1194
1195struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001196 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001197
Matan Barakb4ff3a32016-02-09 14:57:42 +02001198 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001200 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001201 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001202 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001203
Matan Barakb4ff3a32016-02-09 14:57:42 +02001204 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001205
1206 u8 rpg_time_reset[0x20];
1207
1208 u8 rpg_byte_reset[0x20];
1209
1210 u8 rpg_threshold[0x20];
1211
1212 u8 rpg_max_rate[0x20];
1213
1214 u8 rpg_ai_rate[0x20];
1215
1216 u8 rpg_hai_rate[0x20];
1217
1218 u8 rpg_gd[0x20];
1219
1220 u8 rpg_min_dec_fac[0x20];
1221
1222 u8 rpg_min_rate[0x20];
1223
Matan Barakb4ff3a32016-02-09 14:57:42 +02001224 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001225
1226 u8 rate_to_set_on_first_cnp[0x20];
1227
1228 u8 dce_tcp_g[0x20];
1229
1230 u8 dce_tcp_rtt[0x20];
1231
1232 u8 rate_reduce_monitor_period[0x20];
1233
Matan Barakb4ff3a32016-02-09 14:57:42 +02001234 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001235
1236 u8 initial_alpha_value[0x20];
1237
Matan Barakb4ff3a32016-02-09 14:57:42 +02001238 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001239};
1240
1241struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001242 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001243
1244 u8 rppp_max_rps[0x20];
1245
1246 u8 rpg_time_reset[0x20];
1247
1248 u8 rpg_byte_reset[0x20];
1249
1250 u8 rpg_threshold[0x20];
1251
1252 u8 rpg_max_rate[0x20];
1253
1254 u8 rpg_ai_rate[0x20];
1255
1256 u8 rpg_hai_rate[0x20];
1257
1258 u8 rpg_gd[0x20];
1259
1260 u8 rpg_min_dec_fac[0x20];
1261
1262 u8 rpg_min_rate[0x20];
1263
Matan Barakb4ff3a32016-02-09 14:57:42 +02001264 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001265};
1266
1267enum {
1268 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1269 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1270 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1271};
1272
1273struct mlx5_ifc_resize_field_select_bits {
1274 u8 resize_field_select[0x20];
1275};
1276
1277enum {
1278 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1279 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1280 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1281 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1282};
1283
1284struct mlx5_ifc_modify_field_select_bits {
1285 u8 modify_field_select[0x20];
1286};
1287
1288struct mlx5_ifc_field_select_r_roce_np_bits {
1289 u8 field_select_r_roce_np[0x20];
1290};
1291
1292struct mlx5_ifc_field_select_r_roce_rp_bits {
1293 u8 field_select_r_roce_rp[0x20];
1294};
1295
1296enum {
1297 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1298 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1299 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1300 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1301 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1302 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1303 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1304 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1305 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1306 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1307};
1308
1309struct mlx5_ifc_field_select_802_1qau_rp_bits {
1310 u8 field_select_8021qaurp[0x20];
1311};
1312
1313struct mlx5_ifc_phys_layer_cntrs_bits {
1314 u8 time_since_last_clear_high[0x20];
1315
1316 u8 time_since_last_clear_low[0x20];
1317
1318 u8 symbol_errors_high[0x20];
1319
1320 u8 symbol_errors_low[0x20];
1321
1322 u8 sync_headers_errors_high[0x20];
1323
1324 u8 sync_headers_errors_low[0x20];
1325
1326 u8 edpl_bip_errors_lane0_high[0x20];
1327
1328 u8 edpl_bip_errors_lane0_low[0x20];
1329
1330 u8 edpl_bip_errors_lane1_high[0x20];
1331
1332 u8 edpl_bip_errors_lane1_low[0x20];
1333
1334 u8 edpl_bip_errors_lane2_high[0x20];
1335
1336 u8 edpl_bip_errors_lane2_low[0x20];
1337
1338 u8 edpl_bip_errors_lane3_high[0x20];
1339
1340 u8 edpl_bip_errors_lane3_low[0x20];
1341
1342 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1343
1344 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1345
1346 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1347
1348 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1349
1350 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1351
1352 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1353
1354 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1355
1356 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1357
1358 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1359
1360 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1361
1362 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1363
1364 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1365
1366 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1367
1368 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1369
1370 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1371
1372 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1373
1374 u8 rs_fec_corrected_blocks_high[0x20];
1375
1376 u8 rs_fec_corrected_blocks_low[0x20];
1377
1378 u8 rs_fec_uncorrectable_blocks_high[0x20];
1379
1380 u8 rs_fec_uncorrectable_blocks_low[0x20];
1381
1382 u8 rs_fec_no_errors_blocks_high[0x20];
1383
1384 u8 rs_fec_no_errors_blocks_low[0x20];
1385
1386 u8 rs_fec_single_error_blocks_high[0x20];
1387
1388 u8 rs_fec_single_error_blocks_low[0x20];
1389
1390 u8 rs_fec_corrected_symbols_total_high[0x20];
1391
1392 u8 rs_fec_corrected_symbols_total_low[0x20];
1393
1394 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1395
1396 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1397
1398 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1399
1400 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1401
1402 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1403
1404 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1405
1406 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1407
1408 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1409
1410 u8 link_down_events[0x20];
1411
1412 u8 successful_recovery_events[0x20];
1413
Matan Barakb4ff3a32016-02-09 14:57:42 +02001414 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001415};
1416
Gal Pressmand8dc0502016-09-27 17:04:51 +03001417struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1418 u8 time_since_last_clear_high[0x20];
1419
1420 u8 time_since_last_clear_low[0x20];
1421
1422 u8 phy_received_bits_high[0x20];
1423
1424 u8 phy_received_bits_low[0x20];
1425
1426 u8 phy_symbol_errors_high[0x20];
1427
1428 u8 phy_symbol_errors_low[0x20];
1429
1430 u8 phy_corrected_bits_high[0x20];
1431
1432 u8 phy_corrected_bits_low[0x20];
1433
1434 u8 phy_corrected_bits_lane0_high[0x20];
1435
1436 u8 phy_corrected_bits_lane0_low[0x20];
1437
1438 u8 phy_corrected_bits_lane1_high[0x20];
1439
1440 u8 phy_corrected_bits_lane1_low[0x20];
1441
1442 u8 phy_corrected_bits_lane2_high[0x20];
1443
1444 u8 phy_corrected_bits_lane2_low[0x20];
1445
1446 u8 phy_corrected_bits_lane3_high[0x20];
1447
1448 u8 phy_corrected_bits_lane3_low[0x20];
1449
1450 u8 reserved_at_200[0x5c0];
1451};
1452
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001453struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1454 u8 symbol_error_counter[0x10];
1455
1456 u8 link_error_recovery_counter[0x8];
1457
1458 u8 link_downed_counter[0x8];
1459
1460 u8 port_rcv_errors[0x10];
1461
1462 u8 port_rcv_remote_physical_errors[0x10];
1463
1464 u8 port_rcv_switch_relay_errors[0x10];
1465
1466 u8 port_xmit_discards[0x10];
1467
1468 u8 port_xmit_constraint_errors[0x8];
1469
1470 u8 port_rcv_constraint_errors[0x8];
1471
1472 u8 reserved_at_70[0x8];
1473
1474 u8 link_overrun_errors[0x8];
1475
1476 u8 reserved_at_80[0x10];
1477
1478 u8 vl_15_dropped[0x10];
1479
Tim Wright133bea02017-05-01 17:30:08 +01001480 u8 reserved_at_a0[0x80];
1481
1482 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001483};
1484
Saeed Mahameede2816822015-05-28 22:28:40 +03001485struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1486 u8 transmit_queue_high[0x20];
1487
1488 u8 transmit_queue_low[0x20];
1489
Matan Barakb4ff3a32016-02-09 14:57:42 +02001490 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001491};
1492
1493struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1494 u8 rx_octets_high[0x20];
1495
1496 u8 rx_octets_low[0x20];
1497
Matan Barakb4ff3a32016-02-09 14:57:42 +02001498 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001499
1500 u8 rx_frames_high[0x20];
1501
1502 u8 rx_frames_low[0x20];
1503
1504 u8 tx_octets_high[0x20];
1505
1506 u8 tx_octets_low[0x20];
1507
Matan Barakb4ff3a32016-02-09 14:57:42 +02001508 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001509
1510 u8 tx_frames_high[0x20];
1511
1512 u8 tx_frames_low[0x20];
1513
1514 u8 rx_pause_high[0x20];
1515
1516 u8 rx_pause_low[0x20];
1517
1518 u8 rx_pause_duration_high[0x20];
1519
1520 u8 rx_pause_duration_low[0x20];
1521
1522 u8 tx_pause_high[0x20];
1523
1524 u8 tx_pause_low[0x20];
1525
1526 u8 tx_pause_duration_high[0x20];
1527
1528 u8 tx_pause_duration_low[0x20];
1529
1530 u8 rx_pause_transition_high[0x20];
1531
1532 u8 rx_pause_transition_low[0x20];
1533
Matan Barakb4ff3a32016-02-09 14:57:42 +02001534 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001535};
1536
1537struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1538 u8 port_transmit_wait_high[0x20];
1539
1540 u8 port_transmit_wait_low[0x20];
1541
Matan Barakb4ff3a32016-02-09 14:57:42 +02001542 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001543};
1544
1545struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1546 u8 dot3stats_alignment_errors_high[0x20];
1547
1548 u8 dot3stats_alignment_errors_low[0x20];
1549
1550 u8 dot3stats_fcs_errors_high[0x20];
1551
1552 u8 dot3stats_fcs_errors_low[0x20];
1553
1554 u8 dot3stats_single_collision_frames_high[0x20];
1555
1556 u8 dot3stats_single_collision_frames_low[0x20];
1557
1558 u8 dot3stats_multiple_collision_frames_high[0x20];
1559
1560 u8 dot3stats_multiple_collision_frames_low[0x20];
1561
1562 u8 dot3stats_sqe_test_errors_high[0x20];
1563
1564 u8 dot3stats_sqe_test_errors_low[0x20];
1565
1566 u8 dot3stats_deferred_transmissions_high[0x20];
1567
1568 u8 dot3stats_deferred_transmissions_low[0x20];
1569
1570 u8 dot3stats_late_collisions_high[0x20];
1571
1572 u8 dot3stats_late_collisions_low[0x20];
1573
1574 u8 dot3stats_excessive_collisions_high[0x20];
1575
1576 u8 dot3stats_excessive_collisions_low[0x20];
1577
1578 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1579
1580 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1581
1582 u8 dot3stats_carrier_sense_errors_high[0x20];
1583
1584 u8 dot3stats_carrier_sense_errors_low[0x20];
1585
1586 u8 dot3stats_frame_too_longs_high[0x20];
1587
1588 u8 dot3stats_frame_too_longs_low[0x20];
1589
1590 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1591
1592 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1593
1594 u8 dot3stats_symbol_errors_high[0x20];
1595
1596 u8 dot3stats_symbol_errors_low[0x20];
1597
1598 u8 dot3control_in_unknown_opcodes_high[0x20];
1599
1600 u8 dot3control_in_unknown_opcodes_low[0x20];
1601
1602 u8 dot3in_pause_frames_high[0x20];
1603
1604 u8 dot3in_pause_frames_low[0x20];
1605
1606 u8 dot3out_pause_frames_high[0x20];
1607
1608 u8 dot3out_pause_frames_low[0x20];
1609
Matan Barakb4ff3a32016-02-09 14:57:42 +02001610 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001611};
1612
1613struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1614 u8 ether_stats_drop_events_high[0x20];
1615
1616 u8 ether_stats_drop_events_low[0x20];
1617
1618 u8 ether_stats_octets_high[0x20];
1619
1620 u8 ether_stats_octets_low[0x20];
1621
1622 u8 ether_stats_pkts_high[0x20];
1623
1624 u8 ether_stats_pkts_low[0x20];
1625
1626 u8 ether_stats_broadcast_pkts_high[0x20];
1627
1628 u8 ether_stats_broadcast_pkts_low[0x20];
1629
1630 u8 ether_stats_multicast_pkts_high[0x20];
1631
1632 u8 ether_stats_multicast_pkts_low[0x20];
1633
1634 u8 ether_stats_crc_align_errors_high[0x20];
1635
1636 u8 ether_stats_crc_align_errors_low[0x20];
1637
1638 u8 ether_stats_undersize_pkts_high[0x20];
1639
1640 u8 ether_stats_undersize_pkts_low[0x20];
1641
1642 u8 ether_stats_oversize_pkts_high[0x20];
1643
1644 u8 ether_stats_oversize_pkts_low[0x20];
1645
1646 u8 ether_stats_fragments_high[0x20];
1647
1648 u8 ether_stats_fragments_low[0x20];
1649
1650 u8 ether_stats_jabbers_high[0x20];
1651
1652 u8 ether_stats_jabbers_low[0x20];
1653
1654 u8 ether_stats_collisions_high[0x20];
1655
1656 u8 ether_stats_collisions_low[0x20];
1657
1658 u8 ether_stats_pkts64octets_high[0x20];
1659
1660 u8 ether_stats_pkts64octets_low[0x20];
1661
1662 u8 ether_stats_pkts65to127octets_high[0x20];
1663
1664 u8 ether_stats_pkts65to127octets_low[0x20];
1665
1666 u8 ether_stats_pkts128to255octets_high[0x20];
1667
1668 u8 ether_stats_pkts128to255octets_low[0x20];
1669
1670 u8 ether_stats_pkts256to511octets_high[0x20];
1671
1672 u8 ether_stats_pkts256to511octets_low[0x20];
1673
1674 u8 ether_stats_pkts512to1023octets_high[0x20];
1675
1676 u8 ether_stats_pkts512to1023octets_low[0x20];
1677
1678 u8 ether_stats_pkts1024to1518octets_high[0x20];
1679
1680 u8 ether_stats_pkts1024to1518octets_low[0x20];
1681
1682 u8 ether_stats_pkts1519to2047octets_high[0x20];
1683
1684 u8 ether_stats_pkts1519to2047octets_low[0x20];
1685
1686 u8 ether_stats_pkts2048to4095octets_high[0x20];
1687
1688 u8 ether_stats_pkts2048to4095octets_low[0x20];
1689
1690 u8 ether_stats_pkts4096to8191octets_high[0x20];
1691
1692 u8 ether_stats_pkts4096to8191octets_low[0x20];
1693
1694 u8 ether_stats_pkts8192to10239octets_high[0x20];
1695
1696 u8 ether_stats_pkts8192to10239octets_low[0x20];
1697
Matan Barakb4ff3a32016-02-09 14:57:42 +02001698 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001699};
1700
1701struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1702 u8 if_in_octets_high[0x20];
1703
1704 u8 if_in_octets_low[0x20];
1705
1706 u8 if_in_ucast_pkts_high[0x20];
1707
1708 u8 if_in_ucast_pkts_low[0x20];
1709
1710 u8 if_in_discards_high[0x20];
1711
1712 u8 if_in_discards_low[0x20];
1713
1714 u8 if_in_errors_high[0x20];
1715
1716 u8 if_in_errors_low[0x20];
1717
1718 u8 if_in_unknown_protos_high[0x20];
1719
1720 u8 if_in_unknown_protos_low[0x20];
1721
1722 u8 if_out_octets_high[0x20];
1723
1724 u8 if_out_octets_low[0x20];
1725
1726 u8 if_out_ucast_pkts_high[0x20];
1727
1728 u8 if_out_ucast_pkts_low[0x20];
1729
1730 u8 if_out_discards_high[0x20];
1731
1732 u8 if_out_discards_low[0x20];
1733
1734 u8 if_out_errors_high[0x20];
1735
1736 u8 if_out_errors_low[0x20];
1737
1738 u8 if_in_multicast_pkts_high[0x20];
1739
1740 u8 if_in_multicast_pkts_low[0x20];
1741
1742 u8 if_in_broadcast_pkts_high[0x20];
1743
1744 u8 if_in_broadcast_pkts_low[0x20];
1745
1746 u8 if_out_multicast_pkts_high[0x20];
1747
1748 u8 if_out_multicast_pkts_low[0x20];
1749
1750 u8 if_out_broadcast_pkts_high[0x20];
1751
1752 u8 if_out_broadcast_pkts_low[0x20];
1753
Matan Barakb4ff3a32016-02-09 14:57:42 +02001754 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001755};
1756
1757struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1758 u8 a_frames_transmitted_ok_high[0x20];
1759
1760 u8 a_frames_transmitted_ok_low[0x20];
1761
1762 u8 a_frames_received_ok_high[0x20];
1763
1764 u8 a_frames_received_ok_low[0x20];
1765
1766 u8 a_frame_check_sequence_errors_high[0x20];
1767
1768 u8 a_frame_check_sequence_errors_low[0x20];
1769
1770 u8 a_alignment_errors_high[0x20];
1771
1772 u8 a_alignment_errors_low[0x20];
1773
1774 u8 a_octets_transmitted_ok_high[0x20];
1775
1776 u8 a_octets_transmitted_ok_low[0x20];
1777
1778 u8 a_octets_received_ok_high[0x20];
1779
1780 u8 a_octets_received_ok_low[0x20];
1781
1782 u8 a_multicast_frames_xmitted_ok_high[0x20];
1783
1784 u8 a_multicast_frames_xmitted_ok_low[0x20];
1785
1786 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1787
1788 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1789
1790 u8 a_multicast_frames_received_ok_high[0x20];
1791
1792 u8 a_multicast_frames_received_ok_low[0x20];
1793
1794 u8 a_broadcast_frames_received_ok_high[0x20];
1795
1796 u8 a_broadcast_frames_received_ok_low[0x20];
1797
1798 u8 a_in_range_length_errors_high[0x20];
1799
1800 u8 a_in_range_length_errors_low[0x20];
1801
1802 u8 a_out_of_range_length_field_high[0x20];
1803
1804 u8 a_out_of_range_length_field_low[0x20];
1805
1806 u8 a_frame_too_long_errors_high[0x20];
1807
1808 u8 a_frame_too_long_errors_low[0x20];
1809
1810 u8 a_symbol_error_during_carrier_high[0x20];
1811
1812 u8 a_symbol_error_during_carrier_low[0x20];
1813
1814 u8 a_mac_control_frames_transmitted_high[0x20];
1815
1816 u8 a_mac_control_frames_transmitted_low[0x20];
1817
1818 u8 a_mac_control_frames_received_high[0x20];
1819
1820 u8 a_mac_control_frames_received_low[0x20];
1821
1822 u8 a_unsupported_opcodes_received_high[0x20];
1823
1824 u8 a_unsupported_opcodes_received_low[0x20];
1825
1826 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1827
1828 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1829
1830 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1831
1832 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1833
Matan Barakb4ff3a32016-02-09 14:57:42 +02001834 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001835};
1836
Gal Pressman8ed1a632016-11-17 13:46:01 +02001837struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1838 u8 life_time_counter_high[0x20];
1839
1840 u8 life_time_counter_low[0x20];
1841
1842 u8 rx_errors[0x20];
1843
1844 u8 tx_errors[0x20];
1845
1846 u8 l0_to_recovery_eieos[0x20];
1847
1848 u8 l0_to_recovery_ts[0x20];
1849
1850 u8 l0_to_recovery_framing[0x20];
1851
1852 u8 l0_to_recovery_retrain[0x20];
1853
1854 u8 crc_error_dllp[0x20];
1855
1856 u8 crc_error_tlp[0x20];
1857
1858 u8 reserved_at_140[0x680];
1859};
1860
Saeed Mahameede2816822015-05-28 22:28:40 +03001861struct mlx5_ifc_cmd_inter_comp_event_bits {
1862 u8 command_completion_vector[0x20];
1863
Matan Barakb4ff3a32016-02-09 14:57:42 +02001864 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001865};
1866
1867struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001868 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001869 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001870 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001871 u8 vl[0x4];
1872
Matan Barakb4ff3a32016-02-09 14:57:42 +02001873 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001874};
1875
1876struct mlx5_ifc_db_bf_congestion_event_bits {
1877 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001878 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001879 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001880 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001881
Matan Barakb4ff3a32016-02-09 14:57:42 +02001882 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001883};
1884
1885struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001886 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001887
1888 u8 gpio_event_hi[0x20];
1889
1890 u8 gpio_event_lo[0x20];
1891
Matan Barakb4ff3a32016-02-09 14:57:42 +02001892 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001893};
1894
1895struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001896 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001897
1898 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001899 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001900
Matan Barakb4ff3a32016-02-09 14:57:42 +02001901 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001902};
1903
1904struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001905 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001906};
1907
1908enum {
1909 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1910 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1911};
1912
1913struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001914 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001915 u8 cqn[0x18];
1916
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918
Matan Barakb4ff3a32016-02-09 14:57:42 +02001919 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001920 u8 syndrome[0x8];
1921
Matan Barakb4ff3a32016-02-09 14:57:42 +02001922 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001923};
1924
1925struct mlx5_ifc_rdma_page_fault_event_bits {
1926 u8 bytes_committed[0x20];
1927
1928 u8 r_key[0x20];
1929
Matan Barakb4ff3a32016-02-09 14:57:42 +02001930 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001931 u8 packet_len[0x10];
1932
1933 u8 rdma_op_len[0x20];
1934
1935 u8 rdma_va[0x40];
1936
Matan Barakb4ff3a32016-02-09 14:57:42 +02001937 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001938 u8 rdma[0x1];
1939 u8 write[0x1];
1940 u8 requestor[0x1];
1941 u8 qp_number[0x18];
1942};
1943
1944struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1945 u8 bytes_committed[0x20];
1946
Matan Barakb4ff3a32016-02-09 14:57:42 +02001947 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001948 u8 wqe_index[0x10];
1949
Matan Barakb4ff3a32016-02-09 14:57:42 +02001950 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001951 u8 len[0x10];
1952
Matan Barakb4ff3a32016-02-09 14:57:42 +02001953 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001954
Matan Barakb4ff3a32016-02-09 14:57:42 +02001955 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001956 u8 rdma[0x1];
1957 u8 write_read[0x1];
1958 u8 requestor[0x1];
1959 u8 qpn[0x18];
1960};
1961
1962struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001963 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001964
1965 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001966 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001967
Matan Barakb4ff3a32016-02-09 14:57:42 +02001968 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001969 u8 qpn_rqn_sqn[0x18];
1970};
1971
1972struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001973 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001974
Matan Barakb4ff3a32016-02-09 14:57:42 +02001975 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001976 u8 dct_number[0x18];
1977};
1978
1979struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001980 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001981
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983 u8 cq_number[0x18];
1984};
1985
1986enum {
1987 MLX5_QPC_STATE_RST = 0x0,
1988 MLX5_QPC_STATE_INIT = 0x1,
1989 MLX5_QPC_STATE_RTR = 0x2,
1990 MLX5_QPC_STATE_RTS = 0x3,
1991 MLX5_QPC_STATE_SQER = 0x4,
1992 MLX5_QPC_STATE_ERR = 0x6,
1993 MLX5_QPC_STATE_SQD = 0x7,
1994 MLX5_QPC_STATE_SUSPENDED = 0x9,
1995};
1996
1997enum {
1998 MLX5_QPC_ST_RC = 0x0,
1999 MLX5_QPC_ST_UC = 0x1,
2000 MLX5_QPC_ST_UD = 0x2,
2001 MLX5_QPC_ST_XRC = 0x3,
2002 MLX5_QPC_ST_DCI = 0x5,
2003 MLX5_QPC_ST_QP0 = 0x7,
2004 MLX5_QPC_ST_QP1 = 0x8,
2005 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2006 MLX5_QPC_ST_REG_UMR = 0xc,
2007};
2008
2009enum {
2010 MLX5_QPC_PM_STATE_ARMED = 0x0,
2011 MLX5_QPC_PM_STATE_REARM = 0x1,
2012 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2013 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2014};
2015
2016enum {
2017 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2018 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2019};
2020
2021enum {
2022 MLX5_QPC_MTU_256_BYTES = 0x1,
2023 MLX5_QPC_MTU_512_BYTES = 0x2,
2024 MLX5_QPC_MTU_1K_BYTES = 0x3,
2025 MLX5_QPC_MTU_2K_BYTES = 0x4,
2026 MLX5_QPC_MTU_4K_BYTES = 0x5,
2027 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2028};
2029
2030enum {
2031 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2032 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2033 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2034 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2035 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2036 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2037 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2038 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2039};
2040
2041enum {
2042 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2043 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2044 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2045};
2046
2047enum {
2048 MLX5_QPC_CS_RES_DISABLE = 0x0,
2049 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2050 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2051};
2052
2053struct mlx5_ifc_qpc_bits {
2054 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002055 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002056 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002057 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002058 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002059 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002060 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002061 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002062
2063 u8 wq_signature[0x1];
2064 u8 block_lb_mc[0x1];
2065 u8 atomic_like_write_en[0x1];
2066 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002067 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002068 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002069 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002070 u8 pd[0x18];
2071
2072 u8 mtu[0x3];
2073 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002074 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002075 u8 log_rq_size[0x4];
2076 u8 log_rq_stride[0x3];
2077 u8 no_sq[0x1];
2078 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002079 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002080 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002081 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002082
2083 u8 counter_set_id[0x8];
2084 u8 uar_page[0x18];
2085
Matan Barakb4ff3a32016-02-09 14:57:42 +02002086 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002087 u8 user_index[0x18];
2088
Matan Barakb4ff3a32016-02-09 14:57:42 +02002089 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002090 u8 log_page_size[0x5];
2091 u8 remote_qpn[0x18];
2092
2093 struct mlx5_ifc_ads_bits primary_address_path;
2094
2095 struct mlx5_ifc_ads_bits secondary_address_path;
2096
2097 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002098 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002099 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002100 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002101 u8 retry_count[0x3];
2102 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002103 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002104 u8 fre[0x1];
2105 u8 cur_rnr_retry[0x3];
2106 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002107 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108
Matan Barakb4ff3a32016-02-09 14:57:42 +02002109 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002110
Matan Barakb4ff3a32016-02-09 14:57:42 +02002111 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002112 u8 next_send_psn[0x18];
2113
Matan Barakb4ff3a32016-02-09 14:57:42 +02002114 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002115 u8 cqn_snd[0x18];
2116
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002117 u8 reserved_at_400[0x8];
2118 u8 deth_sqpn[0x18];
2119
2120 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002121
Matan Barakb4ff3a32016-02-09 14:57:42 +02002122 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002123 u8 last_acked_psn[0x18];
2124
Matan Barakb4ff3a32016-02-09 14:57:42 +02002125 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002126 u8 ssn[0x18];
2127
Matan Barakb4ff3a32016-02-09 14:57:42 +02002128 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002130 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002131 u8 atomic_mode[0x4];
2132 u8 rre[0x1];
2133 u8 rwe[0x1];
2134 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002135 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002136 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002137 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002138 u8 cd_slave_receive[0x1];
2139 u8 cd_slave_send[0x1];
2140 u8 cd_master[0x1];
2141
Matan Barakb4ff3a32016-02-09 14:57:42 +02002142 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143 u8 min_rnr_nak[0x5];
2144 u8 next_rcv_psn[0x18];
2145
Matan Barakb4ff3a32016-02-09 14:57:42 +02002146 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002147 u8 xrcd[0x18];
2148
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150 u8 cqn_rcv[0x18];
2151
2152 u8 dbr_addr[0x40];
2153
2154 u8 q_key[0x20];
2155
Matan Barakb4ff3a32016-02-09 14:57:42 +02002156 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002158 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002159
Matan Barakb4ff3a32016-02-09 14:57:42 +02002160 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002161 u8 rmsn[0x18];
2162
2163 u8 hw_sq_wqebb_counter[0x10];
2164 u8 sw_sq_wqebb_counter[0x10];
2165
2166 u8 hw_rq_counter[0x20];
2167
2168 u8 sw_rq_counter[0x20];
2169
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171
Matan Barakb4ff3a32016-02-09 14:57:42 +02002172 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002173 u8 cgs[0x1];
2174 u8 cs_req[0x8];
2175 u8 cs_res[0x8];
2176
2177 u8 dc_access_key[0x40];
2178
Matan Barakb4ff3a32016-02-09 14:57:42 +02002179 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002180};
2181
2182struct mlx5_ifc_roce_addr_layout_bits {
2183 u8 source_l3_address[16][0x8];
2184
Matan Barakb4ff3a32016-02-09 14:57:42 +02002185 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002186 u8 vlan_valid[0x1];
2187 u8 vlan_id[0xc];
2188 u8 source_mac_47_32[0x10];
2189
2190 u8 source_mac_31_0[0x20];
2191
Matan Barakb4ff3a32016-02-09 14:57:42 +02002192 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002193 u8 roce_l3_type[0x4];
2194 u8 roce_version[0x8];
2195
Matan Barakb4ff3a32016-02-09 14:57:42 +02002196 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002197};
2198
2199union mlx5_ifc_hca_cap_union_bits {
2200 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2201 struct mlx5_ifc_odp_cap_bits odp_cap;
2202 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2203 struct mlx5_ifc_roce_cap_bits roce_cap;
2204 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2205 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002206 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002207 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002208 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002209 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002210 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002211 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002212};
2213
2214enum {
2215 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2216 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2217 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002218 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002219 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2220 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002221 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002222};
2223
2224struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226
2227 u8 group_id[0x20];
2228
Matan Barakb4ff3a32016-02-09 14:57:42 +02002229 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002230 u8 flow_tag[0x18];
2231
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233 u8 action[0x10];
2234
Matan Barakb4ff3a32016-02-09 14:57:42 +02002235 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002236 u8 destination_list_size[0x18];
2237
Amir Vadai9dc0b282016-05-13 12:55:39 +00002238 u8 reserved_at_a0[0x8];
2239 u8 flow_counter_list_size[0x18];
2240
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002241 u8 encap_id[0x20];
2242
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002243 u8 modify_header_id[0x20];
2244
2245 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002246
2247 struct mlx5_ifc_fte_match_param_bits match_value;
2248
Matan Barakb4ff3a32016-02-09 14:57:42 +02002249 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002250
Amir Vadai9dc0b282016-05-13 12:55:39 +00002251 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002252};
2253
2254enum {
2255 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2256 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2257};
2258
2259struct mlx5_ifc_xrc_srqc_bits {
2260 u8 state[0x4];
2261 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002262 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002263
2264 u8 wq_signature[0x1];
2265 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002266 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002267 u8 rlky[0x1];
2268 u8 basic_cyclic_rcv_wqe[0x1];
2269 u8 log_rq_stride[0x3];
2270 u8 xrcd[0x18];
2271
2272 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002273 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002274 u8 cqn[0x18];
2275
Matan Barakb4ff3a32016-02-09 14:57:42 +02002276 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002277
2278 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002279 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002280 u8 log_page_size[0x6];
2281 u8 user_index[0x18];
2282
Matan Barakb4ff3a32016-02-09 14:57:42 +02002283 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002284
Matan Barakb4ff3a32016-02-09 14:57:42 +02002285 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002286 u8 pd[0x18];
2287
2288 u8 lwm[0x10];
2289 u8 wqe_cnt[0x10];
2290
Matan Barakb4ff3a32016-02-09 14:57:42 +02002291 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002292
2293 u8 db_record_addr_h[0x20];
2294
2295 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002296 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002297
Matan Barakb4ff3a32016-02-09 14:57:42 +02002298 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002299};
2300
2301struct mlx5_ifc_traffic_counter_bits {
2302 u8 packets[0x40];
2303
2304 u8 octets[0x40];
2305};
2306
2307struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002308 u8 strict_lag_tx_port_affinity[0x1];
2309 u8 reserved_at_1[0x3];
2310 u8 lag_tx_port_affinity[0x04];
2311
2312 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002313 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002314 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002315
Matan Barakb4ff3a32016-02-09 14:57:42 +02002316 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002317
Matan Barakb4ff3a32016-02-09 14:57:42 +02002318 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002319 u8 transport_domain[0x18];
2320
Erez Shitrit500a3d02017-04-13 06:36:51 +03002321 u8 reserved_at_140[0x8];
2322 u8 underlay_qpn[0x18];
2323 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002324};
2325
2326enum {
2327 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2328 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2329};
2330
2331enum {
2332 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2333 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2334};
2335
2336enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002337 MLX5_RX_HASH_FN_NONE = 0x0,
2338 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2339 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002340};
2341
2342enum {
2343 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2344 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2345};
2346
2347struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002348 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002349
2350 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002351 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002352
Matan Barakb4ff3a32016-02-09 14:57:42 +02002353 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354
Matan Barakb4ff3a32016-02-09 14:57:42 +02002355 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002356 u8 lro_timeout_period_usecs[0x10];
2357 u8 lro_enable_mask[0x4];
2358 u8 lro_max_ip_payload_size[0x8];
2359
Matan Barakb4ff3a32016-02-09 14:57:42 +02002360 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002361
Matan Barakb4ff3a32016-02-09 14:57:42 +02002362 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002363 u8 inline_rqn[0x18];
2364
2365 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002368 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002369 u8 indirect_table[0x18];
2370
2371 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002372 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002373 u8 self_lb_block[0x2];
2374 u8 transport_domain[0x18];
2375
2376 u8 rx_hash_toeplitz_key[10][0x20];
2377
2378 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2379
2380 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2381
Matan Barakb4ff3a32016-02-09 14:57:42 +02002382 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002383};
2384
2385enum {
2386 MLX5_SRQC_STATE_GOOD = 0x0,
2387 MLX5_SRQC_STATE_ERROR = 0x1,
2388};
2389
2390struct mlx5_ifc_srqc_bits {
2391 u8 state[0x4];
2392 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002393 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002394
2395 u8 wq_signature[0x1];
2396 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002397 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002398 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002399 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002400 u8 log_rq_stride[0x3];
2401 u8 xrcd[0x18];
2402
2403 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002404 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002405 u8 cqn[0x18];
2406
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002411 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412
Matan Barakb4ff3a32016-02-09 14:57:42 +02002413 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414
Matan Barakb4ff3a32016-02-09 14:57:42 +02002415 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002416 u8 pd[0x18];
2417
2418 u8 lwm[0x10];
2419 u8 wqe_cnt[0x10];
2420
Matan Barakb4ff3a32016-02-09 14:57:42 +02002421 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002422
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002423 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002424
Matan Barakb4ff3a32016-02-09 14:57:42 +02002425 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002426};
2427
2428enum {
2429 MLX5_SQC_STATE_RST = 0x0,
2430 MLX5_SQC_STATE_RDY = 0x1,
2431 MLX5_SQC_STATE_ERR = 0x3,
2432};
2433
2434struct mlx5_ifc_sqc_bits {
2435 u8 rlky[0x1];
2436 u8 cd_master[0x1];
2437 u8 fre[0x1];
2438 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002439 u8 reserved_at_4[0x1];
2440 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002441 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002442 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002443 u8 allow_swp[0x1];
2444 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002445
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447 u8 user_index[0x18];
2448
Matan Barakb4ff3a32016-02-09 14:57:42 +02002449 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002450 u8 cqn[0x18];
2451
Saeed Mahameed74862162016-06-09 15:11:34 +03002452 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002453
Saeed Mahameed74862162016-06-09 15:11:34 +03002454 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002455 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002456 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002457
Matan Barakb4ff3a32016-02-09 14:57:42 +02002458 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002459
Matan Barakb4ff3a32016-02-09 14:57:42 +02002460 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002461 u8 tis_num_0[0x18];
2462
2463 struct mlx5_ifc_wq_bits wq;
2464};
2465
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002466enum {
2467 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2468 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2469 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2470 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2471};
2472
2473struct mlx5_ifc_scheduling_context_bits {
2474 u8 element_type[0x8];
2475 u8 reserved_at_8[0x18];
2476
2477 u8 element_attributes[0x20];
2478
2479 u8 parent_element_id[0x20];
2480
2481 u8 reserved_at_60[0x40];
2482
2483 u8 bw_share[0x20];
2484
2485 u8 max_average_bw[0x20];
2486
2487 u8 reserved_at_e0[0x120];
2488};
2489
Saeed Mahameede2816822015-05-28 22:28:40 +03002490struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002491 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002492
Matan Barakb4ff3a32016-02-09 14:57:42 +02002493 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002494 u8 rqt_max_size[0x10];
2495
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497 u8 rqt_actual_size[0x10];
2498
Matan Barakb4ff3a32016-02-09 14:57:42 +02002499 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002500
2501 struct mlx5_ifc_rq_num_bits rq_num[0];
2502};
2503
2504enum {
2505 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2506 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2507};
2508
2509enum {
2510 MLX5_RQC_STATE_RST = 0x0,
2511 MLX5_RQC_STATE_RDY = 0x1,
2512 MLX5_RQC_STATE_ERR = 0x3,
2513};
2514
2515struct mlx5_ifc_rqc_bits {
2516 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002517 u8 reserved_at_1[0x1];
2518 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002519 u8 vsd[0x1];
2520 u8 mem_rq_type[0x4];
2521 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002522 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002523 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002524 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002525
Matan Barakb4ff3a32016-02-09 14:57:42 +02002526 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002527 u8 user_index[0x18];
2528
Matan Barakb4ff3a32016-02-09 14:57:42 +02002529 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002530 u8 cqn[0x18];
2531
2532 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536 u8 rmpn[0x18];
2537
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539
2540 struct mlx5_ifc_wq_bits wq;
2541};
2542
2543enum {
2544 MLX5_RMPC_STATE_RDY = 0x1,
2545 MLX5_RMPC_STATE_ERR = 0x3,
2546};
2547
2548struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002549 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002550 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002551 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002552
2553 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002554 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002555
Matan Barakb4ff3a32016-02-09 14:57:42 +02002556 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002557
2558 struct mlx5_ifc_wq_bits wq;
2559};
2560
Saeed Mahameede2816822015-05-28 22:28:40 +03002561struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002562 u8 reserved_at_0[0x5];
2563 u8 min_wqe_inline_mode[0x3];
2564 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002565 u8 roce_en[0x1];
2566
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002567 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002568 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002569 u8 event_on_mtu[0x1];
2570 u8 event_on_promisc_change[0x1];
2571 u8 event_on_vlan_change[0x1];
2572 u8 event_on_mc_address_change[0x1];
2573 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002574
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002576
2577 u8 mtu[0x10];
2578
Achiad Shochat9efa7522015-12-23 18:47:20 +02002579 u8 system_image_guid[0x40];
2580 u8 port_guid[0x40];
2581 u8 node_guid[0x40];
2582
Matan Barakb4ff3a32016-02-09 14:57:42 +02002583 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002584 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002585 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002586
2587 u8 promisc_uc[0x1];
2588 u8 promisc_mc[0x1];
2589 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002590 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002591 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002592 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002593 u8 allowed_list_size[0xc];
2594
2595 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2596
Matan Barakb4ff3a32016-02-09 14:57:42 +02002597 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002598
2599 u8 current_uc_mac_address[0][0x40];
2600};
2601
2602enum {
2603 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2604 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2605 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002606 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002607};
2608
2609struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002610 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002611 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002612 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002613 u8 small_fence_on_rdma_read_response[0x1];
2614 u8 umr_en[0x1];
2615 u8 a[0x1];
2616 u8 rw[0x1];
2617 u8 rr[0x1];
2618 u8 lw[0x1];
2619 u8 lr[0x1];
2620 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002621 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002622
2623 u8 qpn[0x18];
2624 u8 mkey_7_0[0x8];
2625
Matan Barakb4ff3a32016-02-09 14:57:42 +02002626 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002627
2628 u8 length64[0x1];
2629 u8 bsf_en[0x1];
2630 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002631 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002632 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002633 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002634 u8 en_rinval[0x1];
2635 u8 pd[0x18];
2636
2637 u8 start_addr[0x40];
2638
2639 u8 len[0x40];
2640
2641 u8 bsf_octword_size[0x20];
2642
Matan Barakb4ff3a32016-02-09 14:57:42 +02002643 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002644
2645 u8 translations_octword_size[0x20];
2646
Matan Barakb4ff3a32016-02-09 14:57:42 +02002647 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002648 u8 log_page_size[0x5];
2649
Matan Barakb4ff3a32016-02-09 14:57:42 +02002650 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002651};
2652
2653struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002654 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002655 u8 pkey[0x10];
2656};
2657
2658struct mlx5_ifc_array128_auto_bits {
2659 u8 array128_auto[16][0x8];
2660};
2661
2662struct mlx5_ifc_hca_vport_context_bits {
2663 u8 field_select[0x20];
2664
Matan Barakb4ff3a32016-02-09 14:57:42 +02002665 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002666
2667 u8 sm_virt_aware[0x1];
2668 u8 has_smi[0x1];
2669 u8 has_raw[0x1];
2670 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002671 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002672 u8 port_physical_state[0x4];
2673 u8 vport_state_policy[0x4];
2674 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002675 u8 vport_state[0x4];
2676
Matan Barakb4ff3a32016-02-09 14:57:42 +02002677 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002678
2679 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002680
2681 u8 port_guid[0x40];
2682
2683 u8 node_guid[0x40];
2684
2685 u8 cap_mask1[0x20];
2686
2687 u8 cap_mask1_field_select[0x20];
2688
2689 u8 cap_mask2[0x20];
2690
2691 u8 cap_mask2_field_select[0x20];
2692
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002694
2695 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002696 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002697 u8 init_type_reply[0x4];
2698 u8 lmc[0x3];
2699 u8 subnet_timeout[0x5];
2700
2701 u8 sm_lid[0x10];
2702 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002703 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002704
2705 u8 qkey_violation_counter[0x10];
2706 u8 pkey_violation_counter[0x10];
2707
Matan Barakb4ff3a32016-02-09 14:57:42 +02002708 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002709};
2710
Saeed Mahameedd6666752015-12-01 18:03:22 +02002711struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002712 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002713 u8 vport_svlan_strip[0x1];
2714 u8 vport_cvlan_strip[0x1];
2715 u8 vport_svlan_insert[0x1];
2716 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002717 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002718
Matan Barakb4ff3a32016-02-09 14:57:42 +02002719 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002720
2721 u8 svlan_cfi[0x1];
2722 u8 svlan_pcp[0x3];
2723 u8 svlan_id[0xc];
2724 u8 cvlan_cfi[0x1];
2725 u8 cvlan_pcp[0x3];
2726 u8 cvlan_id[0xc];
2727
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002729};
2730
Saeed Mahameede2816822015-05-28 22:28:40 +03002731enum {
2732 MLX5_EQC_STATUS_OK = 0x0,
2733 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2734};
2735
2736enum {
2737 MLX5_EQC_ST_ARMED = 0x9,
2738 MLX5_EQC_ST_FIRED = 0xa,
2739};
2740
2741struct mlx5_ifc_eqc_bits {
2742 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002743 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002744 u8 ec[0x1];
2745 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002746 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002747 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002748 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002749
Matan Barakb4ff3a32016-02-09 14:57:42 +02002750 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002751
Matan Barakb4ff3a32016-02-09 14:57:42 +02002752 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002753 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002755
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002757 u8 log_eq_size[0x5];
2758 u8 uar_page[0x18];
2759
Matan Barakb4ff3a32016-02-09 14:57:42 +02002760 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002761
Matan Barakb4ff3a32016-02-09 14:57:42 +02002762 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002763 u8 intr[0x8];
2764
Matan Barakb4ff3a32016-02-09 14:57:42 +02002765 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002766 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002767 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002768
Matan Barakb4ff3a32016-02-09 14:57:42 +02002769 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002770
Matan Barakb4ff3a32016-02-09 14:57:42 +02002771 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002772 u8 consumer_counter[0x18];
2773
Matan Barakb4ff3a32016-02-09 14:57:42 +02002774 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002775 u8 producer_counter[0x18];
2776
Matan Barakb4ff3a32016-02-09 14:57:42 +02002777 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002778};
2779
2780enum {
2781 MLX5_DCTC_STATE_ACTIVE = 0x0,
2782 MLX5_DCTC_STATE_DRAINING = 0x1,
2783 MLX5_DCTC_STATE_DRAINED = 0x2,
2784};
2785
2786enum {
2787 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2788 MLX5_DCTC_CS_RES_NA = 0x1,
2789 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2790};
2791
2792enum {
2793 MLX5_DCTC_MTU_256_BYTES = 0x1,
2794 MLX5_DCTC_MTU_512_BYTES = 0x2,
2795 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2796 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2797 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2798};
2799
2800struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002801 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002802 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002803 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002804
Matan Barakb4ff3a32016-02-09 14:57:42 +02002805 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806 u8 user_index[0x18];
2807
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002809 u8 cqn[0x18];
2810
2811 u8 counter_set_id[0x8];
2812 u8 atomic_mode[0x4];
2813 u8 rre[0x1];
2814 u8 rwe[0x1];
2815 u8 rae[0x1];
2816 u8 atomic_like_write_en[0x1];
2817 u8 latency_sensitive[0x1];
2818 u8 rlky[0x1];
2819 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002820 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002821
Matan Barakb4ff3a32016-02-09 14:57:42 +02002822 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002823 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002824 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002825 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002826 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002827
Matan Barakb4ff3a32016-02-09 14:57:42 +02002828 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002829 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002830
Matan Barakb4ff3a32016-02-09 14:57:42 +02002831 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002832 u8 pd[0x18];
2833
2834 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002835 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002836 u8 flow_label[0x14];
2837
2838 u8 dc_access_key[0x40];
2839
Matan Barakb4ff3a32016-02-09 14:57:42 +02002840 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002841 u8 mtu[0x3];
2842 u8 port[0x8];
2843 u8 pkey_index[0x10];
2844
Matan Barakb4ff3a32016-02-09 14:57:42 +02002845 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002846 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002847 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848 u8 hop_limit[0x8];
2849
2850 u8 dc_access_key_violation_count[0x20];
2851
Matan Barakb4ff3a32016-02-09 14:57:42 +02002852 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853 u8 dei_cfi[0x1];
2854 u8 eth_prio[0x3];
2855 u8 ecn[0x2];
2856 u8 dscp[0x6];
2857
Matan Barakb4ff3a32016-02-09 14:57:42 +02002858 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002859};
2860
2861enum {
2862 MLX5_CQC_STATUS_OK = 0x0,
2863 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2864 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2865};
2866
2867enum {
2868 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2869 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2870};
2871
2872enum {
2873 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2874 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2875 MLX5_CQC_ST_FIRED = 0xa,
2876};
2877
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002878enum {
2879 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2880 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002881 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002882};
2883
Saeed Mahameede2816822015-05-28 22:28:40 +03002884struct mlx5_ifc_cqc_bits {
2885 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002886 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002887 u8 cqe_sz[0x3];
2888 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002889 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002890 u8 scqe_break_moderation_en[0x1];
2891 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002892 u8 cq_period_mode[0x2];
2893 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894 u8 mini_cqe_res_format[0x2];
2895 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897
Matan Barakb4ff3a32016-02-09 14:57:42 +02002898 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002899
Matan Barakb4ff3a32016-02-09 14:57:42 +02002900 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002901 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903
Matan Barakb4ff3a32016-02-09 14:57:42 +02002904 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002905 u8 log_cq_size[0x5];
2906 u8 uar_page[0x18];
2907
Matan Barakb4ff3a32016-02-09 14:57:42 +02002908 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002909 u8 cq_period[0xc];
2910 u8 cq_max_count[0x10];
2911
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002913 u8 c_eqn[0x8];
2914
Matan Barakb4ff3a32016-02-09 14:57:42 +02002915 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002916 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002917 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002918
Matan Barakb4ff3a32016-02-09 14:57:42 +02002919 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002920
Matan Barakb4ff3a32016-02-09 14:57:42 +02002921 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002922 u8 last_notified_index[0x18];
2923
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925 u8 last_solicit_index[0x18];
2926
Matan Barakb4ff3a32016-02-09 14:57:42 +02002927 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002928 u8 consumer_counter[0x18];
2929
Matan Barakb4ff3a32016-02-09 14:57:42 +02002930 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002931 u8 producer_counter[0x18];
2932
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934
2935 u8 dbr_addr[0x40];
2936};
2937
2938union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2939 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2940 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2941 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002942 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002943};
2944
2945struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002946 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002947
Matan Barakb4ff3a32016-02-09 14:57:42 +02002948 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002949 u8 ieee_vendor_id[0x18];
2950
Matan Barakb4ff3a32016-02-09 14:57:42 +02002951 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002952 u8 vsd_vendor_id[0x10];
2953
2954 u8 vsd[208][0x8];
2955
2956 u8 vsd_contd_psid[16][0x8];
2957};
2958
Saeed Mahameed74862162016-06-09 15:11:34 +03002959enum {
2960 MLX5_XRQC_STATE_GOOD = 0x0,
2961 MLX5_XRQC_STATE_ERROR = 0x1,
2962};
2963
2964enum {
2965 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2966 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2967};
2968
2969enum {
2970 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2971};
2972
2973struct mlx5_ifc_tag_matching_topology_context_bits {
2974 u8 log_matching_list_sz[0x4];
2975 u8 reserved_at_4[0xc];
2976 u8 append_next_index[0x10];
2977
2978 u8 sw_phase_cnt[0x10];
2979 u8 hw_phase_cnt[0x10];
2980
2981 u8 reserved_at_40[0x40];
2982};
2983
2984struct mlx5_ifc_xrqc_bits {
2985 u8 state[0x4];
2986 u8 rlkey[0x1];
2987 u8 reserved_at_5[0xf];
2988 u8 topology[0x4];
2989 u8 reserved_at_18[0x4];
2990 u8 offload[0x4];
2991
2992 u8 reserved_at_20[0x8];
2993 u8 user_index[0x18];
2994
2995 u8 reserved_at_40[0x8];
2996 u8 cqn[0x18];
2997
2998 u8 reserved_at_60[0xa0];
2999
3000 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3001
Artemy Kovalyov5579e152016-08-31 05:17:54 +00003002 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03003003
3004 struct mlx5_ifc_wq_bits wq;
3005};
3006
Saeed Mahameede2816822015-05-28 22:28:40 +03003007union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3008 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3009 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003010 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003011};
3012
3013union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3014 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3015 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3016 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003017 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003018};
3019
3020union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3021 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3022 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3023 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3024 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3025 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3026 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3027 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003028 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003029 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003030 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003031 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003032};
3033
Gal Pressman8ed1a632016-11-17 13:46:01 +02003034union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3035 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3036 u8 reserved_at_0[0x7c0];
3037};
3038
Saeed Mahameede2816822015-05-28 22:28:40 +03003039union mlx5_ifc_event_auto_bits {
3040 struct mlx5_ifc_comp_event_bits comp_event;
3041 struct mlx5_ifc_dct_events_bits dct_events;
3042 struct mlx5_ifc_qp_events_bits qp_events;
3043 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3044 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3045 struct mlx5_ifc_cq_error_bits cq_error;
3046 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3047 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3048 struct mlx5_ifc_gpio_event_bits gpio_event;
3049 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3050 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3051 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003052 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003053};
3054
3055struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003056 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003057
3058 u8 assert_existptr[0x20];
3059
3060 u8 assert_callra[0x20];
3061
Matan Barakb4ff3a32016-02-09 14:57:42 +02003062 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003063
3064 u8 fw_version[0x20];
3065
3066 u8 hw_id[0x20];
3067
Matan Barakb4ff3a32016-02-09 14:57:42 +02003068 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003069
3070 u8 irisc_index[0x8];
3071 u8 synd[0x8];
3072 u8 ext_synd[0x10];
3073};
3074
3075struct mlx5_ifc_register_loopback_control_bits {
3076 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003077 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003078 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003079 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003080
Matan Barakb4ff3a32016-02-09 14:57:42 +02003081 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003082};
3083
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003084struct mlx5_ifc_vport_tc_element_bits {
3085 u8 traffic_class[0x4];
3086 u8 reserved_at_4[0xc];
3087 u8 vport_number[0x10];
3088};
3089
3090struct mlx5_ifc_vport_element_bits {
3091 u8 reserved_at_0[0x10];
3092 u8 vport_number[0x10];
3093};
3094
3095enum {
3096 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3097 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3098 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3099};
3100
3101struct mlx5_ifc_tsar_element_bits {
3102 u8 reserved_at_0[0x8];
3103 u8 tsar_type[0x8];
3104 u8 reserved_at_10[0x10];
3105};
3106
Majd Dibbiny8812c242017-02-09 14:20:12 +02003107enum {
3108 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3109 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3110};
3111
Saeed Mahameede2816822015-05-28 22:28:40 +03003112struct mlx5_ifc_teardown_hca_out_bits {
3113 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003114 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003115
3116 u8 syndrome[0x20];
3117
Majd Dibbiny8812c242017-02-09 14:20:12 +02003118 u8 reserved_at_40[0x3f];
3119
3120 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003121};
3122
3123enum {
3124 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003125 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003126};
3127
3128struct mlx5_ifc_teardown_hca_in_bits {
3129 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003130 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003131
Matan Barakb4ff3a32016-02-09 14:57:42 +02003132 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003133 u8 op_mod[0x10];
3134
Matan Barakb4ff3a32016-02-09 14:57:42 +02003135 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003136 u8 profile[0x10];
3137
Matan Barakb4ff3a32016-02-09 14:57:42 +02003138 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003139};
3140
3141struct mlx5_ifc_sqerr2rts_qp_out_bits {
3142 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003143 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003144
3145 u8 syndrome[0x20];
3146
Matan Barakb4ff3a32016-02-09 14:57:42 +02003147 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003148};
3149
3150struct mlx5_ifc_sqerr2rts_qp_in_bits {
3151 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003152 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003153
Matan Barakb4ff3a32016-02-09 14:57:42 +02003154 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003155 u8 op_mod[0x10];
3156
Matan Barakb4ff3a32016-02-09 14:57:42 +02003157 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003158 u8 qpn[0x18];
3159
Matan Barakb4ff3a32016-02-09 14:57:42 +02003160 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003161
3162 u8 opt_param_mask[0x20];
3163
Matan Barakb4ff3a32016-02-09 14:57:42 +02003164 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003165
3166 struct mlx5_ifc_qpc_bits qpc;
3167
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169};
3170
3171struct mlx5_ifc_sqd2rts_qp_out_bits {
3172 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003173 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003174
3175 u8 syndrome[0x20];
3176
Matan Barakb4ff3a32016-02-09 14:57:42 +02003177 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003178};
3179
3180struct mlx5_ifc_sqd2rts_qp_in_bits {
3181 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003182 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003183
Matan Barakb4ff3a32016-02-09 14:57:42 +02003184 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003185 u8 op_mod[0x10];
3186
Matan Barakb4ff3a32016-02-09 14:57:42 +02003187 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003188 u8 qpn[0x18];
3189
Matan Barakb4ff3a32016-02-09 14:57:42 +02003190 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003191
3192 u8 opt_param_mask[0x20];
3193
Matan Barakb4ff3a32016-02-09 14:57:42 +02003194 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003195
3196 struct mlx5_ifc_qpc_bits qpc;
3197
Matan Barakb4ff3a32016-02-09 14:57:42 +02003198 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003199};
3200
3201struct mlx5_ifc_set_roce_address_out_bits {
3202 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003203 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003204
3205 u8 syndrome[0x20];
3206
Matan Barakb4ff3a32016-02-09 14:57:42 +02003207 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003208};
3209
3210struct mlx5_ifc_set_roce_address_in_bits {
3211 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003212 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003213
Matan Barakb4ff3a32016-02-09 14:57:42 +02003214 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003215 u8 op_mod[0x10];
3216
3217 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003218 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003219
Matan Barakb4ff3a32016-02-09 14:57:42 +02003220 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003221
3222 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3223};
3224
3225struct mlx5_ifc_set_mad_demux_out_bits {
3226 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003227 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003228
3229 u8 syndrome[0x20];
3230
Matan Barakb4ff3a32016-02-09 14:57:42 +02003231 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003232};
3233
3234enum {
3235 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3236 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3237};
3238
3239struct mlx5_ifc_set_mad_demux_in_bits {
3240 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244 u8 op_mod[0x10];
3245
Matan Barakb4ff3a32016-02-09 14:57:42 +02003246 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003247
Matan Barakb4ff3a32016-02-09 14:57:42 +02003248 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003249 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003250 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003251};
3252
3253struct mlx5_ifc_set_l2_table_entry_out_bits {
3254 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003255 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003256
3257 u8 syndrome[0x20];
3258
Matan Barakb4ff3a32016-02-09 14:57:42 +02003259 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003260};
3261
3262struct mlx5_ifc_set_l2_table_entry_in_bits {
3263 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003264 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003265
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267 u8 op_mod[0x10];
3268
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270
Matan Barakb4ff3a32016-02-09 14:57:42 +02003271 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003272 u8 table_index[0x18];
3273
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003275
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277 u8 vlan_valid[0x1];
3278 u8 vlan[0xc];
3279
3280 struct mlx5_ifc_mac_address_layout_bits mac_address;
3281
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283};
3284
3285struct mlx5_ifc_set_issi_out_bits {
3286 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288
3289 u8 syndrome[0x20];
3290
Matan Barakb4ff3a32016-02-09 14:57:42 +02003291 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003292};
3293
3294struct mlx5_ifc_set_issi_in_bits {
3295 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003297
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299 u8 op_mod[0x10];
3300
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003302 u8 current_issi[0x10];
3303
Matan Barakb4ff3a32016-02-09 14:57:42 +02003304 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003305};
3306
3307struct mlx5_ifc_set_hca_cap_out_bits {
3308 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003309 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003310
3311 u8 syndrome[0x20];
3312
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003314};
3315
3316struct mlx5_ifc_set_hca_cap_in_bits {
3317 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003318 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003319
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003321 u8 op_mod[0x10];
3322
Matan Barakb4ff3a32016-02-09 14:57:42 +02003323 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003324
Saeed Mahameede2816822015-05-28 22:28:40 +03003325 union mlx5_ifc_hca_cap_union_bits capability;
3326};
3327
Maor Gottlieb26a81452015-12-10 17:12:39 +02003328enum {
3329 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3330 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3331 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3332 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3333};
3334
Saeed Mahameede2816822015-05-28 22:28:40 +03003335struct mlx5_ifc_set_fte_out_bits {
3336 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003337 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003338
3339 u8 syndrome[0x20];
3340
Matan Barakb4ff3a32016-02-09 14:57:42 +02003341 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003342};
3343
3344struct mlx5_ifc_set_fte_in_bits {
3345 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347
Matan Barakb4ff3a32016-02-09 14:57:42 +02003348 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003349 u8 op_mod[0x10];
3350
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003351 u8 other_vport[0x1];
3352 u8 reserved_at_41[0xf];
3353 u8 vport_number[0x10];
3354
3355 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003356
3357 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003359
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003361 u8 table_id[0x18];
3362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003364 u8 modify_enable_mask[0x8];
3365
Matan Barakb4ff3a32016-02-09 14:57:42 +02003366 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003367
3368 u8 flow_index[0x20];
3369
Matan Barakb4ff3a32016-02-09 14:57:42 +02003370 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003371
3372 struct mlx5_ifc_flow_context_bits flow_context;
3373};
3374
3375struct mlx5_ifc_rts2rts_qp_out_bits {
3376 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003377 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003378
3379 u8 syndrome[0x20];
3380
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382};
3383
3384struct mlx5_ifc_rts2rts_qp_in_bits {
3385 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389 u8 op_mod[0x10];
3390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392 u8 qpn[0x18];
3393
Matan Barakb4ff3a32016-02-09 14:57:42 +02003394 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003395
3396 u8 opt_param_mask[0x20];
3397
Matan Barakb4ff3a32016-02-09 14:57:42 +02003398 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003399
3400 struct mlx5_ifc_qpc_bits qpc;
3401
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403};
3404
3405struct mlx5_ifc_rtr2rts_qp_out_bits {
3406 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003407 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003408
3409 u8 syndrome[0x20];
3410
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412};
3413
3414struct mlx5_ifc_rtr2rts_qp_in_bits {
3415 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003416 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419 u8 op_mod[0x10];
3420
Matan Barakb4ff3a32016-02-09 14:57:42 +02003421 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003422 u8 qpn[0x18];
3423
Matan Barakb4ff3a32016-02-09 14:57:42 +02003424 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003425
3426 u8 opt_param_mask[0x20];
3427
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003429
3430 struct mlx5_ifc_qpc_bits qpc;
3431
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433};
3434
3435struct mlx5_ifc_rst2init_qp_out_bits {
3436 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003437 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003438
3439 u8 syndrome[0x20];
3440
Matan Barakb4ff3a32016-02-09 14:57:42 +02003441 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003442};
3443
3444struct mlx5_ifc_rst2init_qp_in_bits {
3445 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003446 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003447
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449 u8 op_mod[0x10];
3450
Matan Barakb4ff3a32016-02-09 14:57:42 +02003451 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003452 u8 qpn[0x18];
3453
Matan Barakb4ff3a32016-02-09 14:57:42 +02003454 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003455
3456 u8 opt_param_mask[0x20];
3457
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003459
3460 struct mlx5_ifc_qpc_bits qpc;
3461
Matan Barakb4ff3a32016-02-09 14:57:42 +02003462 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003463};
3464
Saeed Mahameed74862162016-06-09 15:11:34 +03003465struct mlx5_ifc_query_xrq_out_bits {
3466 u8 status[0x8];
3467 u8 reserved_at_8[0x18];
3468
3469 u8 syndrome[0x20];
3470
3471 u8 reserved_at_40[0x40];
3472
3473 struct mlx5_ifc_xrqc_bits xrq_context;
3474};
3475
3476struct mlx5_ifc_query_xrq_in_bits {
3477 u8 opcode[0x10];
3478 u8 reserved_at_10[0x10];
3479
3480 u8 reserved_at_20[0x10];
3481 u8 op_mod[0x10];
3482
3483 u8 reserved_at_40[0x8];
3484 u8 xrqn[0x18];
3485
3486 u8 reserved_at_60[0x20];
3487};
3488
Saeed Mahameede2816822015-05-28 22:28:40 +03003489struct mlx5_ifc_query_xrc_srq_out_bits {
3490 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492
3493 u8 syndrome[0x20];
3494
Matan Barakb4ff3a32016-02-09 14:57:42 +02003495 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003496
3497 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3498
Matan Barakb4ff3a32016-02-09 14:57:42 +02003499 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003500
3501 u8 pas[0][0x40];
3502};
3503
3504struct mlx5_ifc_query_xrc_srq_in_bits {
3505 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003506 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003507
Matan Barakb4ff3a32016-02-09 14:57:42 +02003508 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003509 u8 op_mod[0x10];
3510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512 u8 xrc_srqn[0x18];
3513
Matan Barakb4ff3a32016-02-09 14:57:42 +02003514 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003515};
3516
3517enum {
3518 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3519 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3520};
3521
3522struct mlx5_ifc_query_vport_state_out_bits {
3523 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003524 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003525
3526 u8 syndrome[0x20];
3527
Matan Barakb4ff3a32016-02-09 14:57:42 +02003528 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003529
Matan Barakb4ff3a32016-02-09 14:57:42 +02003530 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003531 u8 admin_state[0x4];
3532 u8 state[0x4];
3533};
3534
3535enum {
3536 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003537 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003538};
3539
3540struct mlx5_ifc_query_vport_state_in_bits {
3541 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003542 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003543
Matan Barakb4ff3a32016-02-09 14:57:42 +02003544 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003545 u8 op_mod[0x10];
3546
3547 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549 u8 vport_number[0x10];
3550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552};
3553
3554struct mlx5_ifc_query_vport_counter_out_bits {
3555 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003557
3558 u8 syndrome[0x20];
3559
Matan Barakb4ff3a32016-02-09 14:57:42 +02003560 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003561
3562 struct mlx5_ifc_traffic_counter_bits received_errors;
3563
3564 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3565
3566 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3567
3568 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3569
3570 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3571
3572 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3573
3574 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3575
3576 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3577
3578 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3579
3580 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3581
3582 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3583
3584 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3585
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587};
3588
3589enum {
3590 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3591};
3592
3593struct mlx5_ifc_query_vport_counter_in_bits {
3594 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003595 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003596
Matan Barakb4ff3a32016-02-09 14:57:42 +02003597 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003598 u8 op_mod[0x10];
3599
3600 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003601 u8 reserved_at_41[0xb];
3602 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603 u8 vport_number[0x10];
3604
Matan Barakb4ff3a32016-02-09 14:57:42 +02003605 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003606
3607 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003608 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003609
Matan Barakb4ff3a32016-02-09 14:57:42 +02003610 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003611};
3612
3613struct mlx5_ifc_query_tis_out_bits {
3614 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003615 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003616
3617 u8 syndrome[0x20];
3618
Matan Barakb4ff3a32016-02-09 14:57:42 +02003619 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003620
3621 struct mlx5_ifc_tisc_bits tis_context;
3622};
3623
3624struct mlx5_ifc_query_tis_in_bits {
3625 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003626 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003627
Matan Barakb4ff3a32016-02-09 14:57:42 +02003628 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003629 u8 op_mod[0x10];
3630
Matan Barakb4ff3a32016-02-09 14:57:42 +02003631 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003632 u8 tisn[0x18];
3633
Matan Barakb4ff3a32016-02-09 14:57:42 +02003634 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003635};
3636
3637struct mlx5_ifc_query_tir_out_bits {
3638 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003639 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640
3641 u8 syndrome[0x20];
3642
Matan Barakb4ff3a32016-02-09 14:57:42 +02003643 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003644
3645 struct mlx5_ifc_tirc_bits tir_context;
3646};
3647
3648struct mlx5_ifc_query_tir_in_bits {
3649 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003650 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003651
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653 u8 op_mod[0x10];
3654
Matan Barakb4ff3a32016-02-09 14:57:42 +02003655 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003656 u8 tirn[0x18];
3657
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659};
3660
3661struct mlx5_ifc_query_srq_out_bits {
3662 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003663 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003664
3665 u8 syndrome[0x20];
3666
Matan Barakb4ff3a32016-02-09 14:57:42 +02003667 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003668
3669 struct mlx5_ifc_srqc_bits srq_context_entry;
3670
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672
3673 u8 pas[0][0x40];
3674};
3675
3676struct mlx5_ifc_query_srq_in_bits {
3677 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003678 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003679
Matan Barakb4ff3a32016-02-09 14:57:42 +02003680 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003681 u8 op_mod[0x10];
3682
Matan Barakb4ff3a32016-02-09 14:57:42 +02003683 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003684 u8 srqn[0x18];
3685
Matan Barakb4ff3a32016-02-09 14:57:42 +02003686 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003687};
3688
3689struct mlx5_ifc_query_sq_out_bits {
3690 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003691 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003692
3693 u8 syndrome[0x20];
3694
Matan Barakb4ff3a32016-02-09 14:57:42 +02003695 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003696
3697 struct mlx5_ifc_sqc_bits sq_context;
3698};
3699
3700struct mlx5_ifc_query_sq_in_bits {
3701 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003702 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003703
Matan Barakb4ff3a32016-02-09 14:57:42 +02003704 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003705 u8 op_mod[0x10];
3706
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708 u8 sqn[0x18];
3709
Matan Barakb4ff3a32016-02-09 14:57:42 +02003710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003711};
3712
3713struct mlx5_ifc_query_special_contexts_out_bits {
3714 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003715 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003716
3717 u8 syndrome[0x20];
3718
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003719 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003720
3721 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003722
3723 u8 null_mkey[0x20];
3724
3725 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726};
3727
3728struct mlx5_ifc_query_special_contexts_in_bits {
3729 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003730 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003731
Matan Barakb4ff3a32016-02-09 14:57:42 +02003732 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003733 u8 op_mod[0x10];
3734
Matan Barakb4ff3a32016-02-09 14:57:42 +02003735 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003736};
3737
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003738struct mlx5_ifc_query_scheduling_element_out_bits {
3739 u8 opcode[0x10];
3740 u8 reserved_at_10[0x10];
3741
3742 u8 reserved_at_20[0x10];
3743 u8 op_mod[0x10];
3744
3745 u8 reserved_at_40[0xc0];
3746
3747 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3748
3749 u8 reserved_at_300[0x100];
3750};
3751
3752enum {
3753 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3754};
3755
3756struct mlx5_ifc_query_scheduling_element_in_bits {
3757 u8 opcode[0x10];
3758 u8 reserved_at_10[0x10];
3759
3760 u8 reserved_at_20[0x10];
3761 u8 op_mod[0x10];
3762
3763 u8 scheduling_hierarchy[0x8];
3764 u8 reserved_at_48[0x18];
3765
3766 u8 scheduling_element_id[0x20];
3767
3768 u8 reserved_at_80[0x180];
3769};
3770
Saeed Mahameede2816822015-05-28 22:28:40 +03003771struct mlx5_ifc_query_rqt_out_bits {
3772 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003773 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003774
3775 u8 syndrome[0x20];
3776
Matan Barakb4ff3a32016-02-09 14:57:42 +02003777 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003778
3779 struct mlx5_ifc_rqtc_bits rqt_context;
3780};
3781
3782struct mlx5_ifc_query_rqt_in_bits {
3783 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003784 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003785
Matan Barakb4ff3a32016-02-09 14:57:42 +02003786 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003787 u8 op_mod[0x10];
3788
Matan Barakb4ff3a32016-02-09 14:57:42 +02003789 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790 u8 rqtn[0x18];
3791
Matan Barakb4ff3a32016-02-09 14:57:42 +02003792 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003793};
3794
3795struct mlx5_ifc_query_rq_out_bits {
3796 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003797 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003798
3799 u8 syndrome[0x20];
3800
Matan Barakb4ff3a32016-02-09 14:57:42 +02003801 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003802
3803 struct mlx5_ifc_rqc_bits rq_context;
3804};
3805
3806struct mlx5_ifc_query_rq_in_bits {
3807 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003808 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003809
Matan Barakb4ff3a32016-02-09 14:57:42 +02003810 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003811 u8 op_mod[0x10];
3812
Matan Barakb4ff3a32016-02-09 14:57:42 +02003813 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003814 u8 rqn[0x18];
3815
Matan Barakb4ff3a32016-02-09 14:57:42 +02003816 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003817};
3818
3819struct mlx5_ifc_query_roce_address_out_bits {
3820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003822
3823 u8 syndrome[0x20];
3824
Matan Barakb4ff3a32016-02-09 14:57:42 +02003825 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003826
3827 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3828};
3829
3830struct mlx5_ifc_query_roce_address_in_bits {
3831 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833
Matan Barakb4ff3a32016-02-09 14:57:42 +02003834 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835 u8 op_mod[0x10];
3836
3837 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003838 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003839
Matan Barakb4ff3a32016-02-09 14:57:42 +02003840 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003841};
3842
3843struct mlx5_ifc_query_rmp_out_bits {
3844 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003845 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003846
3847 u8 syndrome[0x20];
3848
Matan Barakb4ff3a32016-02-09 14:57:42 +02003849 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003850
3851 struct mlx5_ifc_rmpc_bits rmp_context;
3852};
3853
3854struct mlx5_ifc_query_rmp_in_bits {
3855 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857
Matan Barakb4ff3a32016-02-09 14:57:42 +02003858 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003859 u8 op_mod[0x10];
3860
Matan Barakb4ff3a32016-02-09 14:57:42 +02003861 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003862 u8 rmpn[0x18];
3863
Matan Barakb4ff3a32016-02-09 14:57:42 +02003864 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003865};
3866
3867struct mlx5_ifc_query_qp_out_bits {
3868 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003869 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003870
3871 u8 syndrome[0x20];
3872
Matan Barakb4ff3a32016-02-09 14:57:42 +02003873 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003874
3875 u8 opt_param_mask[0x20];
3876
Matan Barakb4ff3a32016-02-09 14:57:42 +02003877 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003878
3879 struct mlx5_ifc_qpc_bits qpc;
3880
Matan Barakb4ff3a32016-02-09 14:57:42 +02003881 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003882
3883 u8 pas[0][0x40];
3884};
3885
3886struct mlx5_ifc_query_qp_in_bits {
3887 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003888 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003889
Matan Barakb4ff3a32016-02-09 14:57:42 +02003890 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003891 u8 op_mod[0x10];
3892
Matan Barakb4ff3a32016-02-09 14:57:42 +02003893 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003894 u8 qpn[0x18];
3895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897};
3898
3899struct mlx5_ifc_query_q_counter_out_bits {
3900 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003901 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003902
3903 u8 syndrome[0x20];
3904
Matan Barakb4ff3a32016-02-09 14:57:42 +02003905 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003906
3907 u8 rx_write_requests[0x20];
3908
Matan Barakb4ff3a32016-02-09 14:57:42 +02003909 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003910
3911 u8 rx_read_requests[0x20];
3912
Matan Barakb4ff3a32016-02-09 14:57:42 +02003913 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003914
3915 u8 rx_atomic_requests[0x20];
3916
Matan Barakb4ff3a32016-02-09 14:57:42 +02003917 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003918
3919 u8 rx_dct_connect[0x20];
3920
Matan Barakb4ff3a32016-02-09 14:57:42 +02003921 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003922
3923 u8 out_of_buffer[0x20];
3924
Matan Barakb4ff3a32016-02-09 14:57:42 +02003925 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003926
3927 u8 out_of_sequence[0x20];
3928
Saeed Mahameed74862162016-06-09 15:11:34 +03003929 u8 reserved_at_1e0[0x20];
3930
3931 u8 duplicate_request[0x20];
3932
3933 u8 reserved_at_220[0x20];
3934
3935 u8 rnr_nak_retry_err[0x20];
3936
3937 u8 reserved_at_260[0x20];
3938
3939 u8 packet_seq_err[0x20];
3940
3941 u8 reserved_at_2a0[0x20];
3942
3943 u8 implied_nak_seq_err[0x20];
3944
3945 u8 reserved_at_2e0[0x20];
3946
3947 u8 local_ack_timeout_err[0x20];
3948
3949 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003950};
3951
3952struct mlx5_ifc_query_q_counter_in_bits {
3953 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003954 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003955
Matan Barakb4ff3a32016-02-09 14:57:42 +02003956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957 u8 op_mod[0x10];
3958
Matan Barakb4ff3a32016-02-09 14:57:42 +02003959 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003960
3961 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003962 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003963
Matan Barakb4ff3a32016-02-09 14:57:42 +02003964 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003965 u8 counter_set_id[0x8];
3966};
3967
3968struct mlx5_ifc_query_pages_out_bits {
3969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003971
3972 u8 syndrome[0x20];
3973
Matan Barakb4ff3a32016-02-09 14:57:42 +02003974 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003975 u8 function_id[0x10];
3976
3977 u8 num_pages[0x20];
3978};
3979
3980enum {
3981 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3982 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3983 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3984};
3985
3986struct mlx5_ifc_query_pages_in_bits {
3987 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003988 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003989
Matan Barakb4ff3a32016-02-09 14:57:42 +02003990 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003991 u8 op_mod[0x10];
3992
Matan Barakb4ff3a32016-02-09 14:57:42 +02003993 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003994 u8 function_id[0x10];
3995
Matan Barakb4ff3a32016-02-09 14:57:42 +02003996 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003997};
3998
3999struct mlx5_ifc_query_nic_vport_context_out_bits {
4000 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004001 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004002
4003 u8 syndrome[0x20];
4004
Matan Barakb4ff3a32016-02-09 14:57:42 +02004005 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004006
4007 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4008};
4009
4010struct mlx5_ifc_query_nic_vport_context_in_bits {
4011 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004012 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004013
Matan Barakb4ff3a32016-02-09 14:57:42 +02004014 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004015 u8 op_mod[0x10];
4016
4017 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004018 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004019 u8 vport_number[0x10];
4020
Matan Barakb4ff3a32016-02-09 14:57:42 +02004021 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004022 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004023 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004024};
4025
4026struct mlx5_ifc_query_mkey_out_bits {
4027 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004028 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004029
4030 u8 syndrome[0x20];
4031
Matan Barakb4ff3a32016-02-09 14:57:42 +02004032 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004033
4034 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4035
Matan Barakb4ff3a32016-02-09 14:57:42 +02004036 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004037
4038 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4039
4040 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4041};
4042
4043struct mlx5_ifc_query_mkey_in_bits {
4044 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004045 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004046
Matan Barakb4ff3a32016-02-09 14:57:42 +02004047 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004048 u8 op_mod[0x10];
4049
Matan Barakb4ff3a32016-02-09 14:57:42 +02004050 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004051 u8 mkey_index[0x18];
4052
4053 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004054 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004055};
4056
4057struct mlx5_ifc_query_mad_demux_out_bits {
4058 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004059 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004060
4061 u8 syndrome[0x20];
4062
Matan Barakb4ff3a32016-02-09 14:57:42 +02004063 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004064
4065 u8 mad_dumux_parameters_block[0x20];
4066};
4067
4068struct mlx5_ifc_query_mad_demux_in_bits {
4069 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073 u8 op_mod[0x10];
4074
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076};
4077
4078struct mlx5_ifc_query_l2_table_entry_out_bits {
4079 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004080 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004081
4082 u8 syndrome[0x20];
4083
Matan Barakb4ff3a32016-02-09 14:57:42 +02004084 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004085
Matan Barakb4ff3a32016-02-09 14:57:42 +02004086 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004087 u8 vlan_valid[0x1];
4088 u8 vlan[0xc];
4089
4090 struct mlx5_ifc_mac_address_layout_bits mac_address;
4091
Matan Barakb4ff3a32016-02-09 14:57:42 +02004092 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004093};
4094
4095struct mlx5_ifc_query_l2_table_entry_in_bits {
4096 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004097 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100 u8 op_mod[0x10];
4101
Matan Barakb4ff3a32016-02-09 14:57:42 +02004102 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004103
Matan Barakb4ff3a32016-02-09 14:57:42 +02004104 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004105 u8 table_index[0x18];
4106
Matan Barakb4ff3a32016-02-09 14:57:42 +02004107 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004108};
4109
4110struct mlx5_ifc_query_issi_out_bits {
4111 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004113
4114 u8 syndrome[0x20];
4115
Matan Barakb4ff3a32016-02-09 14:57:42 +02004116 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004117 u8 current_issi[0x10];
4118
Matan Barakb4ff3a32016-02-09 14:57:42 +02004119 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004120
Matan Barakb4ff3a32016-02-09 14:57:42 +02004121 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004122 u8 supported_issi_dw0[0x20];
4123};
4124
4125struct mlx5_ifc_query_issi_in_bits {
4126 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004127 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004128
Matan Barakb4ff3a32016-02-09 14:57:42 +02004129 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004130 u8 op_mod[0x10];
4131
Matan Barakb4ff3a32016-02-09 14:57:42 +02004132 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004133};
4134
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004135struct mlx5_ifc_set_driver_version_out_bits {
4136 u8 status[0x8];
4137 u8 reserved_0[0x18];
4138
4139 u8 syndrome[0x20];
4140 u8 reserved_1[0x40];
4141};
4142
4143struct mlx5_ifc_set_driver_version_in_bits {
4144 u8 opcode[0x10];
4145 u8 reserved_0[0x10];
4146
4147 u8 reserved_1[0x10];
4148 u8 op_mod[0x10];
4149
4150 u8 reserved_2[0x40];
4151 u8 driver_version[64][0x8];
4152};
4153
Saeed Mahameede2816822015-05-28 22:28:40 +03004154struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4155 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004156 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004157
4158 u8 syndrome[0x20];
4159
Matan Barakb4ff3a32016-02-09 14:57:42 +02004160 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004161
4162 struct mlx5_ifc_pkey_bits pkey[0];
4163};
4164
4165struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4166 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004167 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004168
Matan Barakb4ff3a32016-02-09 14:57:42 +02004169 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004170 u8 op_mod[0x10];
4171
4172 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004173 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004174 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175 u8 vport_number[0x10];
4176
Matan Barakb4ff3a32016-02-09 14:57:42 +02004177 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004178 u8 pkey_index[0x10];
4179};
4180
Eli Coheneff901d2016-03-11 22:58:42 +02004181enum {
4182 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4183 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4184 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4185};
4186
Saeed Mahameede2816822015-05-28 22:28:40 +03004187struct mlx5_ifc_query_hca_vport_gid_out_bits {
4188 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004189 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004190
4191 u8 syndrome[0x20];
4192
Matan Barakb4ff3a32016-02-09 14:57:42 +02004193 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004194
4195 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004196 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004197
4198 struct mlx5_ifc_array128_auto_bits gid[0];
4199};
4200
4201struct mlx5_ifc_query_hca_vport_gid_in_bits {
4202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206 u8 op_mod[0x10];
4207
4208 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004209 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004210 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211 u8 vport_number[0x10];
4212
Matan Barakb4ff3a32016-02-09 14:57:42 +02004213 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004214 u8 gid_index[0x10];
4215};
4216
4217struct mlx5_ifc_query_hca_vport_context_out_bits {
4218 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004219 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004220
4221 u8 syndrome[0x20];
4222
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224
4225 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4226};
4227
4228struct mlx5_ifc_query_hca_vport_context_in_bits {
4229 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004230 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004231
Matan Barakb4ff3a32016-02-09 14:57:42 +02004232 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004233 u8 op_mod[0x10];
4234
4235 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004236 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004237 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238 u8 vport_number[0x10];
4239
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241};
4242
4243struct mlx5_ifc_query_hca_cap_out_bits {
4244 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004245 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004246
4247 u8 syndrome[0x20];
4248
Matan Barakb4ff3a32016-02-09 14:57:42 +02004249 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004250
4251 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004252};
4253
4254struct mlx5_ifc_query_hca_cap_in_bits {
4255 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004256 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004257
Matan Barakb4ff3a32016-02-09 14:57:42 +02004258 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004259 u8 op_mod[0x10];
4260
Matan Barakb4ff3a32016-02-09 14:57:42 +02004261 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004262};
4263
Saeed Mahameede2816822015-05-28 22:28:40 +03004264struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004265 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004266 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004267
4268 u8 syndrome[0x20];
4269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004271
Matan Barakb4ff3a32016-02-09 14:57:42 +02004272 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004273 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004274 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004275 u8 log_size[0x8];
4276
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004278};
4279
Saeed Mahameede2816822015-05-28 22:28:40 +03004280struct mlx5_ifc_query_flow_table_in_bits {
4281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004283
Matan Barakb4ff3a32016-02-09 14:57:42 +02004284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004285 u8 op_mod[0x10];
4286
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288
4289 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004290 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004291
Matan Barakb4ff3a32016-02-09 14:57:42 +02004292 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004293 u8 table_id[0x18];
4294
Matan Barakb4ff3a32016-02-09 14:57:42 +02004295 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004296};
4297
4298struct mlx5_ifc_query_fte_out_bits {
4299 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004300 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004301
4302 u8 syndrome[0x20];
4303
Matan Barakb4ff3a32016-02-09 14:57:42 +02004304 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004305
4306 struct mlx5_ifc_flow_context_bits flow_context;
4307};
4308
4309struct mlx5_ifc_query_fte_in_bits {
4310 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004311 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004312
Matan Barakb4ff3a32016-02-09 14:57:42 +02004313 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004314 u8 op_mod[0x10];
4315
Matan Barakb4ff3a32016-02-09 14:57:42 +02004316 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004317
4318 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322 u8 table_id[0x18];
4323
Matan Barakb4ff3a32016-02-09 14:57:42 +02004324 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004325
4326 u8 flow_index[0x20];
4327
Matan Barakb4ff3a32016-02-09 14:57:42 +02004328 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004329};
4330
4331enum {
4332 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4333 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4334 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4335};
4336
4337struct mlx5_ifc_query_flow_group_out_bits {
4338 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004339 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004340
4341 u8 syndrome[0x20];
4342
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004344
4345 u8 start_flow_index[0x20];
4346
Matan Barakb4ff3a32016-02-09 14:57:42 +02004347 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004348
4349 u8 end_flow_index[0x20];
4350
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352
Matan Barakb4ff3a32016-02-09 14:57:42 +02004353 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004354 u8 match_criteria_enable[0x8];
4355
4356 struct mlx5_ifc_fte_match_param_bits match_criteria;
4357
Matan Barakb4ff3a32016-02-09 14:57:42 +02004358 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004359};
4360
4361struct mlx5_ifc_query_flow_group_in_bits {
4362 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004363 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004364
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004366 u8 op_mod[0x10];
4367
Matan Barakb4ff3a32016-02-09 14:57:42 +02004368 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369
4370 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004372
Matan Barakb4ff3a32016-02-09 14:57:42 +02004373 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004374 u8 table_id[0x18];
4375
4376 u8 group_id[0x20];
4377
Matan Barakb4ff3a32016-02-09 14:57:42 +02004378 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004379};
4380
Amir Vadai9dc0b282016-05-13 12:55:39 +00004381struct mlx5_ifc_query_flow_counter_out_bits {
4382 u8 status[0x8];
4383 u8 reserved_at_8[0x18];
4384
4385 u8 syndrome[0x20];
4386
4387 u8 reserved_at_40[0x40];
4388
4389 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4390};
4391
4392struct mlx5_ifc_query_flow_counter_in_bits {
4393 u8 opcode[0x10];
4394 u8 reserved_at_10[0x10];
4395
4396 u8 reserved_at_20[0x10];
4397 u8 op_mod[0x10];
4398
4399 u8 reserved_at_40[0x80];
4400
4401 u8 clear[0x1];
4402 u8 reserved_at_c1[0xf];
4403 u8 num_of_counters[0x10];
4404
4405 u8 reserved_at_e0[0x10];
4406 u8 flow_counter_id[0x10];
4407};
4408
Saeed Mahameedd6666752015-12-01 18:03:22 +02004409struct mlx5_ifc_query_esw_vport_context_out_bits {
4410 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004411 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004412
4413 u8 syndrome[0x20];
4414
Matan Barakb4ff3a32016-02-09 14:57:42 +02004415 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004416
4417 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4418};
4419
4420struct mlx5_ifc_query_esw_vport_context_in_bits {
4421 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004423
Matan Barakb4ff3a32016-02-09 14:57:42 +02004424 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004425 u8 op_mod[0x10];
4426
4427 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004429 u8 vport_number[0x10];
4430
Matan Barakb4ff3a32016-02-09 14:57:42 +02004431 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004432};
4433
4434struct mlx5_ifc_modify_esw_vport_context_out_bits {
4435 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004436 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004437
4438 u8 syndrome[0x20];
4439
Matan Barakb4ff3a32016-02-09 14:57:42 +02004440 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004441};
4442
4443struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004444 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004445 u8 vport_cvlan_insert[0x1];
4446 u8 vport_svlan_insert[0x1];
4447 u8 vport_cvlan_strip[0x1];
4448 u8 vport_svlan_strip[0x1];
4449};
4450
4451struct mlx5_ifc_modify_esw_vport_context_in_bits {
4452 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004453 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004454
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004456 u8 op_mod[0x10];
4457
4458 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004459 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004460 u8 vport_number[0x10];
4461
4462 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4463
4464 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4465};
4466
Saeed Mahameede2816822015-05-28 22:28:40 +03004467struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004468 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004469 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004470
4471 u8 syndrome[0x20];
4472
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004474
4475 struct mlx5_ifc_eqc_bits eq_context_entry;
4476
Matan Barakb4ff3a32016-02-09 14:57:42 +02004477 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004478
4479 u8 event_bitmask[0x40];
4480
Matan Barakb4ff3a32016-02-09 14:57:42 +02004481 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004482
4483 u8 pas[0][0x40];
4484};
4485
4486struct mlx5_ifc_query_eq_in_bits {
4487 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004488 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004489
Matan Barakb4ff3a32016-02-09 14:57:42 +02004490 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004491 u8 op_mod[0x10];
4492
Matan Barakb4ff3a32016-02-09 14:57:42 +02004493 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004494 u8 eq_number[0x8];
4495
Matan Barakb4ff3a32016-02-09 14:57:42 +02004496 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004497};
4498
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004499struct mlx5_ifc_encap_header_in_bits {
4500 u8 reserved_at_0[0x5];
4501 u8 header_type[0x3];
4502 u8 reserved_at_8[0xe];
4503 u8 encap_header_size[0xa];
4504
4505 u8 reserved_at_20[0x10];
4506 u8 encap_header[2][0x8];
4507
4508 u8 more_encap_header[0][0x8];
4509};
4510
4511struct mlx5_ifc_query_encap_header_out_bits {
4512 u8 status[0x8];
4513 u8 reserved_at_8[0x18];
4514
4515 u8 syndrome[0x20];
4516
4517 u8 reserved_at_40[0xa0];
4518
4519 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4520};
4521
4522struct mlx5_ifc_query_encap_header_in_bits {
4523 u8 opcode[0x10];
4524 u8 reserved_at_10[0x10];
4525
4526 u8 reserved_at_20[0x10];
4527 u8 op_mod[0x10];
4528
4529 u8 encap_id[0x20];
4530
4531 u8 reserved_at_60[0xa0];
4532};
4533
4534struct mlx5_ifc_alloc_encap_header_out_bits {
4535 u8 status[0x8];
4536 u8 reserved_at_8[0x18];
4537
4538 u8 syndrome[0x20];
4539
4540 u8 encap_id[0x20];
4541
4542 u8 reserved_at_60[0x20];
4543};
4544
4545struct mlx5_ifc_alloc_encap_header_in_bits {
4546 u8 opcode[0x10];
4547 u8 reserved_at_10[0x10];
4548
4549 u8 reserved_at_20[0x10];
4550 u8 op_mod[0x10];
4551
4552 u8 reserved_at_40[0xa0];
4553
4554 struct mlx5_ifc_encap_header_in_bits encap_header;
4555};
4556
4557struct mlx5_ifc_dealloc_encap_header_out_bits {
4558 u8 status[0x8];
4559 u8 reserved_at_8[0x18];
4560
4561 u8 syndrome[0x20];
4562
4563 u8 reserved_at_40[0x40];
4564};
4565
4566struct mlx5_ifc_dealloc_encap_header_in_bits {
4567 u8 opcode[0x10];
4568 u8 reserved_at_10[0x10];
4569
4570 u8 reserved_20[0x10];
4571 u8 op_mod[0x10];
4572
4573 u8 encap_id[0x20];
4574
4575 u8 reserved_60[0x20];
4576};
4577
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004578struct mlx5_ifc_set_action_in_bits {
4579 u8 action_type[0x4];
4580 u8 field[0xc];
4581 u8 reserved_at_10[0x3];
4582 u8 offset[0x5];
4583 u8 reserved_at_18[0x3];
4584 u8 length[0x5];
4585
4586 u8 data[0x20];
4587};
4588
4589struct mlx5_ifc_add_action_in_bits {
4590 u8 action_type[0x4];
4591 u8 field[0xc];
4592 u8 reserved_at_10[0x10];
4593
4594 u8 data[0x20];
4595};
4596
4597union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4598 struct mlx5_ifc_set_action_in_bits set_action_in;
4599 struct mlx5_ifc_add_action_in_bits add_action_in;
4600 u8 reserved_at_0[0x40];
4601};
4602
4603enum {
4604 MLX5_ACTION_TYPE_SET = 0x1,
4605 MLX5_ACTION_TYPE_ADD = 0x2,
4606};
4607
4608enum {
4609 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4610 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4611 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4612 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4613 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4614 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4615 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4616 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4617 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4618 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4619 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4620 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4621 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4622 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4623 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4624 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4625 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4626 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4627 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4628 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4629 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4630 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004631 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004632};
4633
4634struct mlx5_ifc_alloc_modify_header_context_out_bits {
4635 u8 status[0x8];
4636 u8 reserved_at_8[0x18];
4637
4638 u8 syndrome[0x20];
4639
4640 u8 modify_header_id[0x20];
4641
4642 u8 reserved_at_60[0x20];
4643};
4644
4645struct mlx5_ifc_alloc_modify_header_context_in_bits {
4646 u8 opcode[0x10];
4647 u8 reserved_at_10[0x10];
4648
4649 u8 reserved_at_20[0x10];
4650 u8 op_mod[0x10];
4651
4652 u8 reserved_at_40[0x20];
4653
4654 u8 table_type[0x8];
4655 u8 reserved_at_68[0x10];
4656 u8 num_of_actions[0x8];
4657
4658 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4659};
4660
4661struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4662 u8 status[0x8];
4663 u8 reserved_at_8[0x18];
4664
4665 u8 syndrome[0x20];
4666
4667 u8 reserved_at_40[0x40];
4668};
4669
4670struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4671 u8 opcode[0x10];
4672 u8 reserved_at_10[0x10];
4673
4674 u8 reserved_at_20[0x10];
4675 u8 op_mod[0x10];
4676
4677 u8 modify_header_id[0x20];
4678
4679 u8 reserved_at_60[0x20];
4680};
4681
Saeed Mahameede2816822015-05-28 22:28:40 +03004682struct mlx5_ifc_query_dct_out_bits {
4683 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004684 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004685
4686 u8 syndrome[0x20];
4687
Matan Barakb4ff3a32016-02-09 14:57:42 +02004688 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004689
4690 struct mlx5_ifc_dctc_bits dct_context_entry;
4691
Matan Barakb4ff3a32016-02-09 14:57:42 +02004692 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004693};
4694
4695struct mlx5_ifc_query_dct_in_bits {
4696 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004697 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004698
Matan Barakb4ff3a32016-02-09 14:57:42 +02004699 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004700 u8 op_mod[0x10];
4701
Matan Barakb4ff3a32016-02-09 14:57:42 +02004702 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004703 u8 dctn[0x18];
4704
Matan Barakb4ff3a32016-02-09 14:57:42 +02004705 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004706};
4707
4708struct mlx5_ifc_query_cq_out_bits {
4709 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004710 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004711
4712 u8 syndrome[0x20];
4713
Matan Barakb4ff3a32016-02-09 14:57:42 +02004714 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004715
4716 struct mlx5_ifc_cqc_bits cq_context;
4717
Matan Barakb4ff3a32016-02-09 14:57:42 +02004718 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004719
4720 u8 pas[0][0x40];
4721};
4722
4723struct mlx5_ifc_query_cq_in_bits {
4724 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004725 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004726
Matan Barakb4ff3a32016-02-09 14:57:42 +02004727 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004728 u8 op_mod[0x10];
4729
Matan Barakb4ff3a32016-02-09 14:57:42 +02004730 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004731 u8 cqn[0x18];
4732
Matan Barakb4ff3a32016-02-09 14:57:42 +02004733 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004734};
4735
4736struct mlx5_ifc_query_cong_status_out_bits {
4737 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004738 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004739
4740 u8 syndrome[0x20];
4741
Matan Barakb4ff3a32016-02-09 14:57:42 +02004742 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004743
4744 u8 enable[0x1];
4745 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004746 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004747};
4748
4749struct mlx5_ifc_query_cong_status_in_bits {
4750 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004751 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004752
Matan Barakb4ff3a32016-02-09 14:57:42 +02004753 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004754 u8 op_mod[0x10];
4755
Matan Barakb4ff3a32016-02-09 14:57:42 +02004756 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004757 u8 priority[0x4];
4758 u8 cong_protocol[0x4];
4759
Matan Barakb4ff3a32016-02-09 14:57:42 +02004760 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004761};
4762
4763struct mlx5_ifc_query_cong_statistics_out_bits {
4764 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004765 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004766
4767 u8 syndrome[0x20];
4768
Matan Barakb4ff3a32016-02-09 14:57:42 +02004769 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004770
Parav Pandite1f24a72017-04-16 07:29:29 +03004771 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004772
4773 u8 sum_flows[0x20];
4774
Parav Pandite1f24a72017-04-16 07:29:29 +03004775 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004776
Parav Pandite1f24a72017-04-16 07:29:29 +03004777 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004778
Parav Pandite1f24a72017-04-16 07:29:29 +03004779 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004780
Parav Pandite1f24a72017-04-16 07:29:29 +03004781 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782
Matan Barakb4ff3a32016-02-09 14:57:42 +02004783 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004784
4785 u8 time_stamp_high[0x20];
4786
4787 u8 time_stamp_low[0x20];
4788
4789 u8 accumulators_period[0x20];
4790
Parav Pandite1f24a72017-04-16 07:29:29 +03004791 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004792
Parav Pandite1f24a72017-04-16 07:29:29 +03004793 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004794
Parav Pandite1f24a72017-04-16 07:29:29 +03004795 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004796
Parav Pandite1f24a72017-04-16 07:29:29 +03004797 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798
Matan Barakb4ff3a32016-02-09 14:57:42 +02004799 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004800};
4801
4802struct mlx5_ifc_query_cong_statistics_in_bits {
4803 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004804 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004805
Matan Barakb4ff3a32016-02-09 14:57:42 +02004806 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004807 u8 op_mod[0x10];
4808
4809 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004810 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004811
Matan Barakb4ff3a32016-02-09 14:57:42 +02004812 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004813};
4814
4815struct mlx5_ifc_query_cong_params_out_bits {
4816 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004817 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004818
4819 u8 syndrome[0x20];
4820
Matan Barakb4ff3a32016-02-09 14:57:42 +02004821 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004822
4823 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4824};
4825
4826struct mlx5_ifc_query_cong_params_in_bits {
4827 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004828 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004829
Matan Barakb4ff3a32016-02-09 14:57:42 +02004830 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004831 u8 op_mod[0x10];
4832
Matan Barakb4ff3a32016-02-09 14:57:42 +02004833 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004834 u8 cong_protocol[0x4];
4835
Matan Barakb4ff3a32016-02-09 14:57:42 +02004836 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004837};
4838
4839struct mlx5_ifc_query_adapter_out_bits {
4840 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004841 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004842
4843 u8 syndrome[0x20];
4844
Matan Barakb4ff3a32016-02-09 14:57:42 +02004845 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004846
4847 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4848};
4849
4850struct mlx5_ifc_query_adapter_in_bits {
4851 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004852 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853
Matan Barakb4ff3a32016-02-09 14:57:42 +02004854 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004855 u8 op_mod[0x10];
4856
Matan Barakb4ff3a32016-02-09 14:57:42 +02004857 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004858};
4859
4860struct mlx5_ifc_qp_2rst_out_bits {
4861 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004862 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004863
4864 u8 syndrome[0x20];
4865
Matan Barakb4ff3a32016-02-09 14:57:42 +02004866 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004867};
4868
4869struct mlx5_ifc_qp_2rst_in_bits {
4870 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004871 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004872
Matan Barakb4ff3a32016-02-09 14:57:42 +02004873 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004874 u8 op_mod[0x10];
4875
Matan Barakb4ff3a32016-02-09 14:57:42 +02004876 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004877 u8 qpn[0x18];
4878
Matan Barakb4ff3a32016-02-09 14:57:42 +02004879 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004880};
4881
4882struct mlx5_ifc_qp_2err_out_bits {
4883 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004884 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004885
4886 u8 syndrome[0x20];
4887
Matan Barakb4ff3a32016-02-09 14:57:42 +02004888 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004889};
4890
4891struct mlx5_ifc_qp_2err_in_bits {
4892 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894
Matan Barakb4ff3a32016-02-09 14:57:42 +02004895 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004896 u8 op_mod[0x10];
4897
Matan Barakb4ff3a32016-02-09 14:57:42 +02004898 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004899 u8 qpn[0x18];
4900
Matan Barakb4ff3a32016-02-09 14:57:42 +02004901 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004902};
4903
4904struct mlx5_ifc_page_fault_resume_out_bits {
4905 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004906 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907
4908 u8 syndrome[0x20];
4909
Matan Barakb4ff3a32016-02-09 14:57:42 +02004910 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004911};
4912
4913struct mlx5_ifc_page_fault_resume_in_bits {
4914 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004915 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004916
Matan Barakb4ff3a32016-02-09 14:57:42 +02004917 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004918 u8 op_mod[0x10];
4919
4920 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004921 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004922 u8 page_fault_type[0x3];
4923 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004924
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004925 u8 reserved_at_60[0x8];
4926 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004927};
4928
4929struct mlx5_ifc_nop_out_bits {
4930 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004931 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004932
4933 u8 syndrome[0x20];
4934
Matan Barakb4ff3a32016-02-09 14:57:42 +02004935 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004936};
4937
4938struct mlx5_ifc_nop_in_bits {
4939 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004940 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004941
Matan Barakb4ff3a32016-02-09 14:57:42 +02004942 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004943 u8 op_mod[0x10];
4944
Matan Barakb4ff3a32016-02-09 14:57:42 +02004945 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004946};
4947
4948struct mlx5_ifc_modify_vport_state_out_bits {
4949 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004950 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004951
4952 u8 syndrome[0x20];
4953
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955};
4956
4957struct mlx5_ifc_modify_vport_state_in_bits {
4958 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004959 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004960
Matan Barakb4ff3a32016-02-09 14:57:42 +02004961 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004962 u8 op_mod[0x10];
4963
4964 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966 u8 vport_number[0x10];
4967
Matan Barakb4ff3a32016-02-09 14:57:42 +02004968 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004969 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971};
4972
4973struct mlx5_ifc_modify_tis_out_bits {
4974 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004976
4977 u8 syndrome[0x20];
4978
Matan Barakb4ff3a32016-02-09 14:57:42 +02004979 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004980};
4981
majd@mellanox.com75850d02016-01-14 19:13:06 +02004982struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004983 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004984
Aviv Heller84df61e2016-05-10 13:47:50 +03004985 u8 reserved_at_20[0x1d];
4986 u8 lag_tx_port_affinity[0x1];
4987 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004988 u8 prio[0x1];
4989};
4990
Saeed Mahameede2816822015-05-28 22:28:40 +03004991struct mlx5_ifc_modify_tis_in_bits {
4992 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994
Matan Barakb4ff3a32016-02-09 14:57:42 +02004995 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004996 u8 op_mod[0x10];
4997
Matan Barakb4ff3a32016-02-09 14:57:42 +02004998 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004999 u8 tisn[0x18];
5000
Matan Barakb4ff3a32016-02-09 14:57:42 +02005001 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005002
majd@mellanox.com75850d02016-01-14 19:13:06 +02005003 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005004
Matan Barakb4ff3a32016-02-09 14:57:42 +02005005 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005006
5007 struct mlx5_ifc_tisc_bits ctx;
5008};
5009
Achiad Shochatd9eea402015-08-04 14:05:42 +03005010struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005011 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005012
Matan Barakb4ff3a32016-02-09 14:57:42 +02005013 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005014 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005015 u8 reserved_at_3c[0x1];
5016 u8 hash[0x1];
5017 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005018 u8 lro[0x1];
5019};
5020
Saeed Mahameede2816822015-05-28 22:28:40 +03005021struct mlx5_ifc_modify_tir_out_bits {
5022 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005023 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024
5025 u8 syndrome[0x20];
5026
Matan Barakb4ff3a32016-02-09 14:57:42 +02005027 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005028};
5029
5030struct mlx5_ifc_modify_tir_in_bits {
5031 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005032 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005033
Matan Barakb4ff3a32016-02-09 14:57:42 +02005034 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005035 u8 op_mod[0x10];
5036
Matan Barakb4ff3a32016-02-09 14:57:42 +02005037 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005038 u8 tirn[0x18];
5039
Matan Barakb4ff3a32016-02-09 14:57:42 +02005040 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005041
Achiad Shochatd9eea402015-08-04 14:05:42 +03005042 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045
5046 struct mlx5_ifc_tirc_bits ctx;
5047};
5048
5049struct mlx5_ifc_modify_sq_out_bits {
5050 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052
5053 u8 syndrome[0x20];
5054
Matan Barakb4ff3a32016-02-09 14:57:42 +02005055 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005056};
5057
5058struct mlx5_ifc_modify_sq_in_bits {
5059 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061
Matan Barakb4ff3a32016-02-09 14:57:42 +02005062 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005063 u8 op_mod[0x10];
5064
5065 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005066 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005067 u8 sqn[0x18];
5068
Matan Barakb4ff3a32016-02-09 14:57:42 +02005069 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005070
5071 u8 modify_bitmask[0x40];
5072
Matan Barakb4ff3a32016-02-09 14:57:42 +02005073 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005074
5075 struct mlx5_ifc_sqc_bits ctx;
5076};
5077
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005078struct mlx5_ifc_modify_scheduling_element_out_bits {
5079 u8 status[0x8];
5080 u8 reserved_at_8[0x18];
5081
5082 u8 syndrome[0x20];
5083
5084 u8 reserved_at_40[0x1c0];
5085};
5086
5087enum {
5088 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5089 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5090};
5091
5092struct mlx5_ifc_modify_scheduling_element_in_bits {
5093 u8 opcode[0x10];
5094 u8 reserved_at_10[0x10];
5095
5096 u8 reserved_at_20[0x10];
5097 u8 op_mod[0x10];
5098
5099 u8 scheduling_hierarchy[0x8];
5100 u8 reserved_at_48[0x18];
5101
5102 u8 scheduling_element_id[0x20];
5103
5104 u8 reserved_at_80[0x20];
5105
5106 u8 modify_bitmask[0x20];
5107
5108 u8 reserved_at_c0[0x40];
5109
5110 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5111
5112 u8 reserved_at_300[0x100];
5113};
5114
Saeed Mahameede2816822015-05-28 22:28:40 +03005115struct mlx5_ifc_modify_rqt_out_bits {
5116 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005117 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005118
5119 u8 syndrome[0x20];
5120
Matan Barakb4ff3a32016-02-09 14:57:42 +02005121 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005122};
5123
Achiad Shochat5c503682015-08-04 14:05:43 +03005124struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005126
Matan Barakb4ff3a32016-02-09 14:57:42 +02005127 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005128 u8 rqn_list[0x1];
5129};
5130
Saeed Mahameede2816822015-05-28 22:28:40 +03005131struct mlx5_ifc_modify_rqt_in_bits {
5132 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005133 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005134
Matan Barakb4ff3a32016-02-09 14:57:42 +02005135 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005136 u8 op_mod[0x10];
5137
Matan Barakb4ff3a32016-02-09 14:57:42 +02005138 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005139 u8 rqtn[0x18];
5140
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142
Achiad Shochat5c503682015-08-04 14:05:43 +03005143 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005144
Matan Barakb4ff3a32016-02-09 14:57:42 +02005145 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005146
5147 struct mlx5_ifc_rqtc_bits ctx;
5148};
5149
5150struct mlx5_ifc_modify_rq_out_bits {
5151 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005152 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005153
5154 u8 syndrome[0x20];
5155
Matan Barakb4ff3a32016-02-09 14:57:42 +02005156 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005157};
5158
Alex Vesker83b502a2016-08-04 17:32:02 +03005159enum {
5160 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005161 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005162 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005163};
5164
Saeed Mahameede2816822015-05-28 22:28:40 +03005165struct mlx5_ifc_modify_rq_in_bits {
5166 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005167 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005168
Matan Barakb4ff3a32016-02-09 14:57:42 +02005169 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005170 u8 op_mod[0x10];
5171
5172 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005173 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005174 u8 rqn[0x18];
5175
Matan Barakb4ff3a32016-02-09 14:57:42 +02005176 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005177
5178 u8 modify_bitmask[0x40];
5179
Matan Barakb4ff3a32016-02-09 14:57:42 +02005180 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005181
5182 struct mlx5_ifc_rqc_bits ctx;
5183};
5184
5185struct mlx5_ifc_modify_rmp_out_bits {
5186 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005187 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005188
5189 u8 syndrome[0x20];
5190
Matan Barakb4ff3a32016-02-09 14:57:42 +02005191 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005192};
5193
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005194struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005195 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005196
Matan Barakb4ff3a32016-02-09 14:57:42 +02005197 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005198 u8 lwm[0x1];
5199};
5200
Saeed Mahameede2816822015-05-28 22:28:40 +03005201struct mlx5_ifc_modify_rmp_in_bits {
5202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005204
Matan Barakb4ff3a32016-02-09 14:57:42 +02005205 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005206 u8 op_mod[0x10];
5207
5208 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210 u8 rmpn[0x18];
5211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005214 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005215
Matan Barakb4ff3a32016-02-09 14:57:42 +02005216 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005217
5218 struct mlx5_ifc_rmpc_bits ctx;
5219};
5220
5221struct mlx5_ifc_modify_nic_vport_context_out_bits {
5222 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224
5225 u8 syndrome[0x20];
5226
Matan Barakb4ff3a32016-02-09 14:57:42 +02005227 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005228};
5229
5230struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005231 u8 reserved_at_0[0x16];
5232 u8 node_guid[0x1];
5233 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005234 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005235 u8 mtu[0x1];
5236 u8 change_event[0x1];
5237 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005238 u8 permanent_address[0x1];
5239 u8 addresses_list[0x1];
5240 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005241 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005242};
5243
5244struct mlx5_ifc_modify_nic_vport_context_in_bits {
5245 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247
Matan Barakb4ff3a32016-02-09 14:57:42 +02005248 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005249 u8 op_mod[0x10];
5250
5251 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005252 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005253 u8 vport_number[0x10];
5254
5255 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5256
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258
5259 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5260};
5261
5262struct mlx5_ifc_modify_hca_vport_context_out_bits {
5263 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005264 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005265
5266 u8 syndrome[0x20];
5267
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269};
5270
5271struct mlx5_ifc_modify_hca_vport_context_in_bits {
5272 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005273 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005274
Matan Barakb4ff3a32016-02-09 14:57:42 +02005275 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005276 u8 op_mod[0x10];
5277
5278 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005279 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005280 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005281 u8 vport_number[0x10];
5282
Matan Barakb4ff3a32016-02-09 14:57:42 +02005283 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005284
5285 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5286};
5287
5288struct mlx5_ifc_modify_cq_out_bits {
5289 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005290 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005291
5292 u8 syndrome[0x20];
5293
Matan Barakb4ff3a32016-02-09 14:57:42 +02005294 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005295};
5296
5297enum {
5298 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5299 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5300};
5301
5302struct mlx5_ifc_modify_cq_in_bits {
5303 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307 u8 op_mod[0x10];
5308
Matan Barakb4ff3a32016-02-09 14:57:42 +02005309 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005310 u8 cqn[0x18];
5311
5312 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5313
5314 struct mlx5_ifc_cqc_bits cq_context;
5315
Matan Barakb4ff3a32016-02-09 14:57:42 +02005316 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005317
5318 u8 pas[0][0x40];
5319};
5320
5321struct mlx5_ifc_modify_cong_status_out_bits {
5322 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005323 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005324
5325 u8 syndrome[0x20];
5326
Matan Barakb4ff3a32016-02-09 14:57:42 +02005327 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005328};
5329
5330struct mlx5_ifc_modify_cong_status_in_bits {
5331 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005332 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005333
Matan Barakb4ff3a32016-02-09 14:57:42 +02005334 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005335 u8 op_mod[0x10];
5336
Matan Barakb4ff3a32016-02-09 14:57:42 +02005337 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005338 u8 priority[0x4];
5339 u8 cong_protocol[0x4];
5340
5341 u8 enable[0x1];
5342 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005343 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005344};
5345
5346struct mlx5_ifc_modify_cong_params_out_bits {
5347 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005348 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005349
5350 u8 syndrome[0x20];
5351
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353};
5354
5355struct mlx5_ifc_modify_cong_params_in_bits {
5356 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005357 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005358
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005360 u8 op_mod[0x10];
5361
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005363 u8 cong_protocol[0x4];
5364
5365 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5366
Matan Barakb4ff3a32016-02-09 14:57:42 +02005367 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005368
5369 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5370};
5371
5372struct mlx5_ifc_manage_pages_out_bits {
5373 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005374 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005375
5376 u8 syndrome[0x20];
5377
5378 u8 output_num_entries[0x20];
5379
Matan Barakb4ff3a32016-02-09 14:57:42 +02005380 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005381
5382 u8 pas[0][0x40];
5383};
5384
5385enum {
5386 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5387 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5388 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5389};
5390
5391struct mlx5_ifc_manage_pages_in_bits {
5392 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005393 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005394
Matan Barakb4ff3a32016-02-09 14:57:42 +02005395 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005396 u8 op_mod[0x10];
5397
Matan Barakb4ff3a32016-02-09 14:57:42 +02005398 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005399 u8 function_id[0x10];
5400
5401 u8 input_num_entries[0x20];
5402
5403 u8 pas[0][0x40];
5404};
5405
5406struct mlx5_ifc_mad_ifc_out_bits {
5407 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005408 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005409
5410 u8 syndrome[0x20];
5411
Matan Barakb4ff3a32016-02-09 14:57:42 +02005412 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005413
5414 u8 response_mad_packet[256][0x8];
5415};
5416
5417struct mlx5_ifc_mad_ifc_in_bits {
5418 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005419 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005420
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422 u8 op_mod[0x10];
5423
5424 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005425 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005426 u8 port[0x8];
5427
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429
5430 u8 mad[256][0x8];
5431};
5432
5433struct mlx5_ifc_init_hca_out_bits {
5434 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005435 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005436
5437 u8 syndrome[0x20];
5438
Matan Barakb4ff3a32016-02-09 14:57:42 +02005439 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005440};
5441
5442struct mlx5_ifc_init_hca_in_bits {
5443 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005444 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005445
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447 u8 op_mod[0x10];
5448
Matan Barakb4ff3a32016-02-09 14:57:42 +02005449 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005450};
5451
5452struct mlx5_ifc_init2rtr_qp_out_bits {
5453 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005454 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005455
5456 u8 syndrome[0x20];
5457
Matan Barakb4ff3a32016-02-09 14:57:42 +02005458 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005459};
5460
5461struct mlx5_ifc_init2rtr_qp_in_bits {
5462 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466 u8 op_mod[0x10];
5467
Matan Barakb4ff3a32016-02-09 14:57:42 +02005468 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005469 u8 qpn[0x18];
5470
Matan Barakb4ff3a32016-02-09 14:57:42 +02005471 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005472
5473 u8 opt_param_mask[0x20];
5474
Matan Barakb4ff3a32016-02-09 14:57:42 +02005475 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476
5477 struct mlx5_ifc_qpc_bits qpc;
5478
Matan Barakb4ff3a32016-02-09 14:57:42 +02005479 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005480};
5481
5482struct mlx5_ifc_init2init_qp_out_bits {
5483 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005484 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005485
5486 u8 syndrome[0x20];
5487
Matan Barakb4ff3a32016-02-09 14:57:42 +02005488 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005489};
5490
5491struct mlx5_ifc_init2init_qp_in_bits {
5492 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496 u8 op_mod[0x10];
5497
Matan Barakb4ff3a32016-02-09 14:57:42 +02005498 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005499 u8 qpn[0x18];
5500
Matan Barakb4ff3a32016-02-09 14:57:42 +02005501 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005502
5503 u8 opt_param_mask[0x20];
5504
Matan Barakb4ff3a32016-02-09 14:57:42 +02005505 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005506
5507 struct mlx5_ifc_qpc_bits qpc;
5508
Matan Barakb4ff3a32016-02-09 14:57:42 +02005509 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005510};
5511
5512struct mlx5_ifc_get_dropped_packet_log_out_bits {
5513 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005514 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005515
5516 u8 syndrome[0x20];
5517
Matan Barakb4ff3a32016-02-09 14:57:42 +02005518 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519
5520 u8 packet_headers_log[128][0x8];
5521
5522 u8 packet_syndrome[64][0x8];
5523};
5524
5525struct mlx5_ifc_get_dropped_packet_log_in_bits {
5526 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528
Matan Barakb4ff3a32016-02-09 14:57:42 +02005529 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005530 u8 op_mod[0x10];
5531
Matan Barakb4ff3a32016-02-09 14:57:42 +02005532 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533};
5534
5535struct mlx5_ifc_gen_eqe_in_bits {
5536 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005537 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005538
Matan Barakb4ff3a32016-02-09 14:57:42 +02005539 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005540 u8 op_mod[0x10];
5541
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543 u8 eq_number[0x8];
5544
Matan Barakb4ff3a32016-02-09 14:57:42 +02005545 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005546
5547 u8 eqe[64][0x8];
5548};
5549
5550struct mlx5_ifc_gen_eq_out_bits {
5551 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553
5554 u8 syndrome[0x20];
5555
Matan Barakb4ff3a32016-02-09 14:57:42 +02005556 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005557};
5558
5559struct mlx5_ifc_enable_hca_out_bits {
5560 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005561 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005562
5563 u8 syndrome[0x20];
5564
Matan Barakb4ff3a32016-02-09 14:57:42 +02005565 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005566};
5567
5568struct mlx5_ifc_enable_hca_in_bits {
5569 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005570 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005571
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573 u8 op_mod[0x10];
5574
Matan Barakb4ff3a32016-02-09 14:57:42 +02005575 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005576 u8 function_id[0x10];
5577
Matan Barakb4ff3a32016-02-09 14:57:42 +02005578 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005579};
5580
5581struct mlx5_ifc_drain_dct_out_bits {
5582 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005583 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005584
5585 u8 syndrome[0x20];
5586
Matan Barakb4ff3a32016-02-09 14:57:42 +02005587 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005588};
5589
5590struct mlx5_ifc_drain_dct_in_bits {
5591 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005592 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005593
Matan Barakb4ff3a32016-02-09 14:57:42 +02005594 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005595 u8 op_mod[0x10];
5596
Matan Barakb4ff3a32016-02-09 14:57:42 +02005597 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005598 u8 dctn[0x18];
5599
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601};
5602
5603struct mlx5_ifc_disable_hca_out_bits {
5604 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606
5607 u8 syndrome[0x20];
5608
Matan Barakb4ff3a32016-02-09 14:57:42 +02005609 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610};
5611
5612struct mlx5_ifc_disable_hca_in_bits {
5613 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617 u8 op_mod[0x10];
5618
Matan Barakb4ff3a32016-02-09 14:57:42 +02005619 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005620 u8 function_id[0x10];
5621
Matan Barakb4ff3a32016-02-09 14:57:42 +02005622 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005623};
5624
5625struct mlx5_ifc_detach_from_mcg_out_bits {
5626 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005627 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005628
5629 u8 syndrome[0x20];
5630
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632};
5633
5634struct mlx5_ifc_detach_from_mcg_in_bits {
5635 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637
Matan Barakb4ff3a32016-02-09 14:57:42 +02005638 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005639 u8 op_mod[0x10];
5640
Matan Barakb4ff3a32016-02-09 14:57:42 +02005641 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005642 u8 qpn[0x18];
5643
Matan Barakb4ff3a32016-02-09 14:57:42 +02005644 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005645
5646 u8 multicast_gid[16][0x8];
5647};
5648
Saeed Mahameed74862162016-06-09 15:11:34 +03005649struct mlx5_ifc_destroy_xrq_out_bits {
5650 u8 status[0x8];
5651 u8 reserved_at_8[0x18];
5652
5653 u8 syndrome[0x20];
5654
5655 u8 reserved_at_40[0x40];
5656};
5657
5658struct mlx5_ifc_destroy_xrq_in_bits {
5659 u8 opcode[0x10];
5660 u8 reserved_at_10[0x10];
5661
5662 u8 reserved_at_20[0x10];
5663 u8 op_mod[0x10];
5664
5665 u8 reserved_at_40[0x8];
5666 u8 xrqn[0x18];
5667
5668 u8 reserved_at_60[0x20];
5669};
5670
Saeed Mahameede2816822015-05-28 22:28:40 +03005671struct mlx5_ifc_destroy_xrc_srq_out_bits {
5672 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005673 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005674
5675 u8 syndrome[0x20];
5676
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678};
5679
5680struct mlx5_ifc_destroy_xrc_srq_in_bits {
5681 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685 u8 op_mod[0x10];
5686
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688 u8 xrc_srqn[0x18];
5689
Matan Barakb4ff3a32016-02-09 14:57:42 +02005690 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005691};
5692
5693struct mlx5_ifc_destroy_tis_out_bits {
5694 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005695 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005696
5697 u8 syndrome[0x20];
5698
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700};
5701
5702struct mlx5_ifc_destroy_tis_in_bits {
5703 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005705
Matan Barakb4ff3a32016-02-09 14:57:42 +02005706 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005707 u8 op_mod[0x10];
5708
Matan Barakb4ff3a32016-02-09 14:57:42 +02005709 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005710 u8 tisn[0x18];
5711
Matan Barakb4ff3a32016-02-09 14:57:42 +02005712 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005713};
5714
5715struct mlx5_ifc_destroy_tir_out_bits {
5716 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005717 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005718
5719 u8 syndrome[0x20];
5720
Matan Barakb4ff3a32016-02-09 14:57:42 +02005721 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005722};
5723
5724struct mlx5_ifc_destroy_tir_in_bits {
5725 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005726 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005727
Matan Barakb4ff3a32016-02-09 14:57:42 +02005728 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005729 u8 op_mod[0x10];
5730
Matan Barakb4ff3a32016-02-09 14:57:42 +02005731 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005732 u8 tirn[0x18];
5733
Matan Barakb4ff3a32016-02-09 14:57:42 +02005734 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005735};
5736
5737struct mlx5_ifc_destroy_srq_out_bits {
5738 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005739 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005740
5741 u8 syndrome[0x20];
5742
Matan Barakb4ff3a32016-02-09 14:57:42 +02005743 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005744};
5745
5746struct mlx5_ifc_destroy_srq_in_bits {
5747 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749
Matan Barakb4ff3a32016-02-09 14:57:42 +02005750 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005751 u8 op_mod[0x10];
5752
Matan Barakb4ff3a32016-02-09 14:57:42 +02005753 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005754 u8 srqn[0x18];
5755
Matan Barakb4ff3a32016-02-09 14:57:42 +02005756 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005757};
5758
5759struct mlx5_ifc_destroy_sq_out_bits {
5760 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005761 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005762
5763 u8 syndrome[0x20];
5764
Matan Barakb4ff3a32016-02-09 14:57:42 +02005765 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005766};
5767
5768struct mlx5_ifc_destroy_sq_in_bits {
5769 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771
Matan Barakb4ff3a32016-02-09 14:57:42 +02005772 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005773 u8 op_mod[0x10];
5774
Matan Barakb4ff3a32016-02-09 14:57:42 +02005775 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005776 u8 sqn[0x18];
5777
Matan Barakb4ff3a32016-02-09 14:57:42 +02005778 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005779};
5780
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005781struct mlx5_ifc_destroy_scheduling_element_out_bits {
5782 u8 status[0x8];
5783 u8 reserved_at_8[0x18];
5784
5785 u8 syndrome[0x20];
5786
5787 u8 reserved_at_40[0x1c0];
5788};
5789
5790struct mlx5_ifc_destroy_scheduling_element_in_bits {
5791 u8 opcode[0x10];
5792 u8 reserved_at_10[0x10];
5793
5794 u8 reserved_at_20[0x10];
5795 u8 op_mod[0x10];
5796
5797 u8 scheduling_hierarchy[0x8];
5798 u8 reserved_at_48[0x18];
5799
5800 u8 scheduling_element_id[0x20];
5801
5802 u8 reserved_at_80[0x180];
5803};
5804
Saeed Mahameede2816822015-05-28 22:28:40 +03005805struct mlx5_ifc_destroy_rqt_out_bits {
5806 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005807 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005808
5809 u8 syndrome[0x20];
5810
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812};
5813
5814struct mlx5_ifc_destroy_rqt_in_bits {
5815 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005816 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005817
Matan Barakb4ff3a32016-02-09 14:57:42 +02005818 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005819 u8 op_mod[0x10];
5820
Matan Barakb4ff3a32016-02-09 14:57:42 +02005821 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005822 u8 rqtn[0x18];
5823
Matan Barakb4ff3a32016-02-09 14:57:42 +02005824 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005825};
5826
5827struct mlx5_ifc_destroy_rq_out_bits {
5828 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005829 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005830
5831 u8 syndrome[0x20];
5832
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834};
5835
5836struct mlx5_ifc_destroy_rq_in_bits {
5837 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005838 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005839
Matan Barakb4ff3a32016-02-09 14:57:42 +02005840 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005841 u8 op_mod[0x10];
5842
Matan Barakb4ff3a32016-02-09 14:57:42 +02005843 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005844 u8 rqn[0x18];
5845
Matan Barakb4ff3a32016-02-09 14:57:42 +02005846 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005847};
5848
5849struct mlx5_ifc_destroy_rmp_out_bits {
5850 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005851 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005852
5853 u8 syndrome[0x20];
5854
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856};
5857
5858struct mlx5_ifc_destroy_rmp_in_bits {
5859 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005860 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005861
Matan Barakb4ff3a32016-02-09 14:57:42 +02005862 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005863 u8 op_mod[0x10];
5864
Matan Barakb4ff3a32016-02-09 14:57:42 +02005865 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005866 u8 rmpn[0x18];
5867
Matan Barakb4ff3a32016-02-09 14:57:42 +02005868 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005869};
5870
5871struct mlx5_ifc_destroy_qp_out_bits {
5872 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005873 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005874
5875 u8 syndrome[0x20];
5876
Matan Barakb4ff3a32016-02-09 14:57:42 +02005877 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005878};
5879
5880struct mlx5_ifc_destroy_qp_in_bits {
5881 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005882 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005883
Matan Barakb4ff3a32016-02-09 14:57:42 +02005884 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005885 u8 op_mod[0x10];
5886
Matan Barakb4ff3a32016-02-09 14:57:42 +02005887 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005888 u8 qpn[0x18];
5889
Matan Barakb4ff3a32016-02-09 14:57:42 +02005890 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005891};
5892
5893struct mlx5_ifc_destroy_psv_out_bits {
5894 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005895 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005896
5897 u8 syndrome[0x20];
5898
Matan Barakb4ff3a32016-02-09 14:57:42 +02005899 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005900};
5901
5902struct mlx5_ifc_destroy_psv_in_bits {
5903 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005904 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005905
Matan Barakb4ff3a32016-02-09 14:57:42 +02005906 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005907 u8 op_mod[0x10];
5908
Matan Barakb4ff3a32016-02-09 14:57:42 +02005909 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005910 u8 psvn[0x18];
5911
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913};
5914
5915struct mlx5_ifc_destroy_mkey_out_bits {
5916 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005917 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005918
5919 u8 syndrome[0x20];
5920
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922};
5923
5924struct mlx5_ifc_destroy_mkey_in_bits {
5925 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005926 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005927
Matan Barakb4ff3a32016-02-09 14:57:42 +02005928 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005929 u8 op_mod[0x10];
5930
Matan Barakb4ff3a32016-02-09 14:57:42 +02005931 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005932 u8 mkey_index[0x18];
5933
Matan Barakb4ff3a32016-02-09 14:57:42 +02005934 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005935};
5936
5937struct mlx5_ifc_destroy_flow_table_out_bits {
5938 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005939 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005940
5941 u8 syndrome[0x20];
5942
Matan Barakb4ff3a32016-02-09 14:57:42 +02005943 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005944};
5945
5946struct mlx5_ifc_destroy_flow_table_in_bits {
5947 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949
Matan Barakb4ff3a32016-02-09 14:57:42 +02005950 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005951 u8 op_mod[0x10];
5952
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005953 u8 other_vport[0x1];
5954 u8 reserved_at_41[0xf];
5955 u8 vport_number[0x10];
5956
5957 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958
5959 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005960 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963 u8 table_id[0x18];
5964
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966};
5967
5968struct mlx5_ifc_destroy_flow_group_out_bits {
5969 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971
5972 u8 syndrome[0x20];
5973
Matan Barakb4ff3a32016-02-09 14:57:42 +02005974 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005975};
5976
5977struct mlx5_ifc_destroy_flow_group_in_bits {
5978 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980
Matan Barakb4ff3a32016-02-09 14:57:42 +02005981 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005982 u8 op_mod[0x10];
5983
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005984 u8 other_vport[0x1];
5985 u8 reserved_at_41[0xf];
5986 u8 vport_number[0x10];
5987
5988 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989
5990 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005991 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005992
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994 u8 table_id[0x18];
5995
5996 u8 group_id[0x20];
5997
Matan Barakb4ff3a32016-02-09 14:57:42 +02005998 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03005999};
6000
6001struct mlx5_ifc_destroy_eq_out_bits {
6002 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006003 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006004
6005 u8 syndrome[0x20];
6006
Matan Barakb4ff3a32016-02-09 14:57:42 +02006007 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006008};
6009
6010struct mlx5_ifc_destroy_eq_in_bits {
6011 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006012 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006013
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015 u8 op_mod[0x10];
6016
Matan Barakb4ff3a32016-02-09 14:57:42 +02006017 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006018 u8 eq_number[0x8];
6019
Matan Barakb4ff3a32016-02-09 14:57:42 +02006020 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006021};
6022
6023struct mlx5_ifc_destroy_dct_out_bits {
6024 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006025 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006026
6027 u8 syndrome[0x20];
6028
Matan Barakb4ff3a32016-02-09 14:57:42 +02006029 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006030};
6031
6032struct mlx5_ifc_destroy_dct_in_bits {
6033 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035
Matan Barakb4ff3a32016-02-09 14:57:42 +02006036 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006037 u8 op_mod[0x10];
6038
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040 u8 dctn[0x18];
6041
Matan Barakb4ff3a32016-02-09 14:57:42 +02006042 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006043};
6044
6045struct mlx5_ifc_destroy_cq_out_bits {
6046 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006047 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006048
6049 u8 syndrome[0x20];
6050
Matan Barakb4ff3a32016-02-09 14:57:42 +02006051 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006052};
6053
6054struct mlx5_ifc_destroy_cq_in_bits {
6055 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057
Matan Barakb4ff3a32016-02-09 14:57:42 +02006058 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006059 u8 op_mod[0x10];
6060
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062 u8 cqn[0x18];
6063
Matan Barakb4ff3a32016-02-09 14:57:42 +02006064 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065};
6066
6067struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6068 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006069 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006070
6071 u8 syndrome[0x20];
6072
Matan Barakb4ff3a32016-02-09 14:57:42 +02006073 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006074};
6075
6076struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6077 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079
Matan Barakb4ff3a32016-02-09 14:57:42 +02006080 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006081 u8 op_mod[0x10];
6082
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084
Matan Barakb4ff3a32016-02-09 14:57:42 +02006085 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006086 u8 vxlan_udp_port[0x10];
6087};
6088
6089struct mlx5_ifc_delete_l2_table_entry_out_bits {
6090 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092
6093 u8 syndrome[0x20];
6094
Matan Barakb4ff3a32016-02-09 14:57:42 +02006095 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006096};
6097
6098struct mlx5_ifc_delete_l2_table_entry_in_bits {
6099 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101
Matan Barakb4ff3a32016-02-09 14:57:42 +02006102 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006103 u8 op_mod[0x10];
6104
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106
Matan Barakb4ff3a32016-02-09 14:57:42 +02006107 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006108 u8 table_index[0x18];
6109
Matan Barakb4ff3a32016-02-09 14:57:42 +02006110 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006111};
6112
6113struct mlx5_ifc_delete_fte_out_bits {
6114 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006115 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006116
6117 u8 syndrome[0x20];
6118
Matan Barakb4ff3a32016-02-09 14:57:42 +02006119 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006120};
6121
6122struct mlx5_ifc_delete_fte_in_bits {
6123 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006124 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006125
Matan Barakb4ff3a32016-02-09 14:57:42 +02006126 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006127 u8 op_mod[0x10];
6128
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006129 u8 other_vport[0x1];
6130 u8 reserved_at_41[0xf];
6131 u8 vport_number[0x10];
6132
6133 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006134
6135 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137
Matan Barakb4ff3a32016-02-09 14:57:42 +02006138 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006139 u8 table_id[0x18];
6140
Matan Barakb4ff3a32016-02-09 14:57:42 +02006141 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142
6143 u8 flow_index[0x20];
6144
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146};
6147
6148struct mlx5_ifc_dealloc_xrcd_out_bits {
6149 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006150 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006151
6152 u8 syndrome[0x20];
6153
Matan Barakb4ff3a32016-02-09 14:57:42 +02006154 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006155};
6156
6157struct mlx5_ifc_dealloc_xrcd_in_bits {
6158 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006159 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006160
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162 u8 op_mod[0x10];
6163
Matan Barakb4ff3a32016-02-09 14:57:42 +02006164 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006165 u8 xrcd[0x18];
6166
Matan Barakb4ff3a32016-02-09 14:57:42 +02006167 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006168};
6169
6170struct mlx5_ifc_dealloc_uar_out_bits {
6171 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006172 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006173
6174 u8 syndrome[0x20];
6175
Matan Barakb4ff3a32016-02-09 14:57:42 +02006176 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006177};
6178
6179struct mlx5_ifc_dealloc_uar_in_bits {
6180 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006181 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006182
Matan Barakb4ff3a32016-02-09 14:57:42 +02006183 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006184 u8 op_mod[0x10];
6185
Matan Barakb4ff3a32016-02-09 14:57:42 +02006186 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006187 u8 uar[0x18];
6188
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190};
6191
6192struct mlx5_ifc_dealloc_transport_domain_out_bits {
6193 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006194 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006195
6196 u8 syndrome[0x20];
6197
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199};
6200
6201struct mlx5_ifc_dealloc_transport_domain_in_bits {
6202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204
Matan Barakb4ff3a32016-02-09 14:57:42 +02006205 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006206 u8 op_mod[0x10];
6207
Matan Barakb4ff3a32016-02-09 14:57:42 +02006208 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006209 u8 transport_domain[0x18];
6210
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212};
6213
6214struct mlx5_ifc_dealloc_q_counter_out_bits {
6215 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217
6218 u8 syndrome[0x20];
6219
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221};
6222
6223struct mlx5_ifc_dealloc_q_counter_in_bits {
6224 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226
Matan Barakb4ff3a32016-02-09 14:57:42 +02006227 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006228 u8 op_mod[0x10];
6229
Matan Barakb4ff3a32016-02-09 14:57:42 +02006230 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006231 u8 counter_set_id[0x8];
6232
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234};
6235
6236struct mlx5_ifc_dealloc_pd_out_bits {
6237 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006238 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239
6240 u8 syndrome[0x20];
6241
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243};
6244
6245struct mlx5_ifc_dealloc_pd_in_bits {
6246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248
Matan Barakb4ff3a32016-02-09 14:57:42 +02006249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006250 u8 op_mod[0x10];
6251
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253 u8 pd[0x18];
6254
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256};
6257
Amir Vadai9dc0b282016-05-13 12:55:39 +00006258struct mlx5_ifc_dealloc_flow_counter_out_bits {
6259 u8 status[0x8];
6260 u8 reserved_at_8[0x18];
6261
6262 u8 syndrome[0x20];
6263
6264 u8 reserved_at_40[0x40];
6265};
6266
6267struct mlx5_ifc_dealloc_flow_counter_in_bits {
6268 u8 opcode[0x10];
6269 u8 reserved_at_10[0x10];
6270
6271 u8 reserved_at_20[0x10];
6272 u8 op_mod[0x10];
6273
6274 u8 reserved_at_40[0x10];
6275 u8 flow_counter_id[0x10];
6276
6277 u8 reserved_at_60[0x20];
6278};
6279
Saeed Mahameed74862162016-06-09 15:11:34 +03006280struct mlx5_ifc_create_xrq_out_bits {
6281 u8 status[0x8];
6282 u8 reserved_at_8[0x18];
6283
6284 u8 syndrome[0x20];
6285
6286 u8 reserved_at_40[0x8];
6287 u8 xrqn[0x18];
6288
6289 u8 reserved_at_60[0x20];
6290};
6291
6292struct mlx5_ifc_create_xrq_in_bits {
6293 u8 opcode[0x10];
6294 u8 reserved_at_10[0x10];
6295
6296 u8 reserved_at_20[0x10];
6297 u8 op_mod[0x10];
6298
6299 u8 reserved_at_40[0x40];
6300
6301 struct mlx5_ifc_xrqc_bits xrq_context;
6302};
6303
Saeed Mahameede2816822015-05-28 22:28:40 +03006304struct mlx5_ifc_create_xrc_srq_out_bits {
6305 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006306 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006307
6308 u8 syndrome[0x20];
6309
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311 u8 xrc_srqn[0x18];
6312
Matan Barakb4ff3a32016-02-09 14:57:42 +02006313 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006314};
6315
6316struct mlx5_ifc_create_xrc_srq_in_bits {
6317 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321 u8 op_mod[0x10];
6322
Matan Barakb4ff3a32016-02-09 14:57:42 +02006323 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006324
6325 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6326
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328
6329 u8 pas[0][0x40];
6330};
6331
6332struct mlx5_ifc_create_tis_out_bits {
6333 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006334 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006335
6336 u8 syndrome[0x20];
6337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339 u8 tisn[0x18];
6340
Matan Barakb4ff3a32016-02-09 14:57:42 +02006341 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006342};
6343
6344struct mlx5_ifc_create_tis_in_bits {
6345 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006346 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006347
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349 u8 op_mod[0x10];
6350
Matan Barakb4ff3a32016-02-09 14:57:42 +02006351 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006352
6353 struct mlx5_ifc_tisc_bits ctx;
6354};
6355
6356struct mlx5_ifc_create_tir_out_bits {
6357 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359
6360 u8 syndrome[0x20];
6361
Matan Barakb4ff3a32016-02-09 14:57:42 +02006362 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006363 u8 tirn[0x18];
6364
Matan Barakb4ff3a32016-02-09 14:57:42 +02006365 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006366};
6367
6368struct mlx5_ifc_create_tir_in_bits {
6369 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006370 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006371
Matan Barakb4ff3a32016-02-09 14:57:42 +02006372 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006373 u8 op_mod[0x10];
6374
Matan Barakb4ff3a32016-02-09 14:57:42 +02006375 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006376
6377 struct mlx5_ifc_tirc_bits ctx;
6378};
6379
6380struct mlx5_ifc_create_srq_out_bits {
6381 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383
6384 u8 syndrome[0x20];
6385
Matan Barakb4ff3a32016-02-09 14:57:42 +02006386 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006387 u8 srqn[0x18];
6388
Matan Barakb4ff3a32016-02-09 14:57:42 +02006389 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006390};
6391
6392struct mlx5_ifc_create_srq_in_bits {
6393 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006394 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395
Matan Barakb4ff3a32016-02-09 14:57:42 +02006396 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006397 u8 op_mod[0x10];
6398
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400
6401 struct mlx5_ifc_srqc_bits srq_context_entry;
6402
Matan Barakb4ff3a32016-02-09 14:57:42 +02006403 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006404
6405 u8 pas[0][0x40];
6406};
6407
6408struct mlx5_ifc_create_sq_out_bits {
6409 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006410 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006411
6412 u8 syndrome[0x20];
6413
Matan Barakb4ff3a32016-02-09 14:57:42 +02006414 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006415 u8 sqn[0x18];
6416
Matan Barakb4ff3a32016-02-09 14:57:42 +02006417 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006418};
6419
6420struct mlx5_ifc_create_sq_in_bits {
6421 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006422 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006423
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425 u8 op_mod[0x10];
6426
Matan Barakb4ff3a32016-02-09 14:57:42 +02006427 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006428
6429 struct mlx5_ifc_sqc_bits ctx;
6430};
6431
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006432struct mlx5_ifc_create_scheduling_element_out_bits {
6433 u8 status[0x8];
6434 u8 reserved_at_8[0x18];
6435
6436 u8 syndrome[0x20];
6437
6438 u8 reserved_at_40[0x40];
6439
6440 u8 scheduling_element_id[0x20];
6441
6442 u8 reserved_at_a0[0x160];
6443};
6444
6445struct mlx5_ifc_create_scheduling_element_in_bits {
6446 u8 opcode[0x10];
6447 u8 reserved_at_10[0x10];
6448
6449 u8 reserved_at_20[0x10];
6450 u8 op_mod[0x10];
6451
6452 u8 scheduling_hierarchy[0x8];
6453 u8 reserved_at_48[0x18];
6454
6455 u8 reserved_at_60[0xa0];
6456
6457 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6458
6459 u8 reserved_at_300[0x100];
6460};
6461
Saeed Mahameede2816822015-05-28 22:28:40 +03006462struct mlx5_ifc_create_rqt_out_bits {
6463 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465
6466 u8 syndrome[0x20];
6467
Matan Barakb4ff3a32016-02-09 14:57:42 +02006468 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006469 u8 rqtn[0x18];
6470
Matan Barakb4ff3a32016-02-09 14:57:42 +02006471 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006472};
6473
6474struct mlx5_ifc_create_rqt_in_bits {
6475 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006476 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006477
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479 u8 op_mod[0x10];
6480
Matan Barakb4ff3a32016-02-09 14:57:42 +02006481 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006482
6483 struct mlx5_ifc_rqtc_bits rqt_context;
6484};
6485
6486struct mlx5_ifc_create_rq_out_bits {
6487 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006488 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006489
6490 u8 syndrome[0x20];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493 u8 rqn[0x18];
6494
Matan Barakb4ff3a32016-02-09 14:57:42 +02006495 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006496};
6497
6498struct mlx5_ifc_create_rq_in_bits {
6499 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006500 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503 u8 op_mod[0x10];
6504
Matan Barakb4ff3a32016-02-09 14:57:42 +02006505 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006506
6507 struct mlx5_ifc_rqc_bits ctx;
6508};
6509
6510struct mlx5_ifc_create_rmp_out_bits {
6511 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006512 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006513
6514 u8 syndrome[0x20];
6515
Matan Barakb4ff3a32016-02-09 14:57:42 +02006516 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006517 u8 rmpn[0x18];
6518
Matan Barakb4ff3a32016-02-09 14:57:42 +02006519 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006520};
6521
6522struct mlx5_ifc_create_rmp_in_bits {
6523 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525
Matan Barakb4ff3a32016-02-09 14:57:42 +02006526 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006527 u8 op_mod[0x10];
6528
Matan Barakb4ff3a32016-02-09 14:57:42 +02006529 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006530
6531 struct mlx5_ifc_rmpc_bits ctx;
6532};
6533
6534struct mlx5_ifc_create_qp_out_bits {
6535 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006536 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006537
6538 u8 syndrome[0x20];
6539
Matan Barakb4ff3a32016-02-09 14:57:42 +02006540 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006541 u8 qpn[0x18];
6542
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544};
6545
6546struct mlx5_ifc_create_qp_in_bits {
6547 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006548 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006549
Matan Barakb4ff3a32016-02-09 14:57:42 +02006550 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006551 u8 op_mod[0x10];
6552
Matan Barakb4ff3a32016-02-09 14:57:42 +02006553 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006554
6555 u8 opt_param_mask[0x20];
6556
Matan Barakb4ff3a32016-02-09 14:57:42 +02006557 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006558
6559 struct mlx5_ifc_qpc_bits qpc;
6560
Matan Barakb4ff3a32016-02-09 14:57:42 +02006561 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006562
6563 u8 pas[0][0x40];
6564};
6565
6566struct mlx5_ifc_create_psv_out_bits {
6567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569
6570 u8 syndrome[0x20];
6571
Matan Barakb4ff3a32016-02-09 14:57:42 +02006572 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006573
Matan Barakb4ff3a32016-02-09 14:57:42 +02006574 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006575 u8 psv0_index[0x18];
6576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 psv1_index[0x18];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581 u8 psv2_index[0x18];
6582
Matan Barakb4ff3a32016-02-09 14:57:42 +02006583 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006584 u8 psv3_index[0x18];
6585};
6586
6587struct mlx5_ifc_create_psv_in_bits {
6588 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006589 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006590
Matan Barakb4ff3a32016-02-09 14:57:42 +02006591 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006592 u8 op_mod[0x10];
6593
6594 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006595 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006596 u8 pd[0x18];
6597
Matan Barakb4ff3a32016-02-09 14:57:42 +02006598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006599};
6600
6601struct mlx5_ifc_create_mkey_out_bits {
6602 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006603 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006604
6605 u8 syndrome[0x20];
6606
Matan Barakb4ff3a32016-02-09 14:57:42 +02006607 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006608 u8 mkey_index[0x18];
6609
Matan Barakb4ff3a32016-02-09 14:57:42 +02006610 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006611};
6612
6613struct mlx5_ifc_create_mkey_in_bits {
6614 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006615 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006616
Matan Barakb4ff3a32016-02-09 14:57:42 +02006617 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006618 u8 op_mod[0x10];
6619
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621
6622 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624
6625 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6626
Matan Barakb4ff3a32016-02-09 14:57:42 +02006627 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006628
6629 u8 translations_octword_actual_size[0x20];
6630
Matan Barakb4ff3a32016-02-09 14:57:42 +02006631 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006632
6633 u8 klm_pas_mtt[0][0x20];
6634};
6635
6636struct mlx5_ifc_create_flow_table_out_bits {
6637 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006638 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006639
6640 u8 syndrome[0x20];
6641
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643 u8 table_id[0x18];
6644
Matan Barakb4ff3a32016-02-09 14:57:42 +02006645 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006646};
6647
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006648struct mlx5_ifc_flow_table_context_bits {
6649 u8 encap_en[0x1];
6650 u8 decap_en[0x1];
6651 u8 reserved_at_2[0x2];
6652 u8 table_miss_action[0x4];
6653 u8 level[0x8];
6654 u8 reserved_at_10[0x8];
6655 u8 log_size[0x8];
6656
6657 u8 reserved_at_20[0x8];
6658 u8 table_miss_id[0x18];
6659
6660 u8 reserved_at_40[0x8];
6661 u8 lag_master_next_table_id[0x18];
6662
6663 u8 reserved_at_60[0xe0];
6664};
6665
Saeed Mahameede2816822015-05-28 22:28:40 +03006666struct mlx5_ifc_create_flow_table_in_bits {
6667 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669
Matan Barakb4ff3a32016-02-09 14:57:42 +02006670 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006671 u8 op_mod[0x10];
6672
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006673 u8 other_vport[0x1];
6674 u8 reserved_at_41[0xf];
6675 u8 vport_number[0x10];
6676
6677 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006678
6679 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006680 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006681
Matan Barakb4ff3a32016-02-09 14:57:42 +02006682 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006683
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006684 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006685};
6686
6687struct mlx5_ifc_create_flow_group_out_bits {
6688 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006689 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006690
6691 u8 syndrome[0x20];
6692
Matan Barakb4ff3a32016-02-09 14:57:42 +02006693 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006694 u8 group_id[0x18];
6695
Matan Barakb4ff3a32016-02-09 14:57:42 +02006696 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006697};
6698
6699enum {
6700 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6701 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6702 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6703};
6704
6705struct mlx5_ifc_create_flow_group_in_bits {
6706 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708
Matan Barakb4ff3a32016-02-09 14:57:42 +02006709 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006710 u8 op_mod[0x10];
6711
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006712 u8 other_vport[0x1];
6713 u8 reserved_at_41[0xf];
6714 u8 vport_number[0x10];
6715
6716 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717
6718 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006719 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006720
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722 u8 table_id[0x18];
6723
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725
6726 u8 start_flow_index[0x20];
6727
Matan Barakb4ff3a32016-02-09 14:57:42 +02006728 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006729
6730 u8 end_flow_index[0x20];
6731
Matan Barakb4ff3a32016-02-09 14:57:42 +02006732 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006733
Matan Barakb4ff3a32016-02-09 14:57:42 +02006734 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006735 u8 match_criteria_enable[0x8];
6736
6737 struct mlx5_ifc_fte_match_param_bits match_criteria;
6738
Matan Barakb4ff3a32016-02-09 14:57:42 +02006739 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006740};
6741
6742struct mlx5_ifc_create_eq_out_bits {
6743 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006744 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006745
6746 u8 syndrome[0x20];
6747
Matan Barakb4ff3a32016-02-09 14:57:42 +02006748 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006749 u8 eq_number[0x8];
6750
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752};
6753
6754struct mlx5_ifc_create_eq_in_bits {
6755 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006756 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006757
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759 u8 op_mod[0x10];
6760
Matan Barakb4ff3a32016-02-09 14:57:42 +02006761 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006762
6763 struct mlx5_ifc_eqc_bits eq_context_entry;
6764
Matan Barakb4ff3a32016-02-09 14:57:42 +02006765 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006766
6767 u8 event_bitmask[0x40];
6768
Matan Barakb4ff3a32016-02-09 14:57:42 +02006769 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006770
6771 u8 pas[0][0x40];
6772};
6773
6774struct mlx5_ifc_create_dct_out_bits {
6775 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006776 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777
6778 u8 syndrome[0x20];
6779
Matan Barakb4ff3a32016-02-09 14:57:42 +02006780 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006781 u8 dctn[0x18];
6782
Matan Barakb4ff3a32016-02-09 14:57:42 +02006783 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006784};
6785
6786struct mlx5_ifc_create_dct_in_bits {
6787 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789
Matan Barakb4ff3a32016-02-09 14:57:42 +02006790 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006791 u8 op_mod[0x10];
6792
Matan Barakb4ff3a32016-02-09 14:57:42 +02006793 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006794
6795 struct mlx5_ifc_dctc_bits dct_context_entry;
6796
Matan Barakb4ff3a32016-02-09 14:57:42 +02006797 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006798};
6799
6800struct mlx5_ifc_create_cq_out_bits {
6801 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006802 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006803
6804 u8 syndrome[0x20];
6805
Matan Barakb4ff3a32016-02-09 14:57:42 +02006806 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006807 u8 cqn[0x18];
6808
Matan Barakb4ff3a32016-02-09 14:57:42 +02006809 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006810};
6811
6812struct mlx5_ifc_create_cq_in_bits {
6813 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815
Matan Barakb4ff3a32016-02-09 14:57:42 +02006816 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817 u8 op_mod[0x10];
6818
Matan Barakb4ff3a32016-02-09 14:57:42 +02006819 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006820
6821 struct mlx5_ifc_cqc_bits cq_context;
6822
Matan Barakb4ff3a32016-02-09 14:57:42 +02006823 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006824
6825 u8 pas[0][0x40];
6826};
6827
6828struct mlx5_ifc_config_int_moderation_out_bits {
6829 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006830 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006831
6832 u8 syndrome[0x20];
6833
Matan Barakb4ff3a32016-02-09 14:57:42 +02006834 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006835 u8 min_delay[0xc];
6836 u8 int_vector[0x10];
6837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839};
6840
6841enum {
6842 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6843 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6844};
6845
6846struct mlx5_ifc_config_int_moderation_in_bits {
6847 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006848 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006849
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851 u8 op_mod[0x10];
6852
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854 u8 min_delay[0xc];
6855 u8 int_vector[0x10];
6856
Matan Barakb4ff3a32016-02-09 14:57:42 +02006857 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006858};
6859
6860struct mlx5_ifc_attach_to_mcg_out_bits {
6861 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006862 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006863
6864 u8 syndrome[0x20];
6865
Matan Barakb4ff3a32016-02-09 14:57:42 +02006866 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006867};
6868
6869struct mlx5_ifc_attach_to_mcg_in_bits {
6870 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006871 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006872
Matan Barakb4ff3a32016-02-09 14:57:42 +02006873 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006874 u8 op_mod[0x10];
6875
Matan Barakb4ff3a32016-02-09 14:57:42 +02006876 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006877 u8 qpn[0x18];
6878
Matan Barakb4ff3a32016-02-09 14:57:42 +02006879 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006880
6881 u8 multicast_gid[16][0x8];
6882};
6883
Saeed Mahameed74862162016-06-09 15:11:34 +03006884struct mlx5_ifc_arm_xrq_out_bits {
6885 u8 status[0x8];
6886 u8 reserved_at_8[0x18];
6887
6888 u8 syndrome[0x20];
6889
6890 u8 reserved_at_40[0x40];
6891};
6892
6893struct mlx5_ifc_arm_xrq_in_bits {
6894 u8 opcode[0x10];
6895 u8 reserved_at_10[0x10];
6896
6897 u8 reserved_at_20[0x10];
6898 u8 op_mod[0x10];
6899
6900 u8 reserved_at_40[0x8];
6901 u8 xrqn[0x18];
6902
6903 u8 reserved_at_60[0x10];
6904 u8 lwm[0x10];
6905};
6906
Saeed Mahameede2816822015-05-28 22:28:40 +03006907struct mlx5_ifc_arm_xrc_srq_out_bits {
6908 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910
6911 u8 syndrome[0x20];
6912
Matan Barakb4ff3a32016-02-09 14:57:42 +02006913 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006914};
6915
6916enum {
6917 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6918};
6919
6920struct mlx5_ifc_arm_xrc_srq_in_bits {
6921 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006922 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006923
Matan Barakb4ff3a32016-02-09 14:57:42 +02006924 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006925 u8 op_mod[0x10];
6926
Matan Barakb4ff3a32016-02-09 14:57:42 +02006927 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006928 u8 xrc_srqn[0x18];
6929
Matan Barakb4ff3a32016-02-09 14:57:42 +02006930 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006931 u8 lwm[0x10];
6932};
6933
6934struct mlx5_ifc_arm_rq_out_bits {
6935 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006936 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006937
6938 u8 syndrome[0x20];
6939
Matan Barakb4ff3a32016-02-09 14:57:42 +02006940 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006941};
6942
6943enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006944 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6945 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006946};
6947
6948struct mlx5_ifc_arm_rq_in_bits {
6949 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006950 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006951
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953 u8 op_mod[0x10];
6954
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956 u8 srq_number[0x18];
6957
Matan Barakb4ff3a32016-02-09 14:57:42 +02006958 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006959 u8 lwm[0x10];
6960};
6961
6962struct mlx5_ifc_arm_dct_out_bits {
6963 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006964 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006965
6966 u8 syndrome[0x20];
6967
Matan Barakb4ff3a32016-02-09 14:57:42 +02006968 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006969};
6970
6971struct mlx5_ifc_arm_dct_in_bits {
6972 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006973 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006974
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976 u8 op_mod[0x10];
6977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979 u8 dct_number[0x18];
6980
Matan Barakb4ff3a32016-02-09 14:57:42 +02006981 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006982};
6983
6984struct mlx5_ifc_alloc_xrcd_out_bits {
6985 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006986 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006987
6988 u8 syndrome[0x20];
6989
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991 u8 xrcd[0x18];
6992
Matan Barakb4ff3a32016-02-09 14:57:42 +02006993 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006994};
6995
6996struct mlx5_ifc_alloc_xrcd_in_bits {
6997 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006998 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006999
Matan Barakb4ff3a32016-02-09 14:57:42 +02007000 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007001 u8 op_mod[0x10];
7002
Matan Barakb4ff3a32016-02-09 14:57:42 +02007003 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007004};
7005
7006struct mlx5_ifc_alloc_uar_out_bits {
7007 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007008 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007009
7010 u8 syndrome[0x20];
7011
Matan Barakb4ff3a32016-02-09 14:57:42 +02007012 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007013 u8 uar[0x18];
7014
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016};
7017
7018struct mlx5_ifc_alloc_uar_in_bits {
7019 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007020 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007021
Matan Barakb4ff3a32016-02-09 14:57:42 +02007022 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007023 u8 op_mod[0x10];
7024
Matan Barakb4ff3a32016-02-09 14:57:42 +02007025 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007026};
7027
7028struct mlx5_ifc_alloc_transport_domain_out_bits {
7029 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031
7032 u8 syndrome[0x20];
7033
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035 u8 transport_domain[0x18];
7036
Matan Barakb4ff3a32016-02-09 14:57:42 +02007037 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007038};
7039
7040struct mlx5_ifc_alloc_transport_domain_in_bits {
7041 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007043
Matan Barakb4ff3a32016-02-09 14:57:42 +02007044 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007045 u8 op_mod[0x10];
7046
Matan Barakb4ff3a32016-02-09 14:57:42 +02007047 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007048};
7049
7050struct mlx5_ifc_alloc_q_counter_out_bits {
7051 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007052 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007053
7054 u8 syndrome[0x20];
7055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057 u8 counter_set_id[0x8];
7058
Matan Barakb4ff3a32016-02-09 14:57:42 +02007059 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007060};
7061
7062struct mlx5_ifc_alloc_q_counter_in_bits {
7063 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007064 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065
Matan Barakb4ff3a32016-02-09 14:57:42 +02007066 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007067 u8 op_mod[0x10];
7068
Matan Barakb4ff3a32016-02-09 14:57:42 +02007069 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007070};
7071
7072struct mlx5_ifc_alloc_pd_out_bits {
7073 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007074 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007075
7076 u8 syndrome[0x20];
7077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079 u8 pd[0x18];
7080
Matan Barakb4ff3a32016-02-09 14:57:42 +02007081 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007082};
7083
7084struct mlx5_ifc_alloc_pd_in_bits {
7085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007087
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089 u8 op_mod[0x10];
7090
Matan Barakb4ff3a32016-02-09 14:57:42 +02007091 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007092};
7093
Amir Vadai9dc0b282016-05-13 12:55:39 +00007094struct mlx5_ifc_alloc_flow_counter_out_bits {
7095 u8 status[0x8];
7096 u8 reserved_at_8[0x18];
7097
7098 u8 syndrome[0x20];
7099
7100 u8 reserved_at_40[0x10];
7101 u8 flow_counter_id[0x10];
7102
7103 u8 reserved_at_60[0x20];
7104};
7105
7106struct mlx5_ifc_alloc_flow_counter_in_bits {
7107 u8 opcode[0x10];
7108 u8 reserved_at_10[0x10];
7109
7110 u8 reserved_at_20[0x10];
7111 u8 op_mod[0x10];
7112
7113 u8 reserved_at_40[0x40];
7114};
7115
Saeed Mahameede2816822015-05-28 22:28:40 +03007116struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7117 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007118 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007119
7120 u8 syndrome[0x20];
7121
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123};
7124
7125struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7126 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007127 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007128
Matan Barakb4ff3a32016-02-09 14:57:42 +02007129 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007130 u8 op_mod[0x10];
7131
Matan Barakb4ff3a32016-02-09 14:57:42 +02007132 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007133
Matan Barakb4ff3a32016-02-09 14:57:42 +02007134 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007135 u8 vxlan_udp_port[0x10];
7136};
7137
Saeed Mahameed74862162016-06-09 15:11:34 +03007138struct mlx5_ifc_set_rate_limit_out_bits {
7139 u8 status[0x8];
7140 u8 reserved_at_8[0x18];
7141
7142 u8 syndrome[0x20];
7143
7144 u8 reserved_at_40[0x40];
7145};
7146
7147struct mlx5_ifc_set_rate_limit_in_bits {
7148 u8 opcode[0x10];
7149 u8 reserved_at_10[0x10];
7150
7151 u8 reserved_at_20[0x10];
7152 u8 op_mod[0x10];
7153
7154 u8 reserved_at_40[0x10];
7155 u8 rate_limit_index[0x10];
7156
7157 u8 reserved_at_60[0x20];
7158
7159 u8 rate_limit[0x20];
7160};
7161
Saeed Mahameede2816822015-05-28 22:28:40 +03007162struct mlx5_ifc_access_register_out_bits {
7163 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165
7166 u8 syndrome[0x20];
7167
Matan Barakb4ff3a32016-02-09 14:57:42 +02007168 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007169
7170 u8 register_data[0][0x20];
7171};
7172
7173enum {
7174 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7175 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7176};
7177
7178struct mlx5_ifc_access_register_in_bits {
7179 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007180 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007181
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183 u8 op_mod[0x10];
7184
Matan Barakb4ff3a32016-02-09 14:57:42 +02007185 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007186 u8 register_id[0x10];
7187
7188 u8 argument[0x20];
7189
7190 u8 register_data[0][0x20];
7191};
7192
7193struct mlx5_ifc_sltp_reg_bits {
7194 u8 status[0x4];
7195 u8 version[0x4];
7196 u8 local_port[0x8];
7197 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007200 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007201
Matan Barakb4ff3a32016-02-09 14:57:42 +02007202 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007203
Matan Barakb4ff3a32016-02-09 14:57:42 +02007204 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007205 u8 polarity[0x1];
7206 u8 ob_tap0[0x8];
7207 u8 ob_tap1[0x8];
7208 u8 ob_tap2[0x8];
7209
Matan Barakb4ff3a32016-02-09 14:57:42 +02007210 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007211 u8 ob_preemp_mode[0x4];
7212 u8 ob_reg[0x8];
7213 u8 ob_bias[0x8];
7214
Matan Barakb4ff3a32016-02-09 14:57:42 +02007215 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007216};
7217
7218struct mlx5_ifc_slrg_reg_bits {
7219 u8 status[0x4];
7220 u8 version[0x4];
7221 u8 local_port[0x8];
7222 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226
7227 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007228 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007229 u8 grade_lane_speed[0x4];
7230
7231 u8 grade_version[0x8];
7232 u8 grade[0x18];
7233
Matan Barakb4ff3a32016-02-09 14:57:42 +02007234 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007235 u8 height_grade_type[0x4];
7236 u8 height_grade[0x18];
7237
7238 u8 height_dz[0x10];
7239 u8 height_dv[0x10];
7240
Matan Barakb4ff3a32016-02-09 14:57:42 +02007241 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007242 u8 height_sigma[0x10];
7243
Matan Barakb4ff3a32016-02-09 14:57:42 +02007244 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007245
Matan Barakb4ff3a32016-02-09 14:57:42 +02007246 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007247 u8 phase_grade_type[0x4];
7248 u8 phase_grade[0x18];
7249
Matan Barakb4ff3a32016-02-09 14:57:42 +02007250 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007251 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253 u8 phase_eo_neg[0x8];
7254
7255 u8 ffe_set_tested[0x10];
7256 u8 test_errors_per_lane[0x10];
7257};
7258
7259struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265 u8 vl_hw_cap[0x4];
7266
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268 u8 vl_admin[0x4];
7269
Matan Barakb4ff3a32016-02-09 14:57:42 +02007270 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007271 u8 vl_operational[0x4];
7272};
7273
7274struct mlx5_ifc_pude_reg_bits {
7275 u8 swid[0x8];
7276 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007277 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007279 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007280 u8 oper_status[0x4];
7281
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283};
7284
7285struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007286 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007287 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007288 u8 an_disable_cap[0x1];
7289 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007290 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007291 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007292 u8 proto_mask[0x3];
7293
Saeed Mahameed74862162016-06-09 15:11:34 +03007294 u8 an_status[0x4];
7295 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007296
7297 u8 eth_proto_capability[0x20];
7298
7299 u8 ib_link_width_capability[0x10];
7300 u8 ib_proto_capability[0x10];
7301
Matan Barakb4ff3a32016-02-09 14:57:42 +02007302 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007303
7304 u8 eth_proto_admin[0x20];
7305
7306 u8 ib_link_width_admin[0x10];
7307 u8 ib_proto_admin[0x10];
7308
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310
7311 u8 eth_proto_oper[0x20];
7312
7313 u8 ib_link_width_oper[0x10];
7314 u8 ib_proto_oper[0x10];
7315
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007316 u8 reserved_at_160[0x1c];
7317 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007318
7319 u8 eth_proto_lp_advertise[0x20];
7320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322};
7323
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007324struct mlx5_ifc_mlcr_reg_bits {
7325 u8 reserved_at_0[0x8];
7326 u8 local_port[0x8];
7327 u8 reserved_at_10[0x20];
7328
7329 u8 beacon_duration[0x10];
7330 u8 reserved_at_40[0x10];
7331
7332 u8 beacon_remain[0x10];
7333};
7334
Saeed Mahameede2816822015-05-28 22:28:40 +03007335struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007336 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007337
7338 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007339 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007340 u8 repetitions_mode[0x4];
7341 u8 num_of_repetitions[0x8];
7342
7343 u8 grade_version[0x8];
7344 u8 height_grade_type[0x4];
7345 u8 phase_grade_type[0x4];
7346 u8 height_grade_weight[0x8];
7347 u8 phase_grade_weight[0x8];
7348
7349 u8 gisim_measure_bits[0x10];
7350 u8 adaptive_tap_measure_bits[0x10];
7351
7352 u8 ber_bath_high_error_threshold[0x10];
7353 u8 ber_bath_mid_error_threshold[0x10];
7354
7355 u8 ber_bath_low_error_threshold[0x10];
7356 u8 one_ratio_high_threshold[0x10];
7357
7358 u8 one_ratio_high_mid_threshold[0x10];
7359 u8 one_ratio_low_mid_threshold[0x10];
7360
7361 u8 one_ratio_low_threshold[0x10];
7362 u8 ndeo_error_threshold[0x10];
7363
7364 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007365 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007366 u8 mix90_phase_for_voltage_bath[0x8];
7367
7368 u8 mixer_offset_start[0x10];
7369 u8 mixer_offset_end[0x10];
7370
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372 u8 ber_test_time[0xb];
7373};
7374
7375struct mlx5_ifc_pspa_reg_bits {
7376 u8 swid[0x8];
7377 u8 local_port[0x8];
7378 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380
Matan Barakb4ff3a32016-02-09 14:57:42 +02007381 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007382};
7383
7384struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007387 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007388 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390 u8 mode[0x2];
7391
Matan Barakb4ff3a32016-02-09 14:57:42 +02007392 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007393
Matan Barakb4ff3a32016-02-09 14:57:42 +02007394 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007395 u8 min_threshold[0x10];
7396
Matan Barakb4ff3a32016-02-09 14:57:42 +02007397 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007398 u8 max_threshold[0x10];
7399
Matan Barakb4ff3a32016-02-09 14:57:42 +02007400 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007401 u8 mark_probability_denominator[0x10];
7402
Matan Barakb4ff3a32016-02-09 14:57:42 +02007403 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007404};
7405
7406struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007407 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007408 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007409 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007410
Matan Barakb4ff3a32016-02-09 14:57:42 +02007411 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007412
Matan Barakb4ff3a32016-02-09 14:57:42 +02007413 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007414 u8 wrps_admin[0x4];
7415
Matan Barakb4ff3a32016-02-09 14:57:42 +02007416 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007417 u8 wrps_status[0x4];
7418
Matan Barakb4ff3a32016-02-09 14:57:42 +02007419 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007420 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422 u8 down_threshold[0x8];
7423
Matan Barakb4ff3a32016-02-09 14:57:42 +02007424 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007425
Matan Barakb4ff3a32016-02-09 14:57:42 +02007426 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007427 u8 srps_admin[0x4];
7428
Matan Barakb4ff3a32016-02-09 14:57:42 +02007429 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007430 u8 srps_status[0x4];
7431
Matan Barakb4ff3a32016-02-09 14:57:42 +02007432 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007433};
7434
7435struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007436 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007437 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007438 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007439
Matan Barakb4ff3a32016-02-09 14:57:42 +02007440 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007441 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007442 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007443 u8 lb_en[0x8];
7444};
7445
7446struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007447 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007448 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007449 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007450
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452
7453 u8 port_profile_mode[0x8];
7454 u8 static_port_profile[0x8];
7455 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007456 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007457
7458 u8 retransmission_active[0x8];
7459 u8 fec_mode_active[0x18];
7460
Matan Barakb4ff3a32016-02-09 14:57:42 +02007461 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007462};
7463
7464struct mlx5_ifc_ppcnt_reg_bits {
7465 u8 swid[0x8];
7466 u8 local_port[0x8];
7467 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469 u8 grp[0x6];
7470
7471 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473 u8 prio_tc[0x3];
7474
7475 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7476};
7477
Gal Pressman8ed1a632016-11-17 13:46:01 +02007478struct mlx5_ifc_mpcnt_reg_bits {
7479 u8 reserved_at_0[0x8];
7480 u8 pcie_index[0x8];
7481 u8 reserved_at_10[0xa];
7482 u8 grp[0x6];
7483
7484 u8 clr[0x1];
7485 u8 reserved_at_21[0x1f];
7486
7487 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7488};
7489
Saeed Mahameede2816822015-05-28 22:28:40 +03007490struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494 u8 local_port[0x8];
7495 u8 mac_47_32[0x10];
7496
7497 u8 mac_31_0[0x20];
7498
Matan Barakb4ff3a32016-02-09 14:57:42 +02007499 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007500};
7501
7502struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007503 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007504 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506
7507 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007508 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007509
7510 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007511 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007512
7513 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515};
7516
7517struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 attenuation_5g[0x8];
7524
Matan Barakb4ff3a32016-02-09 14:57:42 +02007525 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007526 u8 attenuation_7g[0x8];
7527
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 attenuation_12g[0x8];
7530};
7531
7532struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007533 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007534 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007535 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007536 u8 module_status[0x4];
7537
Matan Barakb4ff3a32016-02-09 14:57:42 +02007538 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007539};
7540
7541struct mlx5_ifc_pmpc_reg_bits {
7542 u8 module_state_updated[32][0x8];
7543};
7544
7545struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547 u8 mlpn_status[0x4];
7548 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550
7551 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007552 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007553};
7554
7555struct mlx5_ifc_pmlp_reg_bits {
7556 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007559 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007560 u8 width[0x8];
7561
7562 u8 lane0_module_mapping[0x20];
7563
7564 u8 lane1_module_mapping[0x20];
7565
7566 u8 lane2_module_mapping[0x20];
7567
7568 u8 lane3_module_mapping[0x20];
7569
Matan Barakb4ff3a32016-02-09 14:57:42 +02007570 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007571};
7572
7573struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007578 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007579 u8 oper_status[0x4];
7580
7581 u8 ase[0x1];
7582 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007583 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584 u8 e[0x2];
7585
Matan Barakb4ff3a32016-02-09 14:57:42 +02007586 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007587};
7588
7589struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007592 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007593 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007594 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597 u8 lane_speed[0x10];
7598
Matan Barakb4ff3a32016-02-09 14:57:42 +02007599 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007600 u8 lpbf[0x1];
7601 u8 fec_mode_policy[0x8];
7602
7603 u8 retransmission_capability[0x8];
7604 u8 fec_mode_capability[0x18];
7605
7606 u8 retransmission_support_admin[0x8];
7607 u8 fec_mode_support_admin[0x18];
7608
7609 u8 retransmission_request_admin[0x8];
7610 u8 fec_mode_request_admin[0x18];
7611
Matan Barakb4ff3a32016-02-09 14:57:42 +02007612 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007613};
7614
7615struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007616 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007617 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619 u8 ib_port[0x8];
7620
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622};
7623
7624struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628 u8 lbf_mode[0x3];
7629
Matan Barakb4ff3a32016-02-09 14:57:42 +02007630 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007631};
7632
7633struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007634 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007635 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637
7638 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007639 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007640 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642};
7643
7644struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007645 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007646 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650
7651 u8 port_filter[8][0x20];
7652
7653 u8 port_filter_update_en[8][0x20];
7654};
7655
7656struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660
7661 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007662 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007663 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007664 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007665 u8 prio_mask_rx[0x8];
7666
7667 u8 pptx[0x1];
7668 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007669 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007670 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007671 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007672
7673 u8 pprx[0x1];
7674 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007675 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007676 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680};
7681
7682struct mlx5_ifc_pelc_reg_bits {
7683 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007684 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007685 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007686 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007687
7688 u8 op_admin[0x8];
7689 u8 op_capability[0x8];
7690 u8 op_request[0x8];
7691 u8 op_active[0x8];
7692
7693 u8 admin[0x40];
7694
7695 u8 capability[0x40];
7696
7697 u8 request[0x40];
7698
7699 u8 active[0x40];
7700
Matan Barakb4ff3a32016-02-09 14:57:42 +02007701 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007702};
7703
7704struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007707 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007708
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007711 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007712
Matan Barakb4ff3a32016-02-09 14:57:42 +02007713 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007714 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716 u8 error_type[0x8];
7717};
7718
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007719struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007720 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007721
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007722 u8 ptys_connector_type[0x1];
7723 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007724 u8 ppcnt_discard_group[0x1];
7725 u8 ppcnt_statistical_group[0x1];
7726};
7727
7728struct mlx5_ifc_pcam_reg_bits {
7729 u8 reserved_at_0[0x8];
7730 u8 feature_group[0x8];
7731 u8 reserved_at_10[0x8];
7732 u8 access_reg_group[0x8];
7733
7734 u8 reserved_at_20[0x20];
7735
7736 union {
7737 u8 reserved_at_0[0x80];
7738 } port_access_reg_cap_mask;
7739
7740 u8 reserved_at_c0[0x80];
7741
7742 union {
7743 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7744 u8 reserved_at_0[0x80];
7745 } feature_cap_mask;
7746
7747 u8 reserved_at_1c0[0xc0];
7748};
7749
7750struct mlx5_ifc_mcam_enhanced_features_bits {
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007751 u8 reserved_at_0[0x7d];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007752
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007753 u8 mtpps_enh_out_per_adj[0x1];
7754 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007755 u8 pcie_performance_group[0x1];
7756};
7757
Or Gerlitz0ab87742017-06-11 15:25:38 +03007758struct mlx5_ifc_mcam_access_reg_bits {
7759 u8 reserved_at_0[0x1c];
7760 u8 mcda[0x1];
7761 u8 mcc[0x1];
7762 u8 mcqi[0x1];
7763 u8 reserved_at_1f[0x1];
7764
7765 u8 regs_95_to_64[0x20];
7766 u8 regs_63_to_32[0x20];
7767 u8 regs_31_to_0[0x20];
7768};
7769
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007770struct mlx5_ifc_mcam_reg_bits {
7771 u8 reserved_at_0[0x8];
7772 u8 feature_group[0x8];
7773 u8 reserved_at_10[0x8];
7774 u8 access_reg_group[0x8];
7775
7776 u8 reserved_at_20[0x20];
7777
7778 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007779 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007780 u8 reserved_at_0[0x80];
7781 } mng_access_reg_cap_mask;
7782
7783 u8 reserved_at_c0[0x80];
7784
7785 union {
7786 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7787 u8 reserved_at_0[0x80];
7788 } mng_feature_cap_mask;
7789
7790 u8 reserved_at_1c0[0x80];
7791};
7792
Saeed Mahameede2816822015-05-28 22:28:40 +03007793struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007794 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007795 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007796 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007797
7798 u8 port_capability_mask[4][0x20];
7799};
7800
7801struct mlx5_ifc_paos_reg_bits {
7802 u8 swid[0x8];
7803 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007806 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007807 u8 oper_status[0x4];
7808
7809 u8 ase[0x1];
7810 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007811 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007812 u8 e[0x2];
7813
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815};
7816
7817struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007820 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007821 u8 opamp_group_type[0x4];
7822
7823 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007824 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007825 u8 num_of_indices[0xc];
7826
7827 u8 index_data[18][0x10];
7828};
7829
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007830struct mlx5_ifc_pcmr_reg_bits {
7831 u8 reserved_at_0[0x8];
7832 u8 local_port[0x8];
7833 u8 reserved_at_10[0x2e];
7834 u8 fcs_cap[0x1];
7835 u8 reserved_at_3f[0x1f];
7836 u8 fcs_chk[0x1];
7837 u8 reserved_at_5f[0x1];
7838};
7839
Saeed Mahameede2816822015-05-28 22:28:40 +03007840struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007841 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007842 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007843 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007844 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007845 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007846 u8 module[0x8];
7847};
7848
7849struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007850 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007851 u8 lossy[0x1];
7852 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007853 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007854 u8 size[0xc];
7855
7856 u8 xoff_threshold[0x10];
7857 u8 xon_threshold[0x10];
7858};
7859
7860struct mlx5_ifc_set_node_in_bits {
7861 u8 node_description[64][0x8];
7862};
7863
7864struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007865 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007866 u8 power_settings_level[0x8];
7867
Matan Barakb4ff3a32016-02-09 14:57:42 +02007868 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007869};
7870
7871struct mlx5_ifc_register_host_endianness_bits {
7872 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007873 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007874
Matan Barakb4ff3a32016-02-09 14:57:42 +02007875 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007876};
7877
7878struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007879 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007880
7881 u8 mkey[0x20];
7882
7883 u8 addressh_63_32[0x20];
7884
7885 u8 addressl_31_0[0x20];
7886};
7887
7888struct mlx5_ifc_ud_adrs_vector_bits {
7889 u8 dc_key[0x40];
7890
7891 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007892 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007893 u8 destination_qp_dct[0x18];
7894
7895 u8 static_rate[0x4];
7896 u8 sl_eth_prio[0x4];
7897 u8 fl[0x1];
7898 u8 mlid[0x7];
7899 u8 rlid_udp_sport[0x10];
7900
Matan Barakb4ff3a32016-02-09 14:57:42 +02007901 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007902
7903 u8 rmac_47_16[0x20];
7904
7905 u8 rmac_15_0[0x10];
7906 u8 tclass[0x8];
7907 u8 hop_limit[0x8];
7908
Matan Barakb4ff3a32016-02-09 14:57:42 +02007909 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007910 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007911 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007912 u8 src_addr_index[0x8];
7913 u8 flow_label[0x14];
7914
7915 u8 rgid_rip[16][0x8];
7916};
7917
7918struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007919 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007920 u8 function_id[0x10];
7921
7922 u8 num_pages[0x20];
7923
Matan Barakb4ff3a32016-02-09 14:57:42 +02007924 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007925};
7926
7927struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007928 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007929 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007930 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007931 u8 event_sub_type[0x8];
7932
Matan Barakb4ff3a32016-02-09 14:57:42 +02007933 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007934
7935 union mlx5_ifc_event_auto_bits event_data;
7936
Matan Barakb4ff3a32016-02-09 14:57:42 +02007937 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007938 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007939 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007940 u8 owner[0x1];
7941};
7942
7943enum {
7944 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7945};
7946
7947struct mlx5_ifc_cmd_queue_entry_bits {
7948 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007949 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007950
7951 u8 input_length[0x20];
7952
7953 u8 input_mailbox_pointer_63_32[0x20];
7954
7955 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007956 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007957
7958 u8 command_input_inline_data[16][0x8];
7959
7960 u8 command_output_inline_data[16][0x8];
7961
7962 u8 output_mailbox_pointer_63_32[0x20];
7963
7964 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007965 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007966
7967 u8 output_length[0x20];
7968
7969 u8 token[0x8];
7970 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007971 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007972 u8 status[0x7];
7973 u8 ownership[0x1];
7974};
7975
7976struct mlx5_ifc_cmd_out_bits {
7977 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007978 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007979
7980 u8 syndrome[0x20];
7981
7982 u8 command_output[0x20];
7983};
7984
7985struct mlx5_ifc_cmd_in_bits {
7986 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007987 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007988
Matan Barakb4ff3a32016-02-09 14:57:42 +02007989 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007990 u8 op_mod[0x10];
7991
7992 u8 command[0][0x20];
7993};
7994
7995struct mlx5_ifc_cmd_if_box_bits {
7996 u8 mailbox_data[512][0x8];
7997
Matan Barakb4ff3a32016-02-09 14:57:42 +02007998 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007999
8000 u8 next_pointer_63_32[0x20];
8001
8002 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008003 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008004
8005 u8 block_number[0x20];
8006
Matan Barakb4ff3a32016-02-09 14:57:42 +02008007 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008008 u8 token[0x8];
8009 u8 ctrl_signature[0x8];
8010 u8 signature[0x8];
8011};
8012
8013struct mlx5_ifc_mtt_bits {
8014 u8 ptag_63_32[0x20];
8015
8016 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008017 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008018 u8 wr_en[0x1];
8019 u8 rd_en[0x1];
8020};
8021
Tariq Toukan928cfe82016-02-22 18:17:29 +02008022struct mlx5_ifc_query_wol_rol_out_bits {
8023 u8 status[0x8];
8024 u8 reserved_at_8[0x18];
8025
8026 u8 syndrome[0x20];
8027
8028 u8 reserved_at_40[0x10];
8029 u8 rol_mode[0x8];
8030 u8 wol_mode[0x8];
8031
8032 u8 reserved_at_60[0x20];
8033};
8034
8035struct mlx5_ifc_query_wol_rol_in_bits {
8036 u8 opcode[0x10];
8037 u8 reserved_at_10[0x10];
8038
8039 u8 reserved_at_20[0x10];
8040 u8 op_mod[0x10];
8041
8042 u8 reserved_at_40[0x40];
8043};
8044
8045struct mlx5_ifc_set_wol_rol_out_bits {
8046 u8 status[0x8];
8047 u8 reserved_at_8[0x18];
8048
8049 u8 syndrome[0x20];
8050
8051 u8 reserved_at_40[0x40];
8052};
8053
8054struct mlx5_ifc_set_wol_rol_in_bits {
8055 u8 opcode[0x10];
8056 u8 reserved_at_10[0x10];
8057
8058 u8 reserved_at_20[0x10];
8059 u8 op_mod[0x10];
8060
8061 u8 rol_mode_valid[0x1];
8062 u8 wol_mode_valid[0x1];
8063 u8 reserved_at_42[0xe];
8064 u8 rol_mode[0x8];
8065 u8 wol_mode[0x8];
8066
8067 u8 reserved_at_60[0x20];
8068};
8069
Saeed Mahameede2816822015-05-28 22:28:40 +03008070enum {
8071 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8072 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8073 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8074};
8075
8076enum {
8077 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8078 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8079 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8080};
8081
8082enum {
8083 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8084 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8085 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8086 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8087 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8088 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8089 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8090 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8091 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8092 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8093 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8094};
8095
8096struct mlx5_ifc_initial_seg_bits {
8097 u8 fw_rev_minor[0x10];
8098 u8 fw_rev_major[0x10];
8099
8100 u8 cmd_interface_rev[0x10];
8101 u8 fw_rev_subminor[0x10];
8102
Matan Barakb4ff3a32016-02-09 14:57:42 +02008103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008104
8105 u8 cmdq_phy_addr_63_32[0x20];
8106
8107 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008108 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008109 u8 nic_interface[0x2];
8110 u8 log_cmdq_size[0x4];
8111 u8 log_cmdq_stride[0x4];
8112
8113 u8 command_doorbell_vector[0x20];
8114
Matan Barakb4ff3a32016-02-09 14:57:42 +02008115 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008116
8117 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008118 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008119 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008120 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008121
8122 struct mlx5_ifc_health_buffer_bits health_buffer;
8123
8124 u8 no_dram_nic_offset[0x20];
8125
Matan Barakb4ff3a32016-02-09 14:57:42 +02008126 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008127
Matan Barakb4ff3a32016-02-09 14:57:42 +02008128 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008129 u8 clear_int[0x1];
8130
8131 u8 health_syndrome[0x8];
8132 u8 health_counter[0x18];
8133
Matan Barakb4ff3a32016-02-09 14:57:42 +02008134 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008135};
8136
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008137struct mlx5_ifc_mtpps_reg_bits {
8138 u8 reserved_at_0[0xc];
8139 u8 cap_number_of_pps_pins[0x4];
8140 u8 reserved_at_10[0x4];
8141 u8 cap_max_num_of_pps_in_pins[0x4];
8142 u8 reserved_at_18[0x4];
8143 u8 cap_max_num_of_pps_out_pins[0x4];
8144
8145 u8 reserved_at_20[0x24];
8146 u8 cap_pin_3_mode[0x4];
8147 u8 reserved_at_48[0x4];
8148 u8 cap_pin_2_mode[0x4];
8149 u8 reserved_at_50[0x4];
8150 u8 cap_pin_1_mode[0x4];
8151 u8 reserved_at_58[0x4];
8152 u8 cap_pin_0_mode[0x4];
8153
8154 u8 reserved_at_60[0x4];
8155 u8 cap_pin_7_mode[0x4];
8156 u8 reserved_at_68[0x4];
8157 u8 cap_pin_6_mode[0x4];
8158 u8 reserved_at_70[0x4];
8159 u8 cap_pin_5_mode[0x4];
8160 u8 reserved_at_78[0x4];
8161 u8 cap_pin_4_mode[0x4];
8162
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008163 u8 field_select[0x20];
8164 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008165
8166 u8 enable[0x1];
8167 u8 reserved_at_101[0xb];
8168 u8 pattern[0x4];
8169 u8 reserved_at_110[0x4];
8170 u8 pin_mode[0x4];
8171 u8 pin[0x8];
8172
8173 u8 reserved_at_120[0x20];
8174
8175 u8 time_stamp[0x40];
8176
8177 u8 out_pulse_duration[0x10];
8178 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008179 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008180
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008181 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008182};
8183
8184struct mlx5_ifc_mtppse_reg_bits {
8185 u8 reserved_at_0[0x18];
8186 u8 pin[0x8];
8187 u8 event_arm[0x1];
8188 u8 reserved_at_21[0x1b];
8189 u8 event_generation_mode[0x4];
8190 u8 reserved_at_40[0x40];
8191};
8192
Or Gerlitz47176282017-04-18 13:35:39 +03008193struct mlx5_ifc_mcqi_cap_bits {
8194 u8 supported_info_bitmask[0x20];
8195
8196 u8 component_size[0x20];
8197
8198 u8 max_component_size[0x20];
8199
8200 u8 log_mcda_word_size[0x4];
8201 u8 reserved_at_64[0xc];
8202 u8 mcda_max_write_size[0x10];
8203
8204 u8 rd_en[0x1];
8205 u8 reserved_at_81[0x1];
8206 u8 match_chip_id[0x1];
8207 u8 match_psid[0x1];
8208 u8 check_user_timestamp[0x1];
8209 u8 match_base_guid_mac[0x1];
8210 u8 reserved_at_86[0x1a];
8211};
8212
8213struct mlx5_ifc_mcqi_reg_bits {
8214 u8 read_pending_component[0x1];
8215 u8 reserved_at_1[0xf];
8216 u8 component_index[0x10];
8217
8218 u8 reserved_at_20[0x20];
8219
8220 u8 reserved_at_40[0x1b];
8221 u8 info_type[0x5];
8222
8223 u8 info_size[0x20];
8224
8225 u8 offset[0x20];
8226
8227 u8 reserved_at_a0[0x10];
8228 u8 data_size[0x10];
8229
8230 u8 data[0][0x20];
8231};
8232
8233struct mlx5_ifc_mcc_reg_bits {
8234 u8 reserved_at_0[0x4];
8235 u8 time_elapsed_since_last_cmd[0xc];
8236 u8 reserved_at_10[0x8];
8237 u8 instruction[0x8];
8238
8239 u8 reserved_at_20[0x10];
8240 u8 component_index[0x10];
8241
8242 u8 reserved_at_40[0x8];
8243 u8 update_handle[0x18];
8244
8245 u8 handle_owner_type[0x4];
8246 u8 handle_owner_host_id[0x4];
8247 u8 reserved_at_68[0x1];
8248 u8 control_progress[0x7];
8249 u8 error_code[0x8];
8250 u8 reserved_at_78[0x4];
8251 u8 control_state[0x4];
8252
8253 u8 component_size[0x20];
8254
8255 u8 reserved_at_a0[0x60];
8256};
8257
8258struct mlx5_ifc_mcda_reg_bits {
8259 u8 reserved_at_0[0x8];
8260 u8 update_handle[0x18];
8261
8262 u8 offset[0x20];
8263
8264 u8 reserved_at_40[0x10];
8265 u8 size[0x10];
8266
8267 u8 reserved_at_60[0x20];
8268
8269 u8 data[0][0x20];
8270};
8271
Saeed Mahameede2816822015-05-28 22:28:40 +03008272union mlx5_ifc_ports_control_registers_document_bits {
8273 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8274 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8275 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8276 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8277 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8278 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8279 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8280 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8281 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8282 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8283 struct mlx5_ifc_paos_reg_bits paos_reg;
8284 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8285 struct mlx5_ifc_peir_reg_bits peir_reg;
8286 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8287 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008288 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008289 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8290 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8291 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8292 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8293 struct mlx5_ifc_plib_reg_bits plib_reg;
8294 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8295 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8296 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8297 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8298 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8299 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8300 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8301 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8302 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8303 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008304 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008305 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8306 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8307 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8308 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8309 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8310 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8311 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008312 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008313 struct mlx5_ifc_pude_reg_bits pude_reg;
8314 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8315 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8316 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008317 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8318 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008319 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008320 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8321 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008322 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8323 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8324 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008325 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008326};
8327
8328union mlx5_ifc_debug_enhancements_document_bits {
8329 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008330 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008331};
8332
8333union mlx5_ifc_uplink_pci_interface_document_bits {
8334 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008335 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008336};
8337
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008338struct mlx5_ifc_set_flow_table_root_out_bits {
8339 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008340 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008341
8342 u8 syndrome[0x20];
8343
Matan Barakb4ff3a32016-02-09 14:57:42 +02008344 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008345};
8346
8347struct mlx5_ifc_set_flow_table_root_in_bits {
8348 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008349 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008350
Matan Barakb4ff3a32016-02-09 14:57:42 +02008351 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008352 u8 op_mod[0x10];
8353
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008354 u8 other_vport[0x1];
8355 u8 reserved_at_41[0xf];
8356 u8 vport_number[0x10];
8357
8358 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008359
8360 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008361 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008362
Matan Barakb4ff3a32016-02-09 14:57:42 +02008363 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008364 u8 table_id[0x18];
8365
Erez Shitrit500a3d02017-04-13 06:36:51 +03008366 u8 reserved_at_c0[0x8];
8367 u8 underlay_qpn[0x18];
8368 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008369};
8370
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008371enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008372 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8373 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008374};
8375
8376struct mlx5_ifc_modify_flow_table_out_bits {
8377 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008378 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008379
8380 u8 syndrome[0x20];
8381
Matan Barakb4ff3a32016-02-09 14:57:42 +02008382 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008383};
8384
8385struct mlx5_ifc_modify_flow_table_in_bits {
8386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008387 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008388
Matan Barakb4ff3a32016-02-09 14:57:42 +02008389 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008390 u8 op_mod[0x10];
8391
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008392 u8 other_vport[0x1];
8393 u8 reserved_at_41[0xf];
8394 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008395
Matan Barakb4ff3a32016-02-09 14:57:42 +02008396 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008397 u8 modify_field_select[0x10];
8398
8399 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008400 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008401
Matan Barakb4ff3a32016-02-09 14:57:42 +02008402 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008403 u8 table_id[0x18];
8404
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008405 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008406};
8407
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008408struct mlx5_ifc_ets_tcn_config_reg_bits {
8409 u8 g[0x1];
8410 u8 b[0x1];
8411 u8 r[0x1];
8412 u8 reserved_at_3[0x9];
8413 u8 group[0x4];
8414 u8 reserved_at_10[0x9];
8415 u8 bw_allocation[0x7];
8416
8417 u8 reserved_at_20[0xc];
8418 u8 max_bw_units[0x4];
8419 u8 reserved_at_30[0x8];
8420 u8 max_bw_value[0x8];
8421};
8422
8423struct mlx5_ifc_ets_global_config_reg_bits {
8424 u8 reserved_at_0[0x2];
8425 u8 r[0x1];
8426 u8 reserved_at_3[0x1d];
8427
8428 u8 reserved_at_20[0xc];
8429 u8 max_bw_units[0x4];
8430 u8 reserved_at_30[0x8];
8431 u8 max_bw_value[0x8];
8432};
8433
8434struct mlx5_ifc_qetc_reg_bits {
8435 u8 reserved_at_0[0x8];
8436 u8 port_number[0x8];
8437 u8 reserved_at_10[0x30];
8438
8439 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8440 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8441};
8442
8443struct mlx5_ifc_qtct_reg_bits {
8444 u8 reserved_at_0[0x8];
8445 u8 port_number[0x8];
8446 u8 reserved_at_10[0xd];
8447 u8 prio[0x3];
8448
8449 u8 reserved_at_20[0x1d];
8450 u8 tclass[0x3];
8451};
8452
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008453struct mlx5_ifc_mcia_reg_bits {
8454 u8 l[0x1];
8455 u8 reserved_at_1[0x7];
8456 u8 module[0x8];
8457 u8 reserved_at_10[0x8];
8458 u8 status[0x8];
8459
8460 u8 i2c_device_address[0x8];
8461 u8 page_number[0x8];
8462 u8 device_address[0x10];
8463
8464 u8 reserved_at_40[0x10];
8465 u8 size[0x10];
8466
8467 u8 reserved_at_60[0x20];
8468
8469 u8 dword_0[0x20];
8470 u8 dword_1[0x20];
8471 u8 dword_2[0x20];
8472 u8 dword_3[0x20];
8473 u8 dword_4[0x20];
8474 u8 dword_5[0x20];
8475 u8 dword_6[0x20];
8476 u8 dword_7[0x20];
8477 u8 dword_8[0x20];
8478 u8 dword_9[0x20];
8479 u8 dword_10[0x20];
8480 u8 dword_11[0x20];
8481};
8482
Saeed Mahameed74862162016-06-09 15:11:34 +03008483struct mlx5_ifc_dcbx_param_bits {
8484 u8 dcbx_cee_cap[0x1];
8485 u8 dcbx_ieee_cap[0x1];
8486 u8 dcbx_standby_cap[0x1];
8487 u8 reserved_at_0[0x5];
8488 u8 port_number[0x8];
8489 u8 reserved_at_10[0xa];
8490 u8 max_application_table_size[6];
8491 u8 reserved_at_20[0x15];
8492 u8 version_oper[0x3];
8493 u8 reserved_at_38[5];
8494 u8 version_admin[0x3];
8495 u8 willing_admin[0x1];
8496 u8 reserved_at_41[0x3];
8497 u8 pfc_cap_oper[0x4];
8498 u8 reserved_at_48[0x4];
8499 u8 pfc_cap_admin[0x4];
8500 u8 reserved_at_50[0x4];
8501 u8 num_of_tc_oper[0x4];
8502 u8 reserved_at_58[0x4];
8503 u8 num_of_tc_admin[0x4];
8504 u8 remote_willing[0x1];
8505 u8 reserved_at_61[3];
8506 u8 remote_pfc_cap[4];
8507 u8 reserved_at_68[0x14];
8508 u8 remote_num_of_tc[0x4];
8509 u8 reserved_at_80[0x18];
8510 u8 error[0x8];
8511 u8 reserved_at_a0[0x160];
8512};
Aviv Heller84df61e2016-05-10 13:47:50 +03008513
8514struct mlx5_ifc_lagc_bits {
8515 u8 reserved_at_0[0x1d];
8516 u8 lag_state[0x3];
8517
8518 u8 reserved_at_20[0x14];
8519 u8 tx_remap_affinity_2[0x4];
8520 u8 reserved_at_38[0x4];
8521 u8 tx_remap_affinity_1[0x4];
8522};
8523
8524struct mlx5_ifc_create_lag_out_bits {
8525 u8 status[0x8];
8526 u8 reserved_at_8[0x18];
8527
8528 u8 syndrome[0x20];
8529
8530 u8 reserved_at_40[0x40];
8531};
8532
8533struct mlx5_ifc_create_lag_in_bits {
8534 u8 opcode[0x10];
8535 u8 reserved_at_10[0x10];
8536
8537 u8 reserved_at_20[0x10];
8538 u8 op_mod[0x10];
8539
8540 struct mlx5_ifc_lagc_bits ctx;
8541};
8542
8543struct mlx5_ifc_modify_lag_out_bits {
8544 u8 status[0x8];
8545 u8 reserved_at_8[0x18];
8546
8547 u8 syndrome[0x20];
8548
8549 u8 reserved_at_40[0x40];
8550};
8551
8552struct mlx5_ifc_modify_lag_in_bits {
8553 u8 opcode[0x10];
8554 u8 reserved_at_10[0x10];
8555
8556 u8 reserved_at_20[0x10];
8557 u8 op_mod[0x10];
8558
8559 u8 reserved_at_40[0x20];
8560 u8 field_select[0x20];
8561
8562 struct mlx5_ifc_lagc_bits ctx;
8563};
8564
8565struct mlx5_ifc_query_lag_out_bits {
8566 u8 status[0x8];
8567 u8 reserved_at_8[0x18];
8568
8569 u8 syndrome[0x20];
8570
8571 u8 reserved_at_40[0x40];
8572
8573 struct mlx5_ifc_lagc_bits ctx;
8574};
8575
8576struct mlx5_ifc_query_lag_in_bits {
8577 u8 opcode[0x10];
8578 u8 reserved_at_10[0x10];
8579
8580 u8 reserved_at_20[0x10];
8581 u8 op_mod[0x10];
8582
8583 u8 reserved_at_40[0x40];
8584};
8585
8586struct mlx5_ifc_destroy_lag_out_bits {
8587 u8 status[0x8];
8588 u8 reserved_at_8[0x18];
8589
8590 u8 syndrome[0x20];
8591
8592 u8 reserved_at_40[0x40];
8593};
8594
8595struct mlx5_ifc_destroy_lag_in_bits {
8596 u8 opcode[0x10];
8597 u8 reserved_at_10[0x10];
8598
8599 u8 reserved_at_20[0x10];
8600 u8 op_mod[0x10];
8601
8602 u8 reserved_at_40[0x40];
8603};
8604
8605struct mlx5_ifc_create_vport_lag_out_bits {
8606 u8 status[0x8];
8607 u8 reserved_at_8[0x18];
8608
8609 u8 syndrome[0x20];
8610
8611 u8 reserved_at_40[0x40];
8612};
8613
8614struct mlx5_ifc_create_vport_lag_in_bits {
8615 u8 opcode[0x10];
8616 u8 reserved_at_10[0x10];
8617
8618 u8 reserved_at_20[0x10];
8619 u8 op_mod[0x10];
8620
8621 u8 reserved_at_40[0x40];
8622};
8623
8624struct mlx5_ifc_destroy_vport_lag_out_bits {
8625 u8 status[0x8];
8626 u8 reserved_at_8[0x18];
8627
8628 u8 syndrome[0x20];
8629
8630 u8 reserved_at_40[0x40];
8631};
8632
8633struct mlx5_ifc_destroy_vport_lag_in_bits {
8634 u8 opcode[0x10];
8635 u8 reserved_at_10[0x10];
8636
8637 u8 reserved_at_20[0x10];
8638 u8 op_mod[0x10];
8639
8640 u8 reserved_at_40[0x40];
8641};
8642
Eli Cohend29b7962014-10-02 12:19:43 +03008643#endif /* MLX5_IFC_H */