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Terje Bergstromd43f81c2013-03-22 16:34:09 +02001/*
Terje Bergstromd43f81c2013-03-22 16:34:09 +02002 * Copyright (c) 2012-2013, NVIDIA Corporation.
3 *
Thierry Redingd105a6c2014-02-11 15:53:33 +01004 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
Terje Bergstromd43f81c2013-03-22 16:34:09 +02007 */
8
Terje Bergstromd43f81c2013-03-22 16:34:09 +02009#include <linux/clk.h>
10
Terje Bergstromd43f81c2013-03-22 16:34:09 +020011#include "drm.h"
12#include "gem.h"
Thierry Reding497c56a2013-10-07 09:55:57 +020013#include "gr2d.h"
Thierry Redingc1bef812013-09-26 16:09:43 +020014
Terje Bergstromd43f81c2013-03-22 16:34:09 +020015struct gr2d {
Thierry Reding53fa7f72013-09-24 15:35:40 +020016 struct tegra_drm_client client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +020017 struct host1x_channel *channel;
Thierry Redingc1bef812013-09-26 16:09:43 +020018 struct clk *clk;
19
20 DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
Terje Bergstromd43f81c2013-03-22 16:34:09 +020021};
22
Thierry Reding53fa7f72013-09-24 15:35:40 +020023static inline struct gr2d *to_gr2d(struct tegra_drm_client *client)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020024{
25 return container_of(client, struct gr2d, client);
26}
27
Thierry Reding776dc382013-10-14 14:43:22 +020028static int gr2d_init(struct host1x_client *client)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020029{
Thierry Reding776dc382013-10-14 14:43:22 +020030 struct tegra_drm_client *drm = host1x_to_drm_client(client);
Thierry Reding9910f5c2014-05-22 09:57:15 +020031 struct drm_device *dev = dev_get_drvdata(client->parent);
Arto Merilainen61644dc2013-10-14 15:21:55 +030032 unsigned long flags = HOST1X_SYNCPT_HAS_BASE;
Thierry Reding776dc382013-10-14 14:43:22 +020033 struct gr2d *gr2d = to_gr2d(drm);
34
35 gr2d->channel = host1x_channel_request(client->dev);
36 if (!gr2d->channel)
37 return -ENOMEM;
38
Thierry Reding617dd7c2017-08-30 12:48:31 +020039 client->syncpts[0] = host1x_syncpt_request(client, flags);
Thierry Reding776dc382013-10-14 14:43:22 +020040 if (!client->syncpts[0]) {
Mikko Perttunen8474b022017-06-15 02:18:42 +030041 host1x_channel_put(gr2d->channel);
Thierry Reding776dc382013-10-14 14:43:22 +020042 return -ENOMEM;
43 }
44
Thierry Reding9910f5c2014-05-22 09:57:15 +020045 return tegra_drm_register_client(dev->dev_private, drm);
Terje Bergstromd43f81c2013-03-22 16:34:09 +020046}
47
Thierry Reding776dc382013-10-14 14:43:22 +020048static int gr2d_exit(struct host1x_client *client)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020049{
Thierry Reding776dc382013-10-14 14:43:22 +020050 struct tegra_drm_client *drm = host1x_to_drm_client(client);
Thierry Reding9910f5c2014-05-22 09:57:15 +020051 struct drm_device *dev = dev_get_drvdata(client->parent);
Thierry Reding776dc382013-10-14 14:43:22 +020052 struct gr2d *gr2d = to_gr2d(drm);
53 int err;
54
Thierry Reding9910f5c2014-05-22 09:57:15 +020055 err = tegra_drm_unregister_client(dev->dev_private, drm);
Thierry Reding776dc382013-10-14 14:43:22 +020056 if (err < 0)
57 return err;
58
59 host1x_syncpt_free(client->syncpts[0]);
Mikko Perttunen8474b022017-06-15 02:18:42 +030060 host1x_channel_put(gr2d->channel);
Thierry Reding776dc382013-10-14 14:43:22 +020061
Terje Bergstromd43f81c2013-03-22 16:34:09 +020062 return 0;
63}
64
Thierry Reding53fa7f72013-09-24 15:35:40 +020065static const struct host1x_client_ops gr2d_client_ops = {
Thierry Reding776dc382013-10-14 14:43:22 +020066 .init = gr2d_init,
67 .exit = gr2d_exit,
Thierry Reding53fa7f72013-09-24 15:35:40 +020068};
69
70static int gr2d_open_channel(struct tegra_drm_client *client,
Thierry Redingc88c3632013-09-26 16:08:22 +020071 struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020072{
73 struct gr2d *gr2d = to_gr2d(client);
74
75 context->channel = host1x_channel_get(gr2d->channel);
Terje Bergstromd43f81c2013-03-22 16:34:09 +020076 if (!context->channel)
77 return -ENOMEM;
78
79 return 0;
80}
81
Thierry Redingc88c3632013-09-26 16:08:22 +020082static void gr2d_close_channel(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +020083{
84 host1x_channel_put(context->channel);
85}
86
Thierry Redingc1bef812013-09-26 16:09:43 +020087static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset)
88{
89 struct gr2d *gr2d = dev_get_drvdata(dev);
90
91 switch (class) {
92 case HOST1X_CLASS_HOST1X:
93 if (offset == 0x2b)
94 return 1;
95
96 break;
97
98 case HOST1X_CLASS_GR2D:
99 case HOST1X_CLASS_GR2D_SB:
100 if (offset >= GR2D_NUM_REGS)
101 break;
102
103 if (test_bit(offset, gr2d->addr_regs))
104 return 1;
105
106 break;
107 }
108
109 return 0;
110}
111
Dmitry Osipenko0f563a42017-06-15 02:18:37 +0300112static int gr2d_is_valid_class(u32 class)
113{
114 return (class == HOST1X_CLASS_GR2D ||
115 class == HOST1X_CLASS_GR2D_SB);
116}
117
Thierry Reding53fa7f72013-09-24 15:35:40 +0200118static const struct tegra_drm_client_ops gr2d_ops = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200119 .open_channel = gr2d_open_channel,
120 .close_channel = gr2d_close_channel,
Thierry Redingc40f0f12013-10-10 11:00:33 +0200121 .is_addr_reg = gr2d_is_addr_reg,
Dmitry Osipenko0f563a42017-06-15 02:18:37 +0300122 .is_valid_class = gr2d_is_valid_class,
Thierry Redingc40f0f12013-10-10 11:00:33 +0200123 .submit = tegra_drm_submit,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200124};
125
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200126static const struct of_device_id gr2d_match[] = {
127 { .compatible = "nvidia,tegra30-gr2d" },
128 { .compatible = "nvidia,tegra20-gr2d" },
129 { },
130};
Stephen Warrenef707282014-06-18 16:21:55 -0600131MODULE_DEVICE_TABLE(of, gr2d_match);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200132
Thierry Redingc1bef812013-09-26 16:09:43 +0200133static const u32 gr2d_addr_regs[] = {
Thierry Reding497c56a2013-10-07 09:55:57 +0200134 GR2D_UA_BASE_ADDR,
135 GR2D_VA_BASE_ADDR,
136 GR2D_PAT_BASE_ADDR,
137 GR2D_DSTA_BASE_ADDR,
138 GR2D_DSTB_BASE_ADDR,
139 GR2D_DSTC_BASE_ADDR,
140 GR2D_SRCA_BASE_ADDR,
141 GR2D_SRCB_BASE_ADDR,
142 GR2D_SRC_BASE_ADDR_SB,
143 GR2D_DSTA_BASE_ADDR_SB,
144 GR2D_DSTB_BASE_ADDR_SB,
145 GR2D_UA_BASE_ADDR_SB,
146 GR2D_VA_BASE_ADDR_SB,
Thierry Redingc1bef812013-09-26 16:09:43 +0200147};
148
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200149static int gr2d_probe(struct platform_device *pdev)
150{
151 struct device *dev = &pdev->dev;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200152 struct host1x_syncpt **syncpts;
Thierry Redingc1bef812013-09-26 16:09:43 +0200153 struct gr2d *gr2d;
154 unsigned int i;
155 int err;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200156
157 gr2d = devm_kzalloc(dev, sizeof(*gr2d), GFP_KERNEL);
158 if (!gr2d)
159 return -ENOMEM;
160
161 syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
162 if (!syncpts)
163 return -ENOMEM;
164
165 gr2d->clk = devm_clk_get(dev, NULL);
166 if (IS_ERR(gr2d->clk)) {
167 dev_err(dev, "cannot get clock\n");
168 return PTR_ERR(gr2d->clk);
169 }
170
171 err = clk_prepare_enable(gr2d->clk);
172 if (err) {
173 dev_err(dev, "cannot turn on clock\n");
174 return err;
175 }
176
Thierry Reding53fa7f72013-09-24 15:35:40 +0200177 INIT_LIST_HEAD(&gr2d->client.base.list);
178 gr2d->client.base.ops = &gr2d_client_ops;
179 gr2d->client.base.dev = dev;
180 gr2d->client.base.class = HOST1X_CLASS_GR2D;
181 gr2d->client.base.syncpts = syncpts;
182 gr2d->client.base.num_syncpts = 1;
Thierry Reding776dc382013-10-14 14:43:22 +0200183
184 INIT_LIST_HEAD(&gr2d->client.list);
Thierry Reding53fa7f72013-09-24 15:35:40 +0200185 gr2d->client.ops = &gr2d_ops;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200186
Thierry Reding776dc382013-10-14 14:43:22 +0200187 err = host1x_client_register(&gr2d->client.base);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200188 if (err < 0) {
189 dev_err(dev, "failed to register host1x client: %d\n", err);
Wei Yongjunb0084032013-10-21 13:38:34 +0800190 clk_disable_unprepare(gr2d->clk);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200191 return err;
192 }
193
Thierry Redingc1bef812013-09-26 16:09:43 +0200194 /* initialize address register map */
195 for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
196 set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200197
198 platform_set_drvdata(pdev, gr2d);
199
200 return 0;
201}
202
Thierry Redingc1bef812013-09-26 16:09:43 +0200203static int gr2d_remove(struct platform_device *pdev)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200204{
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200205 struct gr2d *gr2d = platform_get_drvdata(pdev);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200206 int err;
207
Thierry Reding776dc382013-10-14 14:43:22 +0200208 err = host1x_client_unregister(&gr2d->client.base);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200209 if (err < 0) {
Thierry Redingc1bef812013-09-26 16:09:43 +0200210 dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
211 err);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200212 return err;
213 }
214
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200215 clk_disable_unprepare(gr2d->clk);
216
217 return 0;
218}
219
220struct platform_driver tegra_gr2d_driver = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200221 .driver = {
Thierry Redinga137ce32013-10-14 14:44:54 +0200222 .name = "tegra-gr2d",
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200223 .of_match_table = gr2d_match,
Thierry Redingc1bef812013-09-26 16:09:43 +0200224 },
225 .probe = gr2d_probe,
226 .remove = gr2d_remove,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200227};