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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Thierry Reding776dc382013-10-14 14:43:22 +020010#include <linux/host1x.h>
Thierry Redingbdd2f9c2017-03-09 20:04:55 +010011#include <linux/idr.h>
Thierry Redingdf06b752014-06-26 21:41:53 +020012#include <linux/iommu.h>
Thierry Reding776dc382013-10-14 14:43:22 +020013
Thierry Reding1503ca42014-11-24 17:41:23 +010014#include <drm/drm_atomic.h>
Thierry Reding07866962014-11-24 17:08:06 +010015#include <drm/drm_atomic_helper.h>
16
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000017#include "drm.h"
Arto Merilainende2ba662013-03-22 16:34:08 +020018#include "gem.h"
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000019
20#define DRIVER_NAME "tegra"
21#define DRIVER_DESC "NVIDIA Tegra graphics"
22#define DRIVER_DATE "20120330"
23#define DRIVER_MAJOR 0
24#define DRIVER_MINOR 0
25#define DRIVER_PATCHLEVEL 0
26
Thierry Reding08943e62013-09-26 16:08:18 +020027struct tegra_drm_file {
Thierry Redingbdd2f9c2017-03-09 20:04:55 +010028 struct idr contexts;
29 struct mutex lock;
Thierry Reding08943e62013-09-26 16:08:18 +020030};
31
Thierry Reding1503ca42014-11-24 17:41:23 +010032static void tegra_atomic_schedule(struct tegra_drm *tegra,
33 struct drm_atomic_state *state)
34{
35 tegra->commit.state = state;
36 schedule_work(&tegra->commit.work);
37}
38
39static void tegra_atomic_complete(struct tegra_drm *tegra,
40 struct drm_atomic_state *state)
41{
42 struct drm_device *drm = tegra->drm;
43
44 /*
45 * Everything below can be run asynchronously without the need to grab
46 * any modeset locks at all under one condition: It must be guaranteed
47 * that the asynchronous work has either been cancelled (if the driver
48 * supports it, which at least requires that the framebuffers get
49 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
50 * before the new state gets committed on the software side with
51 * drm_atomic_helper_swap_state().
52 *
53 * This scheme allows new atomic state updates to be prepared and
54 * checked in parallel to the asynchronous completion of the previous
55 * update. Which is important since compositors need to figure out the
56 * composition of the next frame right after having submitted the
57 * current layout.
58 */
59
Daniel Vetter1af434a2015-02-22 12:24:19 +010060 drm_atomic_helper_commit_modeset_disables(drm, state);
Daniel Vetter1af434a2015-02-22 12:24:19 +010061 drm_atomic_helper_commit_modeset_enables(drm, state);
Liu Ying2b58e982016-08-29 17:12:03 +080062 drm_atomic_helper_commit_planes(drm, state,
63 DRM_PLANE_COMMIT_ACTIVE_ONLY);
Thierry Reding1503ca42014-11-24 17:41:23 +010064
65 drm_atomic_helper_wait_for_vblanks(drm, state);
66
67 drm_atomic_helper_cleanup_planes(drm, state);
Chris Wilson08536952016-10-14 13:18:18 +010068 drm_atomic_state_put(state);
Thierry Reding1503ca42014-11-24 17:41:23 +010069}
70
71static void tegra_atomic_work(struct work_struct *work)
72{
73 struct tegra_drm *tegra = container_of(work, struct tegra_drm,
74 commit.work);
75
76 tegra_atomic_complete(tegra, tegra->commit.state);
77}
78
79static int tegra_atomic_commit(struct drm_device *drm,
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020080 struct drm_atomic_state *state, bool nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +010081{
82 struct tegra_drm *tegra = drm->dev_private;
83 int err;
84
85 err = drm_atomic_helper_prepare_planes(drm, state);
86 if (err)
87 return err;
88
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020089 /* serialize outstanding nonblocking commits */
Thierry Reding1503ca42014-11-24 17:41:23 +010090 mutex_lock(&tegra->commit.lock);
91 flush_work(&tegra->commit.work);
92
93 /*
94 * This is the point of no return - everything below never fails except
95 * when the hw goes bonghits. Which means we can commit the new state on
96 * the software side now.
97 */
98
Daniel Vetter5e84c262016-06-10 00:06:32 +020099 drm_atomic_helper_swap_state(state, true);
Thierry Reding1503ca42014-11-24 17:41:23 +0100100
Chris Wilson08536952016-10-14 13:18:18 +0100101 drm_atomic_state_get(state);
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +0200102 if (nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +0100103 tegra_atomic_schedule(tegra, state);
104 else
105 tegra_atomic_complete(tegra, state);
106
107 mutex_unlock(&tegra->commit.lock);
108 return 0;
109}
110
Thierry Redingf9914212014-11-26 13:03:57 +0100111static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
112 .fb_create = tegra_fb_create,
Archit Tanejab110ef32015-10-27 13:40:59 +0530113#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Redingf9914212014-11-26 13:03:57 +0100114 .output_poll_changed = tegra_fb_output_poll_changed,
115#endif
Thierry Reding07866962014-11-24 17:08:06 +0100116 .atomic_check = drm_atomic_helper_check,
Thierry Reding1503ca42014-11-24 17:41:23 +0100117 .atomic_commit = tegra_atomic_commit,
Thierry Redingf9914212014-11-26 13:03:57 +0100118};
119
Thierry Reding776dc382013-10-14 14:43:22 +0200120static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000121{
Thierry Reding776dc382013-10-14 14:43:22 +0200122 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Reding386a2a72013-09-24 13:22:17 +0200123 struct tegra_drm *tegra;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000124 int err;
125
Thierry Reding776dc382013-10-14 14:43:22 +0200126 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
Thierry Reding386a2a72013-09-24 13:22:17 +0200127 if (!tegra)
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200128 return -ENOMEM;
129
Thierry Redingdf06b752014-06-26 21:41:53 +0200130 if (iommu_present(&platform_bus_type)) {
Thierry Reding4553f732015-01-19 16:15:04 +0100131 struct iommu_domain_geometry *geometry;
132 u64 start, end;
133
Thierry Redingdf06b752014-06-26 21:41:53 +0200134 tegra->domain = iommu_domain_alloc(&platform_bus_type);
Dan Carpenterbf19b882014-12-04 14:00:35 +0300135 if (!tegra->domain) {
136 err = -ENOMEM;
Thierry Redingdf06b752014-06-26 21:41:53 +0200137 goto free;
138 }
139
Thierry Reding4553f732015-01-19 16:15:04 +0100140 geometry = &tegra->domain->geometry;
141 start = geometry->aperture_start;
142 end = geometry->aperture_end;
143
Thierry Redingd2d8c352015-11-23 16:46:30 +0100144 DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n",
145 start, end);
Thierry Reding4553f732015-01-19 16:15:04 +0100146 drm_mm_init(&tegra->mm, start, end - start + 1);
Thierry Reding347ad49d2017-03-09 20:04:56 +0100147 mutex_init(&tegra->mm_lock);
Thierry Redingdf06b752014-06-26 21:41:53 +0200148 }
149
Thierry Reding386a2a72013-09-24 13:22:17 +0200150 mutex_init(&tegra->clients_lock);
151 INIT_LIST_HEAD(&tegra->clients);
Thierry Reding1503ca42014-11-24 17:41:23 +0100152
153 mutex_init(&tegra->commit.lock);
154 INIT_WORK(&tegra->commit.work, tegra_atomic_work);
155
Thierry Reding386a2a72013-09-24 13:22:17 +0200156 drm->dev_private = tegra;
157 tegra->drm = drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000158
159 drm_mode_config_init(drm);
160
Thierry Redingf9914212014-11-26 13:03:57 +0100161 drm->mode_config.min_width = 0;
162 drm->mode_config.min_height = 0;
163
164 drm->mode_config.max_width = 4096;
165 drm->mode_config.max_height = 4096;
166
Alexandre Courbot5e911442016-11-08 16:50:42 +0900167 drm->mode_config.allow_fb_modifiers = true;
168
Thierry Redingf9914212014-11-26 13:03:57 +0100169 drm->mode_config.funcs = &tegra_drm_mode_funcs;
170
Thierry Redinge2215322014-06-27 17:19:25 +0200171 err = tegra_drm_fb_prepare(drm);
172 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100173 goto config;
Thierry Redinge2215322014-06-27 17:19:25 +0200174
175 drm_kms_helper_poll_init(drm);
176
Thierry Reding776dc382013-10-14 14:43:22 +0200177 err = host1x_device_init(device);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000178 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100179 goto fbdev;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000180
Thierry Reding603f0cc2013-04-22 21:22:14 +0200181 /*
182 * We don't use the drm_irq_install() helpers provided by the DRM
183 * core, so we need to set this manually in order to allow the
184 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
185 */
Ville Syrjälä44238432013-10-04 14:53:37 +0300186 drm->irq_enabled = true;
Thierry Reding603f0cc2013-04-22 21:22:14 +0200187
Thierry Reding42e9ce02015-01-28 14:43:05 +0100188 /* syncpoints are used for full 32-bit hardware VBLANK counters */
Thierry Reding42e9ce02015-01-28 14:43:05 +0100189 drm->max_vblank_count = 0xffffffff;
190
Thierry Reding6e5ff992012-11-28 11:45:47 +0100191 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
192 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100193 goto device;
Thierry Reding6e5ff992012-11-28 11:45:47 +0100194
Thierry Reding31930d42015-07-02 17:04:06 +0200195 drm_mode_config_reset(drm);
196
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000197 err = tegra_drm_fb_init(drm);
198 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100199 goto vblank;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000200
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000201 return 0;
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100202
203vblank:
204 drm_vblank_cleanup(drm);
205device:
206 host1x_device_exit(device);
207fbdev:
208 drm_kms_helper_poll_fini(drm);
209 tegra_drm_fb_free(drm);
210config:
211 drm_mode_config_cleanup(drm);
Thierry Redingdf06b752014-06-26 21:41:53 +0200212
213 if (tegra->domain) {
214 iommu_domain_free(tegra->domain);
215 drm_mm_takedown(&tegra->mm);
Thierry Reding347ad49d2017-03-09 20:04:56 +0100216 mutex_destroy(&tegra->mm_lock);
Thierry Redingdf06b752014-06-26 21:41:53 +0200217 }
218free:
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100219 kfree(tegra);
220 return err;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000221}
222
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200223static void tegra_drm_unload(struct drm_device *drm)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000224{
Thierry Reding776dc382013-10-14 14:43:22 +0200225 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Redingdf06b752014-06-26 21:41:53 +0200226 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding776dc382013-10-14 14:43:22 +0200227 int err;
228
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000229 drm_kms_helper_poll_fini(drm);
230 tegra_drm_fb_exit(drm);
Thierry Redingf002abc2013-10-14 14:06:02 +0200231 drm_mode_config_cleanup(drm);
Thierry Reding4aa3df72014-11-24 16:27:13 +0100232 drm_vblank_cleanup(drm);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000233
Thierry Reding776dc382013-10-14 14:43:22 +0200234 err = host1x_device_exit(device);
235 if (err < 0)
Gabriel Krisman Bertazi11b3c202017-01-06 15:57:31 -0200236 return;
Thierry Reding776dc382013-10-14 14:43:22 +0200237
Thierry Redingdf06b752014-06-26 21:41:53 +0200238 if (tegra->domain) {
239 iommu_domain_free(tegra->domain);
240 drm_mm_takedown(&tegra->mm);
Thierry Reding347ad49d2017-03-09 20:04:56 +0100241 mutex_destroy(&tegra->mm_lock);
Thierry Redingdf06b752014-06-26 21:41:53 +0200242 }
243
Thierry Reding1053f4dd2014-11-04 16:17:55 +0100244 kfree(tegra);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000245}
246
247static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
248{
Thierry Reding08943e62013-09-26 16:08:18 +0200249 struct tegra_drm_file *fpriv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200250
251 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
252 if (!fpriv)
253 return -ENOMEM;
254
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100255 idr_init(&fpriv->contexts);
256 mutex_init(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200257 filp->driver_priv = fpriv;
258
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000259 return 0;
260}
261
Thierry Redingc88c3632013-09-26 16:08:22 +0200262static void tegra_drm_context_free(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200263{
264 context->client->ops->close_channel(context);
265 kfree(context);
266}
267
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000268static void tegra_drm_lastclose(struct drm_device *drm)
269{
Archit Tanejab110ef32015-10-27 13:40:59 +0530270#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Reding386a2a72013-09-24 13:22:17 +0200271 struct tegra_drm *tegra = drm->dev_private;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000272
Thierry Reding386a2a72013-09-24 13:22:17 +0200273 tegra_fbdev_restore_mode(tegra->fbdev);
Thierry Reding60c2f702013-10-31 13:28:50 +0100274#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000275}
276
Thierry Redingc40f0f12013-10-10 11:00:33 +0200277static struct host1x_bo *
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100278host1x_bo_lookup(struct drm_file *file, u32 handle)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200279{
280 struct drm_gem_object *gem;
281 struct tegra_bo *bo;
282
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100283 gem = drm_gem_object_lookup(file, handle);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200284 if (!gem)
285 return NULL;
286
Daniel Vettera07cdfe2015-11-23 10:32:48 +0100287 drm_gem_object_unreference_unlocked(gem);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200288
289 bo = to_tegra_bo(gem);
290 return &bo->base;
291}
292
Thierry Reding961e3be2014-06-10 10:25:00 +0200293static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
294 struct drm_tegra_reloc __user *src,
295 struct drm_device *drm,
296 struct drm_file *file)
297{
298 u32 cmdbuf, target;
299 int err;
300
301 err = get_user(cmdbuf, &src->cmdbuf.handle);
302 if (err < 0)
303 return err;
304
305 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
306 if (err < 0)
307 return err;
308
309 err = get_user(target, &src->target.handle);
310 if (err < 0)
311 return err;
312
David Ung31f40f82015-01-20 18:37:35 -0800313 err = get_user(dest->target.offset, &src->target.offset);
Thierry Reding961e3be2014-06-10 10:25:00 +0200314 if (err < 0)
315 return err;
316
317 err = get_user(dest->shift, &src->shift);
318 if (err < 0)
319 return err;
320
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100321 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
Thierry Reding961e3be2014-06-10 10:25:00 +0200322 if (!dest->cmdbuf.bo)
323 return -ENOENT;
324
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100325 dest->target.bo = host1x_bo_lookup(file, target);
Thierry Reding961e3be2014-06-10 10:25:00 +0200326 if (!dest->target.bo)
327 return -ENOENT;
328
329 return 0;
330}
331
Thierry Redingc40f0f12013-10-10 11:00:33 +0200332int tegra_drm_submit(struct tegra_drm_context *context,
333 struct drm_tegra_submit *args, struct drm_device *drm,
334 struct drm_file *file)
335{
336 unsigned int num_cmdbufs = args->num_cmdbufs;
337 unsigned int num_relocs = args->num_relocs;
338 unsigned int num_waitchks = args->num_waitchks;
339 struct drm_tegra_cmdbuf __user *cmdbufs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100340 (void __user *)(uintptr_t)args->cmdbufs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200341 struct drm_tegra_reloc __user *relocs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100342 (void __user *)(uintptr_t)args->relocs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200343 struct drm_tegra_waitchk __user *waitchks =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100344 (void __user *)(uintptr_t)args->waitchks;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200345 struct drm_tegra_syncpt syncpt;
346 struct host1x_job *job;
347 int err;
348
349 /* We don't yet support other than one syncpt_incr struct per submit */
350 if (args->num_syncpts != 1)
351 return -EINVAL;
352
353 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
354 args->num_relocs, args->num_waitchks);
355 if (!job)
356 return -ENOMEM;
357
358 job->num_relocs = args->num_relocs;
359 job->num_waitchk = args->num_waitchks;
360 job->client = (u32)args->context;
361 job->class = context->client->base.class;
362 job->serialize = true;
363
364 while (num_cmdbufs) {
365 struct drm_tegra_cmdbuf cmdbuf;
366 struct host1x_bo *bo;
367
Dan Carpenter9a991602013-11-08 13:07:37 +0300368 if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
369 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200370 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300371 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200372
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100373 bo = host1x_bo_lookup(file, cmdbuf.handle);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200374 if (!bo) {
375 err = -ENOENT;
376 goto fail;
377 }
378
379 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
380 num_cmdbufs--;
381 cmdbufs++;
382 }
383
Thierry Reding961e3be2014-06-10 10:25:00 +0200384 /* copy and resolve relocations from submit */
Thierry Redingc40f0f12013-10-10 11:00:33 +0200385 while (num_relocs--) {
Thierry Reding961e3be2014-06-10 10:25:00 +0200386 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
387 &relocs[num_relocs], drm,
388 file);
389 if (err < 0)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200390 goto fail;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200391 }
392
Dan Carpenter9a991602013-11-08 13:07:37 +0300393 if (copy_from_user(job->waitchk, waitchks,
394 sizeof(*waitchks) * num_waitchks)) {
395 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200396 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300397 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200398
Dan Carpenter9a991602013-11-08 13:07:37 +0300399 if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
400 sizeof(syncpt))) {
401 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200402 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300403 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200404
405 job->is_addr_reg = context->client->ops->is_addr_reg;
406 job->syncpt_incrs = syncpt.incrs;
407 job->syncpt_id = syncpt.id;
408 job->timeout = 10000;
409
410 if (args->timeout && args->timeout < 10000)
411 job->timeout = args->timeout;
412
413 err = host1x_job_pin(job, context->client->base.dev);
414 if (err)
415 goto fail;
416
417 err = host1x_job_submit(job);
418 if (err)
419 goto fail_submit;
420
421 args->fence = job->syncpt_end;
422
423 host1x_job_put(job);
424 return 0;
425
426fail_submit:
427 host1x_job_unpin(job);
428fail:
429 host1x_job_put(job);
430 return err;
431}
432
433
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200434#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100435static struct tegra_drm_context *
436tegra_drm_file_get_context(struct tegra_drm_file *file, u32 id)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200437{
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100438 struct tegra_drm_context *context;
Thierry Redingc88c3632013-09-26 16:08:22 +0200439
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100440 mutex_lock(&file->lock);
441 context = idr_find(&file->contexts, id);
442 mutex_unlock(&file->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200443
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100444 return context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200445}
446
447static int tegra_gem_create(struct drm_device *drm, void *data,
448 struct drm_file *file)
449{
450 struct drm_tegra_gem_create *args = data;
451 struct tegra_bo *bo;
452
Thierry Reding773af772013-10-04 22:34:01 +0200453 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200454 &args->handle);
455 if (IS_ERR(bo))
456 return PTR_ERR(bo);
457
458 return 0;
459}
460
461static int tegra_gem_mmap(struct drm_device *drm, void *data,
462 struct drm_file *file)
463{
464 struct drm_tegra_gem_mmap *args = data;
465 struct drm_gem_object *gem;
466 struct tegra_bo *bo;
467
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100468 gem = drm_gem_object_lookup(file, args->handle);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200469 if (!gem)
470 return -EINVAL;
471
472 bo = to_tegra_bo(gem);
473
David Herrmann2bc7b0c2013-08-13 14:19:58 +0200474 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200475
Daniel Vetter11533302015-11-23 10:32:40 +0100476 drm_gem_object_unreference_unlocked(gem);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200477
478 return 0;
479}
480
481static int tegra_syncpt_read(struct drm_device *drm, void *data,
482 struct drm_file *file)
483{
Thierry Reding776dc382013-10-14 14:43:22 +0200484 struct host1x *host = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200485 struct drm_tegra_syncpt_read *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200486 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200487
Thierry Reding776dc382013-10-14 14:43:22 +0200488 sp = host1x_syncpt_get(host, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200489 if (!sp)
490 return -EINVAL;
491
492 args->value = host1x_syncpt_read_min(sp);
493 return 0;
494}
495
496static int tegra_syncpt_incr(struct drm_device *drm, void *data,
497 struct drm_file *file)
498{
Thierry Reding776dc382013-10-14 14:43:22 +0200499 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200500 struct drm_tegra_syncpt_incr *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200501 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200502
Thierry Reding776dc382013-10-14 14:43:22 +0200503 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200504 if (!sp)
505 return -EINVAL;
506
Arto Merilainenebae30b2013-05-29 13:26:08 +0300507 return host1x_syncpt_incr(sp);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200508}
509
510static int tegra_syncpt_wait(struct drm_device *drm, void *data,
511 struct drm_file *file)
512{
Thierry Reding776dc382013-10-14 14:43:22 +0200513 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200514 struct drm_tegra_syncpt_wait *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200515 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200516
Thierry Reding776dc382013-10-14 14:43:22 +0200517 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200518 if (!sp)
519 return -EINVAL;
520
521 return host1x_syncpt_wait(sp, args->thresh, args->timeout,
522 &args->value);
523}
524
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100525static int tegra_client_open(struct tegra_drm_file *fpriv,
526 struct tegra_drm_client *client,
527 struct tegra_drm_context *context)
528{
529 int err;
530
531 err = client->ops->open_channel(client, context);
532 if (err < 0)
533 return err;
534
535 err = idr_alloc(&fpriv->contexts, context, 0, 0, GFP_KERNEL);
536 if (err < 0) {
537 client->ops->close_channel(context);
538 return err;
539 }
540
541 context->client = client;
542 context->id = err;
543
544 return 0;
545}
546
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200547static int tegra_open_channel(struct drm_device *drm, void *data,
548 struct drm_file *file)
549{
Thierry Reding08943e62013-09-26 16:08:18 +0200550 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding386a2a72013-09-24 13:22:17 +0200551 struct tegra_drm *tegra = drm->dev_private;
552 struct drm_tegra_open_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200553 struct tegra_drm_context *context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200554 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200555 int err = -ENODEV;
556
557 context = kzalloc(sizeof(*context), GFP_KERNEL);
558 if (!context)
559 return -ENOMEM;
560
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100561 mutex_lock(&fpriv->lock);
562
Thierry Reding776dc382013-10-14 14:43:22 +0200563 list_for_each_entry(client, &tegra->clients, list)
Thierry Reding53fa7f72013-09-24 15:35:40 +0200564 if (client->base.class == args->client) {
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100565 err = tegra_client_open(fpriv, client, context);
566 if (err < 0)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200567 break;
568
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100569 args->context = context->id;
570 break;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200571 }
572
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100573 if (err < 0)
574 kfree(context);
575
576 mutex_unlock(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200577 return err;
578}
579
580static int tegra_close_channel(struct drm_device *drm, void *data,
581 struct drm_file *file)
582{
Thierry Reding08943e62013-09-26 16:08:18 +0200583 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding776dc382013-10-14 14:43:22 +0200584 struct drm_tegra_close_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200585 struct tegra_drm_context *context;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100586 int err = 0;
Thierry Redingc88c3632013-09-26 16:08:22 +0200587
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100588 mutex_lock(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200589
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100590 context = tegra_drm_file_get_context(fpriv, args->context);
591 if (!context) {
592 err = -EINVAL;
593 goto unlock;
594 }
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200595
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100596 idr_remove(&fpriv->contexts, context->id);
Thierry Redingc88c3632013-09-26 16:08:22 +0200597 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200598
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100599unlock:
600 mutex_unlock(&fpriv->lock);
601 return err;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200602}
603
604static int tegra_get_syncpt(struct drm_device *drm, void *data,
605 struct drm_file *file)
606{
Thierry Reding08943e62013-09-26 16:08:18 +0200607 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200608 struct drm_tegra_get_syncpt *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200609 struct tegra_drm_context *context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200610 struct host1x_syncpt *syncpt;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100611 int err = 0;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200612
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100613 mutex_lock(&fpriv->lock);
Thierry Redingc88c3632013-09-26 16:08:22 +0200614
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100615 context = tegra_drm_file_get_context(fpriv, args->context);
616 if (!context) {
617 err = -ENODEV;
618 goto unlock;
619 }
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200620
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100621 if (args->index >= context->client->base.num_syncpts) {
622 err = -EINVAL;
623 goto unlock;
624 }
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200625
Thierry Reding53fa7f72013-09-24 15:35:40 +0200626 syncpt = context->client->base.syncpts[args->index];
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200627 args->id = host1x_syncpt_id(syncpt);
628
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100629unlock:
630 mutex_unlock(&fpriv->lock);
631 return err;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200632}
633
634static int tegra_submit(struct drm_device *drm, void *data,
635 struct drm_file *file)
636{
Thierry Reding08943e62013-09-26 16:08:18 +0200637 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200638 struct drm_tegra_submit *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200639 struct tegra_drm_context *context;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100640 int err;
Thierry Redingc88c3632013-09-26 16:08:22 +0200641
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100642 mutex_lock(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200643
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100644 context = tegra_drm_file_get_context(fpriv, args->context);
645 if (!context) {
646 err = -ENODEV;
647 goto unlock;
648 }
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200649
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100650 err = context->client->ops->submit(context, args, drm, file);
651
652unlock:
653 mutex_unlock(&fpriv->lock);
654 return err;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200655}
Arto Merilainenc54a1692013-10-14 15:21:54 +0300656
657static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
658 struct drm_file *file)
659{
660 struct tegra_drm_file *fpriv = file->driver_priv;
661 struct drm_tegra_get_syncpt_base *args = data;
662 struct tegra_drm_context *context;
663 struct host1x_syncpt_base *base;
664 struct host1x_syncpt *syncpt;
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100665 int err = 0;
Arto Merilainenc54a1692013-10-14 15:21:54 +0300666
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100667 mutex_lock(&fpriv->lock);
Arto Merilainenc54a1692013-10-14 15:21:54 +0300668
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100669 context = tegra_drm_file_get_context(fpriv, args->context);
670 if (!context) {
671 err = -ENODEV;
672 goto unlock;
673 }
Arto Merilainenc54a1692013-10-14 15:21:54 +0300674
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100675 if (args->syncpt >= context->client->base.num_syncpts) {
676 err = -EINVAL;
677 goto unlock;
678 }
Arto Merilainenc54a1692013-10-14 15:21:54 +0300679
680 syncpt = context->client->base.syncpts[args->syncpt];
681
682 base = host1x_syncpt_get_base(syncpt);
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100683 if (!base) {
684 err = -ENXIO;
685 goto unlock;
686 }
Arto Merilainenc54a1692013-10-14 15:21:54 +0300687
688 args->id = host1x_syncpt_base_id(base);
689
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100690unlock:
691 mutex_unlock(&fpriv->lock);
692 return err;
Arto Merilainenc54a1692013-10-14 15:21:54 +0300693}
Thierry Reding7678d712014-06-03 14:56:57 +0200694
695static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
696 struct drm_file *file)
697{
698 struct drm_tegra_gem_set_tiling *args = data;
699 enum tegra_bo_tiling_mode mode;
700 struct drm_gem_object *gem;
701 unsigned long value = 0;
702 struct tegra_bo *bo;
703
704 switch (args->mode) {
705 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
706 mode = TEGRA_BO_TILING_MODE_PITCH;
707
708 if (args->value != 0)
709 return -EINVAL;
710
711 break;
712
713 case DRM_TEGRA_GEM_TILING_MODE_TILED:
714 mode = TEGRA_BO_TILING_MODE_TILED;
715
716 if (args->value != 0)
717 return -EINVAL;
718
719 break;
720
721 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
722 mode = TEGRA_BO_TILING_MODE_BLOCK;
723
724 if (args->value > 5)
725 return -EINVAL;
726
727 value = args->value;
728 break;
729
730 default:
731 return -EINVAL;
732 }
733
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100734 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7678d712014-06-03 14:56:57 +0200735 if (!gem)
736 return -ENOENT;
737
738 bo = to_tegra_bo(gem);
739
740 bo->tiling.mode = mode;
741 bo->tiling.value = value;
742
Daniel Vetter11533302015-11-23 10:32:40 +0100743 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200744
745 return 0;
746}
747
748static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
749 struct drm_file *file)
750{
751 struct drm_tegra_gem_get_tiling *args = data;
752 struct drm_gem_object *gem;
753 struct tegra_bo *bo;
754 int err = 0;
755
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100756 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7678d712014-06-03 14:56:57 +0200757 if (!gem)
758 return -ENOENT;
759
760 bo = to_tegra_bo(gem);
761
762 switch (bo->tiling.mode) {
763 case TEGRA_BO_TILING_MODE_PITCH:
764 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
765 args->value = 0;
766 break;
767
768 case TEGRA_BO_TILING_MODE_TILED:
769 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
770 args->value = 0;
771 break;
772
773 case TEGRA_BO_TILING_MODE_BLOCK:
774 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
775 args->value = bo->tiling.value;
776 break;
777
778 default:
779 err = -EINVAL;
780 break;
781 }
782
Daniel Vetter11533302015-11-23 10:32:40 +0100783 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200784
785 return err;
786}
Thierry Reding7b129082014-06-10 12:04:03 +0200787
788static int tegra_gem_set_flags(struct drm_device *drm, void *data,
789 struct drm_file *file)
790{
791 struct drm_tegra_gem_set_flags *args = data;
792 struct drm_gem_object *gem;
793 struct tegra_bo *bo;
794
795 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
796 return -EINVAL;
797
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100798 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7b129082014-06-10 12:04:03 +0200799 if (!gem)
800 return -ENOENT;
801
802 bo = to_tegra_bo(gem);
803 bo->flags = 0;
804
805 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
806 bo->flags |= TEGRA_BO_BOTTOM_UP;
807
Daniel Vetter11533302015-11-23 10:32:40 +0100808 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200809
810 return 0;
811}
812
813static int tegra_gem_get_flags(struct drm_device *drm, void *data,
814 struct drm_file *file)
815{
816 struct drm_tegra_gem_get_flags *args = data;
817 struct drm_gem_object *gem;
818 struct tegra_bo *bo;
819
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100820 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7b129082014-06-10 12:04:03 +0200821 if (!gem)
822 return -ENOENT;
823
824 bo = to_tegra_bo(gem);
825 args->flags = 0;
826
827 if (bo->flags & TEGRA_BO_BOTTOM_UP)
828 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
829
Daniel Vetter11533302015-11-23 10:32:40 +0100830 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200831
832 return 0;
833}
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200834#endif
835
Rob Clarkbaa70942013-08-02 13:27:49 -0400836static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200837#ifdef CONFIG_DRM_TEGRA_STAGING
Daniel Vetterf8c47142015-09-08 13:56:30 +0200838 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0),
839 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0),
840 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0),
841 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0),
842 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0),
843 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0),
844 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0),
845 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0),
846 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0),
847 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0),
848 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0),
849 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0),
850 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0),
851 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200852#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000853};
854
855static const struct file_operations tegra_drm_fops = {
856 .owner = THIS_MODULE,
857 .open = drm_open,
858 .release = drm_release,
859 .unlocked_ioctl = drm_ioctl,
Arto Merilainende2ba662013-03-22 16:34:08 +0200860 .mmap = tegra_drm_mmap,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000861 .poll = drm_poll,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000862 .read = drm_read,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000863 .compat_ioctl = drm_compat_ioctl,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000864 .llseek = noop_llseek,
865};
866
Thierry Reding88e72712015-09-24 18:35:31 +0200867static u32 tegra_drm_get_vblank_counter(struct drm_device *drm,
868 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100869{
Shawn Guo75bcb052017-01-09 19:25:44 +0800870 struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
Thierry Reding42e9ce02015-01-28 14:43:05 +0100871 struct tegra_dc *dc = to_tegra_dc(crtc);
Thierry Redinged7dae52014-12-16 16:03:13 +0100872
873 if (!crtc)
874 return 0;
875
Thierry Reding42e9ce02015-01-28 14:43:05 +0100876 return tegra_dc_get_vblank_counter(dc);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100877}
878
Thierry Reding88e72712015-09-24 18:35:31 +0200879static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100880{
Shawn Guo75bcb052017-01-09 19:25:44 +0800881 struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100882 struct tegra_dc *dc = to_tegra_dc(crtc);
883
884 if (!crtc)
885 return -ENODEV;
886
887 tegra_dc_enable_vblank(dc);
888
889 return 0;
890}
891
Thierry Reding88e72712015-09-24 18:35:31 +0200892static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100893{
Shawn Guo75bcb052017-01-09 19:25:44 +0800894 struct drm_crtc *crtc = drm_crtc_from_index(drm, pipe);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100895 struct tegra_dc *dc = to_tegra_dc(crtc);
896
897 if (crtc)
898 tegra_dc_disable_vblank(dc);
899}
900
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100901static int tegra_drm_context_cleanup(int id, void *p, void *data)
902{
903 struct tegra_drm_context *context = p;
904
905 tegra_drm_context_free(context);
906
907 return 0;
908}
909
Thierry Reding3c03c462012-11-28 12:00:18 +0100910static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
911{
Thierry Reding08943e62013-09-26 16:08:18 +0200912 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding3c03c462012-11-28 12:00:18 +0100913
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100914 mutex_lock(&fpriv->lock);
915 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
916 mutex_unlock(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200917
Thierry Redingbdd2f9c2017-03-09 20:04:55 +0100918 idr_destroy(&fpriv->contexts);
919 mutex_destroy(&fpriv->lock);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200920 kfree(fpriv);
Thierry Reding3c03c462012-11-28 12:00:18 +0100921}
922
Thierry Redinge450fcc2013-02-13 16:13:16 +0100923#ifdef CONFIG_DEBUG_FS
924static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
925{
926 struct drm_info_node *node = (struct drm_info_node *)s->private;
927 struct drm_device *drm = node->minor->dev;
928 struct drm_framebuffer *fb;
929
930 mutex_lock(&drm->mode_config.fb_lock);
931
932 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
933 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
Ville Syrjäläb00c6002016-12-14 23:31:35 +0200934 fb->base.id, fb->width, fb->height,
935 fb->format->depth,
Ville Syrjälä272725c2016-12-14 23:32:20 +0200936 fb->format->cpp[0] * 8,
Dave Airlie747a5982016-04-15 15:10:35 +1000937 drm_framebuffer_read_refcount(fb));
Thierry Redinge450fcc2013-02-13 16:13:16 +0100938 }
939
940 mutex_unlock(&drm->mode_config.fb_lock);
941
942 return 0;
943}
944
Thierry Reding28c23372015-01-23 09:16:03 +0100945static int tegra_debugfs_iova(struct seq_file *s, void *data)
946{
947 struct drm_info_node *node = (struct drm_info_node *)s->private;
948 struct drm_device *drm = node->minor->dev;
949 struct tegra_drm *tegra = drm->dev_private;
Daniel Vetterb5c37142016-12-29 12:09:24 +0100950 struct drm_printer p = drm_seq_file_printer(s);
Thierry Reding28c23372015-01-23 09:16:03 +0100951
Thierry Reding347ad49d2017-03-09 20:04:56 +0100952 mutex_lock(&tegra->mm_lock);
Daniel Vetterb5c37142016-12-29 12:09:24 +0100953 drm_mm_print(&tegra->mm, &p);
Thierry Reding347ad49d2017-03-09 20:04:56 +0100954 mutex_unlock(&tegra->mm_lock);
Daniel Vetterb5c37142016-12-29 12:09:24 +0100955
956 return 0;
Thierry Reding28c23372015-01-23 09:16:03 +0100957}
958
Thierry Redinge450fcc2013-02-13 16:13:16 +0100959static struct drm_info_list tegra_debugfs_list[] = {
960 { "framebuffers", tegra_debugfs_framebuffers, 0 },
Thierry Reding28c23372015-01-23 09:16:03 +0100961 { "iova", tegra_debugfs_iova, 0 },
Thierry Redinge450fcc2013-02-13 16:13:16 +0100962};
963
964static int tegra_debugfs_init(struct drm_minor *minor)
965{
966 return drm_debugfs_create_files(tegra_debugfs_list,
967 ARRAY_SIZE(tegra_debugfs_list),
968 minor->debugfs_root, minor);
969}
Thierry Redinge450fcc2013-02-13 16:13:16 +0100970#endif
971
Thierry Reding9b57f5f2013-11-08 13:17:14 +0100972static struct drm_driver tegra_drm_driver = {
Thierry Redingad906592015-09-24 18:38:09 +0200973 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
974 DRIVER_ATOMIC,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000975 .load = tegra_drm_load,
976 .unload = tegra_drm_unload,
977 .open = tegra_drm_open,
Thierry Reding3c03c462012-11-28 12:00:18 +0100978 .preclose = tegra_drm_preclose,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000979 .lastclose = tegra_drm_lastclose,
980
Thierry Reding6e5ff992012-11-28 11:45:47 +0100981 .get_vblank_counter = tegra_drm_get_vblank_counter,
982 .enable_vblank = tegra_drm_enable_vblank,
983 .disable_vblank = tegra_drm_disable_vblank,
984
Thierry Redinge450fcc2013-02-13 16:13:16 +0100985#if defined(CONFIG_DEBUG_FS)
986 .debugfs_init = tegra_debugfs_init,
Thierry Redinge450fcc2013-02-13 16:13:16 +0100987#endif
988
Daniel Vetter1ddbdbd2016-04-26 19:30:00 +0200989 .gem_free_object_unlocked = tegra_bo_free_object,
Arto Merilainende2ba662013-03-22 16:34:08 +0200990 .gem_vm_ops = &tegra_bo_vm_ops,
Thierry Reding38003912013-12-12 10:00:43 +0100991
992 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
993 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
994 .gem_prime_export = tegra_gem_prime_export,
995 .gem_prime_import = tegra_gem_prime_import,
996
Arto Merilainende2ba662013-03-22 16:34:08 +0200997 .dumb_create = tegra_bo_dumb_create,
998 .dumb_map_offset = tegra_bo_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200999 .dumb_destroy = drm_gem_dumb_destroy,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001000
1001 .ioctls = tegra_drm_ioctls,
1002 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
1003 .fops = &tegra_drm_fops,
1004
1005 .name = DRIVER_NAME,
1006 .desc = DRIVER_DESC,
1007 .date = DRIVER_DATE,
1008 .major = DRIVER_MAJOR,
1009 .minor = DRIVER_MINOR,
1010 .patchlevel = DRIVER_PATCHLEVEL,
1011};
Thierry Reding776dc382013-10-14 14:43:22 +02001012
1013int tegra_drm_register_client(struct tegra_drm *tegra,
1014 struct tegra_drm_client *client)
1015{
1016 mutex_lock(&tegra->clients_lock);
1017 list_add_tail(&client->list, &tegra->clients);
1018 mutex_unlock(&tegra->clients_lock);
1019
1020 return 0;
1021}
1022
1023int tegra_drm_unregister_client(struct tegra_drm *tegra,
1024 struct tegra_drm_client *client)
1025{
1026 mutex_lock(&tegra->clients_lock);
1027 list_del_init(&client->list);
1028 mutex_unlock(&tegra->clients_lock);
1029
1030 return 0;
1031}
1032
Thierry Reding9910f5c2014-05-22 09:57:15 +02001033static int host1x_drm_probe(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +02001034{
Thierry Reding9910f5c2014-05-22 09:57:15 +02001035 struct drm_driver *driver = &tegra_drm_driver;
1036 struct drm_device *drm;
1037 int err;
1038
1039 drm = drm_dev_alloc(driver, &dev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +02001040 if (IS_ERR(drm))
1041 return PTR_ERR(drm);
Thierry Reding9910f5c2014-05-22 09:57:15 +02001042
Thierry Reding9910f5c2014-05-22 09:57:15 +02001043 dev_set_drvdata(&dev->dev, drm);
1044
1045 err = drm_dev_register(drm, 0);
1046 if (err < 0)
1047 goto unref;
1048
Thierry Reding9910f5c2014-05-22 09:57:15 +02001049 return 0;
1050
1051unref:
1052 drm_dev_unref(drm);
1053 return err;
Thierry Reding776dc382013-10-14 14:43:22 +02001054}
1055
Thierry Reding9910f5c2014-05-22 09:57:15 +02001056static int host1x_drm_remove(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +02001057{
Thierry Reding9910f5c2014-05-22 09:57:15 +02001058 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1059
1060 drm_dev_unregister(drm);
1061 drm_dev_unref(drm);
Thierry Reding776dc382013-10-14 14:43:22 +02001062
1063 return 0;
1064}
1065
Thierry Reding359ae682014-12-18 17:15:25 +01001066#ifdef CONFIG_PM_SLEEP
1067static int host1x_drm_suspend(struct device *dev)
1068{
1069 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001070 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001071
1072 drm_kms_helper_poll_disable(drm);
Thierry Reding986c58d2015-08-11 13:11:49 +02001073 tegra_drm_fb_suspend(drm);
1074
1075 tegra->state = drm_atomic_helper_suspend(drm);
1076 if (IS_ERR(tegra->state)) {
1077 tegra_drm_fb_resume(drm);
1078 drm_kms_helper_poll_enable(drm);
1079 return PTR_ERR(tegra->state);
1080 }
Thierry Reding359ae682014-12-18 17:15:25 +01001081
1082 return 0;
1083}
1084
1085static int host1x_drm_resume(struct device *dev)
1086{
1087 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001088 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001089
Thierry Reding986c58d2015-08-11 13:11:49 +02001090 drm_atomic_helper_resume(drm, tegra->state);
1091 tegra_drm_fb_resume(drm);
Thierry Reding359ae682014-12-18 17:15:25 +01001092 drm_kms_helper_poll_enable(drm);
1093
1094 return 0;
1095}
1096#endif
1097
Thierry Redinga13f1dc2015-08-11 13:22:44 +02001098static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1099 host1x_drm_resume);
Thierry Reding359ae682014-12-18 17:15:25 +01001100
Thierry Reding776dc382013-10-14 14:43:22 +02001101static const struct of_device_id host1x_drm_subdevs[] = {
1102 { .compatible = "nvidia,tegra20-dc", },
1103 { .compatible = "nvidia,tegra20-hdmi", },
1104 { .compatible = "nvidia,tegra20-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001105 { .compatible = "nvidia,tegra20-gr3d", },
Thierry Reding776dc382013-10-14 14:43:22 +02001106 { .compatible = "nvidia,tegra30-dc", },
1107 { .compatible = "nvidia,tegra30-hdmi", },
1108 { .compatible = "nvidia,tegra30-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001109 { .compatible = "nvidia,tegra30-gr3d", },
Thierry Redingdec72732013-09-03 08:45:46 +02001110 { .compatible = "nvidia,tegra114-dsi", },
Mikko Perttunen7d1d28a2013-09-30 16:54:47 +02001111 { .compatible = "nvidia,tegra114-hdmi", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001112 { .compatible = "nvidia,tegra114-gr3d", },
Thierry Reding8620fc62013-12-12 11:03:59 +01001113 { .compatible = "nvidia,tegra124-dc", },
Thierry Reding6b6b6042013-11-15 16:06:05 +01001114 { .compatible = "nvidia,tegra124-sor", },
Thierry Redingfb7be702013-11-15 16:07:32 +01001115 { .compatible = "nvidia,tegra124-hdmi", },
Thierry Reding7d338582015-04-10 11:35:21 +02001116 { .compatible = "nvidia,tegra124-dsi", },
Thierry Redingc06c7932015-04-10 11:35:21 +02001117 { .compatible = "nvidia,tegra132-dsi", },
Thierry Reding5b4f5162015-03-27 10:31:58 +01001118 { .compatible = "nvidia,tegra210-dc", },
Thierry Redingddfb4062015-04-08 16:56:22 +02001119 { .compatible = "nvidia,tegra210-dsi", },
Thierry Reding3309ac82015-07-30 10:32:46 +02001120 { .compatible = "nvidia,tegra210-sor", },
Thierry Reding459cc2c2015-07-30 10:34:24 +02001121 { .compatible = "nvidia,tegra210-sor1", },
Thierry Reding776dc382013-10-14 14:43:22 +02001122 { /* sentinel */ }
1123};
1124
1125static struct host1x_driver host1x_drm_driver = {
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001126 .driver = {
1127 .name = "drm",
Thierry Reding359ae682014-12-18 17:15:25 +01001128 .pm = &host1x_drm_pm_ops,
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001129 },
Thierry Reding776dc382013-10-14 14:43:22 +02001130 .probe = host1x_drm_probe,
1131 .remove = host1x_drm_remove,
1132 .subdevs = host1x_drm_subdevs,
1133};
1134
Thierry Reding473112e2015-09-10 16:07:14 +02001135static struct platform_driver * const drivers[] = {
1136 &tegra_dc_driver,
1137 &tegra_hdmi_driver,
1138 &tegra_dsi_driver,
1139 &tegra_dpaux_driver,
1140 &tegra_sor_driver,
1141 &tegra_gr2d_driver,
1142 &tegra_gr3d_driver,
1143};
1144
Thierry Reding776dc382013-10-14 14:43:22 +02001145static int __init host1x_drm_init(void)
1146{
1147 int err;
1148
1149 err = host1x_driver_register(&host1x_drm_driver);
1150 if (err < 0)
1151 return err;
1152
Thierry Reding473112e2015-09-10 16:07:14 +02001153 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001154 if (err < 0)
1155 goto unregister_host1x;
1156
Thierry Reding776dc382013-10-14 14:43:22 +02001157 return 0;
1158
Thierry Reding776dc382013-10-14 14:43:22 +02001159unregister_host1x:
1160 host1x_driver_unregister(&host1x_drm_driver);
1161 return err;
1162}
1163module_init(host1x_drm_init);
1164
1165static void __exit host1x_drm_exit(void)
1166{
Thierry Reding473112e2015-09-10 16:07:14 +02001167 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001168 host1x_driver_unregister(&host1x_drm_driver);
1169}
1170module_exit(host1x_drm_exit);
1171
1172MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1173MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1174MODULE_LICENSE("GPL v2");