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Jayachandran C65040e22011-11-16 00:21:28 +00001/*
2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
9 * license below:
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
20 * distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <linux/kernel.h>
Jayachandran Caceee092013-06-10 06:41:00 +000036#include <linux/of_fdt.h>
Jayachandran C65040e22011-11-16 00:21:28 +000037
Ralf Baechlebdc92d742013-05-21 16:59:19 +020038#include <asm/idle.h>
Jayachandran C65040e22011-11-16 00:21:28 +000039#include <asm/reboot.h>
40#include <asm/time.h>
41#include <asm/bootinfo.h>
42
Jayachandran C65040e22011-11-16 00:21:28 +000043#include <asm/netlogic/haldefs.h>
44#include <asm/netlogic/common.h>
45
46#include <asm/netlogic/xlp-hal/iomap.h>
47#include <asm/netlogic/xlp-hal/xlp.h>
48#include <asm/netlogic/xlp-hal/sys.h>
49
Jayachandran C77ae7982012-10-31 12:01:39 +000050uint64_t nlm_io_base;
51struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
Jayachandran C2a37b1a2012-10-31 12:01:37 +000052cpumask_t nlm_cpumask = CPU_MASK_CPU0;
Jayachandran C77ae7982012-10-31 12:01:39 +000053unsigned int nlm_threads_per_core;
Jayachandran C66d29982011-11-16 00:21:29 +000054
Jayachandran C65040e22011-11-16 00:21:28 +000055static void nlm_linux_exit(void)
56{
Jayachandran C77ae7982012-10-31 12:01:39 +000057 uint64_t sysbase = nlm_get_node(0)->sysbase;
58
Jayachandran C861c0562013-12-21 16:52:23 +053059 if (cpu_is_xlp9xx())
60 nlm_write_sys_reg(sysbase, SYS_9XX_CHIP_RESET, 1);
61 else
62 nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1);
Jayachandran C65040e22011-11-16 00:21:28 +000063 for ( ; ; )
64 cpu_wait();
65}
66
Jayachandran C72213832013-06-10 06:41:08 +000067static void nlm_fixup_mem(void)
68{
69 const int pref_backup = 512;
70 int i;
71
72 for (i = 0; i < boot_mem_map.nr_map; i++) {
73 if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
74 continue;
75 boot_mem_map.map[i].size -= pref_backup;
76 }
77}
78
Jayachandran Ca2ba6cd2013-08-21 19:31:29 +053079static void __init xlp_init_mem_from_bars(void)
80{
81 uint64_t map[16];
82 int i, n;
83
Jayachandran Cb3b73ae62015-01-07 16:58:33 +053084 n = nlm_get_dram_map(-1, map, ARRAY_SIZE(map)); /* -1 : all nodes */
Jayachandran Ca2ba6cd2013-08-21 19:31:29 +053085 for (i = 0; i < n; i += 2) {
86 /* exclude 0x1000_0000-0x2000_0000, u-boot device */
87 if (map[i] <= 0x10000000 && map[i+1] > 0x10000000)
88 map[i+1] = 0x10000000;
89 if (map[i] > 0x10000000 && map[i] < 0x20000000)
90 map[i] = 0x20000000;
91
92 add_memory_region(map[i], map[i+1] - map[i], BOOT_MEM_RAM);
93 }
94}
95
Jayachandran C65040e22011-11-16 00:21:28 +000096void __init plat_mem_setup(void)
97{
Jayachandran Ce92e1d02014-01-14 12:39:15 +010098#ifdef CONFIG_SMP
99 nlm_wakeup_secondary_cpus();
100
101 /* update TLB size after waking up threads */
102 current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;
103
104 register_smp_ops(&nlm_smp_ops);
105#endif
Jayachandran C65040e22011-11-16 00:21:28 +0000106 _machine_restart = (void (*)(char *))nlm_linux_exit;
107 _machine_halt = nlm_linux_exit;
108 pm_power_off = nlm_linux_exit;
Jayachandran Ce83fc6b2012-10-31 12:01:32 +0000109
Jayachandran Caceee092013-06-10 06:41:00 +0000110 /* memory and bootargs from DT */
Jayachandran Ce363bba2013-11-04 17:51:54 +0530111 xlp_early_init_devtree();
Jayachandran Ca2ba6cd2013-08-21 19:31:29 +0530112
113 if (boot_mem_map.nr_map == 0) {
114 pr_info("Using DRAM BARs for memory map.\n");
115 xlp_init_mem_from_bars();
116 }
117 /* Calculate and setup wired entries for mapped kernel */
Jayachandran C72213832013-06-10 06:41:08 +0000118 nlm_fixup_mem();
Jayachandran C65040e22011-11-16 00:21:28 +0000119}
120
121const char *get_system_type(void)
122{
Jayachandran C5874743e2014-04-29 20:07:49 +0530123 switch (read_c0_prid() & PRID_IMP_MASK) {
Jayachandran C8907c552013-12-21 16:52:20 +0530124 case PRID_IMP_NETLOGIC_XLP9XX:
Yonghong Song1c983982014-04-29 20:07:53 +0530125 case PRID_IMP_NETLOGIC_XLP5XX:
Jayachandran C4ca86a22013-08-11 14:43:54 +0530126 case PRID_IMP_NETLOGIC_XLP2XX:
127 return "Broadcom XLPII Series";
128 default:
129 return "Netlogic XLP Series";
130 }
Jayachandran C65040e22011-11-16 00:21:28 +0000131}
132
133void __init prom_free_prom_memory(void)
134{
135 /* Nothing yet */
136}
137
138void xlp_mmu_init(void)
139{
Jayachandran C4ca86a22013-08-11 14:43:54 +0530140 u32 conf4;
Jayachandran Cb876c1a2012-07-03 19:04:02 +0200141
Jayachandran C4ca86a22013-08-11 14:43:54 +0530142 if (cpu_is_xlpii()) {
143 /* XLPII series has extended pagesize in config 4 */
144 conf4 = read_c0_config4() & ~0x1f00u;
145 write_c0_config4(conf4 | ((PAGE_SHIFT - 10) / 2 << 8));
146 } else {
147 /* enable extended TLB and Large Fixed TLB */
148 write_c0_config6(read_c0_config6() | 0x24);
149
150 /* set page mask of extended Fixed TLB in config7 */
151 write_c0_config7(PM_DEFAULT_MASK >>
152 (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
153 }
Jayachandran C65040e22011-11-16 00:21:28 +0000154}
155
Ganesan Ramalingamed21cfe2012-10-31 12:01:42 +0000156void nlm_percpu_init(int hwcpuid)
157{
158}
159
Jayachandran C65040e22011-11-16 00:21:28 +0000160void __init prom_init(void)
161{
Jayachandran C571886b2013-06-10 06:41:02 +0000162 void *reset_vec;
163
Jayachandran C77ae7982012-10-31 12:01:39 +0000164 nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
Jayachandran C571886b2013-06-10 06:41:02 +0000165 nlm_init_boot_cpu();
Jayachandran C65040e22011-11-16 00:21:28 +0000166 xlp_mmu_init();
Jayachandran C77ae7982012-10-31 12:01:39 +0000167 nlm_node_init(0);
Jayachandran Caceee092013-06-10 06:41:00 +0000168 xlp_dt_init((void *)(long)fw_arg0);
Jayachandran Ce83fc6b2012-10-31 12:01:32 +0000169
Jayachandran C571886b2013-06-10 06:41:02 +0000170 /* Update reset entry point with CPU init code */
171 reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
Jayachandran C919f9ab2013-06-10 06:41:04 +0000172 memset(reset_vec, 0, RESET_VEC_SIZE);
Jayachandran C571886b2013-06-10 06:41:02 +0000173 memcpy(reset_vec, (void *)nlm_reset_entry,
174 (nlm_reset_entry_end - nlm_reset_entry));
175
Jayachandran C65040e22011-11-16 00:21:28 +0000176#ifdef CONFIG_SMP
Jayachandran C2a37b1a2012-10-31 12:01:37 +0000177 cpumask_setall(&nlm_cpumask);
Jayachandran C65040e22011-11-16 00:21:28 +0000178#endif
179}