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gerrit-public.fairphone.software / kernel / msm-5.4 / b51a284278c634c675fa22e26e9e9b97dec4518a / . / arch / powerpc / boot / dts / mpc8544ds.dts
blob: ed38874c3a367761ddd22e6a1678f498b7a42839 [file] [log] [blame]
Jon Loeligerd93daf82007-03-20 11:19:10 -0500[diff] [blame]1/*
2 * MPC8544 DS Device Tree Source
3 *
Kumar Gala32f960e2008-04-17 01:28:15 -0500[diff] [blame]4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
Jon Loeligerd93daf82007-03-20 11:19:10 -0500[diff] [blame]5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]12/include/ "fsl/mpc8544si-pre.dtsi"
13
Jon Loeligerd93daf82007-03-20 11:19:10 -0500[diff] [blame]14/ {
15 model = "MPC8544DS";
16 compatible = "MPC8544DS", "MPC85xxDS";
Jon Loeligerd93daf82007-03-20 11:19:10 -0500[diff] [blame]17
18 memory {
19 device_type = "memory";
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]20 reg = <0 0 0 0>; // Filled by U-Boot
Jon Loeligerd93daf82007-03-20 11:19:10 -0500[diff] [blame]21 };
22
Wang Dongsheng3a0f8802012-08-29 11:00:49 +0800[diff] [blame]23 board_lbc: lbc: localbus@e0005000 {
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]24 reg = <0 0xe0005000 0 0x1000>;
Wang Dongsheng3a0f8802012-08-29 11:00:49 +0800[diff] [blame]25
26 ranges = <0x0 0x0 0x0 0xff800000 0x800000>;
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]27 };
Kumar Galab66510c2007-08-16 23:55:55 -0500[diff] [blame]28
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]29 board_soc: soc: soc8544@e0000000 {
30 ranges = <0x0 0x0 0xe0000000 0x100000>;
Jon Loeligerd93daf82007-03-20 11:19:10 -0500[diff] [blame]31 };
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]32
Kumar Galaea082fa2007-12-12 01:46:12 -0600[diff] [blame]33 pci0: pci@e0008000 {
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]34 reg = <0 0xe0008000 0 0x1000>;
35 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
36 0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
37 clock-frequency = <66666666>;
Kumar Gala32f960e2008-04-17 01:28:15 -0500[diff] [blame]38 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]39 interrupt-map = <
40
41 /* IDSEL 0x11 J17 Slot 1 */
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]42 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
43 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
44 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
45 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]46
47 /* IDSEL 0x12 J16 Slot 2 */
48
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]49 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
50 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
51 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
52 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]53 };
54
Kumar Galaea082fa2007-12-12 01:46:12 -0600[diff] [blame]55 pci1: pcie@e0009000 {
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]56 reg = <0x0 0xe0009000 0x0 0x1000>;
57 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
58 0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]59 pcie@0 {
Kumar Gala32f960e2008-04-17 01:28:15 -0500[diff] [blame]60 ranges = <0x2000000 0x0 0x80000000
61 0x2000000 0x0 0x80000000
62 0x0 0x20000000
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]63
Kumar Gala32f960e2008-04-17 01:28:15 -0500[diff] [blame]64 0x1000000 0x0 0x0
65 0x1000000 0x0 0x0
66 0x0 0x10000>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]67 };
68 };
69
Kumar Galaea082fa2007-12-12 01:46:12 -0600[diff] [blame]70 pci2: pcie@e000a000 {
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]71 reg = <0x0 0xe000a000 0x0 0x1000>;
72 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
73 0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]74 pcie@0 {
Kumar Gala32f960e2008-04-17 01:28:15 -0500[diff] [blame]75 ranges = <0x2000000 0x0 0xa0000000
76 0x2000000 0x0 0xa0000000
77 0x0 0x10000000
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]78
Kumar Gala32f960e2008-04-17 01:28:15 -0500[diff] [blame]79 0x1000000 0x0 0x0
80 0x1000000 0x0 0x0
81 0x0 0x10000>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]82 };
83 };
84
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]85 board_pci3: pci3: pcie@e000b000 {
86 reg = <0x0 0xe000b000 0x0 0x1000>;
87 ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
88 0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]89 pcie@0 {
Kumar Gala32f960e2008-04-17 01:28:15 -0500[diff] [blame]90 ranges = <0x2000000 0x0 0xb0000000
91 0x2000000 0x0 0xb0000000
92 0x0 0x100000
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]93
Kumar Gala32f960e2008-04-17 01:28:15 -0500[diff] [blame]94 0x1000000 0x0 0x0
95 0x1000000 0x0 0x0
96 0x0 0x100000>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]97 };
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500[diff] [blame]98 };
Jon Loeligerd93daf82007-03-20 11:19:10 -0500[diff] [blame]99};
Kumar Galab7f81752011-11-03 23:24:12 -0500[diff] [blame]100
101/*
102 * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings
103 * for interrupt-map & interrupt-map-mask
104 */
105
106/include/ "fsl/mpc8544si-post.dtsi"
107/include/ "mpc8544ds.dtsi"