| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * Copyright © 2006-2007 Intel Corporation | 
 | 3 |  * | 
 | 4 |  * Permission is hereby granted, free of charge, to any person obtaining a | 
 | 5 |  * copy of this software and associated documentation files (the "Software"), | 
 | 6 |  * to deal in the Software without restriction, including without limitation | 
 | 7 |  * the rights to use, copy, modify, merge, publish, distribute, sublicense, | 
 | 8 |  * and/or sell copies of the Software, and to permit persons to whom the | 
 | 9 |  * Software is furnished to do so, subject to the following conditions: | 
 | 10 |  * | 
 | 11 |  * The above copyright notice and this permission notice (including the next | 
 | 12 |  * paragraph) shall be included in all copies or substantial portions of the | 
 | 13 |  * Software. | 
 | 14 |  * | 
 | 15 |  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | 
 | 16 |  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | 
 | 17 |  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL | 
 | 18 |  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | 
 | 19 |  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | 
 | 20 |  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | 
 | 21 |  * DEALINGS IN THE SOFTWARE. | 
 | 22 |  * | 
 | 23 |  * Authors: | 
 | 24 |  *	Eric Anholt <eric@anholt.net> | 
 | 25 |  */ | 
 | 26 |  | 
| Duncan Laurie | 8ca4013 | 2011-10-25 15:42:21 -0700 | [diff] [blame] | 27 | #include <linux/dmi.h> | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 28 | #include <linux/i2c.h> | 
| Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 29 | #include <linux/slab.h> | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 30 | #include "drmP.h" | 
 | 31 | #include "drm.h" | 
 | 32 | #include "drm_crtc.h" | 
 | 33 | #include "drm_crtc_helper.h" | 
| David Müller | f5afcd3 | 2011-01-06 12:29:32 +0000 | [diff] [blame] | 34 | #include "drm_edid.h" | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 35 | #include "intel_drv.h" | 
 | 36 | #include "i915_drm.h" | 
 | 37 | #include "i915_drv.h" | 
 | 38 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 39 | /* Here's the desired hotplug mode */ | 
 | 40 | #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |		\ | 
 | 41 | 			   ADPA_CRT_HOTPLUG_WARMUP_10MS |		\ | 
 | 42 | 			   ADPA_CRT_HOTPLUG_SAMPLE_4S |			\ | 
 | 43 | 			   ADPA_CRT_HOTPLUG_VOLTAGE_50 |		\ | 
 | 44 | 			   ADPA_CRT_HOTPLUG_VOLREF_325MV |		\ | 
 | 45 | 			   ADPA_CRT_HOTPLUG_ENABLE) | 
 | 46 |  | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 47 | struct intel_crt { | 
 | 48 | 	struct intel_encoder base; | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 49 | 	bool force_hotplug_required; | 
| Daniel Vetter | 540a895 | 2012-07-11 16:27:57 +0200 | [diff] [blame] | 50 | 	u32 adpa_reg; | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 51 | }; | 
 | 52 |  | 
 | 53 | static struct intel_crt *intel_attached_crt(struct drm_connector *connector) | 
 | 54 | { | 
 | 55 | 	return container_of(intel_attached_encoder(connector), | 
 | 56 | 			    struct intel_crt, base); | 
 | 57 | } | 
 | 58 |  | 
| Daniel Vetter | 540a895 | 2012-07-11 16:27:57 +0200 | [diff] [blame] | 59 | static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder) | 
 | 60 | { | 
 | 61 | 	return container_of(encoder, struct intel_crt, base); | 
 | 62 | } | 
 | 63 |  | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 64 | static void pch_crt_dpms(struct drm_encoder *encoder, int mode) | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 65 | { | 
 | 66 | 	struct drm_device *dev = encoder->dev; | 
 | 67 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 68 | 	u32 temp; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 69 |  | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 70 | 	temp = I915_READ(PCH_ADPA); | 
 | 71 | 	temp &= ~ADPA_DAC_ENABLE; | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 72 |  | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 73 | 	switch (mode) { | 
 | 74 | 	case DRM_MODE_DPMS_ON: | 
 | 75 | 		temp |= ADPA_DAC_ENABLE; | 
 | 76 | 		break; | 
 | 77 | 	case DRM_MODE_DPMS_STANDBY: | 
 | 78 | 	case DRM_MODE_DPMS_SUSPEND: | 
 | 79 | 	case DRM_MODE_DPMS_OFF: | 
 | 80 | 		/* Just leave port enable cleared */ | 
 | 81 | 		break; | 
 | 82 | 	} | 
 | 83 |  | 
 | 84 | 	I915_WRITE(PCH_ADPA, temp); | 
 | 85 | } | 
 | 86 |  | 
 | 87 | static void gmch_crt_dpms(struct drm_encoder *encoder, int mode) | 
 | 88 | { | 
 | 89 | 	struct drm_device *dev = encoder->dev; | 
 | 90 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
 | 91 | 	u32 temp; | 
 | 92 |  | 
 | 93 | 	temp = I915_READ(ADPA); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 94 | 	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); | 
| ling.ma@intel.com | febc769 | 2009-06-25 11:55:57 +0800 | [diff] [blame] | 95 | 	temp &= ~ADPA_DAC_ENABLE; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 96 |  | 
| Jesse Barnes | bd9e841 | 2012-06-15 11:55:18 -0700 | [diff] [blame] | 97 | 	if (IS_VALLEYVIEW(dev) && mode != DRM_MODE_DPMS_ON) | 
 | 98 | 		mode = DRM_MODE_DPMS_OFF; | 
 | 99 |  | 
| Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 100 | 	switch (mode) { | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 101 | 	case DRM_MODE_DPMS_ON: | 
 | 102 | 		temp |= ADPA_DAC_ENABLE; | 
 | 103 | 		break; | 
 | 104 | 	case DRM_MODE_DPMS_STANDBY: | 
 | 105 | 		temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; | 
 | 106 | 		break; | 
 | 107 | 	case DRM_MODE_DPMS_SUSPEND: | 
 | 108 | 		temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; | 
 | 109 | 		break; | 
 | 110 | 	case DRM_MODE_DPMS_OFF: | 
 | 111 | 		temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; | 
 | 112 | 		break; | 
 | 113 | 	} | 
 | 114 |  | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 115 | 	I915_WRITE(ADPA, temp); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 116 | } | 
 | 117 |  | 
 | 118 | static int intel_crt_mode_valid(struct drm_connector *connector, | 
 | 119 | 				struct drm_display_mode *mode) | 
 | 120 | { | 
| Zhao Yakui | 6bcdcd9 | 2009-03-03 18:06:42 +0800 | [diff] [blame] | 121 | 	struct drm_device *dev = connector->dev; | 
 | 122 |  | 
 | 123 | 	int max_clock = 0; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 124 | 	if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | 
 | 125 | 		return MODE_NO_DBLESCAN; | 
 | 126 |  | 
| Zhao Yakui | 6bcdcd9 | 2009-03-03 18:06:42 +0800 | [diff] [blame] | 127 | 	if (mode->clock < 25000) | 
 | 128 | 		return MODE_CLOCK_LOW; | 
 | 129 |  | 
| Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 130 | 	if (IS_GEN2(dev)) | 
| Zhao Yakui | 6bcdcd9 | 2009-03-03 18:06:42 +0800 | [diff] [blame] | 131 | 		max_clock = 350000; | 
 | 132 | 	else | 
 | 133 | 		max_clock = 400000; | 
 | 134 | 	if (mode->clock > max_clock) | 
 | 135 | 		return MODE_CLOCK_HIGH; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 136 |  | 
 | 137 | 	return MODE_OK; | 
 | 138 | } | 
 | 139 |  | 
 | 140 | static bool intel_crt_mode_fixup(struct drm_encoder *encoder, | 
| Laurent Pinchart | e811f5a | 2012-07-17 17:56:50 +0200 | [diff] [blame] | 141 | 				 const struct drm_display_mode *mode, | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 142 | 				 struct drm_display_mode *adjusted_mode) | 
 | 143 | { | 
 | 144 | 	return true; | 
 | 145 | } | 
 | 146 |  | 
 | 147 | static void intel_crt_mode_set(struct drm_encoder *encoder, | 
 | 148 | 			       struct drm_display_mode *mode, | 
 | 149 | 			       struct drm_display_mode *adjusted_mode) | 
 | 150 | { | 
 | 151 |  | 
 | 152 | 	struct drm_device *dev = encoder->dev; | 
 | 153 | 	struct drm_crtc *crtc = encoder->crtc; | 
| Daniel Vetter | 540a895 | 2012-07-11 16:27:57 +0200 | [diff] [blame] | 154 | 	struct intel_crt *crt = | 
 | 155 | 		intel_encoder_to_crt(to_intel_encoder(encoder)); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 156 | 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 
 | 157 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
 | 158 | 	int dpll_md_reg; | 
 | 159 | 	u32 adpa, dpll_md; | 
 | 160 |  | 
| Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 161 | 	dpll_md_reg = DPLL_MD(intel_crtc->pipe); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 162 |  | 
 | 163 | 	/* | 
 | 164 | 	 * Disable separate mode multiplier used when cloning SDVO to CRT | 
 | 165 | 	 * XXX this needs to be adjusted when we really are cloning | 
 | 166 | 	 */ | 
| Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 167 | 	if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) { | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 168 | 		dpll_md = I915_READ(dpll_md_reg); | 
 | 169 | 		I915_WRITE(dpll_md_reg, | 
 | 170 | 			   dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); | 
 | 171 | 	} | 
 | 172 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 173 | 	adpa = ADPA_HOTPLUG_BITS; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 174 | 	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) | 
 | 175 | 		adpa |= ADPA_HSYNC_ACTIVE_HIGH; | 
 | 176 | 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | 
 | 177 | 		adpa |= ADPA_VSYNC_ACTIVE_HIGH; | 
 | 178 |  | 
| Jesse Barnes | 7577056 | 2011-10-12 09:01:58 -0700 | [diff] [blame] | 179 | 	/* For CPT allow 3 pipe config, for others just use A or B */ | 
 | 180 | 	if (HAS_PCH_CPT(dev)) | 
 | 181 | 		adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); | 
 | 182 | 	else if (intel_crtc->pipe == 0) | 
 | 183 | 		adpa |= ADPA_PIPE_A_SELECT; | 
 | 184 | 	else | 
 | 185 | 		adpa |= ADPA_PIPE_B_SELECT; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 186 |  | 
| Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 187 | 	if (!HAS_PCH_SPLIT(dev)) | 
 | 188 | 		I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); | 
 | 189 |  | 
| Daniel Vetter | 540a895 | 2012-07-11 16:27:57 +0200 | [diff] [blame] | 190 | 	I915_WRITE(crt->adpa_reg, adpa); | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 191 | } | 
 | 192 |  | 
| Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 193 | static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 194 | { | 
 | 195 | 	struct drm_device *dev = connector->dev; | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 196 | 	struct intel_crt *crt = intel_attached_crt(connector); | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 197 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 198 | 	u32 adpa; | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 199 | 	bool ret; | 
 | 200 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 201 | 	/* The first time through, trigger an explicit detection cycle */ | 
 | 202 | 	if (crt->force_hotplug_required) { | 
 | 203 | 		bool turn_off_dac = HAS_PCH_SPLIT(dev); | 
 | 204 | 		u32 save_adpa; | 
| Zhenyu Wang | 67941da | 2009-07-24 01:00:33 +0800 | [diff] [blame] | 205 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 206 | 		crt->force_hotplug_required = 0; | 
| Dave Airlie | d5dd96c | 2010-08-04 15:52:19 +1000 | [diff] [blame] | 207 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 208 | 		save_adpa = adpa = I915_READ(PCH_ADPA); | 
 | 209 | 		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); | 
| Dave Airlie | d5dd96c | 2010-08-04 15:52:19 +1000 | [diff] [blame] | 210 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 211 | 		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; | 
 | 212 | 		if (turn_off_dac) | 
 | 213 | 			adpa &= ~ADPA_DAC_ENABLE; | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 214 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 215 | 		I915_WRITE(PCH_ADPA, adpa); | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 216 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 217 | 		if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, | 
 | 218 | 			     1000)) | 
 | 219 | 			DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 220 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 221 | 		if (turn_off_dac) { | 
 | 222 | 			I915_WRITE(PCH_ADPA, save_adpa); | 
 | 223 | 			POSTING_READ(PCH_ADPA); | 
 | 224 | 		} | 
| Zhenyu Wang | a4a6b90 | 2010-04-07 16:15:55 +0800 | [diff] [blame] | 225 | 	} | 
 | 226 |  | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 227 | 	/* Check the status to see if both blue and green are on now */ | 
 | 228 | 	adpa = I915_READ(PCH_ADPA); | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 229 | 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 230 | 		ret = true; | 
 | 231 | 	else | 
 | 232 | 		ret = false; | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 233 | 	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 234 |  | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 235 | 	return ret; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 236 | } | 
 | 237 |  | 
| Jesse Barnes | 7d2c24e | 2012-06-15 11:55:15 -0700 | [diff] [blame] | 238 | static bool valleyview_crt_detect_hotplug(struct drm_connector *connector) | 
 | 239 | { | 
 | 240 | 	struct drm_device *dev = connector->dev; | 
 | 241 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
 | 242 | 	u32 adpa; | 
 | 243 | 	bool ret; | 
 | 244 | 	u32 save_adpa; | 
 | 245 |  | 
 | 246 | 	save_adpa = adpa = I915_READ(ADPA); | 
 | 247 | 	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); | 
 | 248 |  | 
 | 249 | 	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; | 
 | 250 |  | 
 | 251 | 	I915_WRITE(ADPA, adpa); | 
 | 252 |  | 
 | 253 | 	if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, | 
 | 254 | 		     1000)) { | 
 | 255 | 		DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); | 
 | 256 | 		I915_WRITE(ADPA, save_adpa); | 
 | 257 | 	} | 
 | 258 |  | 
 | 259 | 	/* Check the status to see if both blue and green are on now */ | 
 | 260 | 	adpa = I915_READ(ADPA); | 
 | 261 | 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) | 
 | 262 | 		ret = true; | 
 | 263 | 	else | 
 | 264 | 		ret = false; | 
 | 265 |  | 
 | 266 | 	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret); | 
 | 267 |  | 
 | 268 | 	/* FIXME: debug force function and remove */ | 
 | 269 | 	ret = true; | 
 | 270 |  | 
 | 271 | 	return ret; | 
 | 272 | } | 
 | 273 |  | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 274 | /** | 
 | 275 |  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. | 
 | 276 |  * | 
 | 277 |  * Not for i915G/i915GM | 
 | 278 |  * | 
 | 279 |  * \return true if CRT is connected. | 
 | 280 |  * \return false if CRT is disconnected. | 
 | 281 |  */ | 
 | 282 | static bool intel_crt_detect_hotplug(struct drm_connector *connector) | 
 | 283 | { | 
 | 284 | 	struct drm_device *dev = connector->dev; | 
 | 285 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
| Adam Jackson | 7a772c4 | 2010-05-24 16:46:29 -0400 | [diff] [blame] | 286 | 	u32 hotplug_en, orig, stat; | 
 | 287 | 	bool ret = false; | 
| Zhao Yakui | 771cb08 | 2009-03-03 18:07:52 +0800 | [diff] [blame] | 288 | 	int i, tries = 0; | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 289 |  | 
| Eric Anholt | bad720f | 2009-10-22 16:11:14 -0700 | [diff] [blame] | 290 | 	if (HAS_PCH_SPLIT(dev)) | 
| Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 291 | 		return intel_ironlake_crt_detect_hotplug(connector); | 
| Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 292 |  | 
| Jesse Barnes | 7d2c24e | 2012-06-15 11:55:15 -0700 | [diff] [blame] | 293 | 	if (IS_VALLEYVIEW(dev)) | 
 | 294 | 		return valleyview_crt_detect_hotplug(connector); | 
 | 295 |  | 
| Zhao Yakui | 771cb08 | 2009-03-03 18:07:52 +0800 | [diff] [blame] | 296 | 	/* | 
 | 297 | 	 * On 4 series desktop, CRT detect sequence need to be done twice | 
 | 298 | 	 * to get a reliable result. | 
 | 299 | 	 */ | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 300 |  | 
| Zhao Yakui | 771cb08 | 2009-03-03 18:07:52 +0800 | [diff] [blame] | 301 | 	if (IS_G4X(dev) && !IS_GM45(dev)) | 
 | 302 | 		tries = 2; | 
 | 303 | 	else | 
 | 304 | 		tries = 1; | 
| Adam Jackson | 7a772c4 | 2010-05-24 16:46:29 -0400 | [diff] [blame] | 305 | 	hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN); | 
| Zhao Yakui | 771cb08 | 2009-03-03 18:07:52 +0800 | [diff] [blame] | 306 | 	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 307 |  | 
| Zhao Yakui | 771cb08 | 2009-03-03 18:07:52 +0800 | [diff] [blame] | 308 | 	for (i = 0; i < tries ; i++) { | 
| Zhao Yakui | 771cb08 | 2009-03-03 18:07:52 +0800 | [diff] [blame] | 309 | 		/* turn on the FORCE_DETECT */ | 
 | 310 | 		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); | 
| Zhao Yakui | 771cb08 | 2009-03-03 18:07:52 +0800 | [diff] [blame] | 311 | 		/* wait for FORCE_DETECT to go off */ | 
| Chris Wilson | 913d8d1 | 2010-08-07 11:01:35 +0100 | [diff] [blame] | 312 | 		if (wait_for((I915_READ(PORT_HOTPLUG_EN) & | 
 | 313 | 			      CRT_HOTPLUG_FORCE_DETECT) == 0, | 
| Chris Wilson | 481b6af | 2010-08-23 17:43:35 +0100 | [diff] [blame] | 314 | 			     1000)) | 
| Chris Wilson | 7907731 | 2010-09-12 19:58:04 +0100 | [diff] [blame] | 315 | 			DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off"); | 
| Zhao Yakui | 771cb08 | 2009-03-03 18:07:52 +0800 | [diff] [blame] | 316 | 	} | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 317 |  | 
| Adam Jackson | 7a772c4 | 2010-05-24 16:46:29 -0400 | [diff] [blame] | 318 | 	stat = I915_READ(PORT_HOTPLUG_STAT); | 
 | 319 | 	if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE) | 
 | 320 | 		ret = true; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 321 |  | 
| Adam Jackson | 7a772c4 | 2010-05-24 16:46:29 -0400 | [diff] [blame] | 322 | 	/* clear the interrupt we just generated, if any */ | 
 | 323 | 	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); | 
 | 324 |  | 
 | 325 | 	/* and put the bits back */ | 
 | 326 | 	I915_WRITE(PORT_HOTPLUG_EN, orig); | 
 | 327 |  | 
 | 328 | 	return ret; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 329 | } | 
 | 330 |  | 
| Jani Nikula | f1a2f5b | 2012-08-13 13:22:35 +0300 | [diff] [blame] | 331 | static struct edid *intel_crt_get_edid(struct drm_connector *connector, | 
 | 332 | 				struct i2c_adapter *i2c) | 
 | 333 | { | 
 | 334 | 	struct edid *edid; | 
 | 335 |  | 
 | 336 | 	edid = drm_get_edid(connector, i2c); | 
 | 337 |  | 
 | 338 | 	if (!edid && !intel_gmbus_is_forced_bit(i2c)) { | 
 | 339 | 		DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n"); | 
 | 340 | 		intel_gmbus_force_bit(i2c, true); | 
 | 341 | 		edid = drm_get_edid(connector, i2c); | 
 | 342 | 		intel_gmbus_force_bit(i2c, false); | 
 | 343 | 	} | 
 | 344 |  | 
 | 345 | 	return edid; | 
 | 346 | } | 
 | 347 |  | 
 | 348 | /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */ | 
 | 349 | static int intel_crt_ddc_get_modes(struct drm_connector *connector, | 
 | 350 | 				struct i2c_adapter *adapter) | 
 | 351 | { | 
 | 352 | 	struct edid *edid; | 
 | 353 |  | 
 | 354 | 	edid = intel_crt_get_edid(connector, adapter); | 
 | 355 | 	if (!edid) | 
 | 356 | 		return 0; | 
 | 357 |  | 
 | 358 | 	return intel_connector_update_modes(connector, edid); | 
 | 359 | } | 
 | 360 |  | 
| David Müller | f5afcd3 | 2011-01-06 12:29:32 +0000 | [diff] [blame] | 361 | static bool intel_crt_detect_ddc(struct drm_connector *connector) | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 362 | { | 
| David Müller | f5afcd3 | 2011-01-06 12:29:32 +0000 | [diff] [blame] | 363 | 	struct intel_crt *crt = intel_attached_crt(connector); | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 364 | 	struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; | 
| Daniel Vetter | a2bd1f5 | 2012-07-11 12:31:52 +0200 | [diff] [blame] | 365 | 	struct edid *edid; | 
 | 366 | 	struct i2c_adapter *i2c; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 367 |  | 
| Daniel Vetter | a2bd1f5 | 2012-07-11 12:31:52 +0200 | [diff] [blame] | 368 | 	BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 369 |  | 
| Daniel Vetter | a2bd1f5 | 2012-07-11 12:31:52 +0200 | [diff] [blame] | 370 | 	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin); | 
| Jani Nikula | f1a2f5b | 2012-08-13 13:22:35 +0300 | [diff] [blame] | 371 | 	edid = intel_crt_get_edid(connector, i2c); | 
| David Müller | f5afcd3 | 2011-01-06 12:29:32 +0000 | [diff] [blame] | 372 |  | 
| Daniel Vetter | a2bd1f5 | 2012-07-11 12:31:52 +0200 | [diff] [blame] | 373 | 	if (edid) { | 
 | 374 | 		bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; | 
 | 375 |  | 
| David Müller | f5afcd3 | 2011-01-06 12:29:32 +0000 | [diff] [blame] | 376 | 		/* | 
 | 377 | 		 * This may be a DVI-I connector with a shared DDC | 
 | 378 | 		 * link between analog and digital outputs, so we | 
 | 379 | 		 * have to check the EDID input spec of the attached device. | 
 | 380 | 		 */ | 
| David Müller | f5afcd3 | 2011-01-06 12:29:32 +0000 | [diff] [blame] | 381 | 		if (!is_digital) { | 
 | 382 | 			DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); | 
 | 383 | 			return true; | 
 | 384 | 		} | 
| Daniel Vetter | a2bd1f5 | 2012-07-11 12:31:52 +0200 | [diff] [blame] | 385 |  | 
 | 386 | 		DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n"); | 
 | 387 | 	} else { | 
 | 388 | 		DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n"); | 
| Chris Wilson | 6ec3d0c | 2010-09-22 18:17:01 +0100 | [diff] [blame] | 389 | 	} | 
 | 390 |  | 
| Daniel Vetter | a2bd1f5 | 2012-07-11 12:31:52 +0200 | [diff] [blame] | 391 | 	kfree(edid); | 
 | 392 |  | 
| Chris Wilson | 6ec3d0c | 2010-09-22 18:17:01 +0100 | [diff] [blame] | 393 | 	return false; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 394 | } | 
 | 395 |  | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 396 | static enum drm_connector_status | 
| Chris Wilson | 7173188 | 2011-04-19 23:10:58 +0100 | [diff] [blame] | 397 | intel_crt_load_detect(struct intel_crt *crt) | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 398 | { | 
| Chris Wilson | 7173188 | 2011-04-19 23:10:58 +0100 | [diff] [blame] | 399 | 	struct drm_device *dev = crt->base.base.dev; | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 400 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
| Chris Wilson | 7173188 | 2011-04-19 23:10:58 +0100 | [diff] [blame] | 401 | 	uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe; | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 402 | 	uint32_t save_bclrpat; | 
 | 403 | 	uint32_t save_vtotal; | 
 | 404 | 	uint32_t vtotal, vactive; | 
 | 405 | 	uint32_t vsample; | 
 | 406 | 	uint32_t vblank, vblank_start, vblank_end; | 
 | 407 | 	uint32_t dsl; | 
 | 408 | 	uint32_t bclrpat_reg; | 
 | 409 | 	uint32_t vtotal_reg; | 
 | 410 | 	uint32_t vblank_reg; | 
 | 411 | 	uint32_t vsync_reg; | 
 | 412 | 	uint32_t pipeconf_reg; | 
 | 413 | 	uint32_t pipe_dsl_reg; | 
 | 414 | 	uint8_t	st00; | 
 | 415 | 	enum drm_connector_status status; | 
 | 416 |  | 
| Chris Wilson | 6ec3d0c | 2010-09-22 18:17:01 +0100 | [diff] [blame] | 417 | 	DRM_DEBUG_KMS("starting load-detect on CRT\n"); | 
 | 418 |  | 
| Jesse Barnes | 9db4a9c | 2011-02-07 12:26:52 -0800 | [diff] [blame] | 419 | 	bclrpat_reg = BCLRPAT(pipe); | 
 | 420 | 	vtotal_reg = VTOTAL(pipe); | 
 | 421 | 	vblank_reg = VBLANK(pipe); | 
 | 422 | 	vsync_reg = VSYNC(pipe); | 
 | 423 | 	pipeconf_reg = PIPECONF(pipe); | 
 | 424 | 	pipe_dsl_reg = PIPEDSL(pipe); | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 425 |  | 
 | 426 | 	save_bclrpat = I915_READ(bclrpat_reg); | 
 | 427 | 	save_vtotal = I915_READ(vtotal_reg); | 
 | 428 | 	vblank = I915_READ(vblank_reg); | 
 | 429 |  | 
 | 430 | 	vtotal = ((save_vtotal >> 16) & 0xfff) + 1; | 
 | 431 | 	vactive = (save_vtotal & 0x7ff) + 1; | 
 | 432 |  | 
 | 433 | 	vblank_start = (vblank & 0xfff) + 1; | 
 | 434 | 	vblank_end = ((vblank >> 16) & 0xfff) + 1; | 
 | 435 |  | 
 | 436 | 	/* Set the border color to purple. */ | 
 | 437 | 	I915_WRITE(bclrpat_reg, 0x500050); | 
 | 438 |  | 
| Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 439 | 	if (!IS_GEN2(dev)) { | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 440 | 		uint32_t pipeconf = I915_READ(pipeconf_reg); | 
 | 441 | 		I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); | 
| Chris Wilson | 19c55da | 2010-08-09 14:50:53 +0100 | [diff] [blame] | 442 | 		POSTING_READ(pipeconf_reg); | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 443 | 		/* Wait for next Vblank to substitue | 
 | 444 | 		 * border color for Color info */ | 
| Jesse Barnes | 9d0498a | 2010-08-18 13:20:54 -0700 | [diff] [blame] | 445 | 		intel_wait_for_vblank(dev, pipe); | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 446 | 		st00 = I915_READ8(VGA_MSR_WRITE); | 
 | 447 | 		status = ((st00 & (1 << 4)) != 0) ? | 
 | 448 | 			connector_status_connected : | 
 | 449 | 			connector_status_disconnected; | 
 | 450 |  | 
 | 451 | 		I915_WRITE(pipeconf_reg, pipeconf); | 
 | 452 | 	} else { | 
 | 453 | 		bool restore_vblank = false; | 
 | 454 | 		int count, detect; | 
 | 455 |  | 
 | 456 | 		/* | 
 | 457 | 		* If there isn't any border, add some. | 
 | 458 | 		* Yes, this will flicker | 
 | 459 | 		*/ | 
 | 460 | 		if (vblank_start <= vactive && vblank_end >= vtotal) { | 
 | 461 | 			uint32_t vsync = I915_READ(vsync_reg); | 
 | 462 | 			uint32_t vsync_start = (vsync & 0xffff) + 1; | 
 | 463 |  | 
 | 464 | 			vblank_start = vsync_start; | 
 | 465 | 			I915_WRITE(vblank_reg, | 
 | 466 | 				   (vblank_start - 1) | | 
 | 467 | 				   ((vblank_end - 1) << 16)); | 
 | 468 | 			restore_vblank = true; | 
 | 469 | 		} | 
 | 470 | 		/* sample in the vertical border, selecting the larger one */ | 
 | 471 | 		if (vblank_start - vactive >= vtotal - vblank_end) | 
 | 472 | 			vsample = (vblank_start + vactive) >> 1; | 
 | 473 | 		else | 
 | 474 | 			vsample = (vtotal + vblank_end) >> 1; | 
 | 475 |  | 
 | 476 | 		/* | 
 | 477 | 		 * Wait for the border to be displayed | 
 | 478 | 		 */ | 
 | 479 | 		while (I915_READ(pipe_dsl_reg) >= vactive) | 
 | 480 | 			; | 
 | 481 | 		while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample) | 
 | 482 | 			; | 
 | 483 | 		/* | 
 | 484 | 		 * Watch ST00 for an entire scanline | 
 | 485 | 		 */ | 
 | 486 | 		detect = 0; | 
 | 487 | 		count = 0; | 
 | 488 | 		do { | 
 | 489 | 			count++; | 
 | 490 | 			/* Read the ST00 VGA status register */ | 
 | 491 | 			st00 = I915_READ8(VGA_MSR_WRITE); | 
 | 492 | 			if (st00 & (1 << 4)) | 
 | 493 | 				detect++; | 
 | 494 | 		} while ((I915_READ(pipe_dsl_reg) == dsl)); | 
 | 495 |  | 
 | 496 | 		/* restore vblank if necessary */ | 
 | 497 | 		if (restore_vblank) | 
 | 498 | 			I915_WRITE(vblank_reg, vblank); | 
 | 499 | 		/* | 
 | 500 | 		 * If more than 3/4 of the scanline detected a monitor, | 
 | 501 | 		 * then it is assumed to be present. This works even on i830, | 
 | 502 | 		 * where there isn't any way to force the border color across | 
 | 503 | 		 * the screen | 
 | 504 | 		 */ | 
 | 505 | 		status = detect * 4 > count * 3 ? | 
 | 506 | 			 connector_status_connected : | 
 | 507 | 			 connector_status_disconnected; | 
 | 508 | 	} | 
 | 509 |  | 
 | 510 | 	/* Restore previous settings */ | 
 | 511 | 	I915_WRITE(bclrpat_reg, save_bclrpat); | 
 | 512 |  | 
 | 513 | 	return status; | 
 | 514 | } | 
 | 515 |  | 
| Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 516 | static enum drm_connector_status | 
| Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 517 | intel_crt_detect(struct drm_connector *connector, bool force) | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 518 | { | 
 | 519 | 	struct drm_device *dev = connector->dev; | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 520 | 	struct intel_crt *crt = intel_attached_crt(connector); | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 521 | 	enum drm_connector_status status; | 
| Daniel Vetter | e95c843 | 2012-04-20 21:03:36 +0200 | [diff] [blame] | 522 | 	struct intel_load_detect_pipe tmp; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 523 |  | 
| Chris Wilson | a6c45cf | 2010-09-17 00:32:17 +0100 | [diff] [blame] | 524 | 	if (I915_HAS_HOTPLUG(dev)) { | 
| Daniel Vetter | aaa3773 | 2012-06-16 15:30:32 +0200 | [diff] [blame] | 525 | 		/* We can not rely on the HPD pin always being correctly wired | 
 | 526 | 		 * up, for example many KVM do not pass it through, and so | 
 | 527 | 		 * only trust an assertion that the monitor is connected. | 
 | 528 | 		 */ | 
| Chris Wilson | 6ec3d0c | 2010-09-22 18:17:01 +0100 | [diff] [blame] | 529 | 		if (intel_crt_detect_hotplug(connector)) { | 
 | 530 | 			DRM_DEBUG_KMS("CRT detected via hotplug\n"); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 531 | 			return connector_status_connected; | 
| Daniel Vetter | aaa3773 | 2012-06-16 15:30:32 +0200 | [diff] [blame] | 532 | 		} else | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 533 | 			DRM_DEBUG_KMS("CRT not detected via hotplug\n"); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 534 | 	} | 
 | 535 |  | 
| David Müller | f5afcd3 | 2011-01-06 12:29:32 +0000 | [diff] [blame] | 536 | 	if (intel_crt_detect_ddc(connector)) | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 537 | 		return connector_status_connected; | 
 | 538 |  | 
| Daniel Vetter | aaa3773 | 2012-06-16 15:30:32 +0200 | [diff] [blame] | 539 | 	/* Load detection is broken on HPD capable machines. Whoever wants a | 
 | 540 | 	 * broken monitor (without edid) to work behind a broken kvm (that fails | 
 | 541 | 	 * to have the right resistors for HP detection) needs to fix this up. | 
 | 542 | 	 * For now just bail out. */ | 
 | 543 | 	if (I915_HAS_HOTPLUG(dev)) | 
 | 544 | 		return connector_status_disconnected; | 
 | 545 |  | 
| Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 546 | 	if (!force) | 
| Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 547 | 		return connector->status; | 
 | 548 |  | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 549 | 	/* for pre-945g platforms use load detect */ | 
| Daniel Vetter | d2434ab | 2012-08-12 21:20:10 +0200 | [diff] [blame] | 550 | 	if (intel_get_load_detect_pipe(connector, NULL, &tmp)) { | 
| Daniel Vetter | e95c843 | 2012-04-20 21:03:36 +0200 | [diff] [blame] | 551 | 		if (intel_crt_detect_ddc(connector)) | 
 | 552 | 			status = connector_status_connected; | 
 | 553 | 		else | 
 | 554 | 			status = intel_crt_load_detect(crt); | 
| Daniel Vetter | d2434ab | 2012-08-12 21:20:10 +0200 | [diff] [blame] | 555 | 		intel_release_load_detect_pipe(connector, &tmp); | 
| Daniel Vetter | e95c843 | 2012-04-20 21:03:36 +0200 | [diff] [blame] | 556 | 	} else | 
 | 557 | 		status = connector_status_unknown; | 
| Ma Ling | e4a5d54 | 2009-05-26 11:31:00 +0800 | [diff] [blame] | 558 |  | 
 | 559 | 	return status; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 560 | } | 
 | 561 |  | 
 | 562 | static void intel_crt_destroy(struct drm_connector *connector) | 
 | 563 | { | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 564 | 	drm_sysfs_connector_remove(connector); | 
 | 565 | 	drm_connector_cleanup(connector); | 
 | 566 | 	kfree(connector); | 
 | 567 | } | 
 | 568 |  | 
 | 569 | static int intel_crt_get_modes(struct drm_connector *connector) | 
 | 570 | { | 
| ling.ma@intel.com | 8e4d36b | 2009-06-30 11:35:34 +0800 | [diff] [blame] | 571 | 	struct drm_device *dev = connector->dev; | 
| Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 572 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
| Chris Wilson | 890f335 | 2010-09-14 16:46:59 +0100 | [diff] [blame] | 573 | 	int ret; | 
| Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 574 | 	struct i2c_adapter *i2c; | 
| ling.ma@intel.com | 8e4d36b | 2009-06-30 11:35:34 +0800 | [diff] [blame] | 575 |  | 
| Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 576 | 	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin); | 
| Jani Nikula | f1a2f5b | 2012-08-13 13:22:35 +0300 | [diff] [blame] | 577 | 	ret = intel_crt_ddc_get_modes(connector, i2c); | 
| ling.ma@intel.com | 8e4d36b | 2009-06-30 11:35:34 +0800 | [diff] [blame] | 578 | 	if (ret || !IS_G4X(dev)) | 
| Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 579 | 		return ret; | 
| ling.ma@intel.com | 8e4d36b | 2009-06-30 11:35:34 +0800 | [diff] [blame] | 580 |  | 
| ling.ma@intel.com | 8e4d36b | 2009-06-30 11:35:34 +0800 | [diff] [blame] | 581 | 	/* Try to probe digital port for output in DVI-I -> VGA mode. */ | 
| Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 582 | 	i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); | 
| Jani Nikula | f1a2f5b | 2012-08-13 13:22:35 +0300 | [diff] [blame] | 583 | 	return intel_crt_ddc_get_modes(connector, i2c); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 584 | } | 
 | 585 |  | 
 | 586 | static int intel_crt_set_property(struct drm_connector *connector, | 
 | 587 | 				  struct drm_property *property, | 
 | 588 | 				  uint64_t value) | 
 | 589 | { | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 590 | 	return 0; | 
 | 591 | } | 
 | 592 |  | 
| Chris Wilson | f326905 | 2011-01-24 15:17:08 +0000 | [diff] [blame] | 593 | static void intel_crt_reset(struct drm_connector *connector) | 
 | 594 | { | 
 | 595 | 	struct drm_device *dev = connector->dev; | 
 | 596 | 	struct intel_crt *crt = intel_attached_crt(connector); | 
 | 597 |  | 
 | 598 | 	if (HAS_PCH_SPLIT(dev)) | 
 | 599 | 		crt->force_hotplug_required = 1; | 
 | 600 | } | 
 | 601 |  | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 602 | /* | 
 | 603 |  * Routines for controlling stuff on the analog port | 
 | 604 |  */ | 
 | 605 |  | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 606 | static const struct drm_encoder_helper_funcs pch_encoder_funcs = { | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 607 | 	.mode_fixup = intel_crt_mode_fixup, | 
 | 608 | 	.prepare = intel_encoder_prepare, | 
 | 609 | 	.commit = intel_encoder_commit, | 
 | 610 | 	.mode_set = intel_crt_mode_set, | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 611 | 	.dpms = pch_crt_dpms, | 
 | 612 | }; | 
 | 613 |  | 
 | 614 | static const struct drm_encoder_helper_funcs gmch_encoder_funcs = { | 
 | 615 | 	.mode_fixup = intel_crt_mode_fixup, | 
 | 616 | 	.prepare = intel_encoder_prepare, | 
 | 617 | 	.commit = intel_encoder_commit, | 
 | 618 | 	.mode_set = intel_crt_mode_set, | 
 | 619 | 	.dpms = gmch_crt_dpms, | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 620 | }; | 
 | 621 |  | 
 | 622 | static const struct drm_connector_funcs intel_crt_connector_funcs = { | 
| Chris Wilson | f326905 | 2011-01-24 15:17:08 +0000 | [diff] [blame] | 623 | 	.reset = intel_crt_reset, | 
| Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 624 | 	.dpms = drm_helper_connector_dpms, | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 625 | 	.detect = intel_crt_detect, | 
 | 626 | 	.fill_modes = drm_helper_probe_single_connector_modes, | 
 | 627 | 	.destroy = intel_crt_destroy, | 
 | 628 | 	.set_property = intel_crt_set_property, | 
 | 629 | }; | 
 | 630 |  | 
 | 631 | static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = { | 
 | 632 | 	.mode_valid = intel_crt_mode_valid, | 
 | 633 | 	.get_modes = intel_crt_get_modes, | 
| Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 634 | 	.best_encoder = intel_best_encoder, | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 635 | }; | 
 | 636 |  | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 637 | static const struct drm_encoder_funcs intel_crt_enc_funcs = { | 
| Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 638 | 	.destroy = intel_encoder_destroy, | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 639 | }; | 
 | 640 |  | 
| Duncan Laurie | 8ca4013 | 2011-10-25 15:42:21 -0700 | [diff] [blame] | 641 | static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id) | 
 | 642 | { | 
| Daniel Vetter | bc0daf4 | 2012-04-01 13:16:49 +0200 | [diff] [blame] | 643 | 	DRM_INFO("Skipping CRT initialization for %s\n", id->ident); | 
| Duncan Laurie | 8ca4013 | 2011-10-25 15:42:21 -0700 | [diff] [blame] | 644 | 	return 1; | 
 | 645 | } | 
 | 646 |  | 
 | 647 | static const struct dmi_system_id intel_no_crt[] = { | 
 | 648 | 	{ | 
 | 649 | 		.callback = intel_no_crt_dmi_callback, | 
 | 650 | 		.ident = "ACER ZGB", | 
 | 651 | 		.matches = { | 
 | 652 | 			DMI_MATCH(DMI_SYS_VENDOR, "ACER"), | 
 | 653 | 			DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"), | 
 | 654 | 		}, | 
 | 655 | 	}, | 
 | 656 | 	{ } | 
 | 657 | }; | 
 | 658 |  | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 659 | void intel_crt_init(struct drm_device *dev) | 
 | 660 | { | 
 | 661 | 	struct drm_connector *connector; | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 662 | 	struct intel_crt *crt; | 
| Zhenyu Wang | 454c1ca | 2010-03-29 15:53:23 +0800 | [diff] [blame] | 663 | 	struct intel_connector *intel_connector; | 
| David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 664 | 	struct drm_i915_private *dev_priv = dev->dev_private; | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 665 | 	const struct drm_encoder_helper_funcs *encoder_helper_funcs; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 666 |  | 
| Duncan Laurie | 8ca4013 | 2011-10-25 15:42:21 -0700 | [diff] [blame] | 667 | 	/* Skip machines without VGA that falsely report hotplug events */ | 
 | 668 | 	if (dmi_check_system(intel_no_crt)) | 
 | 669 | 		return; | 
 | 670 |  | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 671 | 	crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL); | 
 | 672 | 	if (!crt) | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 673 | 		return; | 
 | 674 |  | 
| Zhenyu Wang | 454c1ca | 2010-03-29 15:53:23 +0800 | [diff] [blame] | 675 | 	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); | 
 | 676 | 	if (!intel_connector) { | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 677 | 		kfree(crt); | 
| Zhenyu Wang | 454c1ca | 2010-03-29 15:53:23 +0800 | [diff] [blame] | 678 | 		return; | 
 | 679 | 	} | 
 | 680 |  | 
 | 681 | 	connector = &intel_connector->base; | 
 | 682 | 	drm_connector_init(dev, &intel_connector->base, | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 683 | 			   &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); | 
 | 684 |  | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 685 | 	drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 686 | 			 DRM_MODE_ENCODER_DAC); | 
 | 687 |  | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 688 | 	intel_connector_attach_encoder(intel_connector, &crt->base); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 689 |  | 
| Chris Wilson | c9a1c4c | 2010-11-16 10:58:37 +0000 | [diff] [blame] | 690 | 	crt->base.type = INTEL_OUTPUT_ANALOG; | 
| Daniel Vetter | 66a9278 | 2012-07-12 20:08:18 +0200 | [diff] [blame] | 691 | 	crt->base.cloneable = true; | 
| Eugeni Dodonov | 59c859d | 2012-05-09 15:37:19 -0300 | [diff] [blame] | 692 | 	if (IS_HASWELL(dev)) | 
 | 693 | 		crt->base.crtc_mask = (1 << 0); | 
 | 694 | 	else | 
| Keith Packard | 0826874 | 2012-08-13 21:34:45 -0700 | [diff] [blame] | 695 | 		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); | 
| Eugeni Dodonov | 59c859d | 2012-05-09 15:37:19 -0300 | [diff] [blame] | 696 |  | 
| Daniel Vetter | dbb0257 | 2012-01-28 14:49:23 +0100 | [diff] [blame] | 697 | 	if (IS_GEN2(dev)) | 
 | 698 | 		connector->interlace_allowed = 0; | 
 | 699 | 	else | 
 | 700 | 		connector->interlace_allowed = 1; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 701 | 	connector->doublescan_allowed = 0; | 
 | 702 |  | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 703 | 	if (HAS_PCH_SPLIT(dev)) | 
 | 704 | 		encoder_helper_funcs = &pch_encoder_funcs; | 
 | 705 | 	else | 
 | 706 | 		encoder_helper_funcs = &gmch_encoder_funcs; | 
 | 707 |  | 
| Daniel Vetter | 540a895 | 2012-07-11 16:27:57 +0200 | [diff] [blame] | 708 | 	if (HAS_PCH_SPLIT(dev)) | 
 | 709 | 		crt->adpa_reg = PCH_ADPA; | 
 | 710 | 	else if (IS_VALLEYVIEW(dev)) | 
 | 711 | 		crt->adpa_reg = VLV_ADPA; | 
 | 712 | 	else | 
 | 713 | 		crt->adpa_reg = ADPA; | 
 | 714 |  | 
| Jesse Barnes | df0323c | 2012-04-17 15:06:33 -0700 | [diff] [blame] | 715 | 	drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs); | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 716 | 	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); | 
 | 717 |  | 
 | 718 | 	drm_sysfs_connector_add(connector); | 
| Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 719 |  | 
| Dave Airlie | eb1f8e4 | 2010-05-07 06:42:51 +0000 | [diff] [blame] | 720 | 	if (I915_HAS_HOTPLUG(dev)) | 
 | 721 | 		connector->polled = DRM_CONNECTOR_POLL_HPD; | 
 | 722 | 	else | 
 | 723 | 		connector->polled = DRM_CONNECTOR_POLL_CONNECT; | 
 | 724 |  | 
| Keith Packard | e7dbb2f | 2010-11-16 16:03:53 +0800 | [diff] [blame] | 725 | 	/* | 
 | 726 | 	 * Configure the automatic hotplug detection stuff | 
 | 727 | 	 */ | 
 | 728 | 	crt->force_hotplug_required = 0; | 
 | 729 | 	if (HAS_PCH_SPLIT(dev)) { | 
 | 730 | 		u32 adpa; | 
 | 731 |  | 
 | 732 | 		adpa = I915_READ(PCH_ADPA); | 
 | 733 | 		adpa &= ~ADPA_CRT_HOTPLUG_MASK; | 
 | 734 | 		adpa |= ADPA_HOTPLUG_BITS; | 
 | 735 | 		I915_WRITE(PCH_ADPA, adpa); | 
 | 736 | 		POSTING_READ(PCH_ADPA); | 
 | 737 |  | 
 | 738 | 		DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); | 
 | 739 | 		crt->force_hotplug_required = 1; | 
 | 740 | 	} | 
 | 741 |  | 
| Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 742 | 	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; | 
| Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 743 | } |