Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 1 | /* |
| 2 | * nVidia Tegra device tree board support |
| 3 | * |
| 4 | * Copyright (C) 2010 Secret Lab Technologies, Ltd. |
| 5 | * Copyright (C) 2010 Google, Inc. |
| 6 | * |
| 7 | * This software is licensed under the terms of the GNU General Public |
| 8 | * License version 2, as published by the Free Software Foundation, and |
| 9 | * may be copied, distributed, and modified under those terms. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/serial_8250.h> |
| 22 | #include <linux/clk.h> |
| 23 | #include <linux/dma-mapping.h> |
| 24 | #include <linux/irqdomain.h> |
| 25 | #include <linux/of.h> |
| 26 | #include <linux/of_address.h> |
| 27 | #include <linux/of_fdt.h> |
| 28 | #include <linux/of_irq.h> |
| 29 | #include <linux/of_platform.h> |
| 30 | #include <linux/pda_power.h> |
| 31 | #include <linux/io.h> |
| 32 | #include <linux/i2c.h> |
| 33 | #include <linux/i2c-tegra.h> |
| 34 | |
Marc Zyngier | afed2a2 | 2011-09-06 10:23:45 +0100 | [diff] [blame] | 35 | #include <asm/hardware/gic.h> |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 36 | #include <asm/mach-types.h> |
| 37 | #include <asm/mach/arch.h> |
| 38 | #include <asm/mach/time.h> |
| 39 | #include <asm/setup.h> |
pdeschrijver@nvidia.com | 0d4f747 | 2011-11-29 18:29:19 -0700 | [diff] [blame] | 40 | #include <asm/hardware/gic.h> |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 41 | |
| 42 | #include <mach/iomap.h> |
| 43 | #include <mach/irqs.h> |
| 44 | |
| 45 | #include "board.h" |
| 46 | #include "board-harmony.h" |
| 47 | #include "clock.h" |
| 48 | #include "devices.h" |
| 49 | |
| 50 | void harmony_pinmux_init(void); |
Marc Dietrich | cc2afa4 | 2011-11-01 10:37:05 +0000 | [diff] [blame] | 51 | void paz00_pinmux_init(void); |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 52 | void seaboard_pinmux_init(void); |
Stephen Warren | a7db2c1 | 2011-10-25 02:01:28 +0000 | [diff] [blame] | 53 | void trimslice_pinmux_init(void); |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 54 | void ventana_pinmux_init(void); |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 55 | |
pdeschrijver@nvidia.com | 0d4f747 | 2011-11-29 18:29:19 -0700 | [diff] [blame] | 56 | static const struct of_device_id tegra_dt_irq_match[] __initconst = { |
| 57 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init }, |
| 58 | { } |
| 59 | }; |
| 60 | |
| 61 | void __init tegra_dt_init_irq(void) |
| 62 | { |
| 63 | tegra_init_irq(); |
| 64 | of_irq_init(tegra_dt_irq_match); |
| 65 | } |
| 66 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 67 | struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { |
| 68 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), |
| 69 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), |
| 70 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), |
| 71 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL), |
| 72 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL), |
| 73 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL), |
| 74 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL), |
| 75 | OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL), |
| 76 | OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL), |
Stephen Warren | f110164 | 2011-12-07 15:13:40 -0700 | [diff] [blame] | 77 | OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL), |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 78 | OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL), |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 79 | OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0", |
| 80 | &tegra_ehci1_device.dev.platform_data), |
| 81 | OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1", |
| 82 | &tegra_ehci2_device.dev.platform_data), |
| 83 | OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", |
| 84 | &tegra_ehci3_device.dev.platform_data), |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 85 | {} |
| 86 | }; |
| 87 | |
| 88 | static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { |
| 89 | /* name parent rate enabled */ |
| 90 | { "uartd", "pll_p", 216000000, true }, |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 91 | { "usbd", "clk_m", 12000000, false }, |
| 92 | { "usb2", "clk_m", 12000000, false }, |
| 93 | { "usb3", "clk_m", 12000000, false }, |
Stephen Warren | 586187e | 2011-12-07 15:13:42 -0700 | [diff] [blame] | 94 | { "pll_a", "pll_p_out1", 56448000, true }, |
| 95 | { "pll_a_out0", "pll_a", 11289600, true }, |
| 96 | { "cdev1", NULL, 0, true }, |
| 97 | { "i2s1", "pll_a_out0", 11289600, false}, |
| 98 | { "i2s2", "pll_a_out0", 11289600, false}, |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 99 | { NULL, NULL, 0, 0}, |
| 100 | }; |
| 101 | |
| 102 | static struct of_device_id tegra_dt_match_table[] __initdata = { |
| 103 | { .compatible = "simple-bus", }, |
| 104 | {} |
| 105 | }; |
| 106 | |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 107 | static struct { |
| 108 | char *machine; |
| 109 | void (*init)(void); |
| 110 | } pinmux_configs[] = { |
Stephen Warren | a7db2c1 | 2011-10-25 02:01:28 +0000 | [diff] [blame] | 111 | { "compulab,trimslice", trimslice_pinmux_init }, |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 112 | { "nvidia,harmony", harmony_pinmux_init }, |
Marc Dietrich | cc2afa4 | 2011-11-01 10:37:05 +0000 | [diff] [blame] | 113 | { "compal,paz00", paz00_pinmux_init }, |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 114 | { "nvidia,seaboard", seaboard_pinmux_init }, |
| 115 | { "nvidia,ventana", ventana_pinmux_init }, |
| 116 | }; |
| 117 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 118 | static void __init tegra_dt_init(void) |
| 119 | { |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 120 | int i; |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 121 | |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 122 | tegra_clk_init_from_table(tegra_dt_clk_init_table); |
| 123 | |
Stephen Warren | 4b91b6f | 2011-10-25 02:01:27 +0000 | [diff] [blame] | 124 | /* |
| 125 | * Finished with the static registrations now; fill in the missing |
| 126 | * devices |
| 127 | */ |
| 128 | of_platform_populate(NULL, tegra_dt_match_table, |
| 129 | tegra20_auxdata_lookup, NULL); |
| 130 | |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 131 | for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { |
| 132 | if (of_machine_is_compatible(pinmux_configs[i].machine)) { |
| 133 | pinmux_configs[i].init(); |
| 134 | break; |
| 135 | } |
| 136 | } |
| 137 | |
| 138 | WARN(i == ARRAY_SIZE(pinmux_configs), |
| 139 | "Unknown platform! Pinmuxing not initialized\n"); |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | static const char * tegra_dt_board_compat[] = { |
Stephen Warren | a7db2c1 | 2011-10-25 02:01:28 +0000 | [diff] [blame] | 143 | "compulab,trimslice", |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 144 | "nvidia,harmony", |
Marc Dietrich | cc2afa4 | 2011-11-01 10:37:05 +0000 | [diff] [blame] | 145 | "compal,paz00", |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 146 | "nvidia,seaboard", |
Peter De Schrijver | add29e6 | 2011-10-12 14:53:05 +0300 | [diff] [blame] | 147 | "nvidia,ventana", |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 148 | NULL |
| 149 | }; |
| 150 | |
| 151 | DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)") |
| 152 | .map_io = tegra_map_common_io, |
| 153 | .init_early = tegra_init_early, |
pdeschrijver@nvidia.com | 0d4f747 | 2011-11-29 18:29:19 -0700 | [diff] [blame] | 154 | .init_irq = tegra_dt_init_irq, |
Marc Zyngier | afed2a2 | 2011-09-06 10:23:45 +0100 | [diff] [blame] | 155 | .handle_irq = gic_handle_irq, |
Grant Likely | 8e267f3 | 2011-07-19 17:26:54 -0600 | [diff] [blame] | 156 | .timer = &tegra_timer, |
| 157 | .init_machine = tegra_dt_init, |
| 158 | .dt_compat = tegra_dt_board_compat, |
| 159 | MACHINE_END |