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Oded Gabbay130e0372015-06-12 21:35:14 +03001/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23#include "amdgpu_amdkfd.h"
Jammy Zhou2f7d10b2015-07-22 11:29:01 +080024#include "amd_shared.h"
Oded Gabbay130e0372015-06-12 21:35:14 +030025#include <drm/drmP.h>
26#include "amdgpu.h"
27#include <linux/module.h>
28
29const struct kfd2kgd_calls *kfd2kgd;
30const struct kgd2kfd_calls *kgd2kfd;
31bool (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
32
Oded Gabbayefb1c652016-02-09 13:30:12 +020033int amdgpu_amdkfd_init(void)
Oded Gabbay130e0372015-06-12 21:35:14 +030034{
Oded Gabbayefb1c652016-02-09 13:30:12 +020035 int ret;
36
Oded Gabbay130e0372015-06-12 21:35:14 +030037#if defined(CONFIG_HSA_AMD_MODULE)
Oded Gabbayefb1c652016-02-09 13:30:12 +020038 int (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
Oded Gabbay130e0372015-06-12 21:35:14 +030039
40 kgd2kfd_init_p = symbol_request(kgd2kfd_init);
41
42 if (kgd2kfd_init_p == NULL)
Oded Gabbayefb1c652016-02-09 13:30:12 +020043 return -ENOENT;
44
45 ret = kgd2kfd_init_p(KFD_INTERFACE_VERSION, &kgd2kfd);
46 if (ret) {
47 symbol_put(kgd2kfd_init);
48 kgd2kfd = NULL;
49 }
50
51#elif defined(CONFIG_HSA_AMD)
52 ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
53 if (ret)
54 kgd2kfd = NULL;
55
56#else
57 ret = -ENOENT;
Oded Gabbay130e0372015-06-12 21:35:14 +030058#endif
Oded Gabbayefb1c652016-02-09 13:30:12 +020059
60 return ret;
Oded Gabbay130e0372015-06-12 21:35:14 +030061}
62
63bool amdgpu_amdkfd_load_interface(struct amdgpu_device *rdev)
64{
Oded Gabbay130e0372015-06-12 21:35:14 +030065 switch (rdev->asic_type) {
Alex Deucher41548ef2015-07-31 17:20:14 -040066#ifdef CONFIG_DRM_AMDGPU_CIK
Oded Gabbay130e0372015-06-12 21:35:14 +030067 case CHIP_KAVERI:
Oded Gabbay32c22e92015-06-12 21:38:22 +030068 kfd2kgd = amdgpu_amdkfd_gfx_7_get_functions();
69 break;
Alex Deucher41548ef2015-07-31 17:20:14 -040070#endif
Ben Gozff758a12014-10-07 14:43:07 +030071 case CHIP_CARRIZO:
72 kfd2kgd = amdgpu_amdkfd_gfx_8_0_get_functions();
73 break;
Oded Gabbay130e0372015-06-12 21:35:14 +030074 default:
75 return false;
76 }
77
Oded Gabbay130e0372015-06-12 21:35:14 +030078 return true;
Oded Gabbay130e0372015-06-12 21:35:14 +030079}
80
81void amdgpu_amdkfd_fini(void)
82{
83 if (kgd2kfd) {
84 kgd2kfd->exit();
85 symbol_put(kgd2kfd_init);
86 }
87}
88
89void amdgpu_amdkfd_device_probe(struct amdgpu_device *rdev)
90{
91 if (kgd2kfd)
92 rdev->kfd = kgd2kfd->probe((struct kgd_dev *)rdev,
93 rdev->pdev, kfd2kgd);
94}
95
96void amdgpu_amdkfd_device_init(struct amdgpu_device *rdev)
97{
98 if (rdev->kfd) {
99 struct kgd2kfd_shared_resources gpu_resources = {
100 .compute_vmid_bitmap = 0xFF00,
101
102 .first_compute_pipe = 1,
103 .compute_pipe_count = 4 - 1,
104 };
105
106 amdgpu_doorbell_get_kfd_info(rdev,
107 &gpu_resources.doorbell_physical_address,
108 &gpu_resources.doorbell_aperture_size,
109 &gpu_resources.doorbell_start_offset);
110
111 kgd2kfd->device_init(rdev->kfd, &gpu_resources);
112 }
113}
114
115void amdgpu_amdkfd_device_fini(struct amdgpu_device *rdev)
116{
117 if (rdev->kfd) {
118 kgd2kfd->device_exit(rdev->kfd);
119 rdev->kfd = NULL;
120 }
121}
122
123void amdgpu_amdkfd_interrupt(struct amdgpu_device *rdev,
124 const void *ih_ring_entry)
125{
126 if (rdev->kfd)
127 kgd2kfd->interrupt(rdev->kfd, ih_ring_entry);
128}
129
130void amdgpu_amdkfd_suspend(struct amdgpu_device *rdev)
131{
132 if (rdev->kfd)
133 kgd2kfd->suspend(rdev->kfd);
134}
135
136int amdgpu_amdkfd_resume(struct amdgpu_device *rdev)
137{
138 int r = 0;
139
140 if (rdev->kfd)
141 r = kgd2kfd->resume(rdev->kfd);
142
143 return r;
144}
145
Oded Gabbay130e0372015-06-12 21:35:14 +0300146int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
147 void **mem_obj, uint64_t *gpu_addr,
148 void **cpu_ptr)
149{
150 struct amdgpu_device *rdev = (struct amdgpu_device *)kgd;
151 struct kgd_mem **mem = (struct kgd_mem **) mem_obj;
152 int r;
153
154 BUG_ON(kgd == NULL);
155 BUG_ON(gpu_addr == NULL);
156 BUG_ON(cpu_ptr == NULL);
157
158 *mem = kmalloc(sizeof(struct kgd_mem), GFP_KERNEL);
159 if ((*mem) == NULL)
160 return -ENOMEM;
161
162 r = amdgpu_bo_create(rdev, size, PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_GTT,
Christian König72d76682015-09-03 17:34:59 +0200163 AMDGPU_GEM_CREATE_CPU_GTT_USWC, NULL, NULL, &(*mem)->bo);
Oded Gabbay130e0372015-06-12 21:35:14 +0300164 if (r) {
165 dev_err(rdev->dev,
166 "failed to allocate BO for amdkfd (%d)\n", r);
167 return r;
168 }
169
170 /* map the buffer */
171 r = amdgpu_bo_reserve((*mem)->bo, true);
172 if (r) {
173 dev_err(rdev->dev, "(%d) failed to reserve bo for amdkfd\n", r);
174 goto allocate_mem_reserve_bo_failed;
175 }
176
177 r = amdgpu_bo_pin((*mem)->bo, AMDGPU_GEM_DOMAIN_GTT,
178 &(*mem)->gpu_addr);
179 if (r) {
180 dev_err(rdev->dev, "(%d) failed to pin bo for amdkfd\n", r);
181 goto allocate_mem_pin_bo_failed;
182 }
183 *gpu_addr = (*mem)->gpu_addr;
184
185 r = amdgpu_bo_kmap((*mem)->bo, &(*mem)->cpu_ptr);
186 if (r) {
187 dev_err(rdev->dev,
188 "(%d) failed to map bo to kernel for amdkfd\n", r);
189 goto allocate_mem_kmap_bo_failed;
190 }
191 *cpu_ptr = (*mem)->cpu_ptr;
192
193 amdgpu_bo_unreserve((*mem)->bo);
194
195 return 0;
196
197allocate_mem_kmap_bo_failed:
198 amdgpu_bo_unpin((*mem)->bo);
199allocate_mem_pin_bo_failed:
200 amdgpu_bo_unreserve((*mem)->bo);
201allocate_mem_reserve_bo_failed:
202 amdgpu_bo_unref(&(*mem)->bo);
203
204 return r;
205}
206
207void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
208{
209 struct kgd_mem *mem = (struct kgd_mem *) mem_obj;
210
211 BUG_ON(mem == NULL);
212
213 amdgpu_bo_reserve(mem->bo, true);
214 amdgpu_bo_kunmap(mem->bo);
215 amdgpu_bo_unpin(mem->bo);
216 amdgpu_bo_unreserve(mem->bo);
217 amdgpu_bo_unref(&(mem->bo));
218 kfree(mem);
219}
220
221uint64_t get_vmem_size(struct kgd_dev *kgd)
222{
223 struct amdgpu_device *rdev =
224 (struct amdgpu_device *)kgd;
225
226 BUG_ON(kgd == NULL);
227
228 return rdev->mc.real_vram_size;
229}
230
231uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
232{
233 struct amdgpu_device *rdev = (struct amdgpu_device *)kgd;
234
Alex Deucherb95e31f2016-07-07 15:01:42 -0400235 if (rdev->gfx.funcs->get_gpu_clock_counter)
236 return rdev->gfx.funcs->get_gpu_clock_counter(rdev);
Oded Gabbay130e0372015-06-12 21:35:14 +0300237 return 0;
238}
239
240uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
241{
242 struct amdgpu_device *rdev = (struct amdgpu_device *)kgd;
243
244 /* The sclk is in quantas of 10kHz */
245 return rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100;
246}