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Marc Zyngier6d6ec202015-10-19 18:02:48 +01001/*
2 * Copyright (C) 2012-2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#include <linux/compiler.h>
19#include <linux/kvm_host.h>
20
Marc Zyngier9d8415d2015-10-25 19:57:11 +000021#include <asm/kvm_asm.h>
Marc Zyngier13720a52016-01-28 13:44:07 +000022#include <asm/kvm_hyp.h>
Marc Zyngier6d6ec202015-10-19 18:02:48 +010023
Marc Zyngierd1526e52015-10-28 13:59:46 +000024/* Yes, this does nothing, on purpose */
25static void __hyp_text __sysreg_do_nothing(struct kvm_cpu_context *ctxt) { }
26
Marc Zyngier9c6c3562015-10-28 12:39:38 +000027/*
28 * Non-VHE: Both host and guest must save everything.
29 *
James Morse1f742672018-01-08 15:38:07 +000030 * VHE: Host must save tpidr*_el0, actlr_el1, mdscr_el1, sp_el0,
31 * and guest must save everything.
Marc Zyngier9c6c3562015-10-28 12:39:38 +000032 */
33
34static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
35{
36 ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1);
37 ctxt->sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0);
38 ctxt->sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0);
Marc Zyngier4c47eb12016-07-19 13:56:54 +010039 ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000040 ctxt->gp_regs.regs.sp = read_sysreg(sp_el0);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000041}
42
Marc Zyngieredef5282015-10-28 12:17:35 +000043static void __hyp_text __sysreg_save_state(struct kvm_cpu_context *ctxt)
Marc Zyngier6d6ec202015-10-19 18:02:48 +010044{
45 ctxt->sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2);
46 ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1);
Marc Zyngier094f8232015-10-28 12:56:25 +000047 ctxt->sys_regs[SCTLR_EL1] = read_sysreg_el1(sctlr);
48 ctxt->sys_regs[CPACR_EL1] = read_sysreg_el1(cpacr);
49 ctxt->sys_regs[TTBR0_EL1] = read_sysreg_el1(ttbr0);
50 ctxt->sys_regs[TTBR1_EL1] = read_sysreg_el1(ttbr1);
51 ctxt->sys_regs[TCR_EL1] = read_sysreg_el1(tcr);
52 ctxt->sys_regs[ESR_EL1] = read_sysreg_el1(esr);
53 ctxt->sys_regs[AFSR0_EL1] = read_sysreg_el1(afsr0);
54 ctxt->sys_regs[AFSR1_EL1] = read_sysreg_el1(afsr1);
55 ctxt->sys_regs[FAR_EL1] = read_sysreg_el1(far);
56 ctxt->sys_regs[MAIR_EL1] = read_sysreg_el1(mair);
57 ctxt->sys_regs[VBAR_EL1] = read_sysreg_el1(vbar);
58 ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg_el1(contextidr);
59 ctxt->sys_regs[AMAIR_EL1] = read_sysreg_el1(amair);
60 ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg_el1(cntkctl);
Marc Zyngier6d6ec202015-10-19 18:02:48 +010061 ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1);
James Morse1f742672018-01-08 15:38:07 +000062 ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1);
Marc Zyngier6d6ec202015-10-19 18:02:48 +010063
Marc Zyngier6d6ec202015-10-19 18:02:48 +010064 ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1);
Marc Zyngier094f8232015-10-28 12:56:25 +000065 ctxt->gp_regs.elr_el1 = read_sysreg_el1(elr);
66 ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(spsr);
James Morse1f742672018-01-08 15:38:07 +000067 ctxt->gp_regs.regs.pc = read_sysreg_el2(elr);
68 ctxt->gp_regs.regs.pstate = read_sysreg_el2(spsr);
James Morsec773ae22018-01-15 19:39:02 +000069
70 if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
71 ctxt->sys_regs[DISR_EL1] = read_sysreg_s(SYS_VDISR_EL2);
Marc Zyngier6d6ec202015-10-19 18:02:48 +010072}
73
Marc Zyngierd1526e52015-10-28 13:59:46 +000074static hyp_alternate_select(__sysreg_call_save_host_state,
75 __sysreg_save_state, __sysreg_do_nothing,
76 ARM64_HAS_VIRT_HOST_EXTN);
77
Marc Zyngieredef5282015-10-28 12:17:35 +000078void __hyp_text __sysreg_save_host_state(struct kvm_cpu_context *ctxt)
79{
Marc Zyngierd1526e52015-10-28 13:59:46 +000080 __sysreg_call_save_host_state()(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000081 __sysreg_save_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +000082}
83
84void __hyp_text __sysreg_save_guest_state(struct kvm_cpu_context *ctxt)
85{
86 __sysreg_save_state(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000087 __sysreg_save_common_state(ctxt);
88}
89
90static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)
91{
92 write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1);
93 write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0);
94 write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0);
Marc Zyngier4c47eb12016-07-19 13:56:54 +010095 write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000096 write_sysreg(ctxt->gp_regs.regs.sp, sp_el0);
Marc Zyngieredef5282015-10-28 12:17:35 +000097}
98
99static void __hyp_text __sysreg_restore_state(struct kvm_cpu_context *ctxt)
Marc Zyngier6d6ec202015-10-19 18:02:48 +0100100{
Marc Zyngier094f8232015-10-28 12:56:25 +0000101 write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2);
102 write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1);
103 write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1], sctlr);
104 write_sysreg_el1(ctxt->sys_regs[CPACR_EL1], cpacr);
105 write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1], ttbr0);
106 write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1], ttbr1);
107 write_sysreg_el1(ctxt->sys_regs[TCR_EL1], tcr);
108 write_sysreg_el1(ctxt->sys_regs[ESR_EL1], esr);
109 write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1], afsr0);
110 write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1], afsr1);
111 write_sysreg_el1(ctxt->sys_regs[FAR_EL1], far);
112 write_sysreg_el1(ctxt->sys_regs[MAIR_EL1], mair);
113 write_sysreg_el1(ctxt->sys_regs[VBAR_EL1], vbar);
114 write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],contextidr);
115 write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1], amair);
116 write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1], cntkctl);
117 write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1);
James Morse1f742672018-01-08 15:38:07 +0000118 write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1);
Marc Zyngier6d6ec202015-10-19 18:02:48 +0100119
Marc Zyngier094f8232015-10-28 12:56:25 +0000120 write_sysreg(ctxt->gp_regs.sp_el1, sp_el1);
121 write_sysreg_el1(ctxt->gp_regs.elr_el1, elr);
122 write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],spsr);
James Morse1f742672018-01-08 15:38:07 +0000123 write_sysreg_el2(ctxt->gp_regs.regs.pc, elr);
124 write_sysreg_el2(ctxt->gp_regs.regs.pstate, spsr);
James Morsec773ae22018-01-15 19:39:02 +0000125
126 if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
127 write_sysreg_s(ctxt->sys_regs[DISR_EL1], SYS_VDISR_EL2);
Marc Zyngier6d6ec202015-10-19 18:02:48 +0100128}
Marc Zyngierc209ec82015-10-19 19:28:29 +0100129
Marc Zyngierd1526e52015-10-28 13:59:46 +0000130static hyp_alternate_select(__sysreg_call_restore_host_state,
131 __sysreg_restore_state, __sysreg_do_nothing,
132 ARM64_HAS_VIRT_HOST_EXTN);
133
Marc Zyngieredef5282015-10-28 12:17:35 +0000134void __hyp_text __sysreg_restore_host_state(struct kvm_cpu_context *ctxt)
135{
Marc Zyngierd1526e52015-10-28 13:59:46 +0000136 __sysreg_call_restore_host_state()(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +0000137 __sysreg_restore_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +0000138}
139
140void __hyp_text __sysreg_restore_guest_state(struct kvm_cpu_context *ctxt)
141{
142 __sysreg_restore_state(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +0000143 __sysreg_restore_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +0000144}
145
Marc Zyngierc209ec82015-10-19 19:28:29 +0100146void __hyp_text __sysreg32_save_state(struct kvm_vcpu *vcpu)
147{
148 u64 *spsr, *sysreg;
149
150 if (read_sysreg(hcr_el2) & HCR_RW)
151 return;
152
153 spsr = vcpu->arch.ctxt.gp_regs.spsr;
154 sysreg = vcpu->arch.ctxt.sys_regs;
155
156 spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt);
157 spsr[KVM_SPSR_UND] = read_sysreg(spsr_und);
158 spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq);
159 spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq);
160
161 sysreg[DACR32_EL2] = read_sysreg(dacr32_el2);
162 sysreg[IFSR32_EL2] = read_sysreg(ifsr32_el2);
163
Marc Zyngierc13d1682015-10-26 08:34:09 +0000164 if (__fpsimd_enabled())
Marc Zyngierc209ec82015-10-19 19:28:29 +0100165 sysreg[FPEXC32_EL2] = read_sysreg(fpexc32_el2);
166
167 if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
168 sysreg[DBGVCR32_EL2] = read_sysreg(dbgvcr32_el2);
169}
170
171void __hyp_text __sysreg32_restore_state(struct kvm_vcpu *vcpu)
172{
173 u64 *spsr, *sysreg;
174
175 if (read_sysreg(hcr_el2) & HCR_RW)
176 return;
177
178 spsr = vcpu->arch.ctxt.gp_regs.spsr;
179 sysreg = vcpu->arch.ctxt.sys_regs;
180
181 write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt);
182 write_sysreg(spsr[KVM_SPSR_UND], spsr_und);
183 write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq);
184 write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq);
185
186 write_sysreg(sysreg[DACR32_EL2], dacr32_el2);
187 write_sysreg(sysreg[IFSR32_EL2], ifsr32_el2);
188
189 if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
190 write_sysreg(sysreg[DBGVCR32_EL2], dbgvcr32_el2);
191}