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Vimal Singh2f70a1e2010-02-15 10:03:33 -08001/*
2 * gpmc-nand.c
3 *
4 * Copyright (C) 2009 Texas Instruments
5 * Vimal Singh <vimalsingh@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/io.h>
Sukumar Ghoraid5ce2b62011-01-28 15:42:03 +053015#include <linux/mtd/nand.h>
Arnd Bergmann22037472012-08-24 15:21:06 +020016#include <linux/platform_data/mtd-nand-omap2.h>
Vimal Singh2f70a1e2010-02-15 10:03:33 -080017
18#include <asm/mach/flash.h>
19
Afzal Mohammed3ef5d002012-10-05 10:37:27 +053020#include "gpmc.h"
Tony Lindgrendbc04162012-08-31 10:59:07 -070021#include "soc.h"
Afzal Mohammedbc3668e2012-09-29 12:26:13 +053022#include "gpmc-nand.h"
23
24/* minimum size for IO mapping */
25#define NAND_IO_SIZE 4
Tony Lindgrendbc04162012-08-31 10:59:07 -070026
Afzal Mohammed2ee30f02012-08-30 12:53:24 -070027static struct resource gpmc_nand_resource[] = {
28 {
29 .flags = IORESOURCE_MEM,
30 },
31 {
32 .flags = IORESOURCE_IRQ,
33 },
34 {
35 .flags = IORESOURCE_IRQ,
36 },
Vimal Singh2f70a1e2010-02-15 10:03:33 -080037};
38
39static struct platform_device gpmc_nand_device = {
40 .name = "omap2-nand",
41 .id = 0,
Afzal Mohammed2ee30f02012-08-30 12:53:24 -070042 .num_resources = ARRAY_SIZE(gpmc_nand_resource),
43 .resource = gpmc_nand_resource,
Vimal Singh2f70a1e2010-02-15 10:03:33 -080044};
45
Daniel Mack504f3c62012-12-14 11:36:42 +010046static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
Afzal Mohammed3852ccd2012-10-01 02:47:28 +053047{
48 /* support only OMAP3 class */
Daniel Mackf50a0382012-12-14 11:36:43 +010049 if (!cpu_is_omap34xx() && !soc_is_am33xx()) {
Afzal Mohammed3852ccd2012-10-01 02:47:28 +053050 pr_err("BCH ecc is not supported on this CPU\n");
51 return 0;
52 }
53
54 /*
Daniel Mackf50a0382012-12-14 11:36:43 +010055 * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
56 * and AM33xx derivates. Other chips may be added if confirmed to work.
Afzal Mohammed3852ccd2012-10-01 02:47:28 +053057 */
58 if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) &&
Daniel Mackf50a0382012-12-14 11:36:43 +010059 (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)) &&
60 (!soc_is_am33xx())) {
Afzal Mohammed3852ccd2012-10-01 02:47:28 +053061 pr_err("BCH 4-bit mode is not supported on this CPU\n");
62 return 0;
63 }
64
65 return 1;
66}
67
Ezequiel Garciad0020cc2013-10-27 21:51:47 -030068/* This function will go away once the device-tree convertion is complete */
69static void gpmc_set_legacy(struct omap_nand_platform_data *gpmc_nand_data,
70 struct gpmc_settings *s)
71{
72 /* Enable RD PIN Monitoring Reg */
73 if (gpmc_nand_data->dev_ready) {
74 s->wait_on_read = true;
75 s->wait_on_write = true;
76 }
Ezequiel Garciabbc28cd2013-10-27 21:51:48 -030077
78 if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
79 s->device_width = GPMC_DEVWIDTH_16BIT;
80 else
81 s->device_width = GPMC_DEVWIDTH_8BIT;
Ezequiel Garciad0020cc2013-10-27 21:51:47 -030082}
83
Daniel Mack504f3c62012-12-14 11:36:42 +010084int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
85 struct gpmc_timings *gpmc_t)
Vimal Singh2f70a1e2010-02-15 10:03:33 -080086{
Vimal Singh2f70a1e2010-02-15 10:03:33 -080087 int err = 0;
Jon Hunter24db7ec2013-02-21 15:43:08 -060088 struct gpmc_settings s;
Vimal Singh2f70a1e2010-02-15 10:03:33 -080089 struct device *dev = &gpmc_nand_device.dev;
90
Jon Hunter24db7ec2013-02-21 15:43:08 -060091 memset(&s, 0, sizeof(struct gpmc_settings));
92
Vimal Singh2f70a1e2010-02-15 10:03:33 -080093 gpmc_nand_device.dev.platform_data = gpmc_nand_data;
94
95 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
Afzal Mohammed2ee30f02012-08-30 12:53:24 -070096 (unsigned long *)&gpmc_nand_resource[0].start);
Vimal Singh2f70a1e2010-02-15 10:03:33 -080097 if (err < 0) {
Ezequiel Garcia097c9da2013-02-12 16:22:20 -030098 dev_err(dev, "Cannot request GPMC CS %d, error %d\n",
99 gpmc_nand_data->cs, err);
Vimal Singh2f70a1e2010-02-15 10:03:33 -0800100 return err;
101 }
102
Afzal Mohammed2ee30f02012-08-30 12:53:24 -0700103 gpmc_nand_resource[0].end = gpmc_nand_resource[0].start +
104 NAND_IO_SIZE - 1;
Afzal Mohammed9222e3a2012-08-30 12:53:23 -0700105
Afzal Mohammed2ee30f02012-08-30 12:53:24 -0700106 gpmc_nand_resource[1].start =
107 gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
108 gpmc_nand_resource[2].start =
109 gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
Afzal Mohammedbc3668e2012-09-29 12:26:13 +0530110
111 if (gpmc_t) {
Christoph Fritz4d584362013-04-19 18:29:41 +0200112 err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t);
Afzal Mohammedbc3668e2012-09-29 12:26:13 +0530113 if (err < 0) {
114 dev_err(dev, "Unable to set gpmc timings: %d\n", err);
115 return err;
116 }
Vimal Singh2f70a1e2010-02-15 10:03:33 -0800117 }
118
Ezequiel Garciad0020cc2013-10-27 21:51:47 -0300119 if (gpmc_nand_data->of_node)
Ezequiel Garciae2e699b2013-10-27 21:51:46 -0300120 gpmc_read_settings_dt(gpmc_nand_data->of_node, &s);
Ezequiel Garciad0020cc2013-10-27 21:51:47 -0300121 else
122 gpmc_set_legacy(gpmc_nand_data, &s);
Ezequiel Garciae2e699b2013-10-27 21:51:46 -0300123
124 s.device_nand = true;
125
Ezequiel Garciae2e699b2013-10-27 21:51:46 -0300126 err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
127 if (err < 0)
128 goto out_free_cs;
129
130 err = gpmc_configure(GPMC_CONFIG_WP, 0);
131 if (err < 0)
132 goto out_free_cs;
133
Afzal Mohammedd126d012012-08-30 12:53:22 -0700134 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
135
Afzal Mohammed3852ccd2012-10-01 02:47:28 +0530136 if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt))
137 return -EINVAL;
138
Vimal Singh2f70a1e2010-02-15 10:03:33 -0800139 err = platform_device_register(&gpmc_nand_device);
140 if (err < 0) {
141 dev_err(dev, "Unable to register NAND device\n");
142 goto out_free_cs;
143 }
144
145 return 0;
146
147out_free_cs:
148 gpmc_cs_free(gpmc_nand_data->cs);
149
150 return err;
151}