blob: 0b97c9acebaa79b95fba196055c59d5128d6a3d3 [file] [log] [blame]
Larry Fingerc592e632012-10-25 13:46:32 -05001/******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30#include "../wifi.h"
31#include <linux/vmalloc.h>
32#include <linux/module.h>
33
34#include "../core.h"
35#include "../pci.h"
Larry Finger3fc01652013-09-26 13:25:32 -050036#include "../base.h"
Larry Fingerc592e632012-10-25 13:46:32 -050037#include "reg.h"
38#include "def.h"
39#include "phy.h"
Larry Finger0a168b42014-02-28 15:16:47 -060040#include "../rtl8723com/phy_common.h"
Larry Fingerc592e632012-10-25 13:46:32 -050041#include "dm.h"
42#include "hw.h"
43#include "sw.h"
44#include "trx.h"
45#include "led.h"
46#include "table.h"
47#include "hal_btc.h"
48
49static void rtl8723ae_init_aspm_vars(struct ieee80211_hw *hw)
50{
51 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
52
53 /*close ASPM for AMD defaultly */
54 rtlpci->const_amdpci_aspm = 0;
55
56 /* ASPM PS mode.
57 * 0 - Disable ASPM,
58 * 1 - Enable ASPM without Clock Req,
59 * 2 - Enable ASPM with Clock Req,
60 * 3 - Alwyas Enable ASPM with Clock Req,
61 * 4 - Always Enable ASPM without Clock Req.
62 * set defult to RTL8192CE:3 RTL8192E:2
63 */
64 rtlpci->const_pci_aspm = 3;
65
66 /*Setting for PCI-E device */
67 rtlpci->const_devicepci_aspm_setting = 0x03;
68
69 /*Setting for PCI-E bridge */
70 rtlpci->const_hostpci_aspm_setting = 0x02;
71
72 /* In Hw/Sw Radio Off situation.
73 * 0 - Default,
74 * 1 - From ASPM setting without low Mac Pwr,
75 * 2 - From ASPM setting with low Mac Pwr,
76 * 3 - Bus D3
77 * set default to RTL8192CE:0 RTL8192SE:2
78 */
79 rtlpci->const_hwsw_rfoff_d3 = 0;
80
81 /* This setting works for those device with
82 * backdoor ASPM setting such as EPHY setting.
83 * 0 - Not support ASPM,
84 * 1 - Support ASPM,
85 * 2 - According to chipset.
86 */
87 rtlpci->const_support_pciaspm = 1;
88}
89
90int rtl8723ae_init_sw_vars(struct ieee80211_hw *hw)
91{
92 struct rtl_priv *rtlpriv = rtl_priv(hw);
93 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
94 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
95 int err;
96
97 rtl8723ae_bt_reg_init(hw);
98 rtlpriv->dm.dm_initialgain_enable = 1;
99 rtlpriv->dm.dm_flag = 0;
100 rtlpriv->dm.disable_framebursting = 0;
101 rtlpriv->dm.thermalvalue = 0;
102 rtlpci->transmit_config = CFENDFORM | BIT(12) | BIT(13);
103
104 /* compatible 5G band 88ce just 2.4G band & smsp */
105 rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
106 rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
107 rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
108
109 rtlpci->receive_config = (RCR_APPFCS |
110 RCR_APP_MIC |
111 RCR_APP_ICV |
112 RCR_APP_PHYST_RXFF |
113 RCR_HTC_LOC_CTRL |
114 RCR_AMF |
115 RCR_ACF |
116 RCR_ADF |
117 RCR_AICV |
118 RCR_AB |
119 RCR_AM |
120 RCR_APM |
121 0);
122
123 rtlpci->irq_mask[0] =
124 (u32) (PHIMR_ROK |
125 PHIMR_RDU |
126 PHIMR_VODOK |
127 PHIMR_VIDOK |
128 PHIMR_BEDOK |
129 PHIMR_BKDOK |
130 PHIMR_MGNTDOK |
131 PHIMR_HIGHDOK |
132 PHIMR_C2HCMD |
133 PHIMR_HISRE_IND |
134 PHIMR_TSF_BIT32_TOGGLE |
135 PHIMR_TXBCNOK |
136 PHIMR_PSTIMEOUT |
137 0);
138
139 rtlpci->irq_mask[1] = (u32)(PHIMR_RXFOVW | 0);
140
141 /* for debug level */
142 rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug;
143 /* for LPS & IPS */
144 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
145 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
146 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
147 rtlpriv->psc.reg_fwctrl_lps = 3;
148 rtlpriv->psc.reg_max_lps_awakeintvl = 5;
149 /* for ASPM, you can close aspm through
150 * set const_support_pciaspm = 0
151 */
152 rtl8723ae_init_aspm_vars(hw);
153
154 if (rtlpriv->psc.reg_fwctrl_lps == 1)
155 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
156 else if (rtlpriv->psc.reg_fwctrl_lps == 2)
157 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
158 else if (rtlpriv->psc.reg_fwctrl_lps == 3)
159 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
160
161 /* for firmware buf */
162 rtlpriv->rtlhal.pfirmware = vmalloc(0x6000);
163 if (!rtlpriv->rtlhal.pfirmware) {
164 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
165 "Can't alloc buffer for fw.\n");
166 return 1;
167 }
168
169 if (IS_VENDOR_8723_A_CUT(rtlhal->version))
170 rtlpriv->cfg->fw_name = "rtlwifi/rtl8723fw.bin";
171 else if (IS_81xxC_VENDOR_UMC_B_CUT(rtlhal->version))
172 rtlpriv->cfg->fw_name = "rtlwifi/rtl8723fw_B.bin";
173
174 rtlpriv->max_fw_size = 0x6000;
175 pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name);
176 err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name,
177 rtlpriv->io.dev, GFP_KERNEL, hw,
178 rtl_fw_cb);
179 if (err) {
180 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
181 "Failed to request firmware!\n");
182 return 1;
183 }
184 return 0;
185}
186
187void rtl8723ae_deinit_sw_vars(struct ieee80211_hw *hw)
188{
189 struct rtl_priv *rtlpriv = rtl_priv(hw);
190
191 if (rtlpriv->rtlhal.pfirmware) {
192 vfree(rtlpriv->rtlhal.pfirmware);
193 rtlpriv->rtlhal.pfirmware = NULL;
194 }
195}
196
197static struct rtl_hal_ops rtl8723ae_hal_ops = {
198 .init_sw_vars = rtl8723ae_init_sw_vars,
199 .deinit_sw_vars = rtl8723ae_deinit_sw_vars,
200 .read_eeprom_info = rtl8723ae_read_eeprom_info,
201 .interrupt_recognized = rtl8723ae_interrupt_recognized,
202 .hw_init = rtl8723ae_hw_init,
203 .hw_disable = rtl8723ae_card_disable,
204 .hw_suspend = rtl8723ae_suspend,
205 .hw_resume = rtl8723ae_resume,
206 .enable_interrupt = rtl8723ae_enable_interrupt,
207 .disable_interrupt = rtl8723ae_disable_interrupt,
208 .set_network_type = rtl8723ae_set_network_type,
209 .set_chk_bssid = rtl8723ae_set_check_bssid,
210 .set_qos = rtl8723ae_set_qos,
211 .set_bcn_reg = rtl8723ae_set_beacon_related_registers,
212 .set_bcn_intv = rtl8723ae_set_beacon_interval,
213 .update_interrupt_mask = rtl8723ae_update_interrupt_mask,
214 .get_hw_reg = rtl8723ae_get_hw_reg,
215 .set_hw_reg = rtl8723ae_set_hw_reg,
216 .update_rate_tbl = rtl8723ae_update_hal_rate_tbl,
217 .fill_tx_desc = rtl8723ae_tx_fill_desc,
218 .fill_tx_cmddesc = rtl8723ae_tx_fill_cmddesc,
219 .query_rx_desc = rtl8723ae_rx_query_desc,
220 .set_channel_access = rtl8723ae_update_channel_access_setting,
221 .radio_onoff_checking = rtl8723ae_gpio_radio_on_off_checking,
222 .set_bw_mode = rtl8723ae_phy_set_bw_mode,
223 .switch_channel = rtl8723ae_phy_sw_chnl,
224 .dm_watchdog = rtl8723ae_dm_watchdog,
Larry Finger3fc01652013-09-26 13:25:32 -0500225 .scan_operation_backup = rtl_phy_scan_operation_backup,
Larry Fingerc592e632012-10-25 13:46:32 -0500226 .set_rf_power_state = rtl8723ae_phy_set_rf_power_state,
227 .led_control = rtl8723ae_led_control,
228 .set_desc = rtl8723ae_set_desc,
229 .get_desc = rtl8723ae_get_desc,
230 .tx_polling = rtl8723ae_tx_polling,
231 .enable_hw_sec = rtl8723ae_enable_hw_security_config,
232 .set_key = rtl8723ae_set_key,
233 .init_sw_leds = rtl8723ae_init_sw_leds,
234 .allow_all_destaddr = rtl8723ae_allow_all_destaddr,
Larry Finger0a168b42014-02-28 15:16:47 -0600235 .get_bbreg = rtl8723_phy_query_bb_reg,
236 .set_bbreg = rtl8723_phy_set_bb_reg,
Larry Fingerc592e632012-10-25 13:46:32 -0500237 .get_rfreg = rtl8723ae_phy_query_rf_reg,
238 .set_rfreg = rtl8723ae_phy_set_rf_reg,
239 .c2h_command_handle = rtl_8723e_c2h_command_handle,
240 .bt_wifi_media_status_notify = rtl_8723e_bt_wifi_media_status_notify,
241 .bt_coex_off_before_lps = rtl8723ae_bt_coex_off_before_lps,
242};
243
244static struct rtl_mod_params rtl8723ae_mod_params = {
245 .sw_crypto = false,
246 .inactiveps = true,
247 .swctrl_lps = false,
248 .fwctrl_lps = true,
249 .debug = DBG_EMERG,
250};
251
252static struct rtl_hal_cfg rtl8723ae_hal_cfg = {
253 .bar_id = 2,
254 .write_readback = true,
255 .name = "rtl8723ae_pci",
Larry Finger73e088e2013-06-23 18:14:43 -0500256 .fw_name = "rtlwifi/rtl8723fw.bin",
Larry Fingerc592e632012-10-25 13:46:32 -0500257 .ops = &rtl8723ae_hal_ops,
258 .mod_params = &rtl8723ae_mod_params,
259 .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
260 .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
261 .maps[SYS_CLK] = REG_SYS_CLKR,
262 .maps[MAC_RCR_AM] = AM,
263 .maps[MAC_RCR_AB] = AB,
264 .maps[MAC_RCR_ACRC32] = ACRC32,
265 .maps[MAC_RCR_ACF] = ACF,
266 .maps[MAC_RCR_AAP] = AAP,
267 .maps[EFUSE_TEST] = REG_EFUSE_TEST,
268 .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
269 .maps[EFUSE_CLK] = 0,
270 .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
271 .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
272 .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
273 .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
274 .maps[EFUSE_ANA8M] = ANA8M,
275 .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
276 .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
277 .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
278 .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
279
280 .maps[RWCAM] = REG_CAMCMD,
281 .maps[WCAMI] = REG_CAMWRITE,
282 .maps[RCAMO] = REG_CAMREAD,
283 .maps[CAMDBG] = REG_CAMDBG,
284 .maps[SECR] = REG_SECCFG,
285 .maps[SEC_CAM_NONE] = CAM_NONE,
286 .maps[SEC_CAM_WEP40] = CAM_WEP40,
287 .maps[SEC_CAM_TKIP] = CAM_TKIP,
288 .maps[SEC_CAM_AES] = CAM_AES,
289 .maps[SEC_CAM_WEP104] = CAM_WEP104,
290
291 .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
292 .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
293 .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
294 .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
295 .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
296 .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
297 .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,
298 .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
299 .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
300 .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
301 .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
302 .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
303 .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
304 .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
305 .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,
306 .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,
307
308 .maps[RTL_IMR_TXFOVW] = PHIMR_TXFOVW,
309 .maps[RTL_IMR_PSTIMEOUT] = PHIMR_PSTIMEOUT,
Larry Fingere6deaf82013-03-24 22:06:55 -0500310 .maps[RTL_IMR_BCNINT] = PHIMR_BCNDMAINT0,
Larry Fingerc592e632012-10-25 13:46:32 -0500311 .maps[RTL_IMR_RXFOVW] = PHIMR_RXFOVW,
312 .maps[RTL_IMR_RDU] = PHIMR_RDU,
313 .maps[RTL_IMR_ATIMEND] = PHIMR_ATIMEND_E,
314 .maps[RTL_IMR_BDOK] = PHIMR_BCNDOK0,
315 .maps[RTL_IMR_MGNTDOK] = PHIMR_MGNTDOK,
316 .maps[RTL_IMR_TBDER] = PHIMR_TXBCNERR,
317 .maps[RTL_IMR_HIGHDOK] = PHIMR_HIGHDOK,
318 .maps[RTL_IMR_TBDOK] = PHIMR_TXBCNOK,
319 .maps[RTL_IMR_BKDOK] = PHIMR_BKDOK,
320 .maps[RTL_IMR_BEDOK] = PHIMR_BEDOK,
321 .maps[RTL_IMR_VIDOK] = PHIMR_VIDOK,
322 .maps[RTL_IMR_VODOK] = PHIMR_VODOK,
323 .maps[RTL_IMR_ROK] = PHIMR_ROK,
324 .maps[RTL_IBSS_INT_MASKS] = (PHIMR_BCNDMAINT0 |
325 PHIMR_TXBCNOK | PHIMR_TXBCNERR),
326 .maps[RTL_IMR_C2HCMD] = PHIMR_C2HCMD,
327
328
329 .maps[RTL_RC_CCK_RATE1M] = DESC92_RATE1M,
330 .maps[RTL_RC_CCK_RATE2M] = DESC92_RATE2M,
331 .maps[RTL_RC_CCK_RATE5_5M] = DESC92_RATE5_5M,
332 .maps[RTL_RC_CCK_RATE11M] = DESC92_RATE11M,
333 .maps[RTL_RC_OFDM_RATE6M] = DESC92_RATE6M,
334 .maps[RTL_RC_OFDM_RATE9M] = DESC92_RATE9M,
335 .maps[RTL_RC_OFDM_RATE12M] = DESC92_RATE12M,
336 .maps[RTL_RC_OFDM_RATE18M] = DESC92_RATE18M,
337 .maps[RTL_RC_OFDM_RATE24M] = DESC92_RATE24M,
338 .maps[RTL_RC_OFDM_RATE36M] = DESC92_RATE36M,
339 .maps[RTL_RC_OFDM_RATE48M] = DESC92_RATE48M,
340 .maps[RTL_RC_OFDM_RATE54M] = DESC92_RATE54M,
341
342 .maps[RTL_RC_HT_RATEMCS7] = DESC92_RATEMCS7,
343 .maps[RTL_RC_HT_RATEMCS15] = DESC92_RATEMCS15,
344};
345
Greg KH03ce7582012-12-21 13:42:15 +0000346static struct pci_device_id rtl8723ae_pci_ids[] = {
Larry Fingerc592e632012-10-25 13:46:32 -0500347 {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8723, rtl8723ae_hal_cfg)},
348 {},
349};
350
351MODULE_DEVICE_TABLE(pci, rtl8723ae_pci_ids);
352
353MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
354MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
355MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
356MODULE_LICENSE("GPL");
357MODULE_DESCRIPTION("Realtek 8723E 802.11n PCI wireless");
Larry Finger73e088e2013-06-23 18:14:43 -0500358MODULE_FIRMWARE("rtlwifi/rtl8723fw.bin");
359MODULE_FIRMWARE("rtlwifi/rtl8723fw_B.bin");
Larry Fingerc592e632012-10-25 13:46:32 -0500360
361module_param_named(swenc, rtl8723ae_mod_params.sw_crypto, bool, 0444);
362module_param_named(debug, rtl8723ae_mod_params.debug, int, 0444);
363module_param_named(ips, rtl8723ae_mod_params.inactiveps, bool, 0444);
364module_param_named(swlps, rtl8723ae_mod_params.swctrl_lps, bool, 0444);
365module_param_named(fwlps, rtl8723ae_mod_params.fwctrl_lps, bool, 0444);
366MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
367MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
368MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
369MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
370MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)");
371
Hauke Mehrtens244a77e2012-11-29 23:27:17 +0100372static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
Larry Fingerc592e632012-10-25 13:46:32 -0500373
374static struct pci_driver rtl8723ae_driver = {
375 .name = KBUILD_MODNAME,
376 .id_table = rtl8723ae_pci_ids,
377 .probe = rtl_pci_probe,
378 .remove = rtl_pci_disconnect,
379 .driver.pm = &rtlwifi_pm_ops,
380};
381
382module_pci_driver(rtl8723ae_driver);