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gerrit-public.fairphone.software / kernel / msm-5.4 / cdc57272ea0a0e952c4609b56e157e4d0ec8e956 / . / tools / power / x86 / turbostat / turbostat.c
blob: 277e0321e5906791611d752892633448fd006822 [file] [log] [blame]
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]5 * Copyright (c) 2013 Intel Corporation.
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]22#define _GNU_SOURCE
Josh Triplettb731f312013-08-20 17:20:12 -0700[diff] [blame]23#include MSRHEADER
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]24#include <stdarg.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]25#include <stdio.h>
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]26#include <err.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]36#include <getopt.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]40#include <sched.h>
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]41#include <time.h>
Josh Triplett2b928652013-08-20 17:20:14 -0700[diff] [blame]42#include <cpuid.h>
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]43#include <linux/capability.h>
44#include <errno.h>
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]45
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]46char *proc_stat = "/proc/stat";
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]47FILE *outf;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]48int *fd_percpu;
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]49struct timespec interval_ts = {5, 0};
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]50unsigned int debug;
51unsigned int rapl_joules;
52unsigned int summary_only;
53unsigned int dump_only;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]54unsigned int skip_c0;
55unsigned int skip_c1;
56unsigned int do_nhm_cstates;
57unsigned int do_snb_cstates;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]58unsigned int do_knl_cstates;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]59unsigned int do_pc2;
60unsigned int do_pc3;
61unsigned int do_pc6;
62unsigned int do_pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]63unsigned int do_c8_c9_c10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]64unsigned int do_skl_residency;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]65unsigned int do_slm_cstates;
66unsigned int use_c1_residency_msr;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]67unsigned int has_aperf;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]68unsigned int has_epb;
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]69unsigned int do_irtl_snb;
70unsigned int do_irtl_hsw;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]71unsigned int units = 1000000; /* MHz etc */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]72unsigned int genuine_intel;
73unsigned int has_invariant_tsc;
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]74unsigned int do_nhm_platform_info;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]75unsigned int extra_msr_offset32;
76unsigned int extra_msr_offset64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]77unsigned int extra_delta_offset32;
78unsigned int extra_delta_offset64;
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]79unsigned int aperf_mperf_multiplier = 1;
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]80int do_irq = 1;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]81int do_smi;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]82double bclk;
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]83double base_hz;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]84unsigned int has_base_hz;
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]85double tsc_tweak = 1.0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]86unsigned int show_pkg;
87unsigned int show_core;
88unsigned int show_cpu;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]89unsigned int show_pkg_only;
90unsigned int show_core_only;
91char *output_buffer, *outp;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]92unsigned int do_rapl;
93unsigned int do_dts;
94unsigned int do_ptm;
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]95unsigned int do_gfx_rc6_ms;
96unsigned long long gfx_cur_rc6_ms;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]97unsigned int do_gfx_mhz;
98unsigned int gfx_cur_mhz;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]99unsigned int tcc_activation_temp;
100unsigned int tcc_activation_temp_override;
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]101double rapl_power_units, rapl_time_units;
102double rapl_dram_energy_units, rapl_energy_units;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]103double rapl_joule_counter_range;
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]104unsigned int do_core_perf_limit_reasons;
105unsigned int do_gfx_perf_limit_reasons;
106unsigned int do_ring_perf_limit_reasons;
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]107unsigned int crystal_hz;
108unsigned long long tsc_hz;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]109int base_cpu;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]110double discover_bclk(unsigned int family, unsigned int model);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]111unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
112 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
113unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
114unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
115unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
116unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]117
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]118#define RAPL_PKG (1 << 0)
119 /* 0x610 MSR_PKG_POWER_LIMIT */
120 /* 0x611 MSR_PKG_ENERGY_STATUS */
121#define RAPL_PKG_PERF_STATUS (1 << 1)
122 /* 0x613 MSR_PKG_PERF_STATUS */
123#define RAPL_PKG_POWER_INFO (1 << 2)
124 /* 0x614 MSR_PKG_POWER_INFO */
125
126#define RAPL_DRAM (1 << 3)
127 /* 0x618 MSR_DRAM_POWER_LIMIT */
128 /* 0x619 MSR_DRAM_ENERGY_STATUS */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]129#define RAPL_DRAM_PERF_STATUS (1 << 4)
130 /* 0x61b MSR_DRAM_PERF_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]131#define RAPL_DRAM_POWER_INFO (1 << 5)
132 /* 0x61c MSR_DRAM_POWER_INFO */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]133
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]134#define RAPL_CORES (1 << 6)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]135 /* 0x638 MSR_PP0_POWER_LIMIT */
136 /* 0x639 MSR_PP0_ENERGY_STATUS */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]137#define RAPL_CORE_POLICY (1 << 7)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]138 /* 0x63a MSR_PP0_POLICY */
139
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]140#define RAPL_GFX (1 << 8)
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]141 /* 0x640 MSR_PP1_POWER_LIMIT */
142 /* 0x641 MSR_PP1_ENERGY_STATUS */
143 /* 0x642 MSR_PP1_POLICY */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]144#define TJMAX_DEFAULT 100
145
146#define MAX(a, b) ((a) > (b) ? (a) : (b))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]147
148int aperf_mperf_unstable;
149int backwards_count;
150char *progname;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]151
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]152cpu_set_t *cpu_present_set, *cpu_affinity_set;
153size_t cpu_present_setsize, cpu_affinity_setsize;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]154
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]155struct thread_data {
156 unsigned long long tsc;
157 unsigned long long aperf;
158 unsigned long long mperf;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]159 unsigned long long c1;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]160 unsigned long long extra_msr64;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]161 unsigned long long extra_delta64;
162 unsigned long long extra_msr32;
163 unsigned long long extra_delta32;
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]164 unsigned int irq_count;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]165 unsigned int smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]166 unsigned int cpu_id;
167 unsigned int flags;
168#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
169#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
170} *thread_even, *thread_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]171
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]172struct core_data {
173 unsigned long long c3;
174 unsigned long long c6;
175 unsigned long long c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]176 unsigned int core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]177 unsigned int core_id;
178} *core_even, *core_odd;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]179
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]180struct pkg_data {
181 unsigned long long pc2;
182 unsigned long long pc3;
183 unsigned long long pc6;
184 unsigned long long pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]185 unsigned long long pc8;
186 unsigned long long pc9;
187 unsigned long long pc10;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]188 unsigned long long pkg_wtd_core_c0;
189 unsigned long long pkg_any_core_c0;
190 unsigned long long pkg_any_gfxe_c0;
191 unsigned long long pkg_both_core_gfxe_c0;
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]192 unsigned long long gfx_rc6_ms;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]193 unsigned int gfx_mhz;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]194 unsigned int package_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]195 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
196 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
197 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
198 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
199 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
200 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
201 unsigned int pkg_temp_c;
202
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]203} *package_even, *package_odd;
204
205#define ODD_COUNTERS thread_odd, core_odd, package_odd
206#define EVEN_COUNTERS thread_even, core_even, package_even
207
208#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
209 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
210 topo.num_threads_per_core + \
211 (core_no) * topo.num_threads_per_core + (thread_no))
212#define GET_CORE(core_base, core_no, pkg_no) \
213 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
214#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
215
216struct system_summary {
217 struct thread_data threads;
218 struct core_data cores;
219 struct pkg_data packages;
220} sum, average;
221
222
223struct topo_params {
224 int num_packages;
225 int num_cpus;
226 int num_cores;
227 int max_cpu_num;
228 int num_cores_per_pkg;
229 int num_threads_per_core;
230} topo;
231
232struct timeval tv_even, tv_odd, tv_delta;
233
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]234int *irq_column_2_cpu; /* /proc/interrupts column numbers */
235int *irqs_per_cpu; /* indexed by cpu_num */
236
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]237void setup_all_buffers(void);
238
239int cpu_is_not_present(int cpu)
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]240{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]241 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]242}
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]243/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]244 * run func(thread, core, package) in topology order
245 * skip non-present cpus
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]246 */
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]247
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]248int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
249 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]250{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]251 int retval, pkg_no, core_no, thread_no;
252
253 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
254 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
255 for (thread_no = 0; thread_no <
256 topo.num_threads_per_core; ++thread_no) {
257 struct thread_data *t;
258 struct core_data *c;
259 struct pkg_data *p;
260
261 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
262
263 if (cpu_is_not_present(t->cpu_id))
264 continue;
265
266 c = GET_CORE(core_base, core_no, pkg_no);
267 p = GET_PKG(pkg_base, pkg_no);
268
269 retval = func(t, c, p);
270 if (retval)
271 return retval;
272 }
273 }
274 }
275 return 0;
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]276}
277
278int cpu_migrate(int cpu)
279{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]280 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
281 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
282 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
Len Brown88c32812012-03-29 21:44:40 -0400[diff] [blame]283 return -1;
284 else
285 return 0;
286}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]287int get_msr_fd(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]288{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]289 char pathname[32];
290 int fd;
291
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]292 fd = fd_percpu[cpu];
293
294 if (fd)
295 return fd;
296
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]297 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
298 fd = open(pathname, O_RDONLY);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]299 if (fd < 0)
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]300 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]301
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]302 fd_percpu[cpu] = fd;
303
304 return fd;
305}
306
307int get_msr(int cpu, off_t offset, unsigned long long *msr)
308{
309 ssize_t retval;
310
311 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]312
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]313 if (retval != sizeof *msr)
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]314 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]315
316 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]317}
318
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]319/*
320 * Example Format w/ field column widths:
321 *
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]322 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]323 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]324 */
325
Len Browna829eb42011-02-10 23:36:34 -0500[diff] [blame]326void print_header(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]327{
328 if (show_pkg)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]329 outp += sprintf(outp, " Package");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]330 if (show_core)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]331 outp += sprintf(outp, " Core");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]332 if (show_cpu)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]333 outp += sprintf(outp, " CPU");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]334 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]335 outp += sprintf(outp, " Avg_MHz");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]336 if (has_aperf)
Len Brown75d2e442016-02-13 23:41:53 -0500[diff] [blame]337 outp += sprintf(outp, " Busy%%");
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]338 if (has_aperf)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]339 outp += sprintf(outp, " Bzy_MHz");
340 outp += sprintf(outp, " TSC_MHz");
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]341
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]342 if (extra_delta_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]343 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]344 if (extra_delta_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]345 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]346 if (extra_msr_offset32)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]347 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]348 if (extra_msr_offset64)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]349 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]350
351 if (!debug)
352 goto done;
353
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]354 if (do_irq)
355 outp += sprintf(outp, " IRQ");
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]356 if (do_smi)
357 outp += sprintf(outp, " SMI");
358
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]359 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]360 outp += sprintf(outp, " CPU%%c1");
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]361 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]362 outp += sprintf(outp, " CPU%%c3");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]363 if (do_nhm_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]364 outp += sprintf(outp, " CPU%%c6");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]365 if (do_snb_cstates)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]366 outp += sprintf(outp, " CPU%%c7");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]367
368 if (do_dts)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]369 outp += sprintf(outp, " CoreTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]370 if (do_ptm)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]371 outp += sprintf(outp, " PkgTmp");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]372
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]373 if (do_gfx_rc6_ms)
374 outp += sprintf(outp, " GFX%%rc6");
375
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]376 if (do_gfx_mhz)
377 outp += sprintf(outp, " GFXMHz");
378
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]379 if (do_skl_residency) {
380 outp += sprintf(outp, " Totl%%C0");
381 outp += sprintf(outp, " Any%%C0");
382 outp += sprintf(outp, " GFX%%C0");
383 outp += sprintf(outp, " CPUGFX%%");
384 }
385
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]386 if (do_pc2)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]387 outp += sprintf(outp, " Pkg%%pc2");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]388 if (do_pc3)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]389 outp += sprintf(outp, " Pkg%%pc3");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]390 if (do_pc6)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]391 outp += sprintf(outp, " Pkg%%pc6");
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]392 if (do_pc7)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]393 outp += sprintf(outp, " Pkg%%pc7");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]394 if (do_c8_c9_c10) {
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]395 outp += sprintf(outp, " Pkg%%pc8");
396 outp += sprintf(outp, " Pkg%%pc9");
397 outp += sprintf(outp, " Pk%%pc10");
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]398 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]399
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]400 if (do_rapl && !rapl_joules) {
401 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]402 outp += sprintf(outp, " PkgWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]403 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]404 outp += sprintf(outp, " CorWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]405 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]406 outp += sprintf(outp, " GFXWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]407 if (do_rapl & RAPL_DRAM)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]408 outp += sprintf(outp, " RAMWatt");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]409 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]410 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]411 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]412 outp += sprintf(outp, " RAM_%%");
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]413 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]414 if (do_rapl & RAPL_PKG)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]415 outp += sprintf(outp, " Pkg_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]416 if (do_rapl & RAPL_CORES)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]417 outp += sprintf(outp, " Cor_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]418 if (do_rapl & RAPL_GFX)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]419 outp += sprintf(outp, " GFX_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]420 if (do_rapl & RAPL_DRAM)
Len Brownbd6906e2015-07-24 10:35:23 -0400[diff] [blame]421 outp += sprintf(outp, " RAM_J");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]422 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]423 outp += sprintf(outp, " PKG_%%");
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]424 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Browne7c95ff2014-08-14 21:22:13 -0400[diff] [blame]425 outp += sprintf(outp, " RAM_%%");
426 outp += sprintf(outp, " time");
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]427
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]428 }
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]429 done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]430 outp += sprintf(outp, "\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]431}
432
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]433int dump_counters(struct thread_data *t, struct core_data *c,
434 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]435{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]436 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]437
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]438 if (t) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]439 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
440 t->cpu_id, t->flags);
441 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
442 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
443 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
444 outp += sprintf(outp, "c1: %016llX\n", t->c1);
445 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]446 extra_delta_offset32, t->extra_delta32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]447 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]448 extra_delta_offset64, t->extra_delta64);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]449 outp += sprintf(outp, "msr0x%x: %08llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]450 extra_msr_offset32, t->extra_msr32);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]451 outp += sprintf(outp, "msr0x%x: %016llX\n",
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]452 extra_msr_offset64, t->extra_msr64);
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]453 if (do_irq)
454 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count);
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]455 if (do_smi)
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]456 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]457 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]458
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]459 if (c) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]460 outp += sprintf(outp, "core: %d\n", c->core_id);
461 outp += sprintf(outp, "c3: %016llX\n", c->c3);
462 outp += sprintf(outp, "c6: %016llX\n", c->c6);
463 outp += sprintf(outp, "c7: %016llX\n", c->c7);
464 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]465 }
466
467 if (p) {
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]468 outp += sprintf(outp, "package: %d\n", p->package_id);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]469
470 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
471 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
472 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
473 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
474
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]475 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]476 if (do_pc3)
477 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
478 if (do_pc6)
479 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
480 if (do_pc7)
481 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]482 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
483 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
484 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
485 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
486 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
487 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
488 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
489 outp += sprintf(outp, "Throttle PKG: %0X\n",
490 p->rapl_pkg_perf_status);
491 outp += sprintf(outp, "Throttle RAM: %0X\n",
492 p->rapl_dram_perf_status);
493 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]494 }
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]495
496 outp += sprintf(outp, "\n");
497
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]498 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]499}
500
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]501/*
502 * column formatting convention & formats
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]503 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]504int format_counters(struct thread_data *t, struct core_data *c,
505 struct pkg_data *p)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]506{
507 double interval_float;
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]508 char *fmt8;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]509
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]510 /* if showing only 1st thread in core and this isn't one, bail out */
511 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
512 return 0;
513
514 /* if showing only 1st thread in pkg and this isn't one, bail out */
515 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
516 return 0;
517
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]518 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
519
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]520 /* topo columns, print blanks on 1st (average) line */
521 if (t == &average.threads) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]522 if (show_pkg)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]523 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]524 if (show_core)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]525 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]526 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]527 outp += sprintf(outp, " -");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]528 } else {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]529 if (show_pkg) {
530 if (p)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]531 outp += sprintf(outp, "%8d", p->package_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]532 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]533 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]534 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]535 if (show_core) {
536 if (c)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]537 outp += sprintf(outp, "%8d", c->core_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]538 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]539 outp += sprintf(outp, " -");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]540 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]541 if (show_cpu)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]542 outp += sprintf(outp, "%8d", t->cpu_id);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]543 }
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]544
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]545 /* Avg_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]546 if (has_aperf)
547 outp += sprintf(outp, "%8.0f",
548 1.0 / units * t->aperf / interval_float);
549
Len Brown75d2e442016-02-13 23:41:53 -0500[diff] [blame]550 /* Busy% */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]551 if (has_aperf) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]552 if (!skip_c0)
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]553 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]554 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]555 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]556 }
557
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]558 /* Bzy_MHz */
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]559 if (has_aperf) {
560 if (has_base_hz)
561 outp += sprintf(outp, "%8.0f", base_hz / units * t->aperf / t->mperf);
562 else
563 outp += sprintf(outp, "%8.0f",
564 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
565 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]566
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]567 /* TSC_MHz */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]568 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]569
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]570 /* delta */
571 if (extra_delta_offset32)
572 outp += sprintf(outp, " %11llu", t->extra_delta32);
573
574 /* DELTA */
575 if (extra_delta_offset64)
576 outp += sprintf(outp, " %11llu", t->extra_delta64);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]577 /* msr */
578 if (extra_msr_offset32)
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]579 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]580
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]581 /* MSR */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]582 if (extra_msr_offset64)
583 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
Len Brown130ff302012-09-21 22:56:06 -0400[diff] [blame]584
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]585 if (!debug)
586 goto done;
587
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]588 /* IRQ */
589 if (do_irq)
590 outp += sprintf(outp, "%8d", t->irq_count);
591
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]592 /* SMI */
593 if (do_smi)
594 outp += sprintf(outp, "%8d", t->smi_count);
595
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]596 if (do_nhm_cstates) {
597 if (!skip_c1)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]598 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]599 else
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]600 outp += sprintf(outp, "********");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]601 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]602
603 /* print per-core data only for 1st thread in core */
604 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
605 goto done;
606
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]607 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]608 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]609 if (do_nhm_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]610 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]611 if (do_snb_cstates)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]612 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]613
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]614 if (do_dts)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]615 outp += sprintf(outp, "%8d", c->core_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]616
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]617 /* print per-package data only for 1st core in package */
618 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
619 goto done;
620
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]621 /* PkgTmp */
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]622 if (do_ptm)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]623 outp += sprintf(outp, "%8d", p->pkg_temp_c);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]624
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]625 /* GFXrc6 */
626 if (do_gfx_rc6_ms)
627 outp += sprintf(outp, "%8.2f", 100.0 * p->gfx_rc6_ms / 1000.0 / interval_float);
628
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]629 /* GFXMHz */
630 if (do_gfx_mhz)
631 outp += sprintf(outp, "%8d", p->gfx_mhz);
632
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]633 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
634 if (do_skl_residency) {
635 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
636 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
637 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
638 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
639 }
640
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]641 if (do_pc2)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]642 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]643 if (do_pc3)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]644 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]645 if (do_pc6)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]646 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]647 if (do_pc7)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]648 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]649 if (do_c8_c9_c10) {
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]650 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
651 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
652 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]653 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]654
655 /*
656 * If measurement interval exceeds minimum RAPL Joule Counter range,
657 * indicate that results are suspect by printing "**" in fraction place.
658 */
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]659 if (interval_float < rapl_joule_counter_range)
660 fmt8 = "%8.2f";
661 else
662 fmt8 = " %6.0f**";
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]663
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]664 if (do_rapl && !rapl_joules) {
665 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]666 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]667 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]668 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]669 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]670 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]671 if (do_rapl & RAPL_DRAM)
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]672 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]673 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]674 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]675 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]676 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]677 } else if (do_rapl && rapl_joules) {
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]678 if (do_rapl & RAPL_PKG)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]679 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]680 p->energy_pkg * rapl_energy_units);
681 if (do_rapl & RAPL_CORES)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]682 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]683 p->energy_cores * rapl_energy_units);
684 if (do_rapl & RAPL_GFX)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]685 outp += sprintf(outp, fmt8,
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]686 p->energy_gfx * rapl_energy_units);
687 if (do_rapl & RAPL_DRAM)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]688 outp += sprintf(outp, fmt8,
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]689 p->energy_dram * rapl_dram_energy_units);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]690 if (do_rapl & RAPL_PKG_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]691 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]692 if (do_rapl & RAPL_DRAM_PERF_STATUS)
Len Brownfc04cc62014-02-06 00:55:19 -0500[diff] [blame]693 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]694
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]695 outp += sprintf(outp, fmt8, interval_float);
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]696 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]697done:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]698 outp += sprintf(outp, "\n");
699
700 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]701}
702
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]703void flush_output_stdout(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]704{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]705 FILE *filep;
706
707 if (outf == stderr)
708 filep = stdout;
709 else
710 filep = outf;
711
712 fputs(output_buffer, filep);
713 fflush(filep);
714
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]715 outp = output_buffer;
716}
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]717void flush_output_stderr(void)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]718{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]719 fputs(output_buffer, outf);
720 fflush(outf);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]721 outp = output_buffer;
722}
723void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
724{
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]725 static int printed;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]726
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]727 if (!printed || !summary_only)
728 print_header();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]729
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]730 if (topo.num_cpus > 1)
731 format_counters(&average.threads, &average.cores,
732 &average.packages);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]733
Len Browne23da032012-02-06 18:37:16 -0500[diff] [blame]734 printed = 1;
735
736 if (summary_only)
737 return;
738
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]739 for_all_cpus(format_counters, t, c, p);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]740}
741
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]742#define DELTA_WRAP32(new, old) \
743 if (new > old) { \
744 old = new - old; \
745 } else { \
746 old = 0x100000000 + new - old; \
747 }
748
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]749void
750delta_package(struct pkg_data *new, struct pkg_data *old)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]751{
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]752
753 if (do_skl_residency) {
754 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
755 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
756 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
757 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
758 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]759 old->pc2 = new->pc2 - old->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]760 if (do_pc3)
761 old->pc3 = new->pc3 - old->pc3;
762 if (do_pc6)
763 old->pc6 = new->pc6 - old->pc6;
764 if (do_pc7)
765 old->pc7 = new->pc7 - old->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]766 old->pc8 = new->pc8 - old->pc8;
767 old->pc9 = new->pc9 - old->pc9;
768 old->pc10 = new->pc10 - old->pc10;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]769 old->pkg_temp_c = new->pkg_temp_c;
770
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]771 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]772 old->gfx_mhz = new->gfx_mhz;
773
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]774 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
775 DELTA_WRAP32(new->energy_cores, old->energy_cores);
776 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
777 DELTA_WRAP32(new->energy_dram, old->energy_dram);
778 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
779 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]780}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]781
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]782void
783delta_core(struct core_data *new, struct core_data *old)
784{
785 old->c3 = new->c3 - old->c3;
786 old->c6 = new->c6 - old->c6;
787 old->c7 = new->c7 - old->c7;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]788 old->core_temp_c = new->core_temp_c;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]789}
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]790
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]791/*
792 * old = new - old
793 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]794void
795delta_thread(struct thread_data *new, struct thread_data *old,
796 struct core_data *core_delta)
797{
798 old->tsc = new->tsc - old->tsc;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]799
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]800 /* check for TSC < 1 Mcycles over interval */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]801 if (old->tsc < (1000 * 1000))
802 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
803 "You can disable all c-states by booting with \"idle=poll\"\n"
804 "or just the deep ones with \"processor.max_cstate=1\"");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]805
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]806 old->c1 = new->c1 - old->c1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]807
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]808 if (has_aperf) {
809 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
810 old->aperf = new->aperf - old->aperf;
811 old->mperf = new->mperf - old->mperf;
812 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]813
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]814 if (!aperf_mperf_unstable) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]815 fprintf(outf, "%s: APERF or MPERF went backwards *\n", progname);
816 fprintf(outf, "* Frequency results do not cover entire interval *\n");
817 fprintf(outf, "* fix this by running Linux-2.6.30 or later *\n");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]818
Len Browna7296172015-01-23 01:33:58 -0500[diff] [blame]819 aperf_mperf_unstable = 1;
820 }
821 /*
822 * mperf delta is likely a huge "positive" number
823 * can not use it for calculating c0 time
824 */
825 skip_c0 = 1;
826 skip_c1 = 1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]827 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]828 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]829
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]830
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]831 if (use_c1_residency_msr) {
832 /*
833 * Some models have a dedicated C1 residency MSR,
834 * which should be more accurate than the derivation below.
835 */
836 } else {
837 /*
838 * As counter collection is not atomic,
839 * it is possible for mperf's non-halted cycles + idle states
840 * to exceed TSC's all cycles: show c1 = 0% in that case.
841 */
842 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
843 old->c1 = 0;
844 else {
845 /* normal case, derive c1 */
846 old->c1 = old->tsc - old->mperf - core_delta->c3
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]847 - core_delta->c6 - core_delta->c7;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]848 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]849 }
Len Brownc3ae3312012-06-13 21:31:46 -0400[diff] [blame]850
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]851 if (old->mperf == 0) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]852 if (debug > 1)
853 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]854 old->mperf = 1; /* divide by 0 protection */
855 }
856
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]857 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
858 old->extra_delta32 &= 0xFFFFFFFF;
859
860 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
861
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]862 /*
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]863 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]864 */
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]865 old->extra_msr32 = new->extra_msr32;
866 old->extra_msr64 = new->extra_msr64;
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]867
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]868 if (do_irq)
869 old->irq_count = new->irq_count - old->irq_count;
870
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]871 if (do_smi)
872 old->smi_count = new->smi_count - old->smi_count;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]873}
874
875int delta_cpu(struct thread_data *t, struct core_data *c,
876 struct pkg_data *p, struct thread_data *t2,
877 struct core_data *c2, struct pkg_data *p2)
878{
879 /* calculate core delta only for 1st thread in core */
880 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
881 delta_core(c, c2);
882
883 /* always calculate thread delta */
884 delta_thread(t, t2, c2); /* c2 is core delta */
885
886 /* calculate package delta only for 1st core in package */
887 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
888 delta_package(p, p2);
889
890 return 0;
891}
892
893void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
894{
895 t->tsc = 0;
896 t->aperf = 0;
897 t->mperf = 0;
898 t->c1 = 0;
899
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]900 t->extra_delta32 = 0;
901 t->extra_delta64 = 0;
902
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]903 t->irq_count = 0;
904 t->smi_count = 0;
905
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]906 /* tells format_counters to dump all fields from this set */
907 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
908
909 c->c3 = 0;
910 c->c6 = 0;
911 c->c7 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]912 c->core_temp_c = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]913
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]914 p->pkg_wtd_core_c0 = 0;
915 p->pkg_any_core_c0 = 0;
916 p->pkg_any_gfxe_c0 = 0;
917 p->pkg_both_core_gfxe_c0 = 0;
918
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]919 p->pc2 = 0;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]920 if (do_pc3)
921 p->pc3 = 0;
922 if (do_pc6)
923 p->pc6 = 0;
924 if (do_pc7)
925 p->pc7 = 0;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]926 p->pc8 = 0;
927 p->pc9 = 0;
928 p->pc10 = 0;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]929
930 p->energy_pkg = 0;
931 p->energy_dram = 0;
932 p->energy_cores = 0;
933 p->energy_gfx = 0;
934 p->rapl_pkg_perf_status = 0;
935 p->rapl_dram_perf_status = 0;
936 p->pkg_temp_c = 0;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]937
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]938 p->gfx_rc6_ms = 0;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]939 p->gfx_mhz = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]940}
941int sum_counters(struct thread_data *t, struct core_data *c,
942 struct pkg_data *p)
943{
944 average.threads.tsc += t->tsc;
945 average.threads.aperf += t->aperf;
946 average.threads.mperf += t->mperf;
947 average.threads.c1 += t->c1;
948
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]949 average.threads.extra_delta32 += t->extra_delta32;
950 average.threads.extra_delta64 += t->extra_delta64;
951
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]952 average.threads.irq_count += t->irq_count;
953 average.threads.smi_count += t->smi_count;
954
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]955 /* sum per-core values only for 1st thread in core */
956 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
957 return 0;
958
959 average.cores.c3 += c->c3;
960 average.cores.c6 += c->c6;
961 average.cores.c7 += c->c7;
962
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]963 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
964
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]965 /* sum per-pkg values only for 1st core in pkg */
966 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
967 return 0;
968
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]969 if (do_skl_residency) {
970 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
971 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
972 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
973 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
974 }
975
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]976 average.packages.pc2 += p->pc2;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]977 if (do_pc3)
978 average.packages.pc3 += p->pc3;
979 if (do_pc6)
980 average.packages.pc6 += p->pc6;
981 if (do_pc7)
982 average.packages.pc7 += p->pc7;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]983 average.packages.pc8 += p->pc8;
984 average.packages.pc9 += p->pc9;
985 average.packages.pc10 += p->pc10;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]986
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]987 average.packages.energy_pkg += p->energy_pkg;
988 average.packages.energy_dram += p->energy_dram;
989 average.packages.energy_cores += p->energy_cores;
990 average.packages.energy_gfx += p->energy_gfx;
991
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]992 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]993 average.packages.gfx_mhz = p->gfx_mhz;
994
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]995 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
996
997 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
998 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]999 return 0;
1000}
1001/*
1002 * sum the counters for all cpus in the system
1003 * compute the weighted average
1004 */
1005void compute_average(struct thread_data *t, struct core_data *c,
1006 struct pkg_data *p)
1007{
1008 clear_counters(&average.threads, &average.cores, &average.packages);
1009
1010 for_all_cpus(sum_counters, t, c, p);
1011
1012 average.threads.tsc /= topo.num_cpus;
1013 average.threads.aperf /= topo.num_cpus;
1014 average.threads.mperf /= topo.num_cpus;
1015 average.threads.c1 /= topo.num_cpus;
1016
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1017 average.threads.extra_delta32 /= topo.num_cpus;
1018 average.threads.extra_delta32 &= 0xFFFFFFFF;
1019
1020 average.threads.extra_delta64 /= topo.num_cpus;
1021
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1022 average.cores.c3 /= topo.num_cores;
1023 average.cores.c6 /= topo.num_cores;
1024 average.cores.c7 /= topo.num_cores;
1025
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1026 if (do_skl_residency) {
1027 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1028 average.packages.pkg_any_core_c0 /= topo.num_packages;
1029 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1030 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1031 }
1032
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1033 average.packages.pc2 /= topo.num_packages;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1034 if (do_pc3)
1035 average.packages.pc3 /= topo.num_packages;
1036 if (do_pc6)
1037 average.packages.pc6 /= topo.num_packages;
1038 if (do_pc7)
1039 average.packages.pc7 /= topo.num_packages;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1040
1041 average.packages.pc8 /= topo.num_packages;
1042 average.packages.pc9 /= topo.num_packages;
1043 average.packages.pc10 /= topo.num_packages;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1044}
1045
1046static unsigned long long rdtsc(void)
1047{
1048 unsigned int low, high;
1049
1050 asm volatile("rdtsc" : "=a" (low), "=d" (high));
1051
1052 return low | ((unsigned long long)high) << 32;
1053}
1054
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1055/*
1056 * get_counters(...)
1057 * migrate to cpu
1058 * acquire and record local counters for that cpu
1059 */
1060int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1061{
1062 int cpu = t->cpu_id;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1063 unsigned long long msr;
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1064 int aperf_mperf_retry_count = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1065
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1066 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1067 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1068 return -1;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]1069 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1070
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1071retry:
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1072 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1073
1074 if (has_aperf) {
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1075 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1076
1077 /*
1078 * The TSC, APERF and MPERF must be read together for
1079 * APERF/MPERF and MPERF/TSC to give accurate results.
1080 *
1081 * Unfortunately, APERF and MPERF are read by
1082 * individual system call, so delays may occur
1083 * between them. If the time to read them
1084 * varies by a large amount, we re-read them.
1085 */
1086
1087 /*
1088 * This initial dummy APERF read has been seen to
1089 * reduce jitter in the subsequent reads.
1090 */
1091
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1092 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1093 return -3;
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1094
1095 t->tsc = rdtsc(); /* re-read close to APERF */
1096
1097 tsc_before = t->tsc;
1098
1099 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1100 return -3;
1101
1102 tsc_between = rdtsc();
1103
Len Brown9c63a652012-10-31 01:29:52 -0400[diff] [blame]1104 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1105 return -4;
Len Brown0102b062016-02-27 03:11:29 -0500[diff] [blame]1106
1107 tsc_after = rdtsc();
1108
1109 aperf_time = tsc_between - tsc_before;
1110 mperf_time = tsc_after - tsc_between;
1111
1112 /*
1113 * If the system call latency to read APERF and MPERF
1114 * differ by more than 2x, then try again.
1115 */
1116 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1117 aperf_mperf_retry_count++;
1118 if (aperf_mperf_retry_count < 5)
1119 goto retry;
1120 else
1121 warnx("cpu%d jitter %lld %lld",
1122 cpu, aperf_time, mperf_time);
1123 }
1124 aperf_mperf_retry_count = 0;
1125
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]1126 t->aperf = t->aperf * aperf_mperf_multiplier;
1127 t->mperf = t->mperf * aperf_mperf_multiplier;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1128 }
1129
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1130 if (do_irq)
1131 t->irq_count = irqs_per_cpu[cpu];
Len Brown1ed51012013-02-10 17:19:24 -0500[diff] [blame]1132 if (do_smi) {
1133 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1134 return -5;
1135 t->smi_count = msr & 0xFFFFFFFF;
1136 }
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1137 if (extra_delta_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1138 if (get_msr(cpu, extra_delta_offset32, &msr))
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]1139 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1140 t->extra_delta32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1141 }
1142
1143 if (extra_delta_offset64)
1144 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
1145 return -5;
1146
1147 if (extra_msr_offset32) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1148 if (get_msr(cpu, extra_msr_offset32, &msr))
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1149 return -5;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1150 t->extra_msr32 = msr & 0xFFFFFFFF;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]1151 }
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]1152
1153 if (extra_msr_offset64)
1154 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1155 return -5;
1156
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1157 if (use_c1_residency_msr) {
1158 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1159 return -6;
1160 }
1161
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1162 /* collect core counters only for 1st thread in core */
1163 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1164 return 0;
1165
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1166 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1167 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1168 return -6;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]1169 }
1170
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1171 if (do_nhm_cstates && !do_knl_cstates) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1172 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1173 return -7;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1174 } else if (do_knl_cstates) {
1175 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1176 return -7;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1177 }
1178
1179 if (do_snb_cstates)
1180 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1181 return -8;
1182
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1183 if (do_dts) {
1184 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1185 return -9;
1186 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1187 }
1188
1189
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1190 /* collect package counters only for 1st core in package */
1191 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1192 return 0;
1193
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1194 if (do_skl_residency) {
1195 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1196 return -10;
1197 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1198 return -11;
1199 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1200 return -12;
1201 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1202 return -13;
1203 }
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1204 if (do_pc3)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1205 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1206 return -9;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1207 if (do_pc6)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1208 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1209 return -10;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1210 if (do_pc2)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1211 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1212 return -11;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1213 if (do_pc7)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1214 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1215 return -12;
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]1216 if (do_c8_c9_c10) {
1217 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1218 return -13;
1219 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1220 return -13;
1221 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1222 return -13;
1223 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]1224 if (do_rapl & RAPL_PKG) {
1225 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1226 return -13;
1227 p->energy_pkg = msr & 0xFFFFFFFF;
1228 }
1229 if (do_rapl & RAPL_CORES) {
1230 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1231 return -14;
1232 p->energy_cores = msr & 0xFFFFFFFF;
1233 }
1234 if (do_rapl & RAPL_DRAM) {
1235 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1236 return -15;
1237 p->energy_dram = msr & 0xFFFFFFFF;
1238 }
1239 if (do_rapl & RAPL_GFX) {
1240 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1241 return -16;
1242 p->energy_gfx = msr & 0xFFFFFFFF;
1243 }
1244 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1245 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1246 return -16;
1247 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1248 }
1249 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1250 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1251 return -16;
1252 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1253 }
1254 if (do_ptm) {
1255 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1256 return -17;
1257 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1258 }
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]1259
1260 if (do_gfx_rc6_ms)
1261 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1262
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1263 if (do_gfx_mhz)
1264 p->gfx_mhz = gfx_cur_mhz;
1265
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1266 return 0;
1267}
1268
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1269/*
1270 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1271 * If you change the values, note they are used both in comparisons
1272 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1273 */
1274
1275#define PCLUKN 0 /* Unknown */
1276#define PCLRSV 1 /* Reserved */
1277#define PCL__0 2 /* PC0 */
1278#define PCL__1 3 /* PC1 */
1279#define PCL__2 4 /* PC2 */
1280#define PCL__3 5 /* PC3 */
1281#define PCL__4 6 /* PC4 */
1282#define PCL__6 7 /* PC6 */
1283#define PCL_6N 8 /* PC6 No Retention */
1284#define PCL_6R 9 /* PC6 Retention */
1285#define PCL__7 10 /* PC7 */
1286#define PCL_7S 11 /* PC7 Shrink */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1287#define PCL__8 12 /* PC8 */
1288#define PCL__9 13 /* PC9 */
1289#define PCLUNL 14 /* Unlimited */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1290
1291int pkg_cstate_limit = PCLUKN;
1292char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]1293 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1294
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]1295int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1296int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1297int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1298int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1299int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1300int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Len Browne4085d52016-04-06 17:15:56 -0400[diff] [blame]1301int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]1302
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]1303
1304static void
1305calculate_tsc_tweak()
1306{
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]1307 tsc_tweak = base_hz / tsc_hz;
1308}
1309
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1310static void
1311dump_nhm_platform_info(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1312{
1313 unsigned long long msr;
1314 unsigned int ratio;
1315
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]1316 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1317
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1318 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1319
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1320 ratio = (msr >> 40) & 0xFF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1321 fprintf(outf, "%d * %.0f = %.0f MHz max efficiency frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1322 ratio, bclk, ratio * bclk);
1323
1324 ratio = (msr >> 8) & 0xFF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1325 fprintf(outf, "%d * %.0f = %.0f MHz base frequency\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1326 ratio, bclk, ratio * bclk);
1327
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1328 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1329 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
Len Brownbfae2052015-06-17 12:27:21 -0400[diff] [blame]1330 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
Len Brown67920412013-01-31 15:22:15 -0500[diff] [blame]1331
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1332 return;
1333}
1334
1335static void
1336dump_hsw_turbo_ratio_limits(void)
1337{
1338 unsigned long long msr;
1339 unsigned int ratio;
1340
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1341 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1342
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1343 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1344
1345 ratio = (msr >> 8) & 0xFF;
1346 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1347 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1348 ratio, bclk, ratio * bclk);
1349
1350 ratio = (msr >> 0) & 0xFF;
1351 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1352 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1353 ratio, bclk, ratio * bclk);
1354 return;
1355}
1356
1357static void
1358dump_ivt_turbo_ratio_limits(void)
1359{
1360 unsigned long long msr;
1361 unsigned int ratio;
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1362
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1363 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1364
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1365 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1366
1367 ratio = (msr >> 56) & 0xFF;
1368 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1369 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1370 ratio, bclk, ratio * bclk);
1371
1372 ratio = (msr >> 48) & 0xFF;
1373 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1374 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1375 ratio, bclk, ratio * bclk);
1376
1377 ratio = (msr >> 40) & 0xFF;
1378 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1379 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1380 ratio, bclk, ratio * bclk);
1381
1382 ratio = (msr >> 32) & 0xFF;
1383 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1384 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1385 ratio, bclk, ratio * bclk);
1386
1387 ratio = (msr >> 24) & 0xFF;
1388 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1389 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1390 ratio, bclk, ratio * bclk);
1391
1392 ratio = (msr >> 16) & 0xFF;
1393 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1394 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1395 ratio, bclk, ratio * bclk);
1396
1397 ratio = (msr >> 8) & 0xFF;
1398 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1399 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1400 ratio, bclk, ratio * bclk);
1401
1402 ratio = (msr >> 0) & 0xFF;
1403 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1404 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1405 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1406 return;
1407}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1408
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1409static void
1410dump_nhm_turbo_ratio_limits(void)
1411{
1412 unsigned long long msr;
1413 unsigned int ratio;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1414
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1415 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1416
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1417 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1418
1419 ratio = (msr >> 56) & 0xFF;
1420 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1421 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1422 ratio, bclk, ratio * bclk);
1423
1424 ratio = (msr >> 48) & 0xFF;
1425 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1426 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1427 ratio, bclk, ratio * bclk);
1428
1429 ratio = (msr >> 40) & 0xFF;
1430 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1431 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1432 ratio, bclk, ratio * bclk);
1433
1434 ratio = (msr >> 32) & 0xFF;
1435 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1436 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]1437 ratio, bclk, ratio * bclk);
1438
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1439 ratio = (msr >> 24) & 0xFF;
1440 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1441 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1442 ratio, bclk, ratio * bclk);
1443
1444 ratio = (msr >> 16) & 0xFF;
1445 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1446 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1447 ratio, bclk, ratio * bclk);
1448
1449 ratio = (msr >> 8) & 0xFF;
1450 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1451 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1452 ratio, bclk, ratio * bclk);
1453
1454 ratio = (msr >> 0) & 0xFF;
1455 if (ratio)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1456 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1457 ratio, bclk, ratio * bclk);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1458 return;
1459}
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]1460
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1461static void
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1462dump_knl_turbo_ratio_limits(void)
1463{
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1464 const unsigned int buckets_no = 7;
1465
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1466 unsigned long long msr;
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1467 int delta_cores, delta_ratio;
1468 int i, b_nr;
1469 unsigned int cores[buckets_no];
1470 unsigned int ratio[buckets_no];
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1471
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1472 get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1473
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1474 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
Len Brownbfae2052015-06-17 12:27:21 -0400[diff] [blame]1475 base_cpu, msr);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1476
1477 /**
1478 * Turbo encoding in KNL is as follows:
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1479 * [0] -- Reserved
1480 * [7:1] -- Base value of number of active cores of bucket 1.
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1481 * [15:8] -- Base value of freq ratio of bucket 1.
1482 * [20:16] -- +ve delta of number of active cores of bucket 2.
1483 * i.e. active cores of bucket 2 =
1484 * active cores of bucket 1 + delta
1485 * [23:21] -- Negative delta of freq ratio of bucket 2.
1486 * i.e. freq ratio of bucket 2 =
1487 * freq ratio of bucket 1 - delta
1488 * [28:24]-- +ve delta of number of active cores of bucket 3.
1489 * [31:29]-- -ve delta of freq ratio of bucket 3.
1490 * [36:32]-- +ve delta of number of active cores of bucket 4.
1491 * [39:37]-- -ve delta of freq ratio of bucket 4.
1492 * [44:40]-- +ve delta of number of active cores of bucket 5.
1493 * [47:45]-- -ve delta of freq ratio of bucket 5.
1494 * [52:48]-- +ve delta of number of active cores of bucket 6.
1495 * [55:53]-- -ve delta of freq ratio of bucket 6.
1496 * [60:56]-- +ve delta of number of active cores of bucket 7.
1497 * [63:61]-- -ve delta of freq ratio of bucket 7.
1498 */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1499
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1500 b_nr = 0;
1501 cores[b_nr] = (msr & 0xFF) >> 1;
1502 ratio[b_nr] = (msr >> 8) & 0xFF;
1503
1504 for (i = 16; i < 64; i += 8) {
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1505 delta_cores = (msr >> i) & 0x1F;
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1506 delta_ratio = (msr >> (i + 5)) & 0x7;
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1507
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1508 cores[b_nr + 1] = cores[b_nr] + delta_cores;
1509 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
1510 b_nr++;
1511 }
1512
1513 for (i = buckets_no - 1; i >= 0; i--)
1514 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1515 fprintf(outf,
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1516 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]1517 ratio[i], bclk, ratio[i] * bclk, cores[i]);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]1518}
1519
1520static void
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1521dump_nhm_cst_cfg(void)
1522{
1523 unsigned long long msr;
1524
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]1525 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1526
1527#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1528#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1529
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1530 fprintf(outf, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1531
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1532 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1533 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1534 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1535 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1536 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1537 (msr & (1 << 15)) ? "" : "UN",
Len Brown6c34f162016-03-13 03:21:22 -0400[diff] [blame]1538 (unsigned int)msr & 0xF,
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]1539 pkg_cstate_limit_strings[pkg_cstate_limit]);
1540 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1541}
1542
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1543static void
1544dump_config_tdp(void)
1545{
1546 unsigned long long msr;
1547
1548 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1549 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
Chen Yu685b5352015-12-13 21:09:31 +0800[diff] [blame]1550 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1551
1552 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1553 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1554 if (msr) {
Chen Yu685b5352015-12-13 21:09:31 +0800[diff] [blame]1555 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
1556 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
1557 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
1558 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1559 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1560 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1561
1562 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1563 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1564 if (msr) {
Chen Yu685b5352015-12-13 21:09:31 +0800[diff] [blame]1565 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
1566 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
1567 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
1568 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1569 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1570 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1571
1572 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1573 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1574 if ((msr) & 0x3)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1575 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
1576 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1577 fprintf(outf, ")\n");
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]1578
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1579 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1580 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
Chen Yu685b5352015-12-13 21:09:31 +0800[diff] [blame]1581 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1582 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1583 fprintf(outf, ")\n");
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1584}
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]1585
1586unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
1587
1588void print_irtl(void)
1589{
1590 unsigned long long msr;
1591
1592 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
1593 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
1594 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1595 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1596
1597 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
1598 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
1599 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1600 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1601
1602 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
1603 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
1604 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1605 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1606
1607 if (!do_irtl_hsw)
1608 return;
1609
1610 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
1611 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
1612 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1613 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1614
1615 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
1616 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
1617 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1618 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1619
1620 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
1621 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
1622 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1623 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1624
1625}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]1626void free_fd_percpu(void)
1627{
1628 int i;
1629
1630 for (i = 0; i < topo.max_cpu_num; ++i) {
1631 if (fd_percpu[i] != 0)
1632 close(fd_percpu[i]);
1633 }
1634
1635 free(fd_percpu);
1636}
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]1637
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1638void free_all_buffers(void)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1639{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1640 CPU_FREE(cpu_present_set);
1641 cpu_present_set = NULL;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]1642 cpu_present_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1643
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1644 CPU_FREE(cpu_affinity_set);
1645 cpu_affinity_set = NULL;
1646 cpu_affinity_setsize = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1647
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1648 free(thread_even);
1649 free(core_even);
1650 free(package_even);
1651
1652 thread_even = NULL;
1653 core_even = NULL;
1654 package_even = NULL;
1655
1656 free(thread_odd);
1657 free(core_odd);
1658 free(package_odd);
1659
1660 thread_odd = NULL;
1661 core_odd = NULL;
1662 package_odd = NULL;
1663
1664 free(output_buffer);
1665 output_buffer = NULL;
1666 outp = NULL;
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]1667
1668 free_fd_percpu();
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1669
1670 free(irq_column_2_cpu);
1671 free(irqs_per_cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1672}
1673
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1674/*
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1675 * Open a file, and exit on failure
1676 */
1677FILE *fopen_or_die(const char *path, const char *mode)
1678{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]1679 FILE *filep = fopen(path, mode);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1680 if (!filep)
1681 err(1, "%s: open failed", path);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1682 return filep;
1683}
1684
1685/*
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1686 * Parse a file containing a single int.
1687 */
1688int parse_int_file(const char *fmt, ...)
1689{
1690 va_list args;
1691 char path[PATH_MAX];
1692 FILE *filep;
1693 int value;
1694
1695 va_start(args, fmt);
1696 vsnprintf(path, sizeof(path), fmt, args);
1697 va_end(args);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1698 filep = fopen_or_die(path, "r");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1699 if (fscanf(filep, "%d", &value) != 1)
1700 err(1, "%s: failed to parse number from file", path);
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1701 fclose(filep);
1702 return value;
1703}
1704
1705/*
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1706 * get_cpu_position_in_core(cpu)
1707 * return the position of the CPU among its HT siblings in the core
1708 * return -1 if the sibling is not in list
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1709 */
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1710int get_cpu_position_in_core(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1711{
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1712 char path[64];
1713 FILE *filep;
1714 int this_cpu;
1715 char character;
1716 int i;
1717
1718 sprintf(path,
1719 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1720 cpu);
1721 filep = fopen(path, "r");
1722 if (filep == NULL) {
1723 perror(path);
1724 exit(1);
1725 }
1726
1727 for (i = 0; i < topo.num_threads_per_core; i++) {
1728 fscanf(filep, "%d", &this_cpu);
1729 if (this_cpu == cpu) {
1730 fclose(filep);
1731 return i;
1732 }
1733
1734 /* Account for no separator after last thread*/
1735 if (i != (topo.num_threads_per_core - 1))
1736 fscanf(filep, "%c", &character);
1737 }
1738
1739 fclose(filep);
1740 return -1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1741}
1742
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1743/*
1744 * cpu_is_first_core_in_package(cpu)
1745 * return 1 if given CPU is 1st core in package
1746 */
1747int cpu_is_first_core_in_package(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1748{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1749 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1750}
1751
1752int get_physical_package_id(int cpu)
1753{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1754 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1755}
1756
1757int get_core_id(int cpu)
1758{
Josh Triplett95aebc42013-08-20 17:20:16 -0700[diff] [blame]1759 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1760}
1761
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1762int get_num_ht_siblings(int cpu)
1763{
1764 char path[80];
1765 FILE *filep;
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1766 int sib1;
1767 int matches = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1768 char character;
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1769 char str[100];
1770 char *ch;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1771
1772 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1773 filep = fopen_or_die(path, "r");
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1774
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1775 /*
1776 * file format:
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1777 * A ',' separated or '-' separated set of numbers
1778 * (eg 1-2 or 1,3,4,5)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1779 */
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1780 fscanf(filep, "%d%c\n", &sib1, &character);
1781 fseek(filep, 0, SEEK_SET);
1782 fgets(str, 100, filep);
1783 ch = strchr(str, character);
1784 while (ch != NULL) {
1785 matches++;
1786 ch = strchr(ch+1, character);
1787 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1788
1789 fclose(filep);
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]1790 return matches+1;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1791}
1792
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1793/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1794 * run func(thread, core, package) in topology order
1795 * skip non-present cpus
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1796 */
1797
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1798int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1799 struct pkg_data *, struct thread_data *, struct core_data *,
1800 struct pkg_data *), struct thread_data *thread_base,
1801 struct core_data *core_base, struct pkg_data *pkg_base,
1802 struct thread_data *thread_base2, struct core_data *core_base2,
1803 struct pkg_data *pkg_base2)
1804{
1805 int retval, pkg_no, core_no, thread_no;
1806
1807 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1808 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1809 for (thread_no = 0; thread_no <
1810 topo.num_threads_per_core; ++thread_no) {
1811 struct thread_data *t, *t2;
1812 struct core_data *c, *c2;
1813 struct pkg_data *p, *p2;
1814
1815 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1816
1817 if (cpu_is_not_present(t->cpu_id))
1818 continue;
1819
1820 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1821
1822 c = GET_CORE(core_base, core_no, pkg_no);
1823 c2 = GET_CORE(core_base2, core_no, pkg_no);
1824
1825 p = GET_PKG(pkg_base, pkg_no);
1826 p2 = GET_PKG(pkg_base2, pkg_no);
1827
1828 retval = func(t, c, p, t2, c2, p2);
1829 if (retval)
1830 return retval;
1831 }
1832 }
1833 }
1834 return 0;
1835}
1836
1837/*
1838 * run func(cpu) on every cpu in /proc/stat
1839 * return max_cpu number
1840 */
1841int for_all_proc_cpus(int (func)(int))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1842{
1843 FILE *fp;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1844 int cpu_num;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1845 int retval;
1846
Josh Triplett57a42a32013-08-20 17:20:17 -0700[diff] [blame]1847 fp = fopen_or_die(proc_stat, "r");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1848
1849 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]1850 if (retval != 0)
1851 err(1, "%s: failed to parse format", proc_stat);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1852
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1853 while (1) {
1854 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1855 if (retval != 1)
1856 break;
1857
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1858 retval = func(cpu_num);
1859 if (retval) {
1860 fclose(fp);
1861 return(retval);
1862 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1863 }
1864 fclose(fp);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1865 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1866}
1867
1868void re_initialize(void)
1869{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1870 free_all_buffers();
1871 setup_all_buffers();
1872 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1873}
1874
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1875
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1876/*
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1877 * count_cpus()
1878 * remember the last one seen, it will be the max
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1879 */
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1880int count_cpus(int cpu)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1881{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1882 if (topo.max_cpu_num < cpu)
1883 topo.max_cpu_num = cpu;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1884
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]1885 topo.num_cpus += 1;
1886 return 0;
1887}
1888int mark_cpu_present(int cpu)
1889{
1890 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]1891 return 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]1892}
1893
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]1894/*
1895 * snapshot_proc_interrupts()
1896 *
1897 * read and record summary of /proc/interrupts
1898 *
1899 * return 1 if config change requires a restart, else return 0
1900 */
1901int snapshot_proc_interrupts(void)
1902{
1903 static FILE *fp;
1904 int column, retval;
1905
1906 if (fp == NULL)
1907 fp = fopen_or_die("/proc/interrupts", "r");
1908 else
1909 rewind(fp);
1910
1911 /* read 1st line of /proc/interrupts to get cpu* name for each column */
1912 for (column = 0; column < topo.num_cpus; ++column) {
1913 int cpu_number;
1914
1915 retval = fscanf(fp, " CPU%d", &cpu_number);
1916 if (retval != 1)
1917 break;
1918
1919 if (cpu_number > topo.max_cpu_num) {
1920 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
1921 return 1;
1922 }
1923
1924 irq_column_2_cpu[column] = cpu_number;
1925 irqs_per_cpu[cpu_number] = 0;
1926 }
1927
1928 /* read /proc/interrupt count lines and sum up irqs per cpu */
1929 while (1) {
1930 int column;
1931 char buf[64];
1932
1933 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
1934 if (retval != 1)
1935 break;
1936
1937 /* read the count per cpu */
1938 for (column = 0; column < topo.num_cpus; ++column) {
1939
1940 int cpu_number, irq_count;
1941
1942 retval = fscanf(fp, " %d", &irq_count);
1943 if (retval != 1)
1944 break;
1945
1946 cpu_number = irq_column_2_cpu[column];
1947 irqs_per_cpu[cpu_number] += irq_count;
1948
1949 }
1950
1951 while (getc(fp) != '\n')
1952 ; /* flush interrupt description */
1953
1954 }
1955 return 0;
1956}
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1957/*
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]1958 * snapshot_gfx_rc6_ms()
1959 *
1960 * record snapshot of
1961 * /sys/class/drm/card0/power/rc6_residency_ms
1962 *
1963 * return 1 if config change requires a restart, else return 0
1964 */
1965int snapshot_gfx_rc6_ms(void)
1966{
1967 FILE *fp;
1968 int retval;
1969
1970 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
1971
1972 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
1973 if (retval != 1)
1974 err(1, "GFX rc6");
1975
1976 fclose(fp);
1977
1978 return 0;
1979}
1980/*
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]1981 * snapshot_gfx_mhz()
1982 *
1983 * record snapshot of
1984 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
1985 *
1986 * return 1 if config change requires a restart, else return 0
1987 */
1988int snapshot_gfx_mhz(void)
1989{
1990 static FILE *fp;
1991 int retval;
1992
1993 if (fp == NULL)
1994 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
1995 else
1996 rewind(fp);
1997
1998 retval = fscanf(fp, "%d", &gfx_cur_mhz);
1999 if (retval != 1)
2000 err(1, "GFX MHz");
2001
2002 return 0;
2003}
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2004
2005/*
2006 * snapshot /proc and /sys files
2007 *
2008 * return 1 if configuration restart needed, else return 0
2009 */
2010int snapshot_proc_sysfs_files(void)
2011{
2012 if (snapshot_proc_interrupts())
2013 return 1;
2014
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]2015 if (do_gfx_rc6_ms)
2016 snapshot_gfx_rc6_ms();
2017
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]2018 if (do_gfx_mhz)
2019 snapshot_gfx_mhz();
2020
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2021 return 0;
2022}
2023
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2024void turbostat_loop()
2025{
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2026 int retval;
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]2027 int restarted = 0;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2028
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2029restart:
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]2030 restarted++;
2031
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2032 snapshot_proc_sysfs_files();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2033 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2034 if (retval < -1) {
2035 exit(retval);
2036 } else if (retval == -1) {
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]2037 if (restarted > 1) {
2038 exit(retval);
2039 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2040 re_initialize();
2041 goto restart;
2042 }
Len Browne52966c2012-11-08 22:38:05 -0500[diff] [blame]2043 restarted = 0;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2044 gettimeofday(&tv_even, (struct timezone *)NULL);
2045
2046 while (1) {
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2047 if (for_all_proc_cpus(cpu_is_not_present)) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2048 re_initialize();
2049 goto restart;
2050 }
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]2051 nanosleep(&interval_ts, NULL);
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2052 if (snapshot_proc_sysfs_files())
2053 goto restart;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2054 retval = for_all_cpus(get_counters, ODD_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2055 if (retval < -1) {
2056 exit(retval);
2057 } else if (retval == -1) {
Len Brown15aaa342012-03-29 22:19:58 -0400[diff] [blame]2058 re_initialize();
2059 goto restart;
2060 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2061 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2062 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2063 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
2064 compute_average(EVEN_COUNTERS);
2065 format_all_counters(EVEN_COUNTERS);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2066 flush_output_stdout();
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]2067 nanosleep(&interval_ts, NULL);
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]2068 if (snapshot_proc_sysfs_files())
2069 goto restart;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2070 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]2071 if (retval < -1) {
2072 exit(retval);
2073 } else if (retval == -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2074 re_initialize();
2075 goto restart;
2076 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2077 gettimeofday(&tv_even, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2078 timersub(&tv_even, &tv_odd, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]2079 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
2080 compute_average(ODD_COUNTERS);
2081 format_all_counters(ODD_COUNTERS);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2082 flush_output_stdout();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2083 }
2084}
2085
2086void check_dev_msr()
2087{
2088 struct stat sb;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2089 char pathname[32];
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2090
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2091 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
2092 if (stat(pathname, &sb))
Len Browna21d38c2015-03-24 16:37:35 -0400[diff] [blame]2093 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
2094 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2095}
2096
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]2097void check_permissions()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2098{
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]2099 struct __user_cap_header_struct cap_header_data;
2100 cap_user_header_t cap_header = &cap_header_data;
2101 struct __user_cap_data_struct cap_data_data;
2102 cap_user_data_t cap_data = &cap_data_data;
2103 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
2104 int do_exit = 0;
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2105 char pathname[32];
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]2106
2107 /* check for CAP_SYS_RAWIO */
2108 cap_header->pid = getpid();
2109 cap_header->version = _LINUX_CAPABILITY_VERSION;
2110 if (capget(cap_header, cap_data) < 0)
2111 err(-6, "capget(2) failed");
2112
2113 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
2114 do_exit++;
2115 warnx("capget(CAP_SYS_RAWIO) failed,"
2116 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
2117 }
2118
2119 /* test file permissions */
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2120 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
2121 if (euidaccess(pathname, R_OK)) {
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]2122 do_exit++;
2123 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
2124 }
2125
2126 /* if all else fails, thell them to be root */
2127 if (do_exit)
2128 if (getuid() != 0)
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2129 warnx("... or simply run as root");
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]2130
2131 if (do_exit)
2132 exit(-6);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2133}
2134
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2135/*
2136 * NHM adds support for additional MSRs:
2137 *
2138 * MSR_SMI_COUNT 0x00000034
2139 *
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]2140 * MSR_PLATFORM_INFO 0x000000ce
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2141 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
2142 *
2143 * MSR_PKG_C3_RESIDENCY 0x000003f8
2144 * MSR_PKG_C6_RESIDENCY 0x000003f9
2145 * MSR_CORE_C3_RESIDENCY 0x000003fc
2146 * MSR_CORE_C6_RESIDENCY 0x000003fd
2147 *
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2148 * Side effect:
2149 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2150 */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2151int probe_nhm_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2152{
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2153 unsigned long long msr;
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]2154 unsigned int base_ratio;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2155 int *pkg_cstate_limits;
2156
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2157 if (!genuine_intel)
2158 return 0;
2159
2160 if (family != 6)
2161 return 0;
2162
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]2163 bclk = discover_bclk(family, model);
2164
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2165 switch (model) {
2166 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
2167 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
2168 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
2169 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
2170 case 0x2C: /* Westmere EP - Gulftown */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2171 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2172 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2173 pkg_cstate_limits = nhm_pkg_cstate_limits;
2174 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2175 case 0x2A: /* SNB */
2176 case 0x2D: /* SNB Xeon */
Len Brown553575f2011-11-18 03:32:01 -0500[diff] [blame]2177 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]2178 case 0x3E: /* IVB Xeon */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2179 pkg_cstate_limits = snb_pkg_cstate_limits;
2180 break;
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2181 case 0x3C: /* HSW */
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]2182 case 0x3F: /* HSX */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2183 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2184 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2185 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2186 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2187 case 0x4F: /* BDX */
2188 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2189 case 0x4E: /* SKL */
2190 case 0x5E: /* SKL */
Len Browncdc57272016-04-06 17:15:59 -0400[diff] [blame^]2191 case 0x8E: /* KBL */
2192 case 0x9E: /* KBL */
Len Brownec53e592016-04-06 17:15:58 -0400[diff] [blame]2193 case 0x55: /* SKX */
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2194 pkg_cstate_limits = hsw_pkg_cstate_limits;
2195 break;
2196 case 0x37: /* BYT */
2197 case 0x4D: /* AVN */
2198 pkg_cstate_limits = slv_pkg_cstate_limits;
2199 break;
2200 case 0x4C: /* AMT */
2201 pkg_cstate_limits = amt_pkg_cstate_limits;
2202 break;
2203 case 0x57: /* PHI */
2204 pkg_cstate_limits = phi_pkg_cstate_limits;
2205 break;
Len Browne4085d52016-04-06 17:15:56 -0400[diff] [blame]2206 case 0x5C: /* BXT */
2207 pkg_cstate_limits = bxt_pkg_cstate_limits;
2208 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2209 default:
2210 return 0;
2211 }
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2212 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
Len Browne9257f52015-04-01 21:02:57 -0400[diff] [blame]2213 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2214
Len Brownec0adc52015-11-12 02:42:31 -0500[diff] [blame]2215 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
Len Brown21ed5572015-10-19 22:37:40 -0400[diff] [blame]2216 base_ratio = (msr >> 8) & 0xFF;
2217
2218 base_hz = base_ratio * bclk * 1000000;
2219 has_base_hz = 1;
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]2220 return 1;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2221}
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2222int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
2223{
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2224 switch (model) {
2225 /* Nehalem compatible, but do not include turbo-ratio limit support */
2226 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2227 case 0x2F: /* Westmere-EX Xeon - Eagleton */
Hubert Chrzaniukcbf97ab2016-02-10 14:55:22 +0100[diff] [blame]2228 case 0x57: /* PHI - Knights Landing (different MSR definition) */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2229 return 0;
2230 default:
2231 return 1;
2232 }
2233}
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2234int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
2235{
2236 if (!genuine_intel)
2237 return 0;
2238
2239 if (family != 6)
2240 return 0;
2241
2242 switch (model) {
2243 case 0x3E: /* IVB Xeon */
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2244 case 0x3F: /* HSW Xeon */
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2245 return 1;
2246 default:
2247 return 0;
2248 }
2249}
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2250int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
2251{
2252 if (!genuine_intel)
2253 return 0;
2254
2255 if (family != 6)
2256 return 0;
2257
2258 switch (model) {
2259 case 0x3F: /* HSW Xeon */
2260 return 1;
2261 default:
2262 return 0;
2263 }
2264}
2265
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2266int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
2267{
2268 if (!genuine_intel)
2269 return 0;
2270
2271 if (family != 6)
2272 return 0;
2273
2274 switch (model) {
2275 case 0x57: /* Knights Landing */
2276 return 1;
2277 default:
2278 return 0;
2279 }
2280}
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2281int has_config_tdp(unsigned int family, unsigned int model)
2282{
2283 if (!genuine_intel)
2284 return 0;
2285
2286 if (family != 6)
2287 return 0;
2288
2289 switch (model) {
2290 case 0x3A: /* IVB */
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2291 case 0x3C: /* HSW */
2292 case 0x3F: /* HSX */
2293 case 0x45: /* HSW */
2294 case 0x46: /* HSW */
2295 case 0x3D: /* BDW */
2296 case 0x47: /* BDW */
2297 case 0x4F: /* BDX */
2298 case 0x56: /* BDX-DE */
2299 case 0x4E: /* SKL */
2300 case 0x5E: /* SKL */
Len Browncdc57272016-04-06 17:15:59 -0400[diff] [blame^]2301 case 0x8E: /* KBL */
2302 case 0x9E: /* KBL */
Len Brownec53e592016-04-06 17:15:58 -0400[diff] [blame]2303 case 0x55: /* SKX */
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2304
2305 case 0x57: /* Knights Landing */
2306 return 1;
2307 default:
2308 return 0;
2309 }
2310}
2311
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2312static void
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2313dump_cstate_pstate_config_info(int family, int model)
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2314{
2315 if (!do_nhm_platform_info)
2316 return;
2317
2318 dump_nhm_platform_info();
2319
2320 if (has_hsw_turbo_ratio_limit(family, model))
2321 dump_hsw_turbo_ratio_limits();
2322
2323 if (has_ivt_turbo_ratio_limit(family, model))
2324 dump_ivt_turbo_ratio_limits();
2325
2326 if (has_nhm_turbo_ratio_limit(family, model))
2327 dump_nhm_turbo_ratio_limits();
2328
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2329 if (has_knl_turbo_ratio_limit(family, model))
2330 dump_knl_turbo_ratio_limits();
2331
Len Brown6fb31432015-06-17 16:23:45 -0400[diff] [blame]2332 if (has_config_tdp(family, model))
2333 dump_config_tdp();
2334
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]2335 dump_nhm_cst_cfg();
2336}
2337
Len Brown6574a5d2012-09-21 00:01:31 -0400[diff] [blame]2338
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2339/*
2340 * print_epb()
2341 * Decode the ENERGY_PERF_BIAS MSR
2342 */
2343int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2344{
2345 unsigned long long msr;
2346 char *epb_string;
2347 int cpu;
2348
2349 if (!has_epb)
2350 return 0;
2351
2352 cpu = t->cpu_id;
2353
2354 /* EPB is per-package */
2355 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2356 return 0;
2357
2358 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2359 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2360 return -1;
2361 }
2362
2363 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
2364 return 0;
2365
Len Browne9be7dd2015-05-26 12:19:37 -0400[diff] [blame]2366 switch (msr & 0xF) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2367 case ENERGY_PERF_BIAS_PERFORMANCE:
2368 epb_string = "performance";
2369 break;
2370 case ENERGY_PERF_BIAS_NORMAL:
2371 epb_string = "balanced";
2372 break;
2373 case ENERGY_PERF_BIAS_POWERSAVE:
2374 epb_string = "powersave";
2375 break;
2376 default:
2377 epb_string = "custom";
2378 break;
2379 }
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2380 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2381
2382 return 0;
2383}
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2384/*
2385 * print_hwp()
2386 * Decode the MSR_HWP_CAPABILITIES
2387 */
2388int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2389{
2390 unsigned long long msr;
2391 int cpu;
2392
2393 if (!has_hwp)
2394 return 0;
2395
2396 cpu = t->cpu_id;
2397
2398 /* MSR_HWP_CAPABILITIES is per-package */
2399 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2400 return 0;
2401
2402 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2403 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2404 return -1;
2405 }
2406
2407 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
2408 return 0;
2409
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2410 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2411 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
2412
2413 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
2414 if ((msr & (1 << 0)) == 0)
2415 return 0;
2416
2417 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
2418 return 0;
2419
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2420 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2421 "(high 0x%x guar 0x%x eff 0x%x low 0x%x)\n",
2422 cpu, msr,
2423 (unsigned int)HWP_HIGHEST_PERF(msr),
2424 (unsigned int)HWP_GUARANTEED_PERF(msr),
2425 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
2426 (unsigned int)HWP_LOWEST_PERF(msr));
2427
2428 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
2429 return 0;
2430
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2431 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2432 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x pkg 0x%x)\n",
2433 cpu, msr,
2434 (unsigned int)(((msr) >> 0) & 0xff),
2435 (unsigned int)(((msr) >> 8) & 0xff),
2436 (unsigned int)(((msr) >> 16) & 0xff),
2437 (unsigned int)(((msr) >> 24) & 0xff),
2438 (unsigned int)(((msr) >> 32) & 0xff3),
2439 (unsigned int)(((msr) >> 42) & 0x1));
2440
2441 if (has_hwp_pkg) {
2442 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
2443 return 0;
2444
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2445 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2446 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x)\n",
2447 cpu, msr,
2448 (unsigned int)(((msr) >> 0) & 0xff),
2449 (unsigned int)(((msr) >> 8) & 0xff),
2450 (unsigned int)(((msr) >> 16) & 0xff),
2451 (unsigned int)(((msr) >> 24) & 0xff),
2452 (unsigned int)(((msr) >> 32) & 0xff3));
2453 }
2454 if (has_hwp_notify) {
2455 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
2456 return 0;
2457
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2458 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2459 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
2460 cpu, msr,
2461 ((msr) & 0x1) ? "EN" : "Dis",
2462 ((msr) & 0x2) ? "EN" : "Dis");
2463 }
2464 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
2465 return 0;
2466
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2467 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]2468 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
2469 cpu, msr,
2470 ((msr) & 0x1) ? "" : "No-",
2471 ((msr) & 0x2) ? "" : "No-");
2472
2473 return 0;
2474}
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2475
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2476/*
2477 * print_perf_limit()
2478 */
2479int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2480{
2481 unsigned long long msr;
2482 int cpu;
2483
2484 cpu = t->cpu_id;
2485
2486 /* per-package */
2487 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2488 return 0;
2489
2490 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2491 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2492 return -1;
2493 }
2494
2495 if (do_core_perf_limit_reasons) {
2496 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2497 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2498 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2499 (msr & 1 << 15) ? "bit15, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2500 (msr & 1 << 14) ? "bit14, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2501 (msr & 1 << 13) ? "Transitions, " : "",
2502 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
2503 (msr & 1 << 11) ? "PkgPwrL2, " : "",
2504 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2505 (msr & 1 << 9) ? "CorePwr, " : "",
2506 (msr & 1 << 8) ? "Amps, " : "",
2507 (msr & 1 << 6) ? "VR-Therm, " : "",
2508 (msr & 1 << 5) ? "Auto-HWP, " : "",
2509 (msr & 1 << 4) ? "Graphics, " : "",
2510 (msr & 1 << 2) ? "bit2, " : "",
2511 (msr & 1 << 1) ? "ThermStatus, " : "",
2512 (msr & 1 << 0) ? "PROCHOT, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2513 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2514 (msr & 1 << 31) ? "bit31, " : "",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2515 (msr & 1 << 30) ? "bit30, " : "",
Len Browne33cbe82015-03-13 16:30:57 -0400[diff] [blame]2516 (msr & 1 << 29) ? "Transitions, " : "",
2517 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
2518 (msr & 1 << 27) ? "PkgPwrL2, " : "",
2519 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2520 (msr & 1 << 25) ? "CorePwr, " : "",
2521 (msr & 1 << 24) ? "Amps, " : "",
2522 (msr & 1 << 22) ? "VR-Therm, " : "",
2523 (msr & 1 << 21) ? "Auto-HWP, " : "",
2524 (msr & 1 << 20) ? "Graphics, " : "",
2525 (msr & 1 << 18) ? "bit18, " : "",
2526 (msr & 1 << 17) ? "ThermStatus, " : "",
2527 (msr & 1 << 16) ? "PROCHOT, " : "");
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2528
2529 }
2530 if (do_gfx_perf_limit_reasons) {
2531 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2532 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2533 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2534 (msr & 1 << 0) ? "PROCHOT, " : "",
2535 (msr & 1 << 1) ? "ThermStatus, " : "",
2536 (msr & 1 << 4) ? "Graphics, " : "",
2537 (msr & 1 << 6) ? "VR-Therm, " : "",
2538 (msr & 1 << 8) ? "Amps, " : "",
2539 (msr & 1 << 9) ? "GFXPwr, " : "",
2540 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2541 (msr & 1 << 11) ? "PkgPwrL2, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2542 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2543 (msr & 1 << 16) ? "PROCHOT, " : "",
2544 (msr & 1 << 17) ? "ThermStatus, " : "",
2545 (msr & 1 << 20) ? "Graphics, " : "",
2546 (msr & 1 << 22) ? "VR-Therm, " : "",
2547 (msr & 1 << 24) ? "Amps, " : "",
2548 (msr & 1 << 25) ? "GFXPwr, " : "",
2549 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2550 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2551 }
2552 if (do_ring_perf_limit_reasons) {
2553 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2554 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2555 fprintf(outf, " (Active: %s%s%s%s%s%s)",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2556 (msr & 1 << 0) ? "PROCHOT, " : "",
2557 (msr & 1 << 1) ? "ThermStatus, " : "",
2558 (msr & 1 << 6) ? "VR-Therm, " : "",
2559 (msr & 1 << 8) ? "Amps, " : "",
2560 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2561 (msr & 1 << 11) ? "PkgPwrL2, " : "");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2562 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2563 (msr & 1 << 16) ? "PROCHOT, " : "",
2564 (msr & 1 << 17) ? "ThermStatus, " : "",
2565 (msr & 1 << 22) ? "VR-Therm, " : "",
2566 (msr & 1 << 24) ? "Amps, " : "",
2567 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2568 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2569 }
2570 return 0;
2571}
2572
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2573#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2574#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2575
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2576double get_tdp(int model)
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2577{
2578 unsigned long long msr;
2579
2580 if (do_rapl & RAPL_PKG_POWER_INFO)
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2581 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2582 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2583
2584 switch (model) {
2585 case 0x37:
2586 case 0x4D:
2587 return 30.0;
2588 default:
2589 return 135.0;
2590 }
2591}
2592
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2593/*
2594 * rapl_dram_energy_units_probe()
2595 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2596 */
2597static double
2598rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2599{
2600 /* only called for genuine_intel, family 6 */
2601
2602 switch (model) {
2603 case 0x3F: /* HSX */
2604 case 0x4F: /* BDX */
2605 case 0x56: /* BDX-DE */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2606 case 0x57: /* KNL */
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2607 return (rapl_dram_energy_units = 15.3 / 1000000);
2608 default:
2609 return (rapl_energy_units);
2610 }
2611}
2612
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2613
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2614/*
2615 * rapl_probe()
2616 *
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2617 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2618 */
2619void rapl_probe(unsigned int family, unsigned int model)
2620{
2621 unsigned long long msr;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2622 unsigned int time_unit;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2623 double tdp;
2624
2625 if (!genuine_intel)
2626 return;
2627
2628 if (family != 6)
2629 return;
2630
2631 switch (model) {
2632 case 0x2A:
2633 case 0x3A:
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2634 case 0x3C: /* HSW */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2635 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2636 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2637 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2638 case 0x47: /* BDW */
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2639 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2640 break;
Len Browne4085d52016-04-06 17:15:56 -0400[diff] [blame]2641 case 0x5C: /* BXT */
2642 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
2643 break;
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2644 case 0x4E: /* SKL */
2645 case 0x5E: /* SKL */
Len Browncdc57272016-04-06 17:15:59 -0400[diff] [blame^]2646 case 0x8E: /* KBL */
2647 case 0x9E: /* KBL */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2648 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2649 break;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]2650 case 0x3F: /* HSX */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2651 case 0x4F: /* BDX */
2652 case 0x56: /* BDX-DE */
Len Brownec53e592016-04-06 17:15:58 -0400[diff] [blame]2653 case 0x55: /* SKX */
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]2654 case 0x57: /* KNL */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2655 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Browne6f9bb32013-12-03 02:19:19 -0500[diff] [blame]2656 break;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2657 case 0x2D:
2658 case 0x3E:
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2659 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2660 break;
2661 case 0x37: /* BYT */
2662 case 0x4D: /* AVN */
2663 do_rapl = RAPL_PKG | RAPL_CORES ;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2664 break;
2665 default:
2666 return;
2667 }
2668
2669 /* units on package 0, verify later other packages match */
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]2670 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2671 return;
2672
2673 rapl_power_units = 1.0 / (1 << (msr & 0xF));
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2674 if (model == 0x37)
2675 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2676 else
2677 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2678
Andrey Semin40ee8e32014-12-05 00:07:00 -0500[diff] [blame]2679 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2680
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2681 time_unit = msr >> 16 & 0xF;
2682 if (time_unit == 0)
2683 time_unit = 0xA;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2684
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2685 rapl_time_units = 1.0 / (1 << (time_unit));
2686
2687 tdp = get_tdp(model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2688
2689 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2690 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2691 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2692
2693 return;
2694}
2695
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]2696void perf_limit_reasons_probe(int family, int model)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]2697{
2698 if (!genuine_intel)
2699 return;
2700
2701 if (family != 6)
2702 return;
2703
2704 switch (model) {
2705 case 0x3C: /* HSW */
2706 case 0x45: /* HSW */
2707 case 0x46: /* HSW */
2708 do_gfx_perf_limit_reasons = 1;
2709 case 0x3F: /* HSX */
2710 do_core_perf_limit_reasons = 1;
2711 do_ring_perf_limit_reasons = 1;
2712 default:
2713 return;
2714 }
2715}
2716
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2717int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2718{
2719 unsigned long long msr;
2720 unsigned int dts;
2721 int cpu;
2722
2723 if (!(do_dts || do_ptm))
2724 return 0;
2725
2726 cpu = t->cpu_id;
2727
2728 /* DTS is per-core, no need to print for each thread */
2729 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2730 return 0;
2731
2732 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2733 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2734 return -1;
2735 }
2736
2737 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2738 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2739 return 0;
2740
2741 dts = (msr >> 16) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2742 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2743 cpu, msr, tcc_activation_temp - dts);
2744
2745#ifdef THERM_DEBUG
2746 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2747 return 0;
2748
2749 dts = (msr >> 16) & 0x7F;
2750 dts2 = (msr >> 8) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2751 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2752 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2753#endif
2754 }
2755
2756
2757 if (do_dts) {
2758 unsigned int resolution;
2759
2760 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2761 return 0;
2762
2763 dts = (msr >> 16) & 0x7F;
2764 resolution = (msr >> 27) & 0xF;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2765 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2766 cpu, msr, tcc_activation_temp - dts, resolution);
2767
2768#ifdef THERM_DEBUG
2769 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2770 return 0;
2771
2772 dts = (msr >> 16) & 0x7F;
2773 dts2 = (msr >> 8) & 0x7F;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2774 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2775 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2776#endif
2777 }
2778
2779 return 0;
2780}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]2781
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2782void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2783{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2784 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2785 cpu, label,
2786 ((msr >> 15) & 1) ? "EN" : "DIS",
2787 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2788 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2789 (((msr >> 16) & 1) ? "EN" : "DIS"));
2790
2791 return;
2792}
2793
2794int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2795{
2796 unsigned long long msr;
2797 int cpu;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2798
2799 if (!do_rapl)
2800 return 0;
2801
2802 /* RAPL counters are per package, so print only for 1st thread/package */
2803 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2804 return 0;
2805
2806 cpu = t->cpu_id;
2807 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2808 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2809 return -1;
2810 }
2811
2812 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2813 return -1;
2814
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2815 if (debug) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2816 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2817 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2818 rapl_power_units, rapl_energy_units, rapl_time_units);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2819 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2820 if (do_rapl & RAPL_PKG_POWER_INFO) {
2821
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2822 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2823 return -5;
2824
2825
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2826 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2827 cpu, msr,
2828 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2829 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2830 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2831 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2832
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2833 }
2834 if (do_rapl & RAPL_PKG) {
2835
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2836 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2837 return -9;
2838
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2839 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2840 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2841
2842 print_power_limit_msr(cpu, msr, "PKG Limit #1");
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2843 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2844 cpu,
2845 ((msr >> 47) & 1) ? "EN" : "DIS",
2846 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2847 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2848 ((msr >> 48) & 1) ? "EN" : "DIS");
2849 }
2850
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2851 if (do_rapl & RAPL_DRAM_POWER_INFO) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2852 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2853 return -6;
2854
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2855 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2856 cpu, msr,
2857 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2858 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2859 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2860 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2861 }
2862 if (do_rapl & RAPL_DRAM) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2863 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2864 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2865 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2866 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2867
2868 print_power_limit_msr(cpu, msr, "DRAM Limit");
2869 }
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2870 if (do_rapl & RAPL_CORE_POLICY) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2871 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2872 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2873 return -7;
2874
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2875 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2876 }
2877 }
2878 if (do_rapl & RAPL_CORES) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2879 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2880
2881 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2882 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2883 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2884 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2885 print_power_limit_msr(cpu, msr, "Cores Limit");
2886 }
2887 }
2888 if (do_rapl & RAPL_GFX) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]2889 if (debug) {
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2890 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2891 return -8;
2892
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2893 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2894
2895 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2896 return -9;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]2897 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]2898 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2899 print_power_limit_msr(cpu, msr, "GFX Limit");
2900 }
2901 }
2902 return 0;
2903}
2904
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2905/*
2906 * SNB adds support for additional MSRs:
2907 *
2908 * MSR_PKG_C7_RESIDENCY 0x000003fa
2909 * MSR_CORE_C7_RESIDENCY 0x000003fe
2910 * MSR_PKG_C2_RESIDENCY 0x0000060d
2911 */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2912
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2913int has_snb_msrs(unsigned int family, unsigned int model)
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2914{
2915 if (!genuine_intel)
2916 return 0;
2917
2918 switch (model) {
2919 case 0x2A:
2920 case 0x2D:
Len Brown650a37f2012-06-03 23:34:44 -0400[diff] [blame]2921 case 0x3A: /* IVB */
Len Brown13006512012-09-26 18:11:31 -0400[diff] [blame]2922 case 0x3E: /* IVB Xeon */
Len Brown70b43402013-01-08 01:26:07 -0500[diff] [blame]2923 case 0x3C: /* HSW */
2924 case 0x3F: /* HSW */
2925 case 0x45: /* HSW */
Len Brown149c2312013-03-15 10:58:02 -0400[diff] [blame]2926 case 0x46: /* HSW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2927 case 0x3D: /* BDW */
Len Brown48a06312015-02-10 15:38:04 -0500[diff] [blame]2928 case 0x47: /* BDW */
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2929 case 0x4F: /* BDX */
2930 case 0x56: /* BDX-DE */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2931 case 0x4E: /* SKL */
2932 case 0x5E: /* SKL */
Len Browncdc57272016-04-06 17:15:59 -0400[diff] [blame^]2933 case 0x8E: /* KBL */
2934 case 0x9E: /* KBL */
Len Brownec53e592016-04-06 17:15:58 -0400[diff] [blame]2935 case 0x55: /* SKX */
Len Browne4085d52016-04-06 17:15:56 -0400[diff] [blame]2936 case 0x5C: /* BXT */
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]2937 return 1;
2938 }
2939 return 0;
2940}
2941
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2942/*
2943 * HSW adds support for additional MSRs:
2944 *
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]2945 * MSR_PKG_C8_RESIDENCY 0x00000630
2946 * MSR_PKG_C9_RESIDENCY 0x00000631
2947 * MSR_PKG_C10_RESIDENCY 0x00000632
2948 *
2949 * MSR_PKGC8_IRTL 0x00000633
2950 * MSR_PKGC9_IRTL 0x00000634
2951 * MSR_PKGC10_IRTL 0x00000635
2952 *
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]2953 */
2954int has_hsw_msrs(unsigned int family, unsigned int model)
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2955{
2956 if (!genuine_intel)
2957 return 0;
2958
2959 switch (model) {
Len Brown4e8e863f2014-02-27 23:28:53 -0500[diff] [blame]2960 case 0x45: /* HSW */
2961 case 0x3D: /* BDW */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2962 case 0x4E: /* SKL */
2963 case 0x5E: /* SKL */
Len Browncdc57272016-04-06 17:15:59 -0400[diff] [blame^]2964 case 0x8E: /* KBL */
2965 case 0x9E: /* KBL */
Len Browne4085d52016-04-06 17:15:56 -0400[diff] [blame]2966 case 0x5C: /* BXT */
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2967 return 1;
2968 }
2969 return 0;
2970}
2971
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2972/*
2973 * SKL adds support for additional MSRS:
2974 *
2975 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2976 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2977 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2978 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2979 */
2980int has_skl_msrs(unsigned int family, unsigned int model)
2981{
2982 if (!genuine_intel)
2983 return 0;
2984
2985 switch (model) {
2986 case 0x4E: /* SKL */
2987 case 0x5E: /* SKL */
Len Browncdc57272016-04-06 17:15:59 -0400[diff] [blame^]2988 case 0x8E: /* KBL */
2989 case 0x9E: /* KBL */
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]2990 return 1;
2991 }
2992 return 0;
2993}
2994
2995
Kristen Carlson Accardica587102012-11-21 05:22:43 -0800[diff] [blame]2996
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]2997int is_slm(unsigned int family, unsigned int model)
2998{
2999 if (!genuine_intel)
3000 return 0;
3001 switch (model) {
3002 case 0x37: /* BYT */
3003 case 0x4D: /* AVN */
3004 return 1;
3005 }
3006 return 0;
3007}
3008
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]3009int is_knl(unsigned int family, unsigned int model)
3010{
3011 if (!genuine_intel)
3012 return 0;
3013 switch (model) {
3014 case 0x57: /* KNL */
3015 return 1;
3016 }
3017 return 0;
3018}
3019
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]3020unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
3021{
3022 if (is_knl(family, model))
3023 return 1024;
3024 return 1;
3025}
3026
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3027#define SLM_BCLK_FREQS 5
3028double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
3029
3030double slm_bclk(void)
3031{
3032 unsigned long long msr = 3;
3033 unsigned int i;
3034 double freq;
3035
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3036 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3037 fprintf(outf, "SLM BCLK: unknown\n");
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3038
3039 i = msr & 0xf;
3040 if (i >= SLM_BCLK_FREQS) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3041 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3042 msr = 3;
3043 }
3044 freq = slm_freq_table[i];
3045
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3046 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3047
3048 return freq;
3049}
3050
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3051double discover_bclk(unsigned int family, unsigned int model)
3052{
Chrzaniuk, Hubert121b48b2016-02-10 16:35:17 +0100[diff] [blame]3053 if (has_snb_msrs(family, model) || is_knl(family, model))
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3054 return 100.00;
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3055 else if (is_slm(family, model))
3056 return slm_bclk();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3057 else
3058 return 133.33;
3059}
3060
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3061/*
3062 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
3063 * the Thermal Control Circuit (TCC) activates.
3064 * This is usually equal to tjMax.
3065 *
3066 * Older processors do not have this MSR, so there we guess,
3067 * but also allow cmdline over-ride with -T.
3068 *
3069 * Several MSR temperature values are in units of degrees-C
3070 * below this value, including the Digital Thermal Sensor (DTS),
3071 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
3072 */
3073int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3074{
3075 unsigned long long msr;
3076 unsigned int target_c_local;
3077 int cpu;
3078
3079 /* tcc_activation_temp is used only for dts or ptm */
3080 if (!(do_dts || do_ptm))
3081 return 0;
3082
3083 /* this is a per-package concept */
3084 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3085 return 0;
3086
3087 cpu = t->cpu_id;
3088 if (cpu_migrate(cpu)) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3089 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3090 return -1;
3091 }
3092
3093 if (tcc_activation_temp_override != 0) {
3094 tcc_activation_temp = tcc_activation_temp_override;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3095 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3096 cpu, tcc_activation_temp);
3097 return 0;
3098 }
3099
3100 /* Temperature Target MSR is Nehalem and newer only */
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3101 if (!do_nhm_platform_info)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3102 goto guess;
3103
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3104 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3105 goto guess;
3106
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]3107 target_c_local = (msr >> 16) & 0xFF;
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3108
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3109 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3110 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3111 cpu, msr, target_c_local);
3112
Jean Delvare34821242014-05-01 11:40:19 +0200[diff] [blame]3113 if (!target_c_local)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3114 goto guess;
3115
3116 tcc_activation_temp = target_c_local;
3117
3118 return 0;
3119
3120guess:
3121 tcc_activation_temp = TJMAX_DEFAULT;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3122 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3123 cpu, tcc_activation_temp);
3124
3125 return 0;
3126}
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3127
Len Brownaa8d8cc2016-03-11 13:26:03 -0500[diff] [blame]3128void decode_feature_control_msr(void)
3129{
3130 unsigned long long msr;
3131
3132 if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
3133 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
3134 base_cpu, msr,
3135 msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
3136 msr & (1 << 18) ? "SGX" : "");
3137}
3138
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3139void decode_misc_enable_msr(void)
3140{
3141 unsigned long long msr;
3142
3143 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3144 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n",
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3145 base_cpu, msr,
3146 msr & (1 << 3) ? "TCC" : "",
3147 msr & (1 << 16) ? "EIST" : "",
3148 msr & (1 << 18) ? "MONITOR" : "");
3149}
3150
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]3151/*
3152 * Decode MSR_MISC_PWR_MGMT
3153 *
3154 * Decode the bits according to the Nehalem documentation
3155 * bit[0] seems to continue to have same meaning going forward
3156 * bit[1] less so...
3157 */
3158void decode_misc_pwr_mgmt_msr(void)
3159{
3160 unsigned long long msr;
3161
3162 if (!do_nhm_platform_info)
3163 return;
3164
3165 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3166 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]3167 base_cpu, msr,
3168 msr & (1 << 0) ? "DIS" : "EN",
3169 msr & (1 << 1) ? "EN" : "DIS");
3170}
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3171
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3172void process_cpuid()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3173{
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3174 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3175 unsigned int fms, family, model, stepping;
3176
3177 eax = ebx = ecx = edx = 0;
3178
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]3179 __cpuid(0, max_level, ebx, ecx, edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3180
3181 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
3182 genuine_intel = 1;
3183
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3184 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3185 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3186 (char *)&ebx, (char *)&edx, (char *)&ecx);
3187
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]3188 __cpuid(1, fms, ebx, ecx, edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3189 family = (fms >> 8) & 0xf;
3190 model = (fms >> 4) & 0xf;
3191 stepping = fms & 0xf;
3192 if (family == 6 || family == 0xf)
3193 model += ((fms >> 16) & 0xf) << 4;
3194
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3195 if (debug) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3196 fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3197 max_level, family, model, stepping, family, model, stepping);
Len Brownaa8d8cc2016-03-11 13:26:03 -0500[diff] [blame]3198 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s\n",
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3199 ecx & (1 << 0) ? "SSE3" : "-",
3200 ecx & (1 << 3) ? "MONITOR" : "-",
Len Brownaa8d8cc2016-03-11 13:26:03 -0500[diff] [blame]3201 ecx & (1 << 6) ? "SMX" : "-",
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3202 ecx & (1 << 7) ? "EIST" : "-",
3203 ecx & (1 << 8) ? "TM2" : "-",
3204 edx & (1 << 4) ? "TSC" : "-",
3205 edx & (1 << 5) ? "MSR" : "-",
3206 edx & (1 << 22) ? "ACPI-TM" : "-",
3207 edx & (1 << 29) ? "TM" : "-");
3208 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3209
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3210 if (!(edx & (1 << 5)))
3211 errx(1, "CPUID: no MSR");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3212
3213 /*
3214 * check max extended function levels of CPUID.
3215 * This is needed to check for invariant TSC.
3216 * This check is valid for both Intel and AMD.
3217 */
3218 ebx = ecx = edx = 0;
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]3219 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3220
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3221 if (max_extended_level >= 0x80000007) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3222
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3223 /*
3224 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
3225 * this check is valid for both Intel and AMD
3226 */
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]3227 __cpuid(0x80000007, eax, ebx, ecx, edx);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3228 has_invariant_tsc = edx & (1 << 8);
3229 }
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3230
3231 /*
3232 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
3233 * this check is valid for both Intel and AMD
3234 */
3235
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]3236 __cpuid(0x6, eax, ebx, ecx, edx);
Thomas Renninger8209e052011-01-21 15:11:19 +0100[diff] [blame]3237 has_aperf = ecx & (1 << 0);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3238 do_dts = eax & (1 << 0);
3239 do_ptm = eax & (1 << 6);
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3240 has_hwp = eax & (1 << 7);
3241 has_hwp_notify = eax & (1 << 8);
3242 has_hwp_activity_window = eax & (1 << 9);
3243 has_hwp_epp = eax & (1 << 10);
3244 has_hwp_pkg = eax & (1 << 11);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3245 has_epb = ecx & (1 << 3);
3246
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3247 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3248 fprintf(outf, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sHWP, "
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3249 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
3250 has_aperf ? "" : "No-",
3251 do_dts ? "" : "No-",
3252 do_ptm ? "" : "No-",
3253 has_hwp ? "" : "No-",
3254 has_hwp_notify ? "" : "No-",
3255 has_hwp_activity_window ? "" : "No-",
3256 has_hwp_epp ? "" : "No-",
3257 has_hwp_pkg ? "" : "No-",
3258 has_epb ? "" : "No-");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3259
Len Brown69807a62015-11-21 12:22:47 -0500[diff] [blame]3260 if (debug)
3261 decode_misc_enable_msr();
3262
Len Brown8ae72252016-04-06 17:15:54 -0400[diff] [blame]3263 if (max_level >= 0x7 && debug) {
Len Brownaa8d8cc2016-03-11 13:26:03 -0500[diff] [blame]3264 int has_sgx;
3265
3266 ecx = 0;
3267
3268 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
3269
3270 has_sgx = ebx & (1 << 2);
3271 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
3272
3273 if (has_sgx)
3274 decode_feature_control_msr();
3275 }
3276
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3277 if (max_level >= 0x15) {
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3278 unsigned int eax_crystal;
3279 unsigned int ebx_tsc;
3280
3281 /*
3282 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
3283 */
3284 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]3285 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3286
3287 if (ebx_tsc != 0) {
3288
3289 if (debug && (ebx != 0))
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3290 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3291 eax_crystal, ebx_tsc, crystal_hz);
3292
3293 if (crystal_hz == 0)
3294 switch(model) {
3295 case 0x4E: /* SKL */
3296 case 0x5E: /* SKL */
Len Browncdc57272016-04-06 17:15:59 -0400[diff] [blame^]3297 case 0x8E: /* KBL */
3298 case 0x9E: /* KBL */
Len Browne8efbc82016-04-06 17:15:57 -0400[diff] [blame]3299 crystal_hz = 24000000; /* 24.0 MHz */
3300 break;
Len Brownec53e592016-04-06 17:15:58 -0400[diff] [blame]3301 case 0x55: /* SKX */
3302 crystal_hz = 25000000; /* 25.0 MHz */
3303 break;
Len Browne8efbc82016-04-06 17:15:57 -0400[diff] [blame]3304 case 0x5C: /* BXT */
3305 crystal_hz = 19200000; /* 19.2 MHz */
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3306 break;
3307 default:
3308 crystal_hz = 0;
3309 }
3310
3311 if (crystal_hz) {
3312 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
3313 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3314 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3315 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
3316 }
3317 }
3318 }
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3319 if (max_level >= 0x16) {
3320 unsigned int base_mhz, max_mhz, bus_mhz, edx;
3321
3322 /*
3323 * CPUID 16H Base MHz, Max MHz, Bus MHz
3324 */
3325 base_mhz = max_mhz = bus_mhz = edx = 0;
3326
Len Brown5aea2f72016-03-13 03:14:35 -0400[diff] [blame]3327 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3328 if (debug)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3329 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
Len Brown61a87ba2015-11-23 02:30:51 -0500[diff] [blame]3330 base_mhz, max_mhz, bus_mhz);
3331 }
Len Brown8a5bdf42015-04-01 21:02:57 -0400[diff] [blame]3332
Hubert Chrzaniukb2b34df2015-09-14 13:31:00 +0200[diff] [blame]3333 if (has_aperf)
3334 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
3335
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3336 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3337 do_snb_cstates = has_snb_msrs(family, model);
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]3338 do_irtl_snb = has_snb_msrs(family, model);
Len Brownee7e38e2015-02-09 23:39:45 -0500[diff] [blame]3339 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
3340 do_pc3 = (pkg_cstate_limit >= PCL__3);
3341 do_pc6 = (pkg_cstate_limit >= PCL__6);
3342 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
Len Brownd7899442015-01-23 00:12:33 -0500[diff] [blame]3343 do_c8_c9_c10 = has_hsw_msrs(family, model);
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]3344 do_irtl_hsw = has_hsw_msrs(family, model);
Len Brown0b2bb692015-03-26 00:50:30 -0400[diff] [blame]3345 do_skl_residency = has_skl_msrs(family, model);
Len Brown144b44b2013-11-09 00:30:16 -0500[diff] [blame]3346 do_slm_cstates = is_slm(family, model);
Dasaratharaman Chandramoulifb5d4322015-05-20 09:49:34 -0700[diff] [blame]3347 do_knl_cstates = is_knl(family, model);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3348
Len Brownf0057312015-12-03 01:35:36 -0500[diff] [blame]3349 if (debug)
3350 decode_misc_pwr_mgmt_msr();
3351
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3352 rapl_probe(family, model);
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3353 perf_limit_reasons_probe(family, model);
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3354
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3355 if (debug)
Len Brown58cc30a2016-02-24 18:16:40 -0500[diff] [blame]3356 dump_cstate_pstate_config_info(family, model);
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3357
Len Browna2b7b742015-09-26 00:12:38 -0400[diff] [blame]3358 if (has_skl_msrs(family, model))
3359 calculate_tsc_tweak();
3360
Len Brownfdf676e2016-02-27 01:28:12 -0500[diff] [blame]3361 do_gfx_rc6_ms = !access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK);
3362
Len Brown27d47352016-02-27 00:37:54 -0500[diff] [blame]3363 do_gfx_mhz = !access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK);
3364
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3365 return;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3366}
3367
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3368void help()
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3369{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3370 fprintf(outf,
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3371 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3372 "\n"
3373 "Turbostat forks the specified COMMAND and prints statistics\n"
3374 "when COMMAND completes.\n"
3375 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3376 "to print statistics, until interrupted.\n"
3377 "--debug run in \"debug\" mode\n"
3378 "--interval sec Override default 5-second measurement interval\n"
3379 "--help print this help message\n"
3380 "--counter msr print 32-bit counter at address \"msr\"\n"
3381 "--Counter msr print 64-bit Counter at address \"msr\"\n"
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3382 "--out file create or truncate \"file\" for all output\n"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3383 "--msr msr print 32-bit value at address \"msr\"\n"
3384 "--MSR msr print 64-bit Value at address \"msr\"\n"
3385 "--version print version information\n"
3386 "\n"
3387 "For more help, run \"man turbostat\"\n");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3388}
3389
3390
3391/*
3392 * in /dev/cpu/ return success for names that are numbers
3393 * ie. filter out ".", "..", "microcode".
3394 */
3395int dir_filter(const struct dirent *dirp)
3396{
3397 if (isdigit(dirp->d_name[0]))
3398 return 1;
3399 else
3400 return 0;
3401}
3402
3403int open_dev_cpu_msr(int dummy1)
3404{
3405 return 0;
3406}
3407
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3408void topology_probe()
3409{
3410 int i;
3411 int max_core_id = 0;
3412 int max_package_id = 0;
3413 int max_siblings = 0;
3414 struct cpu_topology {
3415 int core_id;
3416 int physical_package_id;
3417 } *cpus;
3418
3419 /* Initialize num_cpus, max_cpu_num */
3420 topo.num_cpus = 0;
3421 topo.max_cpu_num = 0;
3422 for_all_proc_cpus(count_cpus);
3423 if (!summary_only && topo.num_cpus > 1)
3424 show_cpu = 1;
3425
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3426 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3427 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3428
3429 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3430 if (cpus == NULL)
3431 err(1, "calloc cpus");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3432
3433 /*
3434 * Allocate and initialize cpu_present_set
3435 */
3436 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3437 if (cpu_present_set == NULL)
3438 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3439 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3440 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
3441 for_all_proc_cpus(mark_cpu_present);
3442
3443 /*
3444 * Allocate and initialize cpu_affinity_set
3445 */
3446 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3447 if (cpu_affinity_set == NULL)
3448 err(3, "CPU_ALLOC");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3449 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3450 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
3451
3452
3453 /*
3454 * For online cpus
3455 * find max_core_id, max_package_id
3456 */
3457 for (i = 0; i <= topo.max_cpu_num; ++i) {
3458 int siblings;
3459
3460 if (cpu_is_not_present(i)) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3461 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3462 fprintf(outf, "cpu%d NOT PRESENT\n", i);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3463 continue;
3464 }
3465 cpus[i].core_id = get_core_id(i);
3466 if (cpus[i].core_id > max_core_id)
3467 max_core_id = cpus[i].core_id;
3468
3469 cpus[i].physical_package_id = get_physical_package_id(i);
3470 if (cpus[i].physical_package_id > max_package_id)
3471 max_package_id = cpus[i].physical_package_id;
3472
3473 siblings = get_num_ht_siblings(i);
3474 if (siblings > max_siblings)
3475 max_siblings = siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3476 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3477 fprintf(outf, "cpu %d pkg %d core %d\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3478 i, cpus[i].physical_package_id, cpus[i].core_id);
3479 }
3480 topo.num_cores_per_pkg = max_core_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3481 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3482 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3483 max_core_id, topo.num_cores_per_pkg);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]3484 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3485 show_core = 1;
3486
3487 topo.num_packages = max_package_id + 1;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3488 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3489 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3490 max_package_id, topo.num_packages);
Len Brown1cc21f72015-02-23 00:34:57 -0500[diff] [blame]3491 if (debug && !summary_only && topo.num_packages > 1)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3492 show_pkg = 1;
3493
3494 topo.num_threads_per_core = max_siblings;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3495 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3496 fprintf(outf, "max_siblings %d\n", max_siblings);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3497
3498 free(cpus);
3499}
3500
3501void
3502allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
3503{
3504 int i;
3505
3506 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3507 topo.num_packages, sizeof(struct thread_data));
3508 if (*t == NULL)
3509 goto error;
3510
3511 for (i = 0; i < topo.num_threads_per_core *
3512 topo.num_cores_per_pkg * topo.num_packages; i++)
3513 (*t)[i].cpu_id = -1;
3514
3515 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3516 sizeof(struct core_data));
3517 if (*c == NULL)
3518 goto error;
3519
3520 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3521 (*c)[i].core_id = -1;
3522
3523 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
3524 if (*p == NULL)
3525 goto error;
3526
3527 for (i = 0; i < topo.num_packages; i++)
3528 (*p)[i].package_id = i;
3529
3530 return;
3531error:
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3532 err(1, "calloc counters");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3533}
3534/*
3535 * init_counter()
3536 *
3537 * set cpu_id, core_num, pkg_num
3538 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
3539 *
3540 * increment topo.num_cores when 1st core in pkg seen
3541 */
3542void init_counter(struct thread_data *thread_base, struct core_data *core_base,
3543 struct pkg_data *pkg_base, int thread_num, int core_num,
3544 int pkg_num, int cpu_id)
3545{
3546 struct thread_data *t;
3547 struct core_data *c;
3548 struct pkg_data *p;
3549
3550 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
3551 c = GET_CORE(core_base, core_num, pkg_num);
3552 p = GET_PKG(pkg_base, pkg_num);
3553
3554 t->cpu_id = cpu_id;
3555 if (thread_num == 0) {
3556 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
3557 if (cpu_is_first_core_in_package(cpu_id))
3558 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
3559 }
3560
3561 c->core_id = core_num;
3562 p->package_id = pkg_num;
3563}
3564
3565
3566int initialize_counters(int cpu_id)
3567{
3568 int my_thread_id, my_core_id, my_package_id;
3569
3570 my_package_id = get_physical_package_id(cpu_id);
3571 my_core_id = get_core_id(cpu_id);
Dasaratharaman Chandramoulie275b382015-04-15 10:09:50 -0700[diff] [blame]3572 my_thread_id = get_cpu_position_in_core(cpu_id);
3573 if (!my_thread_id)
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3574 topo.num_cores++;
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3575
3576 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3577 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3578 return 0;
3579}
3580
3581void allocate_output_buffer()
3582{
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3583 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3584 outp = output_buffer;
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3585 if (outp == NULL)
3586 err(-1, "calloc output buffer");
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3587}
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]3588void allocate_fd_percpu(void)
3589{
3590 fd_percpu = calloc(topo.max_cpu_num, sizeof(int));
3591 if (fd_percpu == NULL)
3592 err(-1, "calloc fd_percpu");
3593}
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]3594void allocate_irq_buffers(void)
3595{
3596 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
3597 if (irq_column_2_cpu == NULL)
3598 err(-1, "calloc %d", topo.num_cpus);
3599
3600 irqs_per_cpu = calloc(topo.max_cpu_num, sizeof(int));
3601 if (irqs_per_cpu == NULL)
3602 err(-1, "calloc %d", topo.max_cpu_num);
3603}
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3604void setup_all_buffers(void)
3605{
3606 topology_probe();
Len Brown562a2d32016-02-26 23:48:05 -0500[diff] [blame]3607 allocate_irq_buffers();
Len Brown36229892016-02-26 20:51:02 -0500[diff] [blame]3608 allocate_fd_percpu();
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3609 allocate_counters(&thread_even, &core_even, &package_even);
3610 allocate_counters(&thread_odd, &core_odd, &package_odd);
3611 allocate_output_buffer();
3612 for_all_proc_cpus(initialize_counters);
3613}
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3614
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3615void set_base_cpu(void)
3616{
3617 base_cpu = sched_getcpu();
3618 if (base_cpu < 0)
3619 err(-ENODEV, "No valid cpus found");
3620
3621 if (debug > 1)
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3622 fprintf(outf, "base_cpu = %d\n", base_cpu);
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3623}
3624
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3625void turbostat_init()
3626{
Prarit Bhargava7ce7d5d2015-05-25 08:34:28 -0400[diff] [blame]3627 setup_all_buffers();
3628 set_base_cpu();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3629 check_dev_msr();
Len Brown98481e72014-08-15 00:36:50 -0400[diff] [blame]3630 check_permissions();
Len Brownfcd17212015-03-23 20:29:09 -0400[diff] [blame]3631 process_cpuid();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3632
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3633
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3634 if (debug)
Len Brown7f5c2582015-12-01 01:36:39 -0500[diff] [blame]3635 for_all_cpus(print_hwp, ODD_COUNTERS);
3636
3637 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3638 for_all_cpus(print_epb, ODD_COUNTERS);
3639
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3640 if (debug)
Len Brown3a9a9412014-08-15 02:39:52 -0400[diff] [blame]3641 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3642
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3643 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3644 for_all_cpus(print_rapl, ODD_COUNTERS);
3645
3646 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3647
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3648 if (debug)
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3649 for_all_cpus(print_thermal, ODD_COUNTERS);
Len Brown5a634262016-04-06 17:15:55 -0400[diff] [blame]3650
3651 if (debug && do_irtl_snb)
3652 print_irtl();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3653}
3654
3655int fork_it(char **argv)
3656{
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3657 pid_t child_pid;
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3658 int status;
Len Brownd15cf7c2012-06-03 23:24:00 -0400[diff] [blame]3659
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3660 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3661 if (status)
3662 exit(status);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3663 /* clear affinity side-effect of get_counters() */
3664 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3665 gettimeofday(&tv_even, (struct timezone *)NULL);
3666
3667 child_pid = fork();
3668 if (!child_pid) {
3669 /* child */
3670 execvp(argv[0], argv);
3671 } else {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3672
3673 /* parent */
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3674 if (child_pid == -1)
3675 err(1, "fork");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3676
3677 signal(SIGINT, SIG_IGN);
3678 signal(SIGQUIT, SIG_IGN);
Josh Triplettb2c95d92013-08-20 17:20:18 -0700[diff] [blame]3679 if (waitpid(child_pid, &status, 0) == -1)
3680 err(status, "waitpid");
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3681 }
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3682 /*
3683 * n.b. fork_it() does not check for errors from for_all_cpus()
3684 * because re-starting is problematic when forking
3685 */
3686 for_all_cpus(get_counters, ODD_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3687 gettimeofday(&tv_odd, (struct timezone *)NULL);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3688 timersub(&tv_odd, &tv_even, &tv_delta);
Len Brownc98d5d92012-06-04 00:56:40 -0400[diff] [blame]3689 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3690 compute_average(EVEN_COUNTERS);
3691 format_all_counters(EVEN_COUNTERS);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3692
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3693 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
3694
3695 flush_output_stderr();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3696
Len Brownd91bb172012-11-01 00:08:19 -0400[diff] [blame]3697 return status;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3698}
3699
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3700int get_and_dump_counters(void)
3701{
3702 int status;
3703
3704 status = for_all_cpus(get_counters, ODD_COUNTERS);
3705 if (status)
3706 return status;
3707
3708 status = for_all_cpus(dump_counters, ODD_COUNTERS);
3709 if (status)
3710 return status;
3711
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3712 flush_output_stdout();
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3713
3714 return status;
3715}
3716
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3717void print_version() {
Len Brownec53e592016-04-06 17:15:58 -0400[diff] [blame]3718 fprintf(outf, "turbostat version 4.12 5 Apr 2016"
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3719 " - Len Brown <lenb@kernel.org>\n");
3720}
3721
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3722void cmdline(int argc, char **argv)
3723{
3724 int opt;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3725 int option_index = 0;
3726 static struct option long_options[] = {
3727 {"Counter", required_argument, 0, 'C'},
3728 {"counter", required_argument, 0, 'c'},
3729 {"Dump", no_argument, 0, 'D'},
3730 {"debug", no_argument, 0, 'd'},
3731 {"interval", required_argument, 0, 'i'},
3732 {"help", no_argument, 0, 'h'},
3733 {"Joules", no_argument, 0, 'J'},
3734 {"MSR", required_argument, 0, 'M'},
3735 {"msr", required_argument, 0, 'm'},
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3736 {"out", required_argument, 0, 'o'},
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3737 {"Package", no_argument, 0, 'p'},
3738 {"processor", no_argument, 0, 'p'},
3739 {"Summary", no_argument, 0, 'S'},
3740 {"TCC", required_argument, 0, 'T'},
3741 {"version", no_argument, 0, 'v' },
3742 {0, 0, 0, 0 }
3743 };
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3744
3745 progname = argv[0];
3746
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3747 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:PpST:v",
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3748 long_options, &option_index)) != -1) {
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3749 switch (opt) {
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3750 case 'C':
3751 sscanf(optarg, "%x", &extra_delta_offset64);
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3752 break;
Len Brownf9240812012-10-06 15:26:31 -0400[diff] [blame]3753 case 'c':
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]3754 sscanf(optarg, "%x", &extra_delta_offset32);
3755 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3756 case 'D':
3757 dump_only++;
Len Brown8e180f32012-09-22 01:25:08 -0400[diff] [blame]3758 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3759 case 'd':
3760 debug++;
Len Brown2f32edf2012-09-21 23:45:46 -0400[diff] [blame]3761 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3762 case 'h':
3763 default:
3764 help();
3765 exit(1);
3766 case 'i':
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]3767 {
3768 double interval = strtod(optarg, NULL);
3769
3770 if (interval < 0.001) {
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3771 fprintf(outf, "interval %f seconds is too small\n",
Len Brown2a0609c2016-02-12 22:44:48 -0500[diff] [blame]3772 interval);
3773 exit(2);
3774 }
3775
3776 interval_ts.tv_sec = interval;
3777 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
3778 }
Len Brown889facb2012-11-08 00:48:57 -0500[diff] [blame]3779 break;
Dirk Brandewie5c56be92013-12-16 10:23:41 -0800[diff] [blame]3780 case 'J':
3781 rapl_joules++;
3782 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3783 case 'M':
3784 sscanf(optarg, "%x", &extra_msr_offset64);
3785 break;
3786 case 'm':
3787 sscanf(optarg, "%x", &extra_msr_offset32);
3788 break;
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3789 case 'o':
3790 outf = fopen_or_die(optarg, "w");
3791 break;
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3792 case 'P':
3793 show_pkg_only++;
3794 break;
3795 case 'p':
3796 show_core_only++;
3797 break;
3798 case 'S':
3799 summary_only++;
3800 break;
3801 case 'T':
3802 tcc_activation_temp_override = atoi(optarg);
3803 break;
3804 case 'v':
3805 print_version();
3806 exit(0);
3807 break;
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3808 }
3809 }
3810}
3811
3812int main(int argc, char **argv)
3813{
Len Brownb7d8c142016-02-13 23:36:17 -0500[diff] [blame]3814 outf = stderr;
3815
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3816 cmdline(argc, argv);
3817
Len Brownd8af6f52015-02-10 01:56:38 -0500[diff] [blame]3818 if (debug)
3819 print_version();
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3820
3821 turbostat_init();
3822
Andy Shevchenko3b4d5c72014-01-23 17:13:15 +0200[diff] [blame]3823 /* dump counters and exit */
3824 if (dump_only)
3825 return get_and_dump_counters();
3826
Len Brown103a8fe2010-10-22 23:53:03 -0400[diff] [blame]3827 /*
3828 * if any params left, it must be a command to fork
3829 */
3830 if (argc - optind)
3831 return fork_it(argv + optind);
3832 else
3833 turbostat_loop();
3834
3835 return 0;
3836}