blob: 9a52615c13b8114a462e9c3d2e473e7fc94d19a5 [file] [log] [blame]
Grant Likely8e267f32011-07-19 17:26:54 -06001/dts-v1/;
2
Grant Likely8e267f32011-07-19 17:26:54 -06003/include/ "tegra20.dtsi"
4
5/ {
6 model = "NVIDIA Tegra2 Harmony evaluation board";
7 compatible = "nvidia,harmony", "nvidia,tegra20";
8
Grant Likely8e267f32011-07-19 17:26:54 -06009 memory@0 {
10 reg = < 0x00000000 0x40000000 >;
11 };
12
13 i2c@7000c000 {
14 clock-frequency = <400000>;
15
Stephen Warren797acf72012-01-11 16:09:57 -070016 wm8903: wm8903@1a {
Grant Likely8e267f32011-07-19 17:26:54 -060017 compatible = "wlf,wm8903";
18 reg = <0x1a>;
Stephen Warren797acf72012-01-11 16:09:57 -070019 interrupt-parent = <&gpio>;
20 interrupts = < 187 0x04 >;
Grant Likely8e267f32011-07-19 17:26:54 -060021
22 gpio-controller;
23 #gpio-cells = <2>;
24
Stephen Warren797acf72012-01-11 16:09:57 -070025 micdet-cfg = <0>;
26 micdet-delay = <100>;
27 gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
Grant Likely8e267f32011-07-19 17:26:54 -060028 };
29 };
30
31 i2c@7000c400 {
32 clock-frequency = <400000>;
33 };
34
35 i2c@7000c500 {
36 clock-frequency = <400000>;
37 };
38
39 i2c@7000d000 {
40 clock-frequency = <400000>;
41 };
42
Stephen Warren797acf72012-01-11 16:09:57 -070043 i2s@70002a00 {
44 status = "disable";
45 };
Grant Likely8e267f32011-07-19 17:26:54 -060046
Stephen Warren797acf72012-01-11 16:09:57 -070047 sound {
48 compatible = "nvidia,tegra-audio-wm8903-harmony",
49 "nvidia,tegra-audio-wm8903";
50 nvidia,model = "NVIDIA Tegra Harmony";
51
52 nvidia,audio-routing =
53 "Headphone Jack", "HPOUTR",
54 "Headphone Jack", "HPOUTL",
55 "Int Spk", "ROP",
56 "Int Spk", "RON",
57 "Int Spk", "LOP",
58 "Int Spk", "LON",
59 "Mic Jack", "MICBIAS",
60 "IN1L", "Mic Jack";
61
62 nvidia,i2s-controller = <&tegra_i2s1>;
63 nvidia,audio-codec = <&wm8903>;
64
65 nvidia,spkr-en-gpios = <&wm8903 2 0>;
66 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
67 nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
68 nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
Grant Likely8e267f32011-07-19 17:26:54 -060069 };
70
Stephen Warren31c1ec92011-11-21 14:44:10 -070071 serial@70006000 {
72 status = "disable";
73 };
74
75 serial@70006040 {
76 status = "disable";
77 };
78
79 serial@70006200 {
80 status = "disable";
81 };
82
Grant Likely8e267f32011-07-19 17:26:54 -060083 serial@70006300 {
84 clock-frequency = < 216000000 >;
85 };
86
Stephen Warren31c1ec92011-11-21 14:44:10 -070087 serial@70006400 {
88 status = "disable";
89 };
90
Stephen Warren1292c122011-11-21 14:44:11 -070091 sdhci@c8000000 {
92 status = "disable";
93 };
94
Grant Likely8e267f32011-07-19 17:26:54 -060095 sdhci@c8000200 {
Stephen Warrena0638eb2011-09-20 10:46:25 -060096 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
97 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
98 power-gpios = <&gpio 155 0>; /* gpio PT3 */
Grant Likely8e267f32011-07-19 17:26:54 -060099 };
100
Stephen Warren1292c122011-11-21 14:44:11 -0700101 sdhci@c8000400 {
102 status = "disable";
103 };
104
Grant Likely8e267f32011-07-19 17:26:54 -0600105 sdhci@c8000600 {
Stephen Warrena0638eb2011-09-20 10:46:25 -0600106 cd-gpios = <&gpio 58 0>; /* gpio PH2 */
107 wp-gpios = <&gpio 59 0>; /* gpio PH3 */
108 power-gpios = <&gpio 70 0>; /* gpio PI6 */
Stephen Warren6111d502011-09-20 10:46:26 -0600109 support-8bit;
Grant Likely8e267f32011-07-19 17:26:54 -0600110 };
111};