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Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +10001/*
2 * Copyright 2017 Benjamin Herrenschmidt, IBM Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2, as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef _KVM_PPC_BOOK3S_XIVE_H
10#define _KVM_PPC_BOOK3S_XIVE_H
11
12#ifdef CONFIG_KVM_XICS
13#include "book3s_xics.h"
14
15/*
Cédric Le Goater4131f832019-04-18 12:39:29 +020016 * The XIVE Interrupt source numbers are within the range 0 to
17 * KVMPPC_XICS_NR_IRQS.
18 */
19#define KVMPPC_XIVE_FIRST_IRQ 0
20#define KVMPPC_XIVE_NR_IRQS KVMPPC_XICS_NR_IRQS
21
22/*
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +100023 * State for one guest irq source.
24 *
25 * For each guest source we allocate a HW interrupt in the XIVE
26 * which we use for all SW triggers. It will be unused for
27 * pass-through but it's easier to keep around as the same
28 * guest interrupt can alternatively be emulated or pass-through
29 * if a physical device is hot unplugged and replaced with an
30 * emulated one.
31 *
32 * This state structure is very similar to the XICS one with
33 * additional XIVE specific tracking.
34 */
35struct kvmppc_xive_irq_state {
36 bool valid; /* Interrupt entry is valid */
37
38 u32 number; /* Guest IRQ number */
39 u32 ipi_number; /* XIVE IPI HW number */
40 struct xive_irq_data ipi_data; /* XIVE IPI associated data */
41 u32 pt_number; /* XIVE Pass-through number if any */
42 struct xive_irq_data *pt_data; /* XIVE Pass-through associated data */
43
44 /* Targetting as set by guest */
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +100045 u8 guest_priority; /* Guest set priority */
46 u8 saved_priority; /* Saved priority when masking */
47
48 /* Actual targetting */
49 u32 act_server; /* Actual server */
50 u8 act_priority; /* Actual priority */
51
52 /* Various state bits */
53 bool in_eoi; /* Synchronize with H_EOI */
54 bool old_p; /* P bit state when masking */
55 bool old_q; /* Q bit state when masking */
56 bool lsi; /* level-sensitive interrupt */
57 bool asserted; /* Only for emulated LSI: current state */
58
59 /* Saved for migration state */
60 bool in_queue;
61 bool saved_p;
62 bool saved_q;
63 u8 saved_scan_prio;
Cédric Le Goatere8676ce2019-04-18 12:39:30 +020064
65 /* Xive native */
66 u32 eisn; /* Guest Effective IRQ number */
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +100067};
68
69/* Select the "right" interrupt (IPI vs. passthrough) */
70static inline void kvmppc_xive_select_irq(struct kvmppc_xive_irq_state *state,
71 u32 *out_hw_irq,
72 struct xive_irq_data **out_xd)
73{
74 if (state->pt_number) {
75 if (out_hw_irq)
76 *out_hw_irq = state->pt_number;
77 if (out_xd)
78 *out_xd = state->pt_data;
79 } else {
80 if (out_hw_irq)
81 *out_hw_irq = state->ipi_number;
82 if (out_xd)
83 *out_xd = &state->ipi_data;
84 }
85}
86
87/*
88 * This corresponds to an "ICS" in XICS terminology, we use it
89 * as a mean to break up source information into multiple structures.
90 */
91struct kvmppc_xive_src_block {
92 arch_spinlock_t lock;
93 u16 id;
94 struct kvmppc_xive_irq_state irq_state[KVMPPC_XICS_IRQ_PER_ICS];
95};
96
Cédric Le Goater232b9842019-04-18 12:39:39 +020097struct kvmppc_xive;
98
99struct kvmppc_xive_ops {
100 int (*reset_mapped)(struct kvm *kvm, unsigned long guest_irq);
101};
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000102
103struct kvmppc_xive {
104 struct kvm *kvm;
105 struct kvm_device *dev;
106 struct dentry *dentry;
107
108 /* VP block associated with the VM */
109 u32 vp_base;
110
111 /* Blocks of sources */
112 struct kvmppc_xive_src_block *src_blocks[KVMPPC_XICS_MAX_ICS_ID + 1];
113 u32 max_sbid;
114
115 /*
116 * For state save, we lazily scan the queues on the first interrupt
117 * being migrated. We don't have a clean way to reset that flags
118 * so we keep track of the number of valid sources and how many of
119 * them were migrated so we can reset when all of them have been
120 * processed.
121 */
122 u32 src_count;
123 u32 saved_src_count;
124
125 /*
126 * Some irqs are delayed on restore until the source is created,
127 * keep track here of how many of them
128 */
129 u32 delayed_irqs;
130
131 /* Which queues (priorities) are in use by the guest */
132 u8 qmap;
133
134 /* Queue orders */
135 u32 q_order;
136 u32 q_page_order;
137
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100138 /* Flags */
139 u8 single_escalation;
Cédric Le Goater232b9842019-04-18 12:39:39 +0200140
141 struct kvmppc_xive_ops *ops;
142 struct address_space *mapping;
143 struct mutex mapping_lock;
Cédric Le Goater7e10b9a2019-05-24 15:20:30 +0200144 struct mutex lock;
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000145};
146
147#define KVMPPC_XIVE_Q_COUNT 8
148
149struct kvmppc_xive_vcpu {
150 struct kvmppc_xive *xive;
151 struct kvm_vcpu *vcpu;
152 bool valid;
153
154 /* Server number. This is the HW CPU ID from a guest perspective */
155 u32 server_num;
156
157 /*
158 * HW VP corresponding to this VCPU. This is the base of the VP
159 * block plus the server number.
160 */
161 u32 vp_id;
162 u32 vp_chip_id;
163 u32 vp_cam;
164
165 /* IPI used for sending ... IPIs */
166 u32 vp_ipi;
167 struct xive_irq_data vp_ipi_data;
168
169 /* Local emulation state */
170 uint8_t cppr; /* guest CPPR */
171 uint8_t hw_cppr;/* Hardware CPPR */
172 uint8_t mfrr;
173 uint8_t pending;
174
175 /* Each VP has 8 queues though we only provision some */
176 struct xive_q queues[KVMPPC_XIVE_Q_COUNT];
177 u32 esc_virq[KVMPPC_XIVE_Q_COUNT];
178 char *esc_virq_names[KVMPPC_XIVE_Q_COUNT];
179
180 /* Stash a delayed irq on restore from migration (see set_icp) */
181 u32 delayed_irq;
182
183 /* Stats */
184 u64 stat_rm_h_xirr;
185 u64 stat_rm_h_ipoll;
186 u64 stat_rm_h_cppr;
187 u64 stat_rm_h_eoi;
188 u64 stat_rm_h_ipi;
189 u64 stat_vm_h_xirr;
190 u64 stat_vm_h_ipoll;
191 u64 stat_vm_h_cppr;
192 u64 stat_vm_h_eoi;
193 u64 stat_vm_h_ipi;
194};
195
196static inline struct kvm_vcpu *kvmppc_xive_find_server(struct kvm *kvm, u32 nr)
197{
198 struct kvm_vcpu *vcpu = NULL;
199 int i;
200
201 kvm_for_each_vcpu(i, vcpu, kvm) {
202 if (vcpu->arch.xive_vcpu && nr == vcpu->arch.xive_vcpu->server_num)
203 return vcpu;
204 }
205 return NULL;
206}
207
208static inline struct kvmppc_xive_src_block *kvmppc_xive_find_source(struct kvmppc_xive *xive,
209 u32 irq, u16 *source)
210{
211 u32 bid = irq >> KVMPPC_XICS_ICS_SHIFT;
212 u16 src = irq & KVMPPC_XICS_SRC_MASK;
213
214 if (source)
215 *source = src;
216 if (bid > KVMPPC_XICS_MAX_ICS_ID)
217 return NULL;
218 return xive->src_blocks[bid];
219}
220
Cédric Le Goatereacc56b2019-04-18 12:39:28 +0200221static inline u32 kvmppc_xive_vp(struct kvmppc_xive *xive, u32 server)
222{
223 return xive->vp_base + kvmppc_pack_vcpu_id(xive->kvm, server);
224}
225
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000226/*
227 * Mapping between guest priorities and host priorities
228 * is as follow.
229 *
230 * Guest request for 0...6 are honored. Guest request for anything
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100231 * higher results in a priority of 6 being applied.
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000232 *
233 * Similar mapping is done for CPPR values
234 */
235static inline u8 xive_prio_from_guest(u8 prio)
236{
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100237 if (prio == 0xff || prio < 6)
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000238 return prio;
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100239 return 6;
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000240}
241
242static inline u8 xive_prio_to_guest(u8 prio)
243{
Benjamin Herrenschmidtbf4159da2018-01-12 13:37:12 +1100244 return prio;
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000245}
246
247static inline u32 __xive_read_eq(__be32 *qpage, u32 msk, u32 *idx, u32 *toggle)
248{
249 u32 cur;
250
251 if (!qpage)
252 return 0;
253 cur = be32_to_cpup(qpage + *idx);
254 if ((cur >> 31) == *toggle)
255 return 0;
256 *idx = (*idx + 1) & msk;
257 if (*idx == 0)
258 (*toggle) ^= 1;
259 return cur & 0x7fffffff;
260}
261
262extern unsigned long xive_rm_h_xirr(struct kvm_vcpu *vcpu);
263extern unsigned long xive_rm_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server);
264extern int xive_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
265 unsigned long mfrr);
266extern int xive_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr);
267extern int xive_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr);
268
269extern unsigned long (*__xive_vm_h_xirr)(struct kvm_vcpu *vcpu);
270extern unsigned long (*__xive_vm_h_ipoll)(struct kvm_vcpu *vcpu, unsigned long server);
271extern int (*__xive_vm_h_ipi)(struct kvm_vcpu *vcpu, unsigned long server,
272 unsigned long mfrr);
273extern int (*__xive_vm_h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr);
274extern int (*__xive_vm_h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr);
275
Cédric Le Goatereacc56b2019-04-18 12:39:28 +0200276/*
277 * Common Xive routines for XICS-over-XIVE and XIVE native
278 */
279void kvmppc_xive_disable_vcpu_interrupts(struct kvm_vcpu *vcpu);
280int kvmppc_xive_debug_show_queues(struct seq_file *m, struct kvm_vcpu *vcpu);
Cédric Le Goater4131f832019-04-18 12:39:29 +0200281struct kvmppc_xive_src_block *kvmppc_xive_create_src_block(
282 struct kvmppc_xive *xive, int irq);
283void kvmppc_xive_free_sources(struct kvmppc_xive_src_block *sb);
Cédric Le Goatere8676ce2019-04-18 12:39:30 +0200284int kvmppc_xive_select_target(struct kvm *kvm, u32 *server, u8 prio);
Cédric Le Goater13ce3292019-04-18 12:39:31 +0200285int kvmppc_xive_attach_escalation(struct kvm_vcpu *vcpu, u8 prio,
286 bool single_escalation);
Cédric Le Goater5422e952019-04-18 12:39:42 +0200287struct kvmppc_xive *kvmppc_xive_get_device(struct kvm *kvm, u32 type);
Cédric Le Goatereacc56b2019-04-18 12:39:28 +0200288
Benjamin Herrenschmidt5af50992017-04-05 17:54:56 +1000289#endif /* CONFIG_KVM_XICS */
290#endif /* _KVM_PPC_BOOK3S_XICS_H */