blob: 9ad546a5f74c41b04655d7c2148ff5d90720ad74 [file] [log] [blame]
Thomas Abraham721c42a2013-03-09 17:02:44 +09001/*
2 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
3 * Copyright (c) 2013 Linaro Ltd.
4 * Author: Thomas Abraham <thomas.ab@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This file includes utility functions to register clocks to common
11 * clock framework for Samsung platforms.
12*/
13
Stephen Boyd6f1ed072015-06-19 15:00:46 -070014#include <linux/slab.h>
15#include <linux/clkdev.h>
16#include <linux/clk.h>
17#include <linux/clk-provider.h>
Stephen Boyd62e59c42019-04-18 15:20:22 -070018#include <linux/io.h>
Pankaj Dubey8b2f6362014-09-29 13:17:48 +053019#include <linux/of_address.h>
Thomas Abraham721c42a2013-03-09 17:02:44 +090020#include <linux/syscore_ops.h>
Pankaj Dubey8b2f6362014-09-29 13:17:48 +053021
Thomas Abraham721c42a2013-03-09 17:02:44 +090022#include "clk.h"
23
Naveen Krishna Ch16a90132014-09-22 10:17:02 +053024static LIST_HEAD(clock_reg_cache_list);
25
Tomasz Figa3ccefbd2014-02-14 08:16:00 +090026void samsung_clk_save(void __iomem *base,
27 struct samsung_clk_reg_dump *rd,
28 unsigned int num_regs)
29{
30 for (; num_regs > 0; --num_regs, ++rd)
31 rd->value = readl(base + rd->offset);
32}
33
34void samsung_clk_restore(void __iomem *base,
35 const struct samsung_clk_reg_dump *rd,
36 unsigned int num_regs)
37{
38 for (; num_regs > 0; --num_regs, ++rd)
39 writel(rd->value, base + rd->offset);
40}
41
Tomasz Figac3b6c1d2014-02-14 08:16:00 +090042struct samsung_clk_reg_dump *samsung_clk_alloc_reg_dump(
43 const unsigned long *rdump,
44 unsigned long nr_rdump)
Tomasz Figa3ccefbd2014-02-14 08:16:00 +090045{
46 struct samsung_clk_reg_dump *rd;
47 unsigned int i;
48
49 rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
50 if (!rd)
51 return NULL;
52
53 for (i = 0; i < nr_rdump; ++i)
54 rd[i].offset = rdump[i];
55
56 return rd;
57}
58
Thomas Abraham721c42a2013-03-09 17:02:44 +090059/* setup the essentials required to support clock lookup using ccf */
Rahul Sharma976face2014-03-12 20:26:44 +053060struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np,
61 void __iomem *base, unsigned long nr_clks)
Thomas Abraham721c42a2013-03-09 17:02:44 +090062{
Rahul Sharma976face2014-03-12 20:26:44 +053063 struct samsung_clk_provider *ctx;
Tomasz Figa91a12632014-02-06 19:33:11 +010064 int i;
65
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +020066 ctx = kzalloc(sizeof(struct samsung_clk_provider) +
67 sizeof(*ctx->clk_data.hws) * nr_clks, GFP_KERNEL);
Rahul Sharma976face2014-03-12 20:26:44 +053068 if (!ctx)
69 panic("could not allocate clock provider context.\n");
Thomas Abraham721c42a2013-03-09 17:02:44 +090070
Tomasz Figa91a12632014-02-06 19:33:11 +010071 for (i = 0; i < nr_clks; ++i)
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +020072 ctx->clk_data.hws[i] = ERR_PTR(-ENOENT);
Tomasz Figa91a12632014-02-06 19:33:11 +010073
Rahul Sharma976face2014-03-12 20:26:44 +053074 ctx->reg_base = base;
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +020075 ctx->clk_data.num = nr_clks;
Rahul Sharma976face2014-03-12 20:26:44 +053076 spin_lock_init(&ctx->lock);
Heiko Stuebner6e92bf5a2013-03-18 13:43:52 +090077
Rahul Sharma976face2014-03-12 20:26:44 +053078 return ctx;
Thomas Abraham721c42a2013-03-09 17:02:44 +090079}
80
Sylwester Nawrockid5e136a2014-06-18 17:46:52 +020081void __init samsung_clk_of_add_provider(struct device_node *np,
82 struct samsung_clk_provider *ctx)
83{
84 if (np) {
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +020085 if (of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
Sylwester Nawrockid5e136a2014-06-18 17:46:52 +020086 &ctx->clk_data))
87 panic("could not register clk provider\n");
88 }
89}
90
Thomas Abraham721c42a2013-03-09 17:02:44 +090091/* add a clock instance to the clock lookup table used for dt based lookup */
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +020092void samsung_clk_add_lookup(struct samsung_clk_provider *ctx,
93 struct clk_hw *clk_hw, unsigned int id)
Thomas Abraham721c42a2013-03-09 17:02:44 +090094{
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +020095 if (id)
96 ctx->clk_data.hws[id] = clk_hw;
Thomas Abraham721c42a2013-03-09 17:02:44 +090097}
98
Heiko Stuebner5e2e0192013-03-18 13:43:56 +090099/* register a list of aliases */
Rahul Sharma976face2014-03-12 20:26:44 +0530100void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx,
Uwe Kleine-König4a1caed2015-05-28 10:45:51 +0200101 const struct samsung_clock_alias *list,
Rahul Sharma976face2014-03-12 20:26:44 +0530102 unsigned int nr_clk)
Heiko Stuebner5e2e0192013-03-18 13:43:56 +0900103{
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200104 struct clk_hw *clk_hw;
Heiko Stuebner5e2e0192013-03-18 13:43:56 +0900105 unsigned int idx, ret;
106
Heiko Stuebner5e2e0192013-03-18 13:43:56 +0900107 for (idx = 0; idx < nr_clk; idx++, list++) {
108 if (!list->id) {
109 pr_err("%s: clock id missing for index %d\n", __func__,
110 idx);
111 continue;
112 }
113
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200114 clk_hw = ctx->clk_data.hws[list->id];
115 if (!clk_hw) {
Heiko Stuebner5e2e0192013-03-18 13:43:56 +0900116 pr_err("%s: failed to find clock %d\n", __func__,
117 list->id);
118 continue;
119 }
120
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200121 ret = clk_hw_register_clkdev(clk_hw, list->alias,
122 list->dev_name);
Heiko Stuebner5e2e0192013-03-18 13:43:56 +0900123 if (ret)
124 pr_err("%s: failed to register lookup %s\n",
125 __func__, list->alias);
126 }
127}
128
Thomas Abraham721c42a2013-03-09 17:02:44 +0900129/* register a list of fixed clocks */
Rahul Sharma976face2014-03-12 20:26:44 +0530130void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx,
Uwe Kleine-König4a1caed2015-05-28 10:45:51 +0200131 const struct samsung_fixed_rate_clock *list,
132 unsigned int nr_clk)
Thomas Abraham721c42a2013-03-09 17:02:44 +0900133{
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200134 struct clk_hw *clk_hw;
Thomas Abraham721c42a2013-03-09 17:02:44 +0900135 unsigned int idx, ret;
136
137 for (idx = 0; idx < nr_clk; idx++, list++) {
Marek Szyprowskid2f18d72017-08-21 10:05:00 +0200138 clk_hw = clk_hw_register_fixed_rate(ctx->dev, list->name,
Thomas Abraham721c42a2013-03-09 17:02:44 +0900139 list->parent_name, list->flags, list->fixed_rate);
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200140 if (IS_ERR(clk_hw)) {
Thomas Abraham721c42a2013-03-09 17:02:44 +0900141 pr_err("%s: failed to register clock %s\n", __func__,
142 list->name);
143 continue;
144 }
145
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200146 samsung_clk_add_lookup(ctx, clk_hw, list->id);
Thomas Abraham721c42a2013-03-09 17:02:44 +0900147
148 /*
149 * Unconditionally add a clock lookup for the fixed rate clocks.
150 * There are not many of these on any of Samsung platforms.
151 */
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200152 ret = clk_hw_register_clkdev(clk_hw, list->name, NULL);
Thomas Abraham721c42a2013-03-09 17:02:44 +0900153 if (ret)
154 pr_err("%s: failed to register clock lookup for %s",
155 __func__, list->name);
156 }
157}
158
159/* register a list of fixed factor clocks */
Rahul Sharma976face2014-03-12 20:26:44 +0530160void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx,
Uwe Kleine-König4a1caed2015-05-28 10:45:51 +0200161 const struct samsung_fixed_factor_clock *list, unsigned int nr_clk)
Thomas Abraham721c42a2013-03-09 17:02:44 +0900162{
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200163 struct clk_hw *clk_hw;
Thomas Abraham721c42a2013-03-09 17:02:44 +0900164 unsigned int idx;
165
166 for (idx = 0; idx < nr_clk; idx++, list++) {
Marek Szyprowskid2f18d72017-08-21 10:05:00 +0200167 clk_hw = clk_hw_register_fixed_factor(ctx->dev, list->name,
Thomas Abraham721c42a2013-03-09 17:02:44 +0900168 list->parent_name, list->flags, list->mult, list->div);
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200169 if (IS_ERR(clk_hw)) {
Thomas Abraham721c42a2013-03-09 17:02:44 +0900170 pr_err("%s: failed to register clock %s\n", __func__,
171 list->name);
172 continue;
173 }
174
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200175 samsung_clk_add_lookup(ctx, clk_hw, list->id);
Thomas Abraham721c42a2013-03-09 17:02:44 +0900176 }
177}
178
179/* register a list of mux clocks */
Rahul Sharma976face2014-03-12 20:26:44 +0530180void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx,
Uwe Kleine-König4a1caed2015-05-28 10:45:51 +0200181 const struct samsung_mux_clock *list,
Rahul Sharma976face2014-03-12 20:26:44 +0530182 unsigned int nr_clk)
Thomas Abraham721c42a2013-03-09 17:02:44 +0900183{
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200184 struct clk_hw *clk_hw;
Marek Szyprowskia4f21e92017-10-03 12:00:16 +0200185 unsigned int idx;
Thomas Abraham721c42a2013-03-09 17:02:44 +0900186
187 for (idx = 0; idx < nr_clk; idx++, list++) {
Marek Szyprowskid2f18d72017-08-21 10:05:00 +0200188 clk_hw = clk_hw_register_mux(ctx->dev, list->name,
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200189 list->parent_names, list->num_parents, list->flags,
Rahul Sharma976face2014-03-12 20:26:44 +0530190 ctx->reg_base + list->offset,
191 list->shift, list->width, list->mux_flags, &ctx->lock);
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200192 if (IS_ERR(clk_hw)) {
Thomas Abraham721c42a2013-03-09 17:02:44 +0900193 pr_err("%s: failed to register clock %s\n", __func__,
194 list->name);
195 continue;
196 }
197
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200198 samsung_clk_add_lookup(ctx, clk_hw, list->id);
Thomas Abraham721c42a2013-03-09 17:02:44 +0900199 }
200}
201
202/* register a list of div clocks */
Rahul Sharma976face2014-03-12 20:26:44 +0530203void __init samsung_clk_register_div(struct samsung_clk_provider *ctx,
Uwe Kleine-König4a1caed2015-05-28 10:45:51 +0200204 const struct samsung_div_clock *list,
Rahul Sharma976face2014-03-12 20:26:44 +0530205 unsigned int nr_clk)
Thomas Abraham721c42a2013-03-09 17:02:44 +0900206{
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200207 struct clk_hw *clk_hw;
Marek Szyprowskia4f21e92017-10-03 12:00:16 +0200208 unsigned int idx;
Thomas Abraham721c42a2013-03-09 17:02:44 +0900209
210 for (idx = 0; idx < nr_clk; idx++, list++) {
Heiko Stuebner798ed612013-03-18 13:43:52 +0900211 if (list->table)
Marek Szyprowskid2f18d72017-08-21 10:05:00 +0200212 clk_hw = clk_hw_register_divider_table(ctx->dev,
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200213 list->name, list->parent_name, list->flags,
Rahul Sharma976face2014-03-12 20:26:44 +0530214 ctx->reg_base + list->offset,
215 list->shift, list->width, list->div_flags,
216 list->table, &ctx->lock);
Heiko Stuebner798ed612013-03-18 13:43:52 +0900217 else
Marek Szyprowskid2f18d72017-08-21 10:05:00 +0200218 clk_hw = clk_hw_register_divider(ctx->dev, list->name,
Rahul Sharma976face2014-03-12 20:26:44 +0530219 list->parent_name, list->flags,
220 ctx->reg_base + list->offset, list->shift,
221 list->width, list->div_flags, &ctx->lock);
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200222 if (IS_ERR(clk_hw)) {
Thomas Abraham721c42a2013-03-09 17:02:44 +0900223 pr_err("%s: failed to register clock %s\n", __func__,
224 list->name);
225 continue;
226 }
227
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200228 samsung_clk_add_lookup(ctx, clk_hw, list->id);
Thomas Abraham721c42a2013-03-09 17:02:44 +0900229 }
230}
231
232/* register a list of gate clocks */
Rahul Sharma976face2014-03-12 20:26:44 +0530233void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx,
Uwe Kleine-König4a1caed2015-05-28 10:45:51 +0200234 const struct samsung_gate_clock *list,
Rahul Sharma976face2014-03-12 20:26:44 +0530235 unsigned int nr_clk)
Thomas Abraham721c42a2013-03-09 17:02:44 +0900236{
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200237 struct clk_hw *clk_hw;
Marek Szyprowskia4f21e92017-10-03 12:00:16 +0200238 unsigned int idx;
Thomas Abraham721c42a2013-03-09 17:02:44 +0900239
240 for (idx = 0; idx < nr_clk; idx++, list++) {
Marek Szyprowskid2f18d72017-08-21 10:05:00 +0200241 clk_hw = clk_hw_register_gate(ctx->dev, list->name, list->parent_name,
Rahul Sharma976face2014-03-12 20:26:44 +0530242 list->flags, ctx->reg_base + list->offset,
243 list->bit_idx, list->gate_flags, &ctx->lock);
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200244 if (IS_ERR(clk_hw)) {
Thomas Abraham721c42a2013-03-09 17:02:44 +0900245 pr_err("%s: failed to register clock %s\n", __func__,
246 list->name);
247 continue;
248 }
249
Marek Szyprowskiecb1f1f2017-04-24 08:42:20 +0200250 samsung_clk_add_lookup(ctx, clk_hw, list->id);
Thomas Abraham721c42a2013-03-09 17:02:44 +0900251 }
252}
253
254/*
255 * obtain the clock speed of all external fixed clock sources from device
256 * tree and register it
257 */
Rahul Sharma976face2014-03-12 20:26:44 +0530258void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx,
Thomas Abraham721c42a2013-03-09 17:02:44 +0900259 struct samsung_fixed_rate_clock *fixed_rate_clk,
260 unsigned int nr_fixed_rate_clk,
Krzysztof Kozlowski305cfab2014-06-26 14:00:06 +0200261 const struct of_device_id *clk_matches)
Thomas Abraham721c42a2013-03-09 17:02:44 +0900262{
263 const struct of_device_id *match;
Rahul Sharma976face2014-03-12 20:26:44 +0530264 struct device_node *clk_np;
Thomas Abraham721c42a2013-03-09 17:02:44 +0900265 u32 freq;
266
Rahul Sharma976face2014-03-12 20:26:44 +0530267 for_each_matching_node_and_match(clk_np, clk_matches, &match) {
268 if (of_property_read_u32(clk_np, "clock-frequency", &freq))
Thomas Abraham721c42a2013-03-09 17:02:44 +0900269 continue;
Pankaj Dubey42fb57c2014-02-26 11:42:41 +0900270 fixed_rate_clk[(unsigned long)match->data].fixed_rate = freq;
Thomas Abraham721c42a2013-03-09 17:02:44 +0900271 }
Rahul Sharma976face2014-03-12 20:26:44 +0530272 samsung_clk_register_fixed_rate(ctx, fixed_rate_clk, nr_fixed_rate_clk);
Thomas Abraham721c42a2013-03-09 17:02:44 +0900273}
Thomas Abraham721c42a2013-03-09 17:02:44 +0900274
275/* utility function to get the rate of a specified clock */
276unsigned long _get_rate(const char *clk_name)
277{
278 struct clk *clk;
Thomas Abraham721c42a2013-03-09 17:02:44 +0900279
Tomasz Figa3a647892013-08-26 19:09:00 +0200280 clk = __clk_lookup(clk_name);
281 if (!clk) {
Thomas Abraham721c42a2013-03-09 17:02:44 +0900282 pr_err("%s: could not find clock %s\n", __func__, clk_name);
283 return 0;
284 }
Tomasz Figa3a647892013-08-26 19:09:00 +0200285
286 return clk_get_rate(clk);
Thomas Abraham721c42a2013-03-09 17:02:44 +0900287}
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530288
289#ifdef CONFIG_PM_SLEEP
290static int samsung_clk_suspend(void)
291{
292 struct samsung_clock_reg_cache *reg_cache;
293
Marek Szyprowski8bf27ea2018-09-06 17:55:30 +0200294 list_for_each_entry(reg_cache, &clock_reg_cache_list, node) {
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530295 samsung_clk_save(reg_cache->reg_base, reg_cache->rdump,
296 reg_cache->rd_num);
Marek Szyprowski8bf27ea2018-09-06 17:55:30 +0200297 samsung_clk_restore(reg_cache->reg_base, reg_cache->rsuspend,
298 reg_cache->rsuspend_num);
299 }
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530300 return 0;
301}
302
303static void samsung_clk_resume(void)
304{
305 struct samsung_clock_reg_cache *reg_cache;
306
307 list_for_each_entry(reg_cache, &clock_reg_cache_list, node)
308 samsung_clk_restore(reg_cache->reg_base, reg_cache->rdump,
309 reg_cache->rd_num);
310}
311
312static struct syscore_ops samsung_clk_syscore_ops = {
313 .suspend = samsung_clk_suspend,
314 .resume = samsung_clk_resume,
315};
316
Marek Szyprowski8bf27ea2018-09-06 17:55:30 +0200317void samsung_clk_extended_sleep_init(void __iomem *reg_base,
Bartlomiej Zolnierkiewicz0c0cd592016-05-24 15:19:15 +0200318 const unsigned long *rdump,
Marek Szyprowski8bf27ea2018-09-06 17:55:30 +0200319 unsigned long nr_rdump,
320 const struct samsung_clk_reg_dump *rsuspend,
321 unsigned long nr_rsuspend)
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530322{
323 struct samsung_clock_reg_cache *reg_cache;
324
325 reg_cache = kzalloc(sizeof(struct samsung_clock_reg_cache),
326 GFP_KERNEL);
327 if (!reg_cache)
328 panic("could not allocate register reg_cache.\n");
329 reg_cache->rdump = samsung_clk_alloc_reg_dump(rdump, nr_rdump);
330
331 if (!reg_cache->rdump)
332 panic("could not allocate register dump storage.\n");
333
334 if (list_empty(&clock_reg_cache_list))
335 register_syscore_ops(&samsung_clk_syscore_ops);
336
337 reg_cache->reg_base = reg_base;
338 reg_cache->rd_num = nr_rdump;
Marek Szyprowski8bf27ea2018-09-06 17:55:30 +0200339 reg_cache->rsuspend = rsuspend;
340 reg_cache->rsuspend_num = nr_rsuspend;
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530341 list_add_tail(&reg_cache->node, &clock_reg_cache_list);
342}
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530343#endif
344
345/*
346 * Common function which registers plls, muxes, dividers and gates
347 * for each CMU. It also add CMU register list to register cache.
348 */
Chanwoo Choi151d4d32014-12-23 16:40:21 +0900349struct samsung_clk_provider * __init samsung_cmu_register_one(
350 struct device_node *np,
Krzysztof Kozlowski9f92c0b2016-05-11 14:01:57 +0200351 const struct samsung_cmu_info *cmu)
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530352{
353 void __iomem *reg_base;
354 struct samsung_clk_provider *ctx;
355
356 reg_base = of_iomap(np, 0);
Chanwoo Choi151d4d32014-12-23 16:40:21 +0900357 if (!reg_base) {
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530358 panic("%s: failed to map registers\n", __func__);
Chanwoo Choi151d4d32014-12-23 16:40:21 +0900359 return NULL;
360 }
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530361
362 ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids);
Chanwoo Choi151d4d32014-12-23 16:40:21 +0900363 if (!ctx) {
Shailendra Vermac3063172015-05-21 23:26:03 +0530364 panic("%s: unable to allocate ctx\n", __func__);
Chanwoo Choi151d4d32014-12-23 16:40:21 +0900365 return ctx;
366 }
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530367
368 if (cmu->pll_clks)
369 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks,
370 reg_base);
371 if (cmu->mux_clks)
372 samsung_clk_register_mux(ctx, cmu->mux_clks,
373 cmu->nr_mux_clks);
374 if (cmu->div_clks)
375 samsung_clk_register_div(ctx, cmu->div_clks, cmu->nr_div_clks);
376 if (cmu->gate_clks)
377 samsung_clk_register_gate(ctx, cmu->gate_clks,
378 cmu->nr_gate_clks);
379 if (cmu->fixed_clks)
380 samsung_clk_register_fixed_rate(ctx, cmu->fixed_clks,
381 cmu->nr_fixed_clks);
Naveen Krishna Ch0e5af272014-09-22 10:17:03 +0530382 if (cmu->fixed_factor_clks)
383 samsung_clk_register_fixed_factor(ctx, cmu->fixed_factor_clks,
384 cmu->nr_fixed_factor_clks);
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530385 if (cmu->clk_regs)
Marek Szyprowski8bf27ea2018-09-06 17:55:30 +0200386 samsung_clk_extended_sleep_init(reg_base,
387 cmu->clk_regs, cmu->nr_clk_regs,
388 cmu->suspend_regs, cmu->nr_suspend_regs);
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530389
390 samsung_clk_of_add_provider(np, ctx);
Chanwoo Choi151d4d32014-12-23 16:40:21 +0900391
392 return ctx;
Naveen Krishna Ch16a90132014-09-22 10:17:02 +0530393}