blob: aab24173d2e9c573a76c6ad38966de0d73ce55aa [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include "radeon_drv.h"
35
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/drm_pciids.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020037#include <linux/console.h>
Paul Gortmakere0cd3602011-08-30 11:04:30 -040038#include <linux/module.h>
Dave Airlie10ebc0b2012-09-17 14:40:31 +100039#include <linux/pm_runtime.h>
40#include <linux/vga_switcheroo.h>
41#include "drm_crtc_helper.h"
Jerome Glisse771fe6b2009-06-05 14:42:42 +020042/*
43 * KMS wrapper.
Dave Airlie0de1a572010-03-01 16:32:15 +100044 * - 2.0.0 - initial interface
45 * - 2.1.0 - add square tiling interface
Alex Deucherfdb43522010-03-26 15:24:14 -040046 * - 2.2.0 - add r6xx/r7xx const buffer support
Marek Olšákcae94b02010-02-21 21:24:15 +010047 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
Jerome Glissebc35afd2010-05-12 18:01:13 +020048 * - 2.4.0 - add crtc id query
Alex Deucher148a03b2010-06-03 19:00:03 -040049 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
Dave Airlieab9e1f52010-07-13 11:11:11 +100050 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
Alex Deucher71901cc2010-10-21 13:45:30 -040051 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
Alex Deucher58bbf012011-01-24 17:14:26 -050052 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
Dave Airlie486af182011-03-01 14:32:27 +100053 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
Alex Deucherb8709892011-07-27 04:17:25 +000054 * 2.10.0 - fusion 2D tiling
55 * 2.11.0 - backend map, initial compute support for the CS checker
Marek Olšáke70f2242011-10-25 01:38:45 +020056 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
Marek Olšákdd220a02012-01-27 12:17:59 -050057 * 2.13.0 - virtual memory support, streamout
Jerome Glisse285484e2011-12-16 17:03:42 -050058 * 2.14.0 - add evergreen tiling informations
Tom Stellard609c1e12012-03-20 17:17:55 -040059 * 2.15.0 - add max_pipes query
Jerome Glissed2609872012-06-09 10:57:41 -040060 * 2.16.0 - fix evergreen 2D tiled surface calculation
Alex Deucher7c77bf22012-06-14 22:06:37 +020061 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
Marek Olšák0f457e42012-07-29 16:24:57 +020062 * 2.18.0 - r600-eg: allow "invalid" DB formats
Marek Olšákb51ad122012-08-09 16:34:16 +020063 * 2.19.0 - r600-eg: MSAA textures
Marek Olšák6759a0a2012-08-09 16:34:17 +020064 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
Marek Olšákc116cc92012-08-19 02:22:09 +020065 * 2.21.0 - r600-r700: FMASK and CMASK
Marek Olšák523885d2012-08-24 14:27:36 +020066 * 2.22.0 - r600 only: RESOLVE_BOX allowed
Marek Olšák46fc8782012-09-25 01:45:33 +020067 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
Marek Olšák61051af2012-09-25 03:34:01 +020068 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
Alex Deucher71bfe912012-12-07 20:00:30 -050069 * 2.25.0 - eg+: new info request for num SE and num SH
Jerome Glisse4ac05332012-12-13 12:08:11 -050070 * 2.26.0 - r600-eg: fix htile size computation
Alex Deucher8696e332012-12-13 18:57:07 -050071 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
Jerome Glisse4613ca12012-12-19 12:26:45 -050072 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
Marek Olšákc18b1172013-01-12 04:19:37 +010073 * 2.29.0 - R500 FP16 color clear registers
Marek Olšák774c3892013-03-01 13:40:31 +010074 * 2.30.0 - fix for FMASK texturing
Samuel Lia0a53aa2013-04-08 17:25:47 -040075 * 2.31.0 - Add fastfb support for rs690
Christian König902aaef2013-04-09 10:35:42 -040076 * 2.32.0 - new info request for rings working
Jerome Glisse64d7b8b2013-04-09 11:17:08 -040077 * 2.33.0 - Add SI tiling mode array query
Alex Deucher39aee492013-04-10 13:41:25 -040078 * 2.34.0 - Add CIK tiling mode array query
Jerome Glisse771fe6b2009-06-05 14:42:42 +020079 */
80#define KMS_DRIVER_MAJOR 2
Alex Deucher39aee492013-04-10 13:41:25 -040081#define KMS_DRIVER_MINOR 34
Jerome Glisse771fe6b2009-06-05 14:42:42 +020082#define KMS_DRIVER_PATCHLEVEL 0
83int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
84int radeon_driver_unload_kms(struct drm_device *dev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020085void radeon_driver_lastclose_kms(struct drm_device *dev);
86int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
87void radeon_driver_postclose_kms(struct drm_device *dev,
88 struct drm_file *file_priv);
89void radeon_driver_preclose_kms(struct drm_device *dev,
90 struct drm_file *file_priv);
Dave Airlie10ebc0b2012-09-17 14:40:31 +100091int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
92int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020093u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
94int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
95void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
Mario Kleinerf5a80202010-10-23 04:42:17 +020096int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
97 int *max_error,
98 struct timeval *vblank_time,
99 unsigned flags);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200100void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
101int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
102void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
103irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200104void radeon_gem_object_free(struct drm_gem_object *obj);
Jerome Glisse721604a2012-01-05 22:11:05 -0500105int radeon_gem_object_open(struct drm_gem_object *obj,
106 struct drm_file *file_priv);
107void radeon_gem_object_close(struct drm_gem_object *obj,
108 struct drm_file *file_priv);
Mario Kleinerf5a80202010-10-23 04:42:17 +0200109extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
Mario Kleinerd47abc52013-10-30 05:13:07 +0100110 int *vpos, int *hpos, ktime_t *stime,
111 ktime_t *etime);
Rob Clarkbaa70942013-08-02 13:27:49 -0400112extern const struct drm_ioctl_desc radeon_ioctls_kms[];
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200113extern int radeon_max_kms_ioctl;
114int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
Dave Airlieff72145b2011-02-07 12:16:14 +1000115int radeon_mode_dumb_mmap(struct drm_file *filp,
116 struct drm_device *dev,
117 uint32_t handle, uint64_t *offset_p);
118int radeon_mode_dumb_create(struct drm_file *file_priv,
119 struct drm_device *dev,
120 struct drm_mode_create_dumb *args);
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000121struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
122struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
123 size_t size,
124 struct sg_table *sg);
125int radeon_gem_prime_pin(struct drm_gem_object *obj);
Maarten Lankhorst280cf212013-06-27 13:38:18 +0200126void radeon_gem_prime_unpin(struct drm_gem_object *obj);
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000127void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
128void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
Christian König14adc892013-01-21 13:58:46 +0100129extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
130 unsigned long arg);
Dave Airlieff72145b2011-02-07 12:16:14 +1000131
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200132#if defined(CONFIG_DEBUG_FS)
133int radeon_debugfs_init(struct drm_minor *minor);
134void radeon_debugfs_cleanup(struct drm_minor *minor);
135#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200136
Christian König14adc892013-01-21 13:58:46 +0100137/* atpx handler */
138#if defined(CONFIG_VGA_SWITCHEROO)
139void radeon_register_atpx_handler(void);
140void radeon_unregister_atpx_handler(void);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000141bool radeon_is_px(void);
Christian König14adc892013-01-21 13:58:46 +0100142#else
143static inline void radeon_register_atpx_handler(void) {}
144static inline void radeon_unregister_atpx_handler(void) {}
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000145static inline bool radeon_is_px(void) { return false; }
Christian König14adc892013-01-21 13:58:46 +0100146#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147
Dave Airlie689b9d72005-09-30 17:09:07 +1000148int radeon_no_wb;
Dave Airliee9ced8e2013-05-15 01:23:36 +0000149int radeon_modeset = -1;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200150int radeon_dynclks = -1;
151int radeon_r4xx_atom = 0;
152int radeon_agpmode = 0;
153int radeon_vram_limit = 0;
Alex Deucheredcd26e2013-07-05 17:16:51 -0400154int radeon_gart_size = -1; /* auto */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200155int radeon_benchmarking = 0;
Michel Dänzerecc0b322009-07-21 11:23:57 +0200156int radeon_testing = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200157int radeon_connector_table = 0;
Dave Airlie4ce001a2009-08-13 16:32:14 +1000158int radeon_tv = 1;
Alex Deucher8666c072013-09-03 14:58:44 -0400159int radeon_audio = 1;
Alex Deucherf46c0122010-03-31 00:33:27 -0400160int radeon_disp_priority = 0;
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400161int radeon_hw_i2c = 0;
Dave Airlie197bbb32012-06-27 08:35:54 +0100162int radeon_pcie_gen2 = -1;
Alex Deuchera18cee12011-11-01 14:20:30 -0400163int radeon_msi = -1;
Christian König3368ff02012-05-02 15:11:21 +0200164int radeon_lockup_timeout = 10000;
Samuel Lia0a53aa2013-04-08 17:25:47 -0400165int radeon_fastfb = 0;
Alex Deucherda321c82013-04-12 13:55:22 -0400166int radeon_dpm = -1;
Alex Deucher1294d4a2013-07-16 15:58:50 -0400167int radeon_aspm = -1;
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000168int radeon_runtime_pm = -1;
Dave Airlie689b9d72005-09-30 17:09:07 +1000169
Niels de Vos61a2d072008-07-31 00:07:23 -0700170MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
Dave Airlie689b9d72005-09-30 17:09:07 +1000171module_param_named(no_wb, radeon_no_wb, int, 0444);
172
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200173MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
174module_param_named(modeset, radeon_modeset, int, 0400);
175
176MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
177module_param_named(dynclks, radeon_dynclks, int, 0444);
178
179MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
180module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
181
182MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
183module_param_named(vramlimit, radeon_vram_limit, int, 0600);
184
185MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
186module_param_named(agpmode, radeon_agpmode, int, 0444);
187
Alex Deucheredcd26e2013-07-05 17:16:51 -0400188MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200189module_param_named(gartsize, radeon_gart_size, int, 0600);
190
191MODULE_PARM_DESC(benchmark, "Run benchmark");
192module_param_named(benchmark, radeon_benchmarking, int, 0444);
193
Michel Dänzerecc0b322009-07-21 11:23:57 +0200194MODULE_PARM_DESC(test, "Run tests");
195module_param_named(test, radeon_testing, int, 0444);
196
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200197MODULE_PARM_DESC(connector_table, "Force connector table");
198module_param_named(connector_table, radeon_connector_table, int, 0444);
Dave Airlie4ce001a2009-08-13 16:32:14 +1000199
200MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
201module_param_named(tv, radeon_tv, int, 0444);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200202
Alex Deucher805c2212011-06-06 17:39:16 -0400203MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
Christian Koenigdafc3bd2009-10-11 23:49:13 +0200204module_param_named(audio, radeon_audio, int, 0444);
205
Alex Deucherf46c0122010-03-31 00:33:27 -0400206MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
207module_param_named(disp_priority, radeon_disp_priority, int, 0444);
208
Alex Deuchere2b0a8e2010-03-17 02:07:37 -0400209MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
210module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
211
Dave Airlie197bbb32012-06-27 08:35:54 +0100212MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
Alex Deucherd42dd572011-01-12 20:05:11 -0500213module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
214
Alex Deuchera18cee12011-11-01 14:20:30 -0400215MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
216module_param_named(msi, radeon_msi, int, 0444);
217
Christian König3368ff02012-05-02 15:11:21 +0200218MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
219module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
220
Samuel Lia0a53aa2013-04-08 17:25:47 -0400221MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
222module_param_named(fastfb, radeon_fastfb, int, 0444);
223
Alex Deucherda321c82013-04-12 13:55:22 -0400224MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
225module_param_named(dpm, radeon_dpm, int, 0444);
226
Alex Deucher1294d4a2013-07-16 15:58:50 -0400227MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
228module_param_named(aspm, radeon_aspm, int, 0444);
229
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000230MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
231module_param_named(runpm, radeon_runtime_pm, int, 0444);
232
Christian König14adc892013-01-21 13:58:46 +0100233static struct pci_device_id pciidlist[] = {
234 radeon_PCI_IDS
235};
236
237MODULE_DEVICE_TABLE(pci, pciidlist);
238
239#ifdef CONFIG_DRM_RADEON_UMS
240
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700241static int radeon_suspend(struct drm_device *dev, pm_message_t state)
242{
243 drm_radeon_private_t *dev_priv = dev->dev_private;
244
Dave Airlie03efb882009-03-10 18:36:38 +1000245 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
246 return 0;
247
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700248 /* Disable *all* interrupts */
Alex Deucher800b6992009-03-06 11:47:54 -0500249 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700250 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
251 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
252 return 0;
253}
254
255static int radeon_resume(struct drm_device *dev)
256{
257 drm_radeon_private_t *dev_priv = dev->dev_private;
258
Dave Airlie03efb882009-03-10 18:36:38 +1000259 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
260 return 0;
261
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700262 /* Restore interrupt registers */
Alex Deucher800b6992009-03-06 11:47:54 -0500263 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700264 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
265 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
266 return 0;
267}
268
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000269
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700270static const struct file_operations radeon_driver_old_fops = {
271 .owner = THIS_MODULE,
272 .open = drm_open,
273 .release = drm_release,
274 .unlocked_ioctl = drm_ioctl,
275 .mmap = drm_mmap,
276 .poll = drm_poll,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700277 .read = drm_read,
278#ifdef CONFIG_COMPAT
279 .compat_ioctl = radeon_compat_ioctl,
280#endif
281 .llseek = noop_llseek,
282};
283
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200284static struct drm_driver driver_old = {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000285 .driver_features =
Daniel Vetter28185642013-08-08 15:41:27 +0200286 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700287 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
Dave Airlie22eae942005-11-10 22:16:34 +1100289 .load = radeon_driver_load,
290 .firstopen = radeon_driver_firstopen,
291 .open = radeon_driver_open,
292 .preclose = radeon_driver_preclose,
293 .postclose = radeon_driver_postclose,
294 .lastclose = radeon_driver_lastclose,
295 .unload = radeon_driver_unload,
Jesse Barnes0a3e67a2008-09-30 12:14:26 -0700296 .suspend = radeon_suspend,
297 .resume = radeon_resume,
298 .get_vblank_counter = radeon_get_vblank_counter,
299 .enable_vblank = radeon_enable_vblank,
300 .disable_vblank = radeon_disable_vblank,
Dave Airlie60f2ee02008-12-19 10:22:02 +1100301 .master_create = radeon_master_create,
302 .master_destroy = radeon_master_destroy,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303 .irq_preinstall = radeon_driver_irq_preinstall,
304 .irq_postinstall = radeon_driver_irq_postinstall,
305 .irq_uninstall = radeon_driver_irq_uninstall,
306 .irq_handler = radeon_driver_irq_handler,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307 .ioctls = radeon_ioctls,
308 .dma_ioctl = radeon_cp_buffers,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700309 .fops = &radeon_driver_old_fops,
Dave Airlie22eae942005-11-10 22:16:34 +1100310 .name = DRIVER_NAME,
311 .desc = DRIVER_DESC,
312 .date = DRIVER_DATE,
313 .major = DRIVER_MAJOR,
314 .minor = DRIVER_MINOR,
315 .patchlevel = DRIVER_PATCHLEVEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316};
317
Christian König14adc892013-01-21 13:58:46 +0100318#endif
319
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200320static struct drm_driver kms_driver;
321
Tommi Rantala30238152012-11-09 09:19:39 +0000322static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000323{
324 struct apertures_struct *ap;
325 bool primary = false;
326
327 ap = alloc_apertures(1);
Tommi Rantala30238152012-11-09 09:19:39 +0000328 if (!ap)
329 return -ENOMEM;
330
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000331 ap->ranges[0].base = pci_resource_start(pdev, 0);
332 ap->ranges[0].size = pci_resource_len(pdev, 0);
333
334#ifdef CONFIG_X86
335 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
336#endif
337 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
338 kfree(ap);
Tommi Rantala30238152012-11-09 09:19:39 +0000339
340 return 0;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000341}
342
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800343static int radeon_pci_probe(struct pci_dev *pdev,
344 const struct pci_device_id *ent)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200345{
Tommi Rantala30238152012-11-09 09:19:39 +0000346 int ret;
347
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000348 /* Get rid of things like offb */
Tommi Rantala30238152012-11-09 09:19:39 +0000349 ret = radeon_kick_out_firmware_fb(pdev);
350 if (ret)
351 return ret;
Benjamin Herrenschmidta56f7422010-10-06 16:39:07 +0000352
Jordan Crousedcdb1672010-05-27 13:40:25 -0600353 return drm_get_pci_dev(pdev, ent, &kms_driver);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200354}
355
356static void
357radeon_pci_remove(struct pci_dev *pdev)
358{
359 struct drm_device *dev = pci_get_drvdata(pdev);
360
361 drm_put_dev(dev);
362}
363
Dave Airlie7473e832012-09-13 12:02:30 +1000364static int radeon_pmops_suspend(struct device *dev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200365{
Dave Airlie7473e832012-09-13 12:02:30 +1000366 struct pci_dev *pdev = to_pci_dev(dev);
367 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000368 return radeon_suspend_kms(drm_dev, true, true);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200369}
370
Dave Airlie7473e832012-09-13 12:02:30 +1000371static int radeon_pmops_resume(struct device *dev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200372{
Dave Airlie7473e832012-09-13 12:02:30 +1000373 struct pci_dev *pdev = to_pci_dev(dev);
374 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000375 return radeon_resume_kms(drm_dev, true, true);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200376}
377
Dave Airlie7473e832012-09-13 12:02:30 +1000378static int radeon_pmops_freeze(struct device *dev)
379{
380 struct pci_dev *pdev = to_pci_dev(dev);
381 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000382 return radeon_suspend_kms(drm_dev, false, true);
Dave Airlie7473e832012-09-13 12:02:30 +1000383}
384
385static int radeon_pmops_thaw(struct device *dev)
386{
387 struct pci_dev *pdev = to_pci_dev(dev);
388 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000389 return radeon_resume_kms(drm_dev, false, true);
390}
391
392static int radeon_pmops_runtime_suspend(struct device *dev)
393{
394 struct pci_dev *pdev = to_pci_dev(dev);
395 struct drm_device *drm_dev = pci_get_drvdata(pdev);
396 int ret;
397
398 if (radeon_runtime_pm == 0)
399 return -EINVAL;
400
401 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
402 drm_kms_helper_poll_disable(drm_dev);
403 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
404
405 ret = radeon_suspend_kms(drm_dev, false, false);
406 pci_save_state(pdev);
407 pci_disable_device(pdev);
408 pci_set_power_state(pdev, PCI_D3cold);
409 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
410
411 return 0;
412}
413
414static int radeon_pmops_runtime_resume(struct device *dev)
415{
416 struct pci_dev *pdev = to_pci_dev(dev);
417 struct drm_device *drm_dev = pci_get_drvdata(pdev);
418 int ret;
419
420 if (radeon_runtime_pm == 0)
421 return -EINVAL;
422
423 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
424
425 pci_set_power_state(pdev, PCI_D0);
426 pci_restore_state(pdev);
427 ret = pci_enable_device(pdev);
428 if (ret)
429 return ret;
430 pci_set_master(pdev);
431
432 ret = radeon_resume_kms(drm_dev, false, false);
433 drm_kms_helper_poll_enable(drm_dev);
434 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
435 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
436 return 0;
437}
438
439static int radeon_pmops_runtime_idle(struct device *dev)
440{
441 struct pci_dev *pdev = to_pci_dev(dev);
442 struct drm_device *drm_dev = pci_get_drvdata(pdev);
443 struct drm_crtc *crtc;
444
445 if (radeon_runtime_pm == 0)
446 return -EBUSY;
447
448 /* are we PX enabled? */
449 if (radeon_runtime_pm == -1 && !radeon_is_px()) {
450 DRM_DEBUG_DRIVER("failing to power off - not px\n");
451 return -EBUSY;
452 }
453
454 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
455 if (crtc->enabled) {
456 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
457 return -EBUSY;
458 }
459 }
460
461 pm_runtime_mark_last_busy(dev);
462 pm_runtime_autosuspend(dev);
463 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
464 return 1;
465}
466
467long radeon_drm_ioctl(struct file *filp,
468 unsigned int cmd, unsigned long arg)
469{
470 struct drm_file *file_priv = filp->private_data;
471 struct drm_device *dev;
472 long ret;
473 dev = file_priv->minor->dev;
474 ret = pm_runtime_get_sync(dev->dev);
475 if (ret < 0)
476 return ret;
477
478 ret = drm_ioctl(filp, cmd, arg);
479
480 pm_runtime_mark_last_busy(dev->dev);
481 pm_runtime_put_autosuspend(dev->dev);
482 return ret;
Dave Airlie7473e832012-09-13 12:02:30 +1000483}
484
485static const struct dev_pm_ops radeon_pm_ops = {
486 .suspend = radeon_pmops_suspend,
487 .resume = radeon_pmops_resume,
488 .freeze = radeon_pmops_freeze,
489 .thaw = radeon_pmops_thaw,
490 .poweroff = radeon_pmops_freeze,
491 .restore = radeon_pmops_resume,
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000492 .runtime_suspend = radeon_pmops_runtime_suspend,
493 .runtime_resume = radeon_pmops_runtime_resume,
494 .runtime_idle = radeon_pmops_runtime_idle,
Dave Airlie7473e832012-09-13 12:02:30 +1000495};
496
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700497static const struct file_operations radeon_driver_kms_fops = {
498 .owner = THIS_MODULE,
499 .open = drm_open,
500 .release = drm_release,
Dave Airlie10ebc0b2012-09-17 14:40:31 +1000501 .unlocked_ioctl = radeon_drm_ioctl,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700502 .mmap = radeon_mmap,
503 .poll = drm_poll,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700504 .read = drm_read,
505#ifdef CONFIG_COMPAT
506 .compat_ioctl = radeon_kms_compat_ioctl,
507#endif
508};
509
Markus Trippelsdorf846ae412013-10-23 17:07:30 -0400510
511static void
512radeon_pci_shutdown(struct pci_dev *pdev)
513{
514 struct drm_device *dev = pci_get_drvdata(pdev);
515
516 radeon_driver_unload_kms(dev);
517}
518
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200519static struct drm_driver kms_driver = {
520 .driver_features =
Daniel Vetter28185642013-08-08 15:41:27 +0200521 DRIVER_USE_AGP |
Daniel Vetter81e95692013-07-10 14:11:49 +0200522 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
Christian Königf33bcab2013-08-25 18:29:03 +0200523 DRIVER_PRIME | DRIVER_RENDER,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200524 .dev_priv_size = 0,
525 .load = radeon_driver_load_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200526 .open = radeon_driver_open_kms,
527 .preclose = radeon_driver_preclose_kms,
528 .postclose = radeon_driver_postclose_kms,
529 .lastclose = radeon_driver_lastclose_kms,
530 .unload = radeon_driver_unload_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200531 .get_vblank_counter = radeon_get_vblank_counter_kms,
532 .enable_vblank = radeon_enable_vblank_kms,
533 .disable_vblank = radeon_disable_vblank_kms,
Mario Kleinerf5a80202010-10-23 04:42:17 +0200534 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
535 .get_scanout_position = radeon_get_crtc_scanoutpos,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200536#if defined(CONFIG_DEBUG_FS)
537 .debugfs_init = radeon_debugfs_init,
538 .debugfs_cleanup = radeon_debugfs_cleanup,
539#endif
540 .irq_preinstall = radeon_driver_irq_preinstall_kms,
541 .irq_postinstall = radeon_driver_irq_postinstall_kms,
542 .irq_uninstall = radeon_driver_irq_uninstall_kms,
543 .irq_handler = radeon_driver_irq_handler_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200544 .ioctls = radeon_ioctls_kms,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200545 .gem_free_object = radeon_gem_object_free,
Jerome Glisse721604a2012-01-05 22:11:05 -0500546 .gem_open_object = radeon_gem_object_open,
547 .gem_close_object = radeon_gem_object_close,
Dave Airlieff72145b2011-02-07 12:16:14 +1000548 .dumb_create = radeon_mode_dumb_create,
549 .dumb_map_offset = radeon_mode_dumb_mmap,
Daniel Vetter43387b32013-07-16 09:12:04 +0200550 .dumb_destroy = drm_gem_dumb_destroy,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700551 .fops = &radeon_driver_kms_fops,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400552
553 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
554 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000555 .gem_prime_export = drm_gem_prime_export,
556 .gem_prime_import = drm_gem_prime_import,
557 .gem_prime_pin = radeon_gem_prime_pin,
Maarten Lankhorst280cf212013-06-27 13:38:18 +0200558 .gem_prime_unpin = radeon_gem_prime_unpin,
Aaron Plattner1e6d17a2013-01-15 20:47:44 +0000559 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
560 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
561 .gem_prime_vmap = radeon_gem_prime_vmap,
562 .gem_prime_vunmap = radeon_gem_prime_vunmap,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400563
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200564 .name = DRIVER_NAME,
565 .desc = DRIVER_DESC,
566 .date = DRIVER_DATE,
567 .major = KMS_DRIVER_MAJOR,
568 .minor = KMS_DRIVER_MINOR,
569 .patchlevel = KMS_DRIVER_PATCHLEVEL,
570};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200571
572static struct drm_driver *driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000573static struct pci_driver *pdriver;
574
Christian König14adc892013-01-21 13:58:46 +0100575#ifdef CONFIG_DRM_RADEON_UMS
Dave Airlie8410ea32010-12-15 03:16:38 +1000576static struct pci_driver radeon_pci_driver = {
577 .name = DRIVER_NAME,
578 .id_table = pciidlist,
579};
Christian König14adc892013-01-21 13:58:46 +0100580#endif
Dave Airlie8410ea32010-12-15 03:16:38 +1000581
582static struct pci_driver radeon_kms_pci_driver = {
583 .name = DRIVER_NAME,
584 .id_table = pciidlist,
585 .probe = radeon_pci_probe,
586 .remove = radeon_pci_remove,
Dave Airlie7473e832012-09-13 12:02:30 +1000587 .driver.pm = &radeon_pm_ops,
Markus Trippelsdorf846ae412013-10-23 17:07:30 -0400588 .shutdown = radeon_pci_shutdown,
Dave Airlie8410ea32010-12-15 03:16:38 +1000589};
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200590
Linus Torvalds1da177e2005-04-16 15:20:36 -0700591static int __init radeon_init(void)
592{
Dave Airliee9ced8e2013-05-15 01:23:36 +0000593#ifdef CONFIG_VGA_CONSOLE
594 if (vgacon_text_force() && radeon_modeset == -1) {
595 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
596 radeon_modeset = 0;
597 }
598#endif
599 /* set to modesetting by default if not nomodeset */
600 if (radeon_modeset == -1)
601 radeon_modeset = 1;
602
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200603 if (radeon_modeset == 1) {
604 DRM_INFO("radeon kernel modesetting enabled.\n");
605 driver = &kms_driver;
Dave Airlie8410ea32010-12-15 03:16:38 +1000606 pdriver = &radeon_kms_pci_driver;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200607 driver->driver_features |= DRIVER_MODESET;
608 driver->num_ioctls = radeon_max_kms_ioctl;
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000609 radeon_register_atpx_handler();
Christian König14adc892013-01-21 13:58:46 +0100610
611 } else {
612#ifdef CONFIG_DRM_RADEON_UMS
613 DRM_INFO("radeon userspace modesetting enabled.\n");
614 driver = &driver_old;
615 pdriver = &radeon_pci_driver;
616 driver->driver_features &= ~DRIVER_MODESET;
617 driver->num_ioctls = radeon_max_ioctl;
618#else
619 DRM_ERROR("No UMS support in radeon module!\n");
620 return -EINVAL;
621#endif
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200622 }
Christian König14adc892013-01-21 13:58:46 +0100623
624 /* let modprobe override vga console setting */
Dave Airlie8410ea32010-12-15 03:16:38 +1000625 return drm_pci_init(driver, pdriver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626}
627
628static void __exit radeon_exit(void)
629{
Dave Airlie8410ea32010-12-15 03:16:38 +1000630 drm_pci_exit(driver, pdriver);
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000631 radeon_unregister_atpx_handler();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632}
633
Jerome Glisse176f6132009-06-22 18:16:13 +0200634module_init(radeon_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635module_exit(radeon_exit);
636
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000637MODULE_AUTHOR(DRIVER_AUTHOR);
638MODULE_DESCRIPTION(DRIVER_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639MODULE_LICENSE("GPL and additional rights");